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at91sam9260.c (238389) at91sam9260.c (238390)
1/*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 * Copyright (c) 2010 Greg Ansley. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 * Copyright (c) 2010 Greg Ansley. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9260.c 238389 2012-07-12 02:58:45Z imp $");
28__FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9260.c 238390 2012-07-12 04:23:11Z imp $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/kernel.h>
34#include <sys/malloc.h>
35#include <sys/module.h>
36

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43#include <arm/at91/at91_aicreg.h>
44#include <arm/at91/at91sam9260reg.h>
45#include <arm/at91/at91_pitreg.h>
46#include <arm/at91/at91_pmcreg.h>
47#include <arm/at91/at91_pmcvar.h>
48#include <arm/at91/at91_rstreg.h>
49
50struct at91sam9_softc {
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/kernel.h>
34#include <sys/malloc.h>
35#include <sys/module.h>
36

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43#include <arm/at91/at91_aicreg.h>
44#include <arm/at91/at91sam9260reg.h>
45#include <arm/at91/at91_pitreg.h>
46#include <arm/at91/at91_pmcreg.h>
47#include <arm/at91/at91_pmcvar.h>
48#include <arm/at91/at91_rstreg.h>
49
50struct at91sam9_softc {
51 device_t dev;
52 bus_space_tag_t sc_st;
53 bus_space_handle_t sc_sh;
54 bus_space_handle_t sc_matrix_sh;
55};
56
57/*
58 * Standard priority levels for the system. 0 is lowest and 7 is highest.
59 * These values are the ones Atmel uses for its Linux port

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124 DEVICE("spi", SPI1, 1),
125 DEVICE("ate", EMAC, 0),
126 DEVICE("macb", EMAC, 0),
127 DEVICE("nand", NAND, 0),
128 DEVICE("ohci", OHCI, 0),
129 { 0, 0, 0, 0, 0 }
130};
131
51 bus_space_tag_t sc_st;
52 bus_space_handle_t sc_sh;
53 bus_space_handle_t sc_matrix_sh;
54};
55
56/*
57 * Standard priority levels for the system. 0 is lowest and 7 is highest.
58 * These values are the ones Atmel uses for its Linux port

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123 DEVICE("spi", SPI1, 1),
124 DEVICE("ate", EMAC, 0),
125 DEVICE("macb", EMAC, 0),
126 DEVICE("nand", NAND, 0),
127 DEVICE("ohci", OHCI, 0),
128 { 0, 0, 0, 0, 0 }
129};
130
132static void
133at91_cpu_add_builtin_children(device_t dev)
134{
135 int i;
136 const struct cpu_devs *walker;
137
138 for (i = 1, walker = at91_devs; walker->name; i++, walker++) {
139 at91_add_child(dev, i, walker->name, walker->unit,
140 walker->mem_base, walker->mem_len, walker->irq0,
141 walker->irq1, walker->irq2);
142 }
143}
144
145static uint32_t
146at91_pll_outa(int freq)
147{
148
149 if (freq > 195000000)
150 return (0x20000000);
151 else
152 return (0x20008000);

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158
159 return (0x4000);
160}
161
162static void
163at91_identify(driver_t *drv, device_t parent)
164{
165
131static uint32_t
132at91_pll_outa(int freq)
133{
134
135 if (freq > 195000000)
136 return (0x20000000);
137 else
138 return (0x20008000);

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144
145 return (0x4000);
146}
147
148static void
149at91_identify(driver_t *drv, device_t parent)
150{
151
166 if (soc_info.type == AT91_T_SAM9260) {
152 if (soc_info.type == AT91_T_SAM9260)
167 at91_add_child(parent, 0, "at91sam9260", 0, 0, 0, -1, 0, 0);
153 at91_add_child(parent, 0, "at91sam9260", 0, 0, 0, -1, 0, 0);
168 at91_cpu_add_builtin_children(parent);
169 }
170}
171
172static int
173at91_probe(device_t dev)
174{
175
176 device_set_desc(dev, soc_info.name);
177 return (0);

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182{
183 struct at91_pmc_clock *clk;
184 struct at91sam9_softc *sc = device_get_softc(dev);
185 struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
186 uint32_t i;
187
188 sc->sc_st = at91sc->sc_st;
189 sc->sc_sh = at91sc->sc_sh;
154}
155
156static int
157at91_probe(device_t dev)
158{
159
160 device_set_desc(dev, soc_info.name);
161 return (0);

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166{
167 struct at91_pmc_clock *clk;
168 struct at91sam9_softc *sc = device_get_softc(dev);
169 struct at91_softc *at91sc = device_get_softc(device_get_parent(dev));
170 uint32_t i;
171
172 sc->sc_st = at91sc->sc_st;
173 sc->sc_sh = at91sc->sc_sh;
190 sc->dev = dev;
191
192 if (bus_space_subregion(sc->sc_st, sc->sc_sh,
193 AT91SAM9260_MATRIX_BASE, AT91SAM9260_MATRIX_SIZE,
194 &sc->sc_matrix_sh) != 0)
195 panic("Enable to map matrix registers");
196
197 /* activate NAND */
198 i = bus_space_read_4(sc->sc_st, sc->sc_matrix_sh,

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264
265DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass,
266 NULL, NULL);
267
268static struct at91_soc_data soc_data = {
269 .soc_delay = at91_pit_delay,
270 .soc_reset = at91_rst_cpu_reset,
271 .soc_irq_prio = at91_irq_prio,
174
175 if (bus_space_subregion(sc->sc_st, sc->sc_sh,
176 AT91SAM9260_MATRIX_BASE, AT91SAM9260_MATRIX_SIZE,
177 &sc->sc_matrix_sh) != 0)
178 panic("Enable to map matrix registers");
179
180 /* activate NAND */
181 i = bus_space_read_4(sc->sc_st, sc->sc_matrix_sh,

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247
248DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass,
249 NULL, NULL);
250
251static struct at91_soc_data soc_data = {
252 .soc_delay = at91_pit_delay,
253 .soc_reset = at91_rst_cpu_reset,
254 .soc_irq_prio = at91_irq_prio,
255 .soc_children = at91_devs,
272};
273
274AT91_SOC(AT91_T_SAM9260, &soc_data);
256};
257
258AT91_SOC(AT91_T_SAM9260, &soc_data);