1/*-
2 * Copyright (c) 2010 Greg Ansley. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26/*
| 1/*-
2 * Copyright (c) 2010 Greg Ansley. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26/*
|
27 * The sam9 watchdog hardware can be programed only once. So we set the hardware
28 * watchdog to 16s in wdt_attach and only reset it in the wdt_tick
29 * handler. The watchdog is halted in processor debug mode.
| 27 * The SAM9 watchdog hardware can be programed only once. So we set the
28 * hardware watchdog to 16 s in wdt_attach and only reset it in the wdt_tick
29 * handler. The watchdog is halted in processor debug mode.
|
30 */
31
32#include <sys/cdefs.h>
| 30 */
31
32#include <sys/cdefs.h>
|
33__FBSDID("$FreeBSD: head/sys/arm/at91/at91_wdt.c 221025 2011-04-25 18:15:45Z cognet $");
| 33__FBSDID("$FreeBSD: head/sys/arm/at91/at91_wdt.c 234281 2012-04-14 11:29:32Z marius $");
|
34
35#include <sys/param.h>
36#include <sys/bus.h>
37#include <sys/kdb.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/systm.h>
41#include <sys/watchdog.h>
42
43#include <machine/bus.h>
44
45#include <arm/at91/at91var.h>
46#include <arm/at91/at91_wdtreg.h>
47
48struct wdt_softc {
49 struct mtx sc_mtx;
50 device_t sc_dev;
51 struct resource *mem_res;
52 struct callout tick_ch;
53 eventhandler_tag sc_wet;
54 void *intrhand;
| 34
35#include <sys/param.h>
36#include <sys/bus.h>
37#include <sys/kdb.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/systm.h>
41#include <sys/watchdog.h>
42
43#include <machine/bus.h>
44
45#include <arm/at91/at91var.h>
46#include <arm/at91/at91_wdtreg.h>
47
48struct wdt_softc {
49 struct mtx sc_mtx;
50 device_t sc_dev;
51 struct resource *mem_res;
52 struct callout tick_ch;
53 eventhandler_tag sc_wet;
54 void *intrhand;
|
55 u_int cmd;
56 u_int interval;
| 55 u_int cmd;
56 u_int interval;
|
57};
58
59static inline uint32_t
60RD4(struct wdt_softc *sc, bus_size_t off)
61{
| 57};
58
59static inline uint32_t
60RD4(struct wdt_softc *sc, bus_size_t off)
61{
|
| 62
|
62 return (bus_read_4(sc->mem_res, off));
63}
64
65static inline void
66WR4(struct wdt_softc *sc, bus_size_t off, uint32_t val)
67{
| 63 return (bus_read_4(sc->mem_res, off));
64}
65
66static inline void
67WR4(struct wdt_softc *sc, bus_size_t off, uint32_t val)
68{
|
| 69
|
68 bus_write_4(sc->mem_res, off, val);
69}
70
71static int
72wdt_intr(void *argp)
73{
74 struct wdt_softc *sc = argp;
75
76
77 if (RD4(sc, WDT_SR) & (WDT_WDUNF | WDT_WDERR)) {
78#if defined(KDB) && !defined(KDB_UNATTENDED)
79 kdb_backtrace();
80 kdb_enter(KDB_WHY_WATCHDOG, "watchdog timeout");
81#else
82 panic("watchdog timeout");
83#endif
84 }
85 return (FILTER_STRAY);
86}
87
88/* User interface, see watchdog(9) */
89static void
90wdt_watchdog(void *argp, u_int cmd, int *error)
91{
92 struct wdt_softc *sc = argp;
93 u_int interval;
94
95 mtx_lock(&sc->sc_mtx);
96
97 *error = 0;
98 sc->cmd = 0;
99 interval = cmd & WD_INTERVAL;
100 if (interval > WD_TO_16SEC)
101 *error = EOPNOTSUPP;
102 else if (interval > 0)
103 sc->cmd = interval | WD_ACTIVE;
104
105 /* We cannot turn off our watchdog so if user
106 * fails to turn us on go to passive mode. */
107 if ((sc->cmd & WD_ACTIVE) == 0)
108 sc->cmd = WD_PASSIVE;
109
110 mtx_unlock(&sc->sc_mtx);
111}
112
113/* This routine is called no matter what state the user sets the
114 * watchdog mode to. Called at a rate that is slightly less than
115 * half the hardware timeout. */
116static void
117wdt_tick(void *argp)
118{
119 struct wdt_softc *sc = argp;
120
121 mtx_assert(&sc->sc_mtx, MA_OWNED);
122 if (sc->cmd & (WD_ACTIVE | WD_PASSIVE))
123 WR4(sc, WDT_CR, WDT_KEY|WDT_WDRSTT);
124
125 sc->cmd &= WD_PASSIVE;
126 callout_reset(&sc->tick_ch, sc->interval, wdt_tick, sc);
127}
128
129static int
130wdt_probe(device_t dev)
131{
132
133 if (at91_is_sam9()) {
134 device_set_desc(dev, "WDT");
135 return (0);
136 }
137 return (ENXIO);
138}
139
140static int
141wdt_attach(device_t dev)
142{
143 static struct wdt_softc *sc;
144 struct resource *irq;
145 uint32_t wdt_mr;
146 int rid, err;
147
148 sc = device_get_softc(dev);
149 sc->cmd = WD_PASSIVE;
150 sc->sc_dev = dev;
151
152 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "at91_wdt", MTX_DEF);
153 callout_init_mtx(&sc->tick_ch, &sc->sc_mtx, 0);
154
155 rid = 0;
156 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
157 RF_ACTIVE);
158
159 if (sc->mem_res == NULL)
| 70 bus_write_4(sc->mem_res, off, val);
71}
72
73static int
74wdt_intr(void *argp)
75{
76 struct wdt_softc *sc = argp;
77
78
79 if (RD4(sc, WDT_SR) & (WDT_WDUNF | WDT_WDERR)) {
80#if defined(KDB) && !defined(KDB_UNATTENDED)
81 kdb_backtrace();
82 kdb_enter(KDB_WHY_WATCHDOG, "watchdog timeout");
83#else
84 panic("watchdog timeout");
85#endif
86 }
87 return (FILTER_STRAY);
88}
89
90/* User interface, see watchdog(9) */
91static void
92wdt_watchdog(void *argp, u_int cmd, int *error)
93{
94 struct wdt_softc *sc = argp;
95 u_int interval;
96
97 mtx_lock(&sc->sc_mtx);
98
99 *error = 0;
100 sc->cmd = 0;
101 interval = cmd & WD_INTERVAL;
102 if (interval > WD_TO_16SEC)
103 *error = EOPNOTSUPP;
104 else if (interval > 0)
105 sc->cmd = interval | WD_ACTIVE;
106
107 /* We cannot turn off our watchdog so if user
108 * fails to turn us on go to passive mode. */
109 if ((sc->cmd & WD_ACTIVE) == 0)
110 sc->cmd = WD_PASSIVE;
111
112 mtx_unlock(&sc->sc_mtx);
113}
114
115/* This routine is called no matter what state the user sets the
116 * watchdog mode to. Called at a rate that is slightly less than
117 * half the hardware timeout. */
118static void
119wdt_tick(void *argp)
120{
121 struct wdt_softc *sc = argp;
122
123 mtx_assert(&sc->sc_mtx, MA_OWNED);
124 if (sc->cmd & (WD_ACTIVE | WD_PASSIVE))
125 WR4(sc, WDT_CR, WDT_KEY|WDT_WDRSTT);
126
127 sc->cmd &= WD_PASSIVE;
128 callout_reset(&sc->tick_ch, sc->interval, wdt_tick, sc);
129}
130
131static int
132wdt_probe(device_t dev)
133{
134
135 if (at91_is_sam9()) {
136 device_set_desc(dev, "WDT");
137 return (0);
138 }
139 return (ENXIO);
140}
141
142static int
143wdt_attach(device_t dev)
144{
145 static struct wdt_softc *sc;
146 struct resource *irq;
147 uint32_t wdt_mr;
148 int rid, err;
149
150 sc = device_get_softc(dev);
151 sc->cmd = WD_PASSIVE;
152 sc->sc_dev = dev;
153
154 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "at91_wdt", MTX_DEF);
155 callout_init_mtx(&sc->tick_ch, &sc->sc_mtx, 0);
156
157 rid = 0;
158 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
159 RF_ACTIVE);
160
161 if (sc->mem_res == NULL)
|
160 panic("couldn't allocate wdt register resources");
| 162 panic("couldn't allocate wdt register resources");
|
161
162 wdt_mr = RD4(sc, WDT_MR);
163 if ((wdt_mr & WDT_WDRSTEN) == 0)
164 device_printf(dev, "Watchdog disabled! (Boot ROM?)\n");
165 else {
166#ifdef WDT_RESET
167 /* Rude, full reset of whole system on watch dog timeout */
168 WR4(sc, WDT_MR, WDT_WDDBGHLT | WDT_WDD(0xC00)|
169 WDT_WDRSTEN| WDT_WDV(0xFFF));
170#else
171 /* Generate stack trace and panic on watchdog timeout*/
172 WR4(sc, WDT_MR, WDT_WDDBGHLT | WDT_WDD(0xC00)|
173 WDT_WDFIEN| WDT_WDV(0xFFF));
174#endif
| 163
164 wdt_mr = RD4(sc, WDT_MR);
165 if ((wdt_mr & WDT_WDRSTEN) == 0)
166 device_printf(dev, "Watchdog disabled! (Boot ROM?)\n");
167 else {
168#ifdef WDT_RESET
169 /* Rude, full reset of whole system on watch dog timeout */
170 WR4(sc, WDT_MR, WDT_WDDBGHLT | WDT_WDD(0xC00)|
171 WDT_WDRSTEN| WDT_WDV(0xFFF));
172#else
173 /* Generate stack trace and panic on watchdog timeout*/
174 WR4(sc, WDT_MR, WDT_WDDBGHLT | WDT_WDD(0xC00)|
175 WDT_WDFIEN| WDT_WDV(0xFFF));
176#endif
|
175 /* This may have been set by Boot ROM so register value
176 * may not be what we just requested since this is a
177 * write once register. */
| 177 /*
178 * This may have been set by Boot ROM so register value may
179 * not be what we just requested since this is a write once
180 * register.
181 */
|
178 wdt_mr = RD4(sc, WDT_MR);
179 if (wdt_mr & WDT_WDFIEN) {
180 rid = 0;
181 irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
182 RF_ACTIVE | RF_SHAREABLE);
183 if (!irq)
184 panic("could not allocate interrupt.\n");
185
186 err = bus_setup_intr(dev, irq, INTR_TYPE_CLK, wdt_intr,
| 182 wdt_mr = RD4(sc, WDT_MR);
183 if (wdt_mr & WDT_WDFIEN) {
184 rid = 0;
185 irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
186 RF_ACTIVE | RF_SHAREABLE);
187 if (!irq)
188 panic("could not allocate interrupt.\n");
189
190 err = bus_setup_intr(dev, irq, INTR_TYPE_CLK, wdt_intr,
|
187 NULL, sc, &sc->intrhand);
| 191 NULL, sc, &sc->intrhand);
|
188 }
189
190 /* interval * hz */
191 sc->interval = (((wdt_mr & WDT_WDV(~0)) + 1) * WDT_DIV) /
| 192 }
193
194 /* interval * hz */
195 sc->interval = (((wdt_mr & WDT_WDV(~0)) + 1) * WDT_DIV) /
|
192 (WDT_CLOCK/hz);
| 196 (WDT_CLOCK/hz);
|
193
194 device_printf(dev, "watchdog timeout: %d seconds\n",
| 197
198 device_printf(dev, "watchdog timeout: %d seconds\n",
|
195 sc->interval/hz);
| 199 sc->interval / hz);
|
196
197 /* Slightly less than 1/2 of watchdog hardware timeout */
198 sc->interval = (sc->interval/2) - (sc->interval/20);
199 callout_reset(&sc->tick_ch, sc->interval, wdt_tick, sc);
200
201 /* Register us as a watchdog */
202 sc->sc_wet = EVENTHANDLER_REGISTER(watchdog_list,
203 wdt_watchdog, sc, 0);
204 }
205 return (0);
206}
207
208static device_method_t wdt_methods[] = {
209 DEVMETHOD(device_probe, wdt_probe),
210 DEVMETHOD(device_attach, wdt_attach),
| 200
201 /* Slightly less than 1/2 of watchdog hardware timeout */
202 sc->interval = (sc->interval/2) - (sc->interval/20);
203 callout_reset(&sc->tick_ch, sc->interval, wdt_tick, sc);
204
205 /* Register us as a watchdog */
206 sc->sc_wet = EVENTHANDLER_REGISTER(watchdog_list,
207 wdt_watchdog, sc, 0);
208 }
209 return (0);
210}
211
212static device_method_t wdt_methods[] = {
213 DEVMETHOD(device_probe, wdt_probe),
214 DEVMETHOD(device_attach, wdt_attach),
|
211 {0,0},
| 215 DEVMETHOD_END
|
212};
213
214static driver_t wdt_driver = {
215 "at91_wdt",
216 wdt_methods,
217 sizeof(struct wdt_softc),
218};
219
220static devclass_t wdt_devclass;
221
| 216};
217
218static driver_t wdt_driver = {
219 "at91_wdt",
220 wdt_methods,
221 sizeof(struct wdt_softc),
222};
223
224static devclass_t wdt_devclass;
225
|
222DRIVER_MODULE(at91_wdt, atmelarm, wdt_driver, wdt_devclass, 0, 0);
| 226DRIVER_MODULE(at91_wdt, atmelarm, wdt_driver, wdt_devclass, NULL, NULL);
|
| |