1/*-
2 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25#include <sys/cdefs.h>
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27
28#include <dev/usb2/include/usb2_mfunc.h>
29#include <dev/usb2/include/usb2_defs.h>
30#include <dev/usb2/include/usb2_standard.h>
31
32#include <dev/usb2/core/usb2_core.h>
33#include <dev/usb2/core/usb2_busdma.h>
34#include <dev/usb2/core/usb2_process.h>
35#include <dev/usb2/core/usb2_config_td.h>
36#include <dev/usb2/core/usb2_sw_transfer.h>
37#include <dev/usb2/core/usb2_util.h>
38
39#include <dev/usb2/controller/usb2_controller.h>
40#include <dev/usb2/controller/usb2_bus.h>
41#include <dev/usb2/controller/ohci2.h>
42
43#include <sys/rman.h>
44
45#include <arm/at91/at91_pmcvar.h>
46
47#define MEM_RID 0
48
49static device_probe_t ohci_atmelarm_probe;
50static device_attach_t ohci_atmelarm_attach;
51static device_detach_t ohci_atmelarm_detach;
52
53struct at91_ohci_softc {
54 struct ohci_softc sc_ohci; /* must be first */
55 struct at91_pmc_clock *iclk;
56 struct at91_pmc_clock *fclk;
57};
58
59static int
60ohci_atmelarm_probe(device_t dev)
61{
62 device_set_desc(dev, "AT91 integrated OHCI controller");
63 return (BUS_PROBE_DEFAULT);
64}
65
66static int
67ohci_atmelarm_attach(device_t dev)
68{
69 struct at91_ohci_softc *sc = device_get_softc(dev);
70 int err;
71 int rid;
72
73 if (sc == NULL) {
74 return (ENXIO);
75 }
76 /* get all DMA memory */
77
78 if (usb2_bus_mem_alloc_all(&sc->sc_ohci.sc_bus,
79 USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
80 return ENOMEM;
81 }
82 sc->iclk = at91_pmc_clock_ref("ohci_clk");
83 sc->fclk = at91_pmc_clock_ref("uhpck");
84
85 sc->sc_ohci.sc_dev = dev;
86
87 rid = MEM_RID;
88 sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
89 &rid, RF_ACTIVE);
90
91 if (!(sc->sc_ohci.sc_io_res)) {
92 err = ENOMEM;
93 goto error;
94 }
95 sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res);
96 sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res);
97 sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res);
98
99 rid = 0;
100 sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
101 RF_ACTIVE);
102 if (!(sc->sc_ohci.sc_irq_res)) {
103 goto error;
104 }
105 sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
106 if (!(sc->sc_ohci.sc_bus.bdev)) {
107 goto error;
108 }
109 device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus);
110
111 strlcpy(sc->sc_ohci.sc_vendor, "Atmel", sizeof(sc->sc_ohci.sc_vendor));
112
113 err = usb2_config_td_setup(&sc->sc_ohci.sc_config_td, sc,
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115 if (err) {
116 device_printf(dev, "could not setup config thread!\n");
117 goto error;
118 }
119#if (__FreeBSD_version >= 700031)
120 err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
121 NULL, (void *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl);
122#else
123 err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
124 (void *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl);
125#endif
126 if (err) {
127 sc->sc_ohci.sc_intr_hdl = NULL;
128 goto error;
129 }
130 /*
131 * turn on the clocks from the AT91's point of view. Keep the unit in reset.
132 */
133 at91_pmc_clock_enable(sc->iclk);
134 at91_pmc_clock_enable(sc->fclk);
135 bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
136 OHCI_CONTROL, 0);
137
138 err = ohci_init(&sc->sc_ohci);
139 if (!err) {
140 err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev);
141 }
142 if (err) {
143 goto error;
144 }
145 return (0);
146
147error:
148 ohci_atmelarm_detach(dev);
149 return (ENXIO);
150}
151
152static int
153ohci_atmelarm_detach(device_t dev)
154{
155 struct at91_ohci_softc *sc = device_get_softc(dev);
156 device_t bdev;
157 int err;
158
159 if (sc->sc_ohci.sc_bus.bdev) {
160 bdev = sc->sc_ohci.sc_bus.bdev;
161 device_detach(bdev);
162 device_delete_child(dev, bdev);
163 }
164 /* during module unload there are lots of children leftover */
165 device_delete_all_children(dev);
166
167 /*
168 * Put the controller into reset, then disable clocks and do
169 * the MI tear down. We have to disable the clocks/hardware
170 * after we do the rest of the teardown. We also disable the
171 * clocks in the opposite order we acquire them, but that
172 * doesn't seem to be absolutely necessary. We free up the
173 * clocks after we disable them, so the system could, in
174 * theory, reuse them.
175 */
176 bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
177 OHCI_CONTROL, 0);
178
179 at91_pmc_clock_disable(sc->fclk);
180 at91_pmc_clock_disable(sc->iclk);
181 at91_pmc_clock_deref(sc->fclk);
182 at91_pmc_clock_deref(sc->iclk);
183
184 if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) {
185 /*
186 * only call ohci_detach() after ohci_init()
187 */
188 ohci_detach(&sc->sc_ohci);
189
190 err = bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res, sc->sc_ohci.sc_intr_hdl);
191 sc->sc_ohci.sc_intr_hdl = NULL;
192 }
193 if (sc->sc_ohci.sc_irq_res) {
194 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res);
195 sc->sc_ohci.sc_irq_res = NULL;
196 }
197 if (sc->sc_ohci.sc_io_res) {
198 bus_release_resource(dev, SYS_RES_MEMORY, MEM_RID,
199 sc->sc_ohci.sc_io_res);
200 sc->sc_ohci.sc_io_res = NULL;
201 }
202 usb2_config_td_unsetup(&sc->sc_ohci.sc_config_td);
203
204 usb2_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc);
205
206 return (0);
207}
208
209static device_method_t ohci_methods[] = {
210 /* Device interface */
211 DEVMETHOD(device_probe, ohci_atmelarm_probe),
212 DEVMETHOD(device_attach, ohci_atmelarm_attach),
213 DEVMETHOD(device_detach, ohci_atmelarm_detach),
214 DEVMETHOD(device_shutdown, bus_generic_shutdown),
215
216 /* Bus interface */
217 DEVMETHOD(bus_print_child, bus_generic_print_child),
218
219 {0, 0}
220};
221
222static driver_t ohci_driver = {
223 "ohci",
224 ohci_methods,
225 sizeof(struct at91_ohci_softc),
226};
227
228static devclass_t ohci_devclass;
229
230DRIVER_MODULE(ohci, atmelarm, ohci_driver, ohci_devclass, 0, 0);
231MODULE_DEPEND(ohci, usb2_controller, 1, 1, 1);
232MODULE_DEPEND(ohci, usb2_core, 1, 1, 1);
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