| socfpga_common.c (271093) | socfpga_common.c (271431) |
|---|---|
| 1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * --- 15 unchanged lines hidden (view full) --- 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * --- 15 unchanged lines hidden (view full) --- 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> |
| 32__FBSDID("$FreeBSD: head/sys/arm/altera/socfpga/socfpga_common.c 271093 2014-09-04 12:44:40Z br $"); | 32__FBSDID("$FreeBSD: head/sys/arm/altera/socfpga/socfpga_common.c 271431 2014-09-11 18:12:28Z br $"); |
| 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bus.h> 37#include <sys/kernel.h> 38 39#include <dev/fdt/fdt_common.h> 40#include <dev/ofw/openfirm.h> 41 42#include <machine/bus.h> 43#include <machine/fdt.h> 44 | 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bus.h> 37#include <sys/kernel.h> 38 39#include <dev/fdt/fdt_common.h> 40#include <dev/ofw/openfirm.h> 41 42#include <machine/bus.h> 43#include <machine/fdt.h> 44 |
| 45#define RESMAN_BASE 0xFFD05000 46#define RESMAN_CTRL 0x4 47#define SWWARMRSTREQ (1 << 1) | 45#include <arm/altera/socfpga/socfpga_rstmgr.h> |
| 48 49void 50cpu_reset(void) 51{ | 46 47void 48cpu_reset(void) 49{ |
| 50 uint32_t addr, paddr; |
|
| 52 bus_addr_t vaddr; | 51 bus_addr_t vaddr; |
| 52 phandle_t node; |
|
| 53 | 53 |
| 54 if (bus_space_map(fdtbus_bs_tag, RESMAN_BASE, 0x10, 0, &vaddr) == 0) { 55 bus_space_write_4(fdtbus_bs_tag, vaddr, 56 RESMAN_CTRL, SWWARMRSTREQ); | 54 if (rstmgr_warmreset() == 0) 55 goto end; 56 57 node = OF_finddevice("rstmgr"); 58 if (node == -1) 59 goto end; 60 61 if ((OF_getprop(node, "reg", &paddr, sizeof(paddr))) > 0) { 62 addr = fdt32_to_cpu(paddr); 63 if (bus_space_map(fdtbus_bs_tag, addr, 0x8, 0, &vaddr) == 0) { 64 bus_space_write_4(fdtbus_bs_tag, vaddr, 65 RSTMGR_CTRL, CTRL_SWWARMRSTREQ); 66 } |
| 57 } 58 | 67 } 68 |
| 69end: |
|
| 59 while (1); 60} 61 62struct fdt_fixup_entry fdt_fixup_table[] = { 63 { NULL, NULL } 64}; 65 66static int --- 17 unchanged lines hidden --- | 70 while (1); 71} 72 73struct fdt_fixup_entry fdt_fixup_table[] = { 74 { NULL, NULL } 75}; 76 77static int --- 17 unchanged lines hidden --- |