specialreg.h (199968) | specialreg.h (204907) |
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1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 |
30 * $FreeBSD: head/sys/amd64/include/specialreg.h 199968 2009-11-30 11:11:08Z avg $ | 30 * $FreeBSD: head/sys/amd64/include/specialreg.h 204907 2010-03-09 03:30:31Z alc $ |
31 */ 32 33#ifndef _MACHINE_SPECIALREG_H_ 34#define _MACHINE_SPECIALREG_H_ 35 36/* 37 * Bits in 386 special registers: 38 */ --- 450 unchanged lines hidden (view full) --- 489#define MSR_SYSCFG 0xc0010010 490#define MSR_IORRBASE0 0xc0010016 491#define MSR_IORRMASK0 0xc0010017 492#define MSR_IORRBASE1 0xc0010018 493#define MSR_IORRMASK1 0xc0010019 494#define MSR_TOP_MEM 0xc001001a /* boundary for ram below 4G */ 495#define MSR_TOP_MEM2 0xc001001d /* boundary for ram above 4G */ 496#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */ | 31 */ 32 33#ifndef _MACHINE_SPECIALREG_H_ 34#define _MACHINE_SPECIALREG_H_ 35 36/* 37 * Bits in 386 special registers: 38 */ --- 450 unchanged lines hidden (view full) --- 489#define MSR_SYSCFG 0xc0010010 490#define MSR_IORRBASE0 0xc0010016 491#define MSR_IORRMASK0 0xc0010017 492#define MSR_IORRBASE1 0xc0010018 493#define MSR_IORRMASK1 0xc0010019 494#define MSR_TOP_MEM 0xc001001a /* boundary for ram below 4G */ 495#define MSR_TOP_MEM2 0xc001001d /* boundary for ram above 4G */ 496#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */ |
497#define MSR_MC0_CTL_MASK 0xc0010044 498#define MSR_MC1_CTL_MASK 0xc0010045 |
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497 498/* VIA ACE crypto featureset: for via_feature_rng */ 499#define VIA_HAS_RNG 1 /* cpu has RNG */ 500 501/* VIA ACE crypto featureset: for via_feature_xcrypt */ 502#define VIA_HAS_AES 1 /* cpu has AES */ 503#define VIA_HAS_SHA 2 /* cpu has SHA1 & SHA256 */ 504#define VIA_HAS_MM 4 /* cpu has RSA instructions */ --- 30 unchanged lines hidden --- | 499 500/* VIA ACE crypto featureset: for via_feature_rng */ 501#define VIA_HAS_RNG 1 /* cpu has RNG */ 502 503/* VIA ACE crypto featureset: for via_feature_xcrypt */ 504#define VIA_HAS_AES 1 /* cpu has AES */ 505#define VIA_HAS_SHA 2 /* cpu has SHA1 & SHA256 */ 506#define VIA_HAS_MM 4 /* cpu has RSA instructions */ --- 30 unchanged lines hidden --- |