pcpu.h (35087) | pcpu.h (36125) |
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1/*- 2 * Copyright (c) Peter Wemm <peter@netplex.com.au> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) Peter Wemm <peter@netplex.com.au> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
26 * $Id: globaldata.h,v 1.1 1998/04/06 15:37:21 peter Exp $ | 26 * $Id: globaldata.h,v 1.2 1998/04/06 18:59:15 peter Exp $ |
27 */ 28 29/* 30 * This structure maps out the global data that needs to be kept on a 31 * per-cpu basis. genassym uses this to generate offsets for the assembler 32 * code, which also provides external symbols so that C can get at them as 33 * though they were really globals. 34 * --- 17 unchanged lines hidden (view full) --- 52 u_int cpuid; 53 u_int cpu_lockid; 54 u_int other_cpus; 55 pd_entry_t *my_idlePTD; 56 u_int ss_tpr; 57 pt_entry_t *prv_CMAP1; 58 pt_entry_t *prv_CMAP2; 59 pt_entry_t *prv_CMAP3; | 27 */ 28 29/* 30 * This structure maps out the global data that needs to be kept on a 31 * per-cpu basis. genassym uses this to generate offsets for the assembler 32 * code, which also provides external symbols so that C can get at them as 33 * though they were really globals. 34 * --- 17 unchanged lines hidden (view full) --- 52 u_int cpuid; 53 u_int cpu_lockid; 54 u_int other_cpus; 55 pd_entry_t *my_idlePTD; 56 u_int ss_tpr; 57 pt_entry_t *prv_CMAP1; 58 pt_entry_t *prv_CMAP2; 59 pt_entry_t *prv_CMAP3; |
60 pt_entry_t *prv_PMAP1; |
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60 int inside_intr; 61#endif 62}; 63 64#ifdef SMP 65/* 66 * This is the upper (0xff800000) address space layout that is per-cpu. 67 * It is setup in locore.s and pmap.c for the BSP and in mp_machdep.c for --- 6 unchanged lines hidden (view full) --- 74 75 /* page 1 - page table page */ 76 pt_entry_t prvpt[NPTEPG]; 77 78 /* page 2 - local apic mapping */ 79 lapic_t lapic; 80 char __filler1[PAGE_SIZE - sizeof(lapic_t)]; 81 | 61 int inside_intr; 62#endif 63}; 64 65#ifdef SMP 66/* 67 * This is the upper (0xff800000) address space layout that is per-cpu. 68 * It is setup in locore.s and pmap.c for the BSP and in mp_machdep.c for --- 6 unchanged lines hidden (view full) --- 75 76 /* page 1 - page table page */ 77 pt_entry_t prvpt[NPTEPG]; 78 79 /* page 2 - local apic mapping */ 80 lapic_t lapic; 81 char __filler1[PAGE_SIZE - sizeof(lapic_t)]; 82 |
82 /* page 3,4 - idle stack (2 pages) */ 83 char idlestack[2 * PAGE_SIZE]; | 83 /* page 3..2+UPAGES - idle stack (UPAGES pages) */ 84 char idlestack[UPAGES * PAGE_SIZE]; |
84 | 85 |
85 /* page 5,6,7 - CPAGE1,CPAGE2,CPAGE3 */ | 86 /* page 3+UPAGES..6+UPAGES - CPAGE1,CPAGE2,CPAGE3,PPAGE1 */ |
86 char CPAGE1[PAGE_SIZE]; 87 char CPAGE2[PAGE_SIZE]; 88 char CPAGE3[PAGE_SIZE]; | 87 char CPAGE1[PAGE_SIZE]; 88 char CPAGE2[PAGE_SIZE]; 89 char CPAGE3[PAGE_SIZE]; |
90 char PPAGE1[PAGE_SIZE]; |
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89 | 91 |
90 /* page 8-15 - spare, unmapped */ 91 char __filler2[8 * PAGE_SIZE]; | 92 /* page 7+UPAGES..15 - spare, unmapped */ 93 char __filler2[(9-UPAGES) * PAGE_SIZE]; |
92 93 /* page 16-31 - space for IO apics */ 94 char ioapics[16 * PAGE_SIZE]; 95 96 /* page 32-47 - maybe other cpu's globaldata pages? */ 97}; 98#endif | 94 95 /* page 16-31 - space for IO apics */ 96 char ioapics[16 * PAGE_SIZE]; 97 98 /* page 32-47 - maybe other cpu's globaldata pages? */ 99}; 100#endif |