intr_machdep.h (177181) | intr_machdep.h (187880) |
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1/*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
26 * $FreeBSD: head/sys/amd64/include/intr_machdep.h 177181 2008-03-14 19:41:48Z jhb $ | 26 * $FreeBSD: head/sys/amd64/include/intr_machdep.h 187880 2009-01-29 09:22:56Z jeff $ |
27 */ 28 29#ifndef __MACHINE_INTR_MACHDEP_H__ 30#define __MACHINE_INTR_MACHDEP_H__ 31 32#ifdef _KERNEL 33 34/* --- 7 unchanged lines hidden (view full) --- 42 * a lot of the IRQs are not used, so this number can be much larger than 43 * 191 and still be safe since only interrupt sources in actual use will 44 * allocate IDT vectors. 45 * 46 * The first 255 IRQs (0 - 254) are reserved for ISA IRQs and PCI intline IRQs. 47 * IRQ values beyond 256 are used by MSI. We leave 255 unused to avoid 48 * confusion since 255 is used in PCI to indicate an invalid IRQ. 49 */ | 27 */ 28 29#ifndef __MACHINE_INTR_MACHDEP_H__ 30#define __MACHINE_INTR_MACHDEP_H__ 31 32#ifdef _KERNEL 33 34/* --- 7 unchanged lines hidden (view full) --- 42 * a lot of the IRQs are not used, so this number can be much larger than 43 * 191 and still be safe since only interrupt sources in actual use will 44 * allocate IDT vectors. 45 * 46 * The first 255 IRQs (0 - 254) are reserved for ISA IRQs and PCI intline IRQs. 47 * IRQ values beyond 256 are used by MSI. We leave 255 unused to avoid 48 * confusion since 255 is used in PCI to indicate an invalid IRQ. 49 */ |
50#define NUM_MSI_INTS 128 | 50#define NUM_MSI_INTS 512 |
51#define FIRST_MSI_INT 256 52#define NUM_IO_INTS (FIRST_MSI_INT + NUM_MSI_INTS) 53 54/* 55 * Default base address for MSI messages on x86 platforms. 56 */ 57#define MSI_INTEL_ADDR_BASE 0xfee00000 58 --- 105 unchanged lines hidden --- | 51#define FIRST_MSI_INT 256 52#define NUM_IO_INTS (FIRST_MSI_INT + NUM_MSI_INTS) 53 54/* 55 * Default base address for MSI messages on x86 platforms. 56 */ 57#define MSI_INTEL_ADDR_BASE 0xfee00000 58 --- 105 unchanged lines hidden --- |