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safe.4 (131530) safe.4 (131791)
1.\"-
2.\" Copyright (c) 2003 Sam Leffler, Errno Consulting
3.\" All rights reserved.
4.\"
5.\" Redistribution and use in source and binary forms, with or without
6.\" modification, are permitted provided that the following conditions
7.\" are met:
8.\" 1. Redistributions of source code must retain the above copyright

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18.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24.\" SUCH DAMAGE.
25.\"
1.\"-
2.\" Copyright (c) 2003 Sam Leffler, Errno Consulting
3.\" All rights reserved.
4.\"
5.\" Redistribution and use in source and binary forms, with or without
6.\" modification, are permitted provided that the following conditions
7.\" are met:
8.\" 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24.\" SUCH DAMAGE.
25.\"
26.\" $FreeBSD: head/share/man/man4/safe.4 131530 2004-07-03 18:29:24Z ru $
26.\" $FreeBSD: head/share/man/man4/safe.4 131791 2004-07-08 07:19:46Z ru $
27.\"/
28.Dd May 30, 2002
29.Dt SAFE 4
30.Os
31.Sh NAME
32.Nm safe
33.Nd SafeNet crypto accelerator
34.Sh SYNOPSIS
27.\"/
28.Dd May 30, 2002
29.Dt SAFE 4
30.Os
31.Sh NAME
32.Nm safe
33.Nd SafeNet crypto accelerator
34.Sh SYNOPSIS
35.Nm device safe
36.sp
37.Cd sysctl hw.safe.debug
38.Cd sysctl hw.safe.dump
39.Cd sysctl hw.safe.rnginterval
40.Cd sysctl hw.safe.rngbufsize
41.Cd sysctl hw.safe.rngmaxalarm
35.Cd "device safe"
36.Pp
37.Nm sysctl Va hw.safe.debug
38.Nm sysctl Va hw.safe.dump
39.Nm sysctl Va hw.safe.rnginterval
40.Nm sysctl Va hw.safe.rngbufsize
41.Nm sysctl Va hw.safe.rngmaxalarm
42.Sh DESCRIPTION
43The
44.Nm
45driver supports cards containing any of the following chips:
46.Bl -tag -width "SafeNet 1141" -offset indent
47.It SafeNet 1141
48The original chipset.
49Supports DES, Triple-DES, AES, MD5, and SHA-1

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63.Pp
64On all models, the driver registers itself to provide random data to the
65.Xr random 4
66subsystem.
67Periodically the driver will poll the hardware RNG and retrieve
68data for use by the system.
69If the driver detects that the hardware RNG is resonating with any local
70signal, it will reset the oscillators that generate random data.
42.Sh DESCRIPTION
43The
44.Nm
45driver supports cards containing any of the following chips:
46.Bl -tag -width "SafeNet 1141" -offset indent
47.It SafeNet 1141
48The original chipset.
49Supports DES, Triple-DES, AES, MD5, and SHA-1

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63.Pp
64On all models, the driver registers itself to provide random data to the
65.Xr random 4
66subsystem.
67Periodically the driver will poll the hardware RNG and retrieve
68data for use by the system.
69If the driver detects that the hardware RNG is resonating with any local
70signal, it will reset the oscillators that generate random data.
71Three sysctl settings control this procedure:
72.Li hw.safe.rnginterval
71Three
72.Xr sysctl 8
73settings control this procedure:
74.Va hw.safe.rnginterval
73specifies the time, in seconds, between polling operations,
75specifies the time, in seconds, between polling operations,
74.Li hw.safe.rngbufsize
76.Va hw.safe.rngbufsize
75specifies the number of 32-bit words to retrieve on each poll,
76and
77specifies the number of 32-bit words to retrieve on each poll,
78and
77.Li hw.safe.rngmaxalarm
79.Va hw.safe.rngmaxalarm
78specifies the threshold for resetting the oscillators.
79.Pp
80When the driver is compiled with
81.Dv SAFE_DEBUG
80specifies the threshold for resetting the oscillators.
81.Pp
82When the driver is compiled with
83.Dv SAFE_DEBUG
82defined, two sysctl variables are provided for debugging purposes:
83.Li hw.safe.debug
84defined, two
85.Xr sysctl 8
86variables are provided for debugging purposes:
87.Va hw.safe.debug
84can be set to a non-zero value to enable debugging messages to be sent
88can be set to a non-zero value to enable debugging messages to be sent
85to the console for each cryptographic operation.
86.Li hw.safe.dump
89to the console for each cryptographic operation,
90.Va hw.safe.dump
87is a write-only variable that can be used to force driver state to be sent
88to the console.
89Set this variable to
91is a write-only variable that can be used to force driver state to be sent
92to the console.
93Set this variable to
90.Li ring
94.Dq Li ring
91to dump the current state of the descriptor ring,
92to
95to dump the current state of the descriptor ring,
96to
93.Li dma
97.Dq Li dma
94to dump the hardware DMA registers,
95or
96to
98to dump the hardware DMA registers,
99or
100to
97.Li int
101.Dq Li int
98to dump the hardware interrupt registers.
99.Sh SEE ALSO
100.Xr crypt 3 ,
101.Xr crypto 4 ,
102.Xr intro 4 ,
103.Xr ipsec 4 ,
104.Xr random 4 ,
105.Xr crypto 9
106.Sh BUGS
107Public key support is not implemented.
102to dump the hardware interrupt registers.
103.Sh SEE ALSO
104.Xr crypt 3 ,
105.Xr crypto 4 ,
106.Xr intro 4 ,
107.Xr ipsec 4 ,
108.Xr random 4 ,
109.Xr crypto 9
110.Sh BUGS
111Public key support is not implemented.