| dc.4 (56689) | dc.4 (57676) |
|---|---|
| 1.\" Copyright (c) 1997, 1998, 1999 2.\" Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. --- 14 unchanged lines hidden (view full) --- 23.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29.\" THE POSSIBILITY OF SUCH DAMAGE. 30.\" | 1.\" Copyright (c) 1997, 1998, 1999 2.\" Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. --- 14 unchanged lines hidden (view full) --- 23.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29.\" THE POSSIBILITY OF SUCH DAMAGE. 30.\" |
| 31.\" $FreeBSD: head/share/man/man4/dc.4 56689 2000-01-27 19:30:31Z wpaul $ | 31.\" $FreeBSD: head/share/man/man4/dc.4 57676 2000-03-01 14:50:24Z sheldonh $ |
| 32.\" 33.Dd November 20, 1999 34.Dt DC 4 i386 35.Os FreeBSD 36.Sh NAME 37.Nm dc 38.Nd 39DEC/Intel 21143 and clone 10/100 ethernet driver --- 19 unchanged lines hidden (view full) --- 59ADMtek AL981 Comet and AN985 Centaur 60.It 61Lite-On 82c168 and 82c169 PNIC 62.It 63Lite-On/Macronix 82c115 PNIC II 64.El 65.Pp 66All of these chips have the same general register layout, DMA | 32.\" 33.Dd November 20, 1999 34.Dt DC 4 i386 35.Os FreeBSD 36.Sh NAME 37.Nm dc 38.Nd 39DEC/Intel 21143 and clone 10/100 ethernet driver --- 19 unchanged lines hidden (view full) --- 59ADMtek AL981 Comet and AN985 Centaur 60.It 61Lite-On 82c168 and 82c169 PNIC 62.It 63Lite-On/Macronix 82c115 PNIC II 64.El 65.Pp 66All of these chips have the same general register layout, DMA |
| 67descriptor format and method of operation. All of the clone chips 68are based on the 21143 design with various modifications. The | 67descriptor format and method of operation. 68All of the clone chips 69are based on the 21143 design with various modifications. 70The |
| 6921143 itself has support for 10baseT, BNC, AUI, MII and symbol 70media attachments, 10 and 100Mbps speeds in full or half duplex, | 7121143 itself has support for 10baseT, BNC, AUI, MII and symbol 72media attachments, 10 and 100Mbps speeds in full or half duplex, |
| 71built in NWAY autonegotiation and wake on LAN. The 21143 also | 73built in NWAY autonegotiation and wake on LAN. 74The 21143 also |
| 72offers several receive filter programming options including 73perfect filtering, inverse perfect filtering and hash table 74filtering. 75.Pp 76Some clone chips duplicate the 21143 fairly closely while others | 75offers several receive filter programming options including 76perfect filtering, inverse perfect filtering and hash table 77filtering. 78.Pp 79Some clone chips duplicate the 21143 fairly closely while others |
| 77only maintain superficial simularities. Some support only MII 78media attachments. Others use different receiver filter programming 79mechanisms. At least one supports only chained DMA descriptors | 80only maintain superficial simularities. 81Some support only MII 82media attachments. 83Others use different receiver filter programming 84mechanisms. 85At least one supports only chained DMA descriptors |
| 80(most support both chained descriptors and contiguously allocated 81fixed size rings). Some chips (especially the PNIC) also have | 86(most support both chained descriptors and contiguously allocated 87fixed size rings). Some chips (especially the PNIC) also have |
| 82peculiar bugs. The | 88peculiar bugs. 89The |
| 83.Nm 84driver does its best to provide generalized support for all 85of these chipsets in order to keep special case code to a minimun. 86.Pp 87These chips are used by many vendors which makes it | 90.Nm 91driver does its best to provide generalized support for all 92of these chipsets in order to keep special case code to a minimun. 93.Pp 94These chips are used by many vendors which makes it |
| 88difficult provide a complete list of all supported cards. The | 95difficult provide a complete list of all supported cards. 96The |
| 89following NICs are known to work with the 90.Nm 91driver at this time: 92.Pp 93.Bl -bullet -compact -offset indent 94.It 95Digital DE500-BA 10/100 (21143, non-MII) 96.It --- 44 unchanged lines hidden (view full) --- 141the autoselected mode by adding media options to the 142.Pa /etc/rc.conf 143file. 144.Pp 145Note: the built-in NWAY autonegotiation on the original PNIC 82c168 146chip is horribly broken and is not supported by the 147.Nm 148driver at this time: the chip will operate in any speed or duplex | 97following NICs are known to work with the 98.Nm 99driver at this time: 100.Pp 101.Bl -bullet -compact -offset indent 102.It 103Digital DE500-BA 10/100 (21143, non-MII) 104.It --- 44 unchanged lines hidden (view full) --- 149the autoselected mode by adding media options to the 150.Pa /etc/rc.conf 151file. 152.Pp 153Note: the built-in NWAY autonegotiation on the original PNIC 82c168 154chip is horribly broken and is not supported by the 155.Nm 156driver at this time: the chip will operate in any speed or duplex |
| 149mode, however these must be set manually. The original 82c168 appears | 157mode, however these must be set manually. 158The original 82c168 appears |
| 150on very early revisions of the LinkSys LNE100TX and Matrox FastNIC. 151.It 10baseT/UTP | 159on very early revisions of the LinkSys LNE100TX and Matrox FastNIC. 160.It 10baseT/UTP |
| 152Set 10Mbps operation. The | 161Set 10Mbps operation. 162The |
| 153.Ar mediaopt 154option can also be used to enable 155.Ar full-duplex | 163.Ar mediaopt 164option can also be used to enable 165.Ar full-duplex |
| 156operation. Not specifying | 166operation. 167Not specifying |
| 157.Ar full duplex 158implies 159.Ar half-duplex 160mode. 161.It 100baseTX | 168.Ar full duplex 169implies 170.Ar half-duplex 171mode. 172.It 100baseTX |
| 162Set 100Mbps (fast ethernet) operation. The | 173Set 100Mbps (fast ethernet) operation. 174The |
| 163.Ar mediaopt 164option can also be used to enable 165.Ar full-duplex | 175.Ar mediaopt 176option can also be used to enable 177.Ar full-duplex |
| 166operation. Not specifying | 178operation. 179Not specifying |
| 167.Ar full duplex 168implies 169.Ar half-duplex 170mode. 171.El 172.Pp 173The 174.Nm 175driver supports the following media options: 176.Pp 177.Bl -tag -width xxxxxxxxxxxxxxxxxxxx 178.It full-duplex | 180.Ar full duplex 181implies 182.Ar half-duplex 183mode. 184.El 185.Pp 186The 187.Nm 188driver supports the following media options: 189.Pp 190.Bl -tag -width xxxxxxxxxxxxxxxxxxxx 191.It full-duplex |
| 179Force full duplex operation. The interface will operate in | 192Force full duplex operation. 193The interface will operate in |
| 180half duplex mode if this media option is not specified. 181.El 182.Pp 183Note that the 100baseTX media type may not be available on certain 184Intel 21143 adapters which support 10mbps media attachments only. 185For more information on configuring this device, see 186.Xr ifconfig 8 . 187.Sh DIAGNOSTICS 188.Bl -diag 189.It "dc%d: couldn't map ports/memory" 190A fatal initialization error has occurred. 191.It "dc%d: couldn't map interrupt" 192A fatal initialization error has occurred. 193.It "dc%d: watchdog timeout" 194A packet was queued for transmission and a transmit command was 195issued, however the device failed to acknowledge the transmission | 194half duplex mode if this media option is not specified. 195.El 196.Pp 197Note that the 100baseTX media type may not be available on certain 198Intel 21143 adapters which support 10mbps media attachments only. 199For more information on configuring this device, see 200.Xr ifconfig 8 . 201.Sh DIAGNOSTICS 202.Bl -diag 203.It "dc%d: couldn't map ports/memory" 204A fatal initialization error has occurred. 205.It "dc%d: couldn't map interrupt" 206A fatal initialization error has occurred. 207.It "dc%d: watchdog timeout" 208A packet was queued for transmission and a transmit command was 209issued, however the device failed to acknowledge the transmission |
| 196before a timeout expired. This can happen if the device is unable | 210before a timeout expired. 211This can happen if the device is unable |
| 197to deliver interrupts for some reason, of if there is a problem with 198the network connection (cable). 199.It "dc%d: no memory for rx list" 200The driver failed to allocate an mbuf for the receiver ring. 201.It "dc%d: TX underrun -- increasing TX threshold" 202The device generated a transmit underrun error while attempting to | 212to deliver interrupts for some reason, of if there is a problem with 213the network connection (cable). 214.It "dc%d: no memory for rx list" 215The driver failed to allocate an mbuf for the receiver ring. 216.It "dc%d: TX underrun -- increasing TX threshold" 217The device generated a transmit underrun error while attempting to |
| 203DMA and transmit a packet. This happens if the host is not able to 204DMA the packet data into the NIC's FIFO fast enough. The driver | 218DMA and transmit a packet. 219This happens if the host is not able to 220DMA the packet data into the NIC's FIFO fast enough. 221The driver |
| 205will dynamically increase the transmit start threshold so that 206more data must be DMAed into the FIFO before the NIC will start 207transmitting it onto the wire. 208.It "dc%d: TX underrun -- using store and forward mode" 209The device continued to generate transmit underruns even after all 210possible transmit start threshold settings had been tried, so the | 222will dynamically increase the transmit start threshold so that 223more data must be DMAed into the FIFO before the NIC will start 224transmitting it onto the wire. 225.It "dc%d: TX underrun -- using store and forward mode" 226The device continued to generate transmit underruns even after all 227possible transmit start threshold settings had been tried, so the |
| 211driver programmed the chip for store and forward mode. In this mode, | 228driver programmed the chip for store and forward mode. 229In this mode, |
| 212the NIC will not begin transmission until the entire packet has been 213transfered into its FIFO memory. 214.It "dc%d: chip is in D3 power state -- setting to D0" 215This message applies only to adapters which support power | 230the NIC will not begin transmission until the entire packet has been 231transfered into its FIFO memory. 232.It "dc%d: chip is in D3 power state -- setting to D0" 233This message applies only to adapters which support power |
| 216management. Some operating systems place the controller in low power | 234management. 235Some operating systems place the controller in low power |
| 217mode when shutting down, and some PCI BIOSes fail to bring the chip | 236mode when shutting down, and some PCI BIOSes fail to bring the chip |
| 218out of this state before configuring it. The controller loses all of | 237out of this state before configuring it. 238The controller loses all of |
| 219its PCI configuration in the D3 state, so if the BIOS does not set 220it back to full power mode in time, it won't be able to configure it | 239its PCI configuration in the D3 state, so if the BIOS does not set 240it back to full power mode in time, it won't be able to configure it |
| 221correctly. The driver tries to detect this condition and bring | 241correctly. 242The driver tries to detect this condition and bring |
| 222the adapter back to the D0 (full power) state, but this may not be | 243the adapter back to the D0 (full power) state, but this may not be |
| 223enough to return the driver to a fully operational condition. If | 244enough to return the driver to a fully operational condition. 245If |
| 224you see this message at boot time and the driver fails to attach 225the device as a network interface, you will have to perform second 226warm boot to have the device properly configured. 227.Pp 228Note that this condition only occurs when warm booting from another | 246you see this message at boot time and the driver fails to attach 247the device as a network interface, you will have to perform second 248warm boot to have the device properly configured. 249.Pp 250Note that this condition only occurs when warm booting from another |
| 229operating system. If you power down your system prior to booting | 251operating system. 252If you power down your system prior to booting |
| 230.Fx , 231the card should be configured correctly. 232.El 233.Sh SEE ALSO 234.Xr arp 4 , 235.Xr netintro 4 , 236.Xr ifconfig 8 , 237.Xr ng_ether 8 --- 29 unchanged lines hidden (view full) --- 267.Sh AUTHORS 268The 269.Nm 270driver was written by 271.An Bill Paul Aq wpaul@ee.columbia.edu . 272.Sh BUGS 273The Macronix application notes claim that in order to put the 274chips in normal operation, the driver must write a certian magic | 253.Fx , 254the card should be configured correctly. 255.El 256.Sh SEE ALSO 257.Xr arp 4 , 258.Xr netintro 4 , 259.Xr ifconfig 8 , 260.Xr ng_ether 8 --- 29 unchanged lines hidden (view full) --- 290.Sh AUTHORS 291The 292.Nm 293driver was written by 294.An Bill Paul Aq wpaul@ee.columbia.edu . 295.Sh BUGS 296The Macronix application notes claim that in order to put the 297chips in normal operation, the driver must write a certian magic |
| 275number into the CSR16 register. The numbers are documented in | 298number into the CSR16 register. 299The numbers are documented in |
| 276the app notes, but the exact meaning of the bits is not. 277.Pp 278The 98713A seems to have a problem with 10Mbps full duplex mode. 279The transmitter works but the receiver tends to produce many | 300the app notes, but the exact meaning of the bits is not. 301.Pp 302The 98713A seems to have a problem with 10Mbps full duplex mode. 303The transmitter works but the receiver tends to produce many |
| 280unexplained errors leading to very poor overall performance. The 28198715A does not exhibit this problem. All other modes on the | 304unexplained errors leading to very poor overall performance. 305The 30698715A does not exhibit this problem. 307All other modes on the |
| 28298713A seem to work correctly. 283.Pp 284The original 82c168 PNIC chip has built in NWAY support which is 285used on certain early LinkSys LNE100TX and Matrox FastNIC cards, 286however it is horribly broken and difficult to use reliably. 287Consequently, autonegotiation is not currently supported for this 288chipset: the driver defaults the NIC to 10baseT half duplex, and it's 289up to the operator to manually select a different mode if necessary. 290(Later cards use an external MII transceiver to implement NWAY 291autonegotiation and work correctly.) 292.Pp 293The 294.Nm 295driver programs 82c168 and 82c169 PNIC chips to use the store and | 30898713A seem to work correctly. 309.Pp 310The original 82c168 PNIC chip has built in NWAY support which is 311used on certain early LinkSys LNE100TX and Matrox FastNIC cards, 312however it is horribly broken and difficult to use reliably. 313Consequently, autonegotiation is not currently supported for this 314chipset: the driver defaults the NIC to 10baseT half duplex, and it's 315up to the operator to manually select a different mode if necessary. 316(Later cards use an external MII transceiver to implement NWAY 317autonegotiation and work correctly.) 318.Pp 319The 320.Nm 321driver programs 82c168 and 82c169 PNIC chips to use the store and |
| 296forward setting for the transmit start threshold by default. This | 322forward setting for the transmit start threshold by default. 323This |
| 297is to work around problems with some NIC/PCI bus combinations where 298the PNIC can transmit corrupt frames when operating at 100Mbps, 299probably due to PCI DMA burst transfer errors. 300.Pp 301The 82c168 and 82c169 PNIC chips also have a receiver bug that 302sometimes manifests during periods of heavy receive and transmit 303activity, where the chip will improperly DMA received frames to | 324is to work around problems with some NIC/PCI bus combinations where 325the PNIC can transmit corrupt frames when operating at 100Mbps, 326probably due to PCI DMA burst transfer errors. 327.Pp 328The 82c168 and 82c169 PNIC chips also have a receiver bug that 329sometimes manifests during periods of heavy receive and transmit 330activity, where the chip will improperly DMA received frames to |
| 304the host. The chips appear to upload several kilobytes of garbage | 331the host. 332The chips appear to upload several kilobytes of garbage |
| 305data along with the received frame data, dirtying several RX buffers | 333data along with the received frame data, dirtying several RX buffers |
| 306instead of just the expected one. The | 334instead of just the expected one. 335The |
| 307.Nm 308driver detects this condition and will salvage the frame, however 309it incurs a serious performance penalty in the process. 310.Pp 311The PNIC chips also sometimes generate a transmit underrun error when 312the driver attempts to download the receiver filter setup frame, which | 336.Nm 337driver detects this condition and will salvage the frame, however 338it incurs a serious performance penalty in the process. 339.Pp 340The PNIC chips also sometimes generate a transmit underrun error when 341the driver attempts to download the receiver filter setup frame, which |
| 313can result in the receive filter being incorrectly programmed. The | 342can result in the receive filter being incorrectly programmed. 343The |
| 314.Nm 315driver will watch for this condition and requeue the setup frame until 316it is transfered successfully. 317.Pp 318The ADMtek AL981 chip (and possibly the AN985 as well) has been observed 319to sometimes wedge on transmit: this appears to happen when the driver 320queues a sequence of frames which cause it to wrap from the end of the | 344.Nm 345driver will watch for this condition and requeue the setup frame until 346it is transfered successfully. 347.Pp 348The ADMtek AL981 chip (and possibly the AN985 as well) has been observed 349to sometimes wedge on transmit: this appears to happen when the driver 350queues a sequence of frames which cause it to wrap from the end of the |
| 321the transmit descriptor ring back to the beginning. The | 351the transmit descriptor ring back to the beginning. 352The |
| 322.Nm 323driver attempts to avoid this condition by not queing any frames past 324the end of the transmit ring during a single invocation of the 325.Fn dc_start | 353.Nm 354driver attempts to avoid this condition by not queing any frames past 355the end of the transmit ring during a single invocation of the 356.Fn dc_start |
| 326routine. This workaround has a negligible impact on transmit performance. | 357routine. 358This workaround has a negligible impact on transmit performance. |
| 327 328 | 359 360 |