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fenv.h (143708) fenv.h (226218)
1/*-
2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/lib/msun/sparc64/fenv.h 143708 2005-03-16 19:03:46Z das $
26 * $FreeBSD: head/lib/msun/sparc64/fenv.h 226218 2011-10-10 15:43:09Z das $
27 */
28
29#ifndef _FENV_H_
30#define _FENV_H_
31
32#include <sys/_types.h>
33
27 */
28
29#ifndef _FENV_H_
30#define _FENV_H_
31
32#include <sys/_types.h>
33
34#ifndef __fenv_static
35#define __fenv_static static
36#endif
37
34typedef __uint64_t fenv_t;
35typedef __uint64_t fexcept_t;
36
37/* Exception flags */
38#define FE_INVALID 0x00000200
39#define FE_DIVBYZERO 0x00000040
40#define FE_OVERFLOW 0x00000100
41#define FE_UNDERFLOW 0x00000080

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65
66/* We need to be able to map status flag positions to mask flag positions */
67#define _FPUSW_SHIFT 18
68#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
69
70#define __ldxfsr(__r) __asm __volatile("ldx %0, %%fsr" : : "m" (__r))
71#define __stxfsr(__r) __asm __volatile("stx %%fsr, %0" : "=m" (*(__r)))
72
38typedef __uint64_t fenv_t;
39typedef __uint64_t fexcept_t;
40
41/* Exception flags */
42#define FE_INVALID 0x00000200
43#define FE_DIVBYZERO 0x00000040
44#define FE_OVERFLOW 0x00000100
45#define FE_UNDERFLOW 0x00000080

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69
70/* We need to be able to map status flag positions to mask flag positions */
71#define _FPUSW_SHIFT 18
72#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
73
74#define __ldxfsr(__r) __asm __volatile("ldx %0, %%fsr" : : "m" (__r))
75#define __stxfsr(__r) __asm __volatile("stx %%fsr, %0" : "=m" (*(__r)))
76
73static __inline int
77__fenv_static __inline int
74feclearexcept(int __excepts)
75{
76 fexcept_t __r;
77
78 __stxfsr(&__r);
79 __r &= ~__excepts;
80 __ldxfsr(__r);
81 return (0);
82}
83
78feclearexcept(int __excepts)
79{
80 fexcept_t __r;
81
82 __stxfsr(&__r);
83 __r &= ~__excepts;
84 __ldxfsr(__r);
85 return (0);
86}
87
84static __inline int
88__fenv_static inline int
85fegetexceptflag(fexcept_t *__flagp, int __excepts)
86{
87 fexcept_t __r;
88
89 __stxfsr(&__r);
90 *__flagp = __r & __excepts;
91 return (0);
92}
93
89fegetexceptflag(fexcept_t *__flagp, int __excepts)
90{
91 fexcept_t __r;
92
93 __stxfsr(&__r);
94 *__flagp = __r & __excepts;
95 return (0);
96}
97
94static __inline int
98__fenv_static inline int
95fesetexceptflag(const fexcept_t *__flagp, int __excepts)
96{
97 fexcept_t __r;
98
99 __stxfsr(&__r);
100 __r &= ~__excepts;
101 __r |= *__flagp & __excepts;
102 __ldxfsr(__r);
103 return (0);
104}
105
106/*
107 * In contrast with the ia64 platform, it seems to be worthwhile to
108 * inline this function on sparc64 even when the arguments are not
109 * compile-time constants. Perhaps this depends on the register window.
110 */
99fesetexceptflag(const fexcept_t *__flagp, int __excepts)
100{
101 fexcept_t __r;
102
103 __stxfsr(&__r);
104 __r &= ~__excepts;
105 __r |= *__flagp & __excepts;
106 __ldxfsr(__r);
107 return (0);
108}
109
110/*
111 * In contrast with the ia64 platform, it seems to be worthwhile to
112 * inline this function on sparc64 even when the arguments are not
113 * compile-time constants. Perhaps this depends on the register window.
114 */
111static __inline int
115__fenv_static inline int
112feraiseexcept(int __excepts)
113{
114 volatile double d;
115
116 /*
117 * With a compiler that supports the FENV_ACCESS pragma
118 * properly, simple expressions like '0.0 / 0.0' should
119 * be sufficient to generate traps. Unfortunately, we

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138 }
139 if (__excepts & FE_INEXACT) {
140 d = 0x1p-1022;
141 d += 1.0;
142 }
143 return (0);
144}
145
116feraiseexcept(int __excepts)
117{
118 volatile double d;
119
120 /*
121 * With a compiler that supports the FENV_ACCESS pragma
122 * properly, simple expressions like '0.0 / 0.0' should
123 * be sufficient to generate traps. Unfortunately, we

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142 }
143 if (__excepts & FE_INEXACT) {
144 d = 0x1p-1022;
145 d += 1.0;
146 }
147 return (0);
148}
149
146static __inline int
150__fenv_static inline int
147fetestexcept(int __excepts)
148{
149 fexcept_t __r;
150
151 __stxfsr(&__r);
152 return (__r & __excepts);
153}
154
151fetestexcept(int __excepts)
152{
153 fexcept_t __r;
154
155 __stxfsr(&__r);
156 return (__r & __excepts);
157}
158
155static __inline int
159__fenv_static inline int
156fegetround(void)
157{
158 fenv_t __r;
159
160 __stxfsr(&__r);
161 return ((__r >> _ROUND_SHIFT) & _ROUND_MASK);
162}
163
160fegetround(void)
161{
162 fenv_t __r;
163
164 __stxfsr(&__r);
165 return ((__r >> _ROUND_SHIFT) & _ROUND_MASK);
166}
167
164static __inline int
168__fenv_static inline int
165fesetround(int __round)
166{
167 fenv_t __r;
168
169 if (__round & ~_ROUND_MASK)
170 return (-1);
171 __stxfsr(&__r);
172 __r &= ~(_ROUND_MASK << _ROUND_SHIFT);
173 __r |= __round << _ROUND_SHIFT;
174 __ldxfsr(__r);
175 return (0);
176}
177
169fesetround(int __round)
170{
171 fenv_t __r;
172
173 if (__round & ~_ROUND_MASK)
174 return (-1);
175 __stxfsr(&__r);
176 __r &= ~(_ROUND_MASK << _ROUND_SHIFT);
177 __r |= __round << _ROUND_SHIFT;
178 __ldxfsr(__r);
179 return (0);
180}
181
178static __inline int
182__fenv_static inline int
179fegetenv(fenv_t *__envp)
180{
181
182 __stxfsr(__envp);
183 return (0);
184}
185
183fegetenv(fenv_t *__envp)
184{
185
186 __stxfsr(__envp);
187 return (0);
188}
189
186static __inline int
190__fenv_static inline int
187feholdexcept(fenv_t *__envp)
188{
189 fenv_t __r;
190
191 __stxfsr(&__r);
192 *__envp = __r;
193 __r &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
194 __ldxfsr(__r);
195 return (0);
196}
197
191feholdexcept(fenv_t *__envp)
192{
193 fenv_t __r;
194
195 __stxfsr(&__r);
196 *__envp = __r;
197 __r &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
198 __ldxfsr(__r);
199 return (0);
200}
201
198static __inline int
202__fenv_static inline int
199fesetenv(const fenv_t *__envp)
200{
201
202 __ldxfsr(*__envp);
203 return (0);
204}
205
203fesetenv(const fenv_t *__envp)
204{
205
206 __ldxfsr(*__envp);
207 return (0);
208}
209
206static __inline int
210__fenv_static inline int
207feupdateenv(const fenv_t *__envp)
208{
209 fexcept_t __r;
210
211 __stxfsr(&__r);
212 __ldxfsr(*__envp);
213 feraiseexcept(__r & FE_ALL_EXCEPT);
214 return (0);
215}
216
217#if __BSD_VISIBLE
218
211feupdateenv(const fenv_t *__envp)
212{
213 fexcept_t __r;
214
215 __stxfsr(&__r);
216 __ldxfsr(*__envp);
217 feraiseexcept(__r & FE_ALL_EXCEPT);
218 return (0);
219}
220
221#if __BSD_VISIBLE
222
219static __inline int
223/* We currently provide no external definitions of the functions below. */
224
225static inline int
220feenableexcept(int __mask)
221{
222 fenv_t __old_r, __new_r;
223
224 __stxfsr(&__old_r);
225 __new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
226 __ldxfsr(__new_r);
227 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
228}
229
226feenableexcept(int __mask)
227{
228 fenv_t __old_r, __new_r;
229
230 __stxfsr(&__old_r);
231 __new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
232 __ldxfsr(__new_r);
233 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
234}
235
230static __inline int
236static inline int
231fedisableexcept(int __mask)
232{
233 fenv_t __old_r, __new_r;
234
235 __stxfsr(&__old_r);
236 __new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
237 __ldxfsr(__new_r);
238 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
239}
240
237fedisableexcept(int __mask)
238{
239 fenv_t __old_r, __new_r;
240
241 __stxfsr(&__old_r);
242 __new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
243 __ldxfsr(__new_r);
244 return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
245}
246
241static __inline int
247static inline int
242fegetexcept(void)
243{
244 fenv_t __r;
245
246 __stxfsr(&__r);
247 return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
248}
249
250#endif /* __BSD_VISIBLE */
251
252__END_DECLS
253
254#endif /* !_FENV_H_ */
248fegetexcept(void)
249{
250 fenv_t __r;
251
252 __stxfsr(&__r);
253 return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
254}
255
256#endif /* __BSD_VISIBLE */
257
258__END_DECLS
259
260#endif /* !_FENV_H_ */