Deleted Added
sdiff udiff text old ( 178582 ) new ( 226218 )
full compact
fenv.h (178582) fenv.h (226218)
1/*-
2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/lib/msun/mips/fenv.h 178582 2008-04-26 12:20:29Z imp $
26 * $FreeBSD: head/lib/msun/mips/fenv.h 226218 2011-10-10 15:43:09Z das $
27 */
28
29#ifndef _FENV_H_
30#define _FENV_H_
31
32#include <sys/_types.h>
33
27 */
28
29#ifndef _FENV_H_
30#define _FENV_H_
31
32#include <sys/_types.h>
33
34#ifndef __fenv_static
35#define __fenv_static static
36#endif
37
34typedef __uint32_t fenv_t;
35typedef __uint32_t fexcept_t;
36
37/* Exception flags */
38#define FE_INVALID 0x0001
39#define FE_DIVBYZERO 0x0002
40#define FE_OVERFLOW 0x0004
41#define FE_UNDERFLOW 0x0008

--- 21 unchanged lines hidden (view full) ---

63#ifdef ARM_HARD_FLOAT
64#define __rfs(__fpsr) __asm __volatile("rfs %0" : "=r" (*(__fpsr)))
65#define __wfs(__fpsr) __asm __volatile("wfs %0" : : "r" (__fpsr))
66#else
67#define __rfs(__fpsr)
68#define __wfs(__fpsr)
69#endif
70
38typedef __uint32_t fenv_t;
39typedef __uint32_t fexcept_t;
40
41/* Exception flags */
42#define FE_INVALID 0x0001
43#define FE_DIVBYZERO 0x0002
44#define FE_OVERFLOW 0x0004
45#define FE_UNDERFLOW 0x0008

--- 21 unchanged lines hidden (view full) ---

67#ifdef ARM_HARD_FLOAT
68#define __rfs(__fpsr) __asm __volatile("rfs %0" : "=r" (*(__fpsr)))
69#define __wfs(__fpsr) __asm __volatile("wfs %0" : : "r" (__fpsr))
70#else
71#define __rfs(__fpsr)
72#define __wfs(__fpsr)
73#endif
74
71static __inline int
75__fenv_static inline int
72feclearexcept(int __excepts)
73{
74 fexcept_t __fpsr;
75
76 __rfs(&__fpsr);
77 __fpsr &= ~__excepts;
78 __wfs(__fpsr);
79 return (0);
80}
81
76feclearexcept(int __excepts)
77{
78 fexcept_t __fpsr;
79
80 __rfs(&__fpsr);
81 __fpsr &= ~__excepts;
82 __wfs(__fpsr);
83 return (0);
84}
85
82static __inline int
86__fenv_static inline int
83fegetexceptflag(fexcept_t *__flagp, int __excepts)
84{
85 fexcept_t __fpsr;
86
87 __rfs(&__fpsr);
88 *__flagp = __fpsr & __excepts;
89 return (0);
90}
91
87fegetexceptflag(fexcept_t *__flagp, int __excepts)
88{
89 fexcept_t __fpsr;
90
91 __rfs(&__fpsr);
92 *__flagp = __fpsr & __excepts;
93 return (0);
94}
95
92static __inline int
96__fenv_static inline int
93fesetexceptflag(const fexcept_t *__flagp, int __excepts)
94{
95 fexcept_t __fpsr;
96
97 __rfs(&__fpsr);
98 __fpsr &= ~__excepts;
99 __fpsr |= *__flagp & __excepts;
100 __wfs(__fpsr);
101 return (0);
102}
103
97fesetexceptflag(const fexcept_t *__flagp, int __excepts)
98{
99 fexcept_t __fpsr;
100
101 __rfs(&__fpsr);
102 __fpsr &= ~__excepts;
103 __fpsr |= *__flagp & __excepts;
104 __wfs(__fpsr);
105 return (0);
106}
107
104static __inline int
108__fenv_static inline int
105feraiseexcept(int __excepts)
106{
107 fexcept_t __ex = __excepts;
108
109 fesetexceptflag(&__ex, __excepts); /* XXX */
110 return (0);
111}
112
109feraiseexcept(int __excepts)
110{
111 fexcept_t __ex = __excepts;
112
113 fesetexceptflag(&__ex, __excepts); /* XXX */
114 return (0);
115}
116
113static __inline int
117__fenv_static inline int
114fetestexcept(int __excepts)
115{
116 fexcept_t __fpsr;
117
118 __rfs(&__fpsr);
119 return (__fpsr & __excepts);
120}
121
118fetestexcept(int __excepts)
119{
120 fexcept_t __fpsr;
121
122 __rfs(&__fpsr);
123 return (__fpsr & __excepts);
124}
125
122static __inline int
126__fenv_static inline int
123fegetround(void)
124{
125
126 /*
127 * Apparently, the rounding mode is specified as part of the
128 * instruction format on ARM, so the dynamic rounding mode is
129 * indeterminate. Some FPUs may differ.
130 */
131 return (-1);
132}
133
127fegetround(void)
128{
129
130 /*
131 * Apparently, the rounding mode is specified as part of the
132 * instruction format on ARM, so the dynamic rounding mode is
133 * indeterminate. Some FPUs may differ.
134 */
135 return (-1);
136}
137
134static __inline int
138__fenv_static inline int
135fesetround(int __round)
136{
137
138 return (-1);
139}
140
139fesetround(int __round)
140{
141
142 return (-1);
143}
144
141static __inline int
145__fenv_static inline int
142fegetenv(fenv_t *__envp)
143{
144
145 __rfs(__envp);
146 return (0);
147}
148
146fegetenv(fenv_t *__envp)
147{
148
149 __rfs(__envp);
150 return (0);
151}
152
149static __inline int
153__fenv_static inline int
150feholdexcept(fenv_t *__envp)
151{
152 fenv_t __env;
153
154 __rfs(&__env);
155 *__envp = __env;
156 __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
157 __wfs(__env);
158 return (0);
159}
160
154feholdexcept(fenv_t *__envp)
155{
156 fenv_t __env;
157
158 __rfs(&__env);
159 *__envp = __env;
160 __env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
161 __wfs(__env);
162 return (0);
163}
164
161static __inline int
165__fenv_static inline int
162fesetenv(const fenv_t *__envp)
163{
164
165 __wfs(*__envp);
166 return (0);
167}
168
166fesetenv(const fenv_t *__envp)
167{
168
169 __wfs(*__envp);
170 return (0);
171}
172
169static __inline int
173__fenv_static inline int
170feupdateenv(const fenv_t *__envp)
171{
172 fexcept_t __fpsr;
173
174 __rfs(&__fpsr);
175 __wfs(*__envp);
176 feraiseexcept(__fpsr & FE_ALL_EXCEPT);
177 return (0);
178}
179
180#if __BSD_VISIBLE
181
174feupdateenv(const fenv_t *__envp)
175{
176 fexcept_t __fpsr;
177
178 __rfs(&__fpsr);
179 __wfs(*__envp);
180 feraiseexcept(__fpsr & FE_ALL_EXCEPT);
181 return (0);
182}
183
184#if __BSD_VISIBLE
185
182static __inline int
186/* We currently provide no external definitions of the functions below. */
187
188static inline int
183feenableexcept(int __mask)
184{
185 fenv_t __old_fpsr, __new_fpsr;
186
187 __rfs(&__old_fpsr);
188 __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT;
189 __wfs(__new_fpsr);
190 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
191}
192
189feenableexcept(int __mask)
190{
191 fenv_t __old_fpsr, __new_fpsr;
192
193 __rfs(&__old_fpsr);
194 __new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT;
195 __wfs(__new_fpsr);
196 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
197}
198
193static __inline int
199static inline int
194fedisableexcept(int __mask)
195{
196 fenv_t __old_fpsr, __new_fpsr;
197
198 __rfs(&__old_fpsr);
199 __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
200 __wfs(__new_fpsr);
201 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
202}
203
200fedisableexcept(int __mask)
201{
202 fenv_t __old_fpsr, __new_fpsr;
203
204 __rfs(&__old_fpsr);
205 __new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
206 __wfs(__new_fpsr);
207 return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
208}
209
204static __inline int
210static inline int
205fegetexcept(void)
206{
207 fenv_t __fpsr;
208
209 __rfs(&__fpsr);
210 return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
211}
212
213#endif /* __BSD_VISIBLE */
214
215__END_DECLS
216
217#endif /* !_FENV_H_ */
211fegetexcept(void)
212{
213 fenv_t __fpsr;
214
215 __rfs(&__fpsr);
216 return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
217}
218
219#endif /* __BSD_VISIBLE */
220
221__END_DECLS
222
223#endif /* !_FENV_H_ */