1//===- XCoreInstrInfo.cpp - XCore Instruction Information -------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
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448 else {
449 MI = BeforeI;
450 ++MI;
451 }
452 }
453 return true;
454}
455
456/// BlockHasNoFallThrough - Analyse if MachineBasicBlock does not
457/// fall-through into its successor block.
458bool XCoreInstrInfo::
459BlockHasNoFallThrough(const MachineBasicBlock &MBB) const
460{
461 if (MBB.empty()) return false;
462
463 switch (MBB.back().getOpcode()) {
464 case XCore::RETSP_u6: // Return.
465 case XCore::RETSP_lu6:
466 case XCore::BAU_1r: // Indirect branch.
467 case XCore::BRFU_u6: // Uncond branch.
468 case XCore::BRFU_lu6:
469 case XCore::BRBU_u6:
470 case XCore::BRBU_lu6:
471 return true;
472 default: return false;
473 }
474}
475
476/// ReverseBranchCondition - Return the inverse opcode of the
477/// specified Branch instruction.
478bool XCoreInstrInfo::
479ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const
480{
481 assert((Cond.size() == 2) &&
482 "Invalid XCore branch condition!");
483 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm()));
484 return false;
485}
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
--- 439 unchanged lines hidden (view full) ---
448 else {
449 MI = BeforeI;
450 ++MI;
451 }
452 }
453 return true;
454}
455
456/// BlockHasNoFallThrough - Analyse if MachineBasicBlock does not
457/// fall-through into its successor block.
458bool XCoreInstrInfo::
459BlockHasNoFallThrough(const MachineBasicBlock &MBB) const
460{
461 if (MBB.empty()) return false;
462
463 switch (MBB.back().getOpcode()) {
464 case XCore::RETSP_u6: // Return.
465 case XCore::RETSP_lu6:
466 case XCore::BAU_1r: // Indirect branch.
467 case XCore::BRFU_u6: // Uncond branch.
468 case XCore::BRFU_lu6:
469 case XCore::BRBU_u6:
470 case XCore::BRBU_lu6:
471 return true;
472 default: return false;
473 }
474}
475
476/// ReverseBranchCondition - Return the inverse opcode of the
477/// specified Branch instruction.
478bool XCoreInstrInfo::
479ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const
480{
481 assert((Cond.size() == 2) &&
482 "Invalid XCore branch condition!");
483 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm()));
484 return false;
485}