| SparcInstrInfo.cpp (261991) | SparcInstrInfo.cpp (262613) |
|---|---|
| 1//===-- SparcInstrInfo.cpp - Sparc Instruction Information ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 417 unchanged lines hidden (view full) --- 426 if (GlobalBaseReg != 0) 427 return GlobalBaseReg; 428 429 // Insert the set of GlobalBaseReg into the first MBB of the function 430 MachineBasicBlock &FirstMBB = MF->front(); 431 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); 432 MachineRegisterInfo &RegInfo = MF->getRegInfo(); 433 | 1//===-- SparcInstrInfo.cpp - Sparc Instruction Information ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 417 unchanged lines hidden (view full) --- 426 if (GlobalBaseReg != 0) 427 return GlobalBaseReg; 428 429 // Insert the set of GlobalBaseReg into the first MBB of the function 430 MachineBasicBlock &FirstMBB = MF->front(); 431 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); 432 MachineRegisterInfo &RegInfo = MF->getRegInfo(); 433 |
| 434 GlobalBaseReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); | 434 const TargetRegisterClass *PtrRC = 435 Subtarget.is64Bit() ? &SP::I64RegsRegClass : &SP::IntRegsRegClass; 436 GlobalBaseReg = RegInfo.createVirtualRegister(PtrRC); |
| 435 | 437 |
| 436 | |
| 437 DebugLoc dl; 438 439 BuildMI(FirstMBB, MBBI, dl, get(SP::GETPCX), GlobalBaseReg); 440 SparcFI->setGlobalBaseReg(GlobalBaseReg); 441 return GlobalBaseReg; 442} | 438 DebugLoc dl; 439 440 BuildMI(FirstMBB, MBBI, dl, get(SP::GETPCX), GlobalBaseReg); 441 SparcFI->setGlobalBaseReg(GlobalBaseReg); 442 return GlobalBaseReg; 443} |