1//===-- SparcAsmPrinter.cpp - Sparc LLVM assembly writer ------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a printer that converts from our internal representation
11// of machine-dependent LLVM code to GAS-format SPARC assembly language.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "asm-printer"
16#include "Sparc.h"
17#include "SparcInstrInfo.h"
18#include "SparcTargetMachine.h"
19#include "SparcTargetStreamer.h"
20#include "InstPrinter/SparcInstPrinter.h"
21#include "MCTargetDesc/SparcMCExpr.h"
22#include "llvm/ADT/SmallString.h"
23#include "llvm/CodeGen/AsmPrinter.h"
24#include "llvm/CodeGen/MachineInstr.h"
25#include "llvm/CodeGen/MachineModuleInfoImpls.h"
26#include "llvm/CodeGen/MachineRegisterInfo.h"
27#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
28#include "llvm/MC/MCAsmInfo.h"
29#include "llvm/MC/MCContext.h"
30#include "llvm/MC/MCInst.h"
31#include "llvm/MC/MCStreamer.h"
32#include "llvm/MC/MCSymbol.h"
33#include "llvm/Support/TargetRegistry.h"
34#include "llvm/Support/raw_ostream.h"
35#include "llvm/Target/Mangler.h"
36using namespace llvm;
37
38namespace {
39 class SparcAsmPrinter : public AsmPrinter {
40 SparcTargetStreamer &getTargetStreamer() {
41 return static_cast<SparcTargetStreamer&>(OutStreamer.getTargetStreamer());
42 }
43 public:
44 explicit SparcAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
45 : AsmPrinter(TM, Streamer) {}
46
47 virtual const char *getPassName() const {
48 return "Sparc Assembly Printer";
49 }
50
51 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
52 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS,
53 const char *Modifier = 0);
54 void printCCOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
55
56 virtual void EmitFunctionBodyStart();
57 virtual void EmitInstruction(const MachineInstr *MI);
58 virtual void EmitEndOfAsmFile(Module &M);
59
60 static const char *getRegisterName(unsigned RegNo) {
61 return SparcInstPrinter::getRegisterName(RegNo);
62 }
63
64 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
65 unsigned AsmVariant, const char *ExtraCode,
66 raw_ostream &O);
67 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
68 unsigned AsmVariant, const char *ExtraCode,
69 raw_ostream &O);
70
71 void LowerGETPCXAndEmitMCInsts(const MachineInstr *MI);
72
73 };
74} // end of anonymous namespace
75
76static MCOperand createSparcMCOperand(SparcMCExpr::VariantKind Kind,
77 MCSymbol *Sym, MCContext &OutContext) {
78 const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Sym,
79 OutContext);
80 const SparcMCExpr *expr = SparcMCExpr::Create(Kind, MCSym, OutContext);
81 return MCOperand::CreateExpr(expr);
82
83}
84static MCOperand createPCXCallOP(MCSymbol *Label,
85 MCContext &OutContext) {
86 return createSparcMCOperand(SparcMCExpr::VK_Sparc_None, Label, OutContext);
87}
88
89static MCOperand createPCXRelExprOp(SparcMCExpr::VariantKind Kind,
90 MCSymbol *GOTLabel, MCSymbol *StartLabel,
91 MCSymbol *CurLabel,
92 MCContext &OutContext)
93{
94 const MCSymbolRefExpr *GOT = MCSymbolRefExpr::Create(GOTLabel, OutContext);
95 const MCSymbolRefExpr *Start = MCSymbolRefExpr::Create(StartLabel,
96 OutContext);
97 const MCSymbolRefExpr *Cur = MCSymbolRefExpr::Create(CurLabel,
98 OutContext);
99
100 const MCBinaryExpr *Sub = MCBinaryExpr::CreateSub(Cur, Start, OutContext);
101 const MCBinaryExpr *Add = MCBinaryExpr::CreateAdd(GOT, Sub, OutContext);
102 const SparcMCExpr *expr = SparcMCExpr::Create(Kind,
103 Add, OutContext);
104 return MCOperand::CreateExpr(expr);
105}
106
107static void EmitCall(MCStreamer &OutStreamer,
108 MCOperand &Callee)
109{
110 MCInst CallInst;
111 CallInst.setOpcode(SP::CALL);
112 CallInst.addOperand(Callee);
113 OutStreamer.EmitInstruction(CallInst);
114}
115
116static void EmitSETHI(MCStreamer &OutStreamer,
117 MCOperand &Imm, MCOperand &RD)
118{
119 MCInst SETHIInst;
120 SETHIInst.setOpcode(SP::SETHIi);
121 SETHIInst.addOperand(RD);
122 SETHIInst.addOperand(Imm);
123 OutStreamer.EmitInstruction(SETHIInst);
124}
125
126static void EmitBinary(MCStreamer &OutStreamer, unsigned Opcode,
127 MCOperand &RS1, MCOperand &Src2, MCOperand &RD)
128{
129 MCInst Inst;
130 Inst.setOpcode(Opcode);
131 Inst.addOperand(RD);
132 Inst.addOperand(RS1);
133 Inst.addOperand(Src2);
134 OutStreamer.EmitInstruction(Inst);
135}
136
137static void EmitOR(MCStreamer &OutStreamer,
138 MCOperand &RS1, MCOperand &Imm, MCOperand &RD) {
139 EmitBinary(OutStreamer, SP::ORri, RS1, Imm, RD);
140}
141
142static void EmitADD(MCStreamer &OutStreamer,
143 MCOperand &RS1, MCOperand &RS2, MCOperand &RD) {
144 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD);
145}
146
147static void EmitSHL(MCStreamer &OutStreamer,
148 MCOperand &RS1, MCOperand &Imm, MCOperand &RD) {
149 EmitBinary(OutStreamer, SP::SLLri, RS1, Imm, RD);
150}
151
152
153static void EmitHiLo(MCStreamer &OutStreamer, MCSymbol *GOTSym,
154 SparcMCExpr::VariantKind HiKind,
155 SparcMCExpr::VariantKind LoKind,
156 MCOperand &RD,
157 MCContext &OutContext) {
158
159 MCOperand hi = createSparcMCOperand(HiKind, GOTSym, OutContext);
160 MCOperand lo = createSparcMCOperand(LoKind, GOTSym, OutContext);
161 EmitSETHI(OutStreamer, hi, RD);
162 EmitOR(OutStreamer, RD, lo, RD);
163}
164
165void SparcAsmPrinter::LowerGETPCXAndEmitMCInsts(const MachineInstr *MI)
166{
167 MCSymbol *GOTLabel =
168 OutContext.GetOrCreateSymbol(Twine("_GLOBAL_OFFSET_TABLE_"));
169
170 const MachineOperand &MO = MI->getOperand(0);
171 assert(MO.getReg() != SP::O7 &&
172 "%o7 is assigned as destination for getpcx!");
173
174 MCOperand MCRegOP = MCOperand::CreateReg(MO.getReg());
175
176
177 if (TM.getRelocationModel() != Reloc::PIC_) {
178 // Just load the address of GOT to MCRegOP.
179 switch(TM.getCodeModel()) {
180 default:
181 llvm_unreachable("Unsupported absolute code model");
182 case CodeModel::Small:
183 EmitHiLo(OutStreamer, GOTLabel,
184 SparcMCExpr::VK_Sparc_HI, SparcMCExpr::VK_Sparc_LO,
185 MCRegOP, OutContext);
186 break;
187 case CodeModel::Medium: {
188 EmitHiLo(OutStreamer, GOTLabel,
189 SparcMCExpr::VK_Sparc_H44, SparcMCExpr::VK_Sparc_M44,
190 MCRegOP, OutContext);
191 MCOperand imm = MCOperand::CreateExpr(MCConstantExpr::Create(12,
192 OutContext));
193 EmitSHL(OutStreamer, MCRegOP, imm, MCRegOP);
194 MCOperand lo = createSparcMCOperand(SparcMCExpr::VK_Sparc_L44,
195 GOTLabel, OutContext);
196 EmitOR(OutStreamer, MCRegOP, lo, MCRegOP);
197 break;
198 }
199 case CodeModel::Large: {
200 EmitHiLo(OutStreamer, GOTLabel,
201 SparcMCExpr::VK_Sparc_HH, SparcMCExpr::VK_Sparc_HM,
202 MCRegOP, OutContext);
203 MCOperand imm = MCOperand::CreateExpr(MCConstantExpr::Create(32,
204 OutContext));
205 EmitSHL(OutStreamer, MCRegOP, imm, MCRegOP);
206 // Use register %o7 to load the lower 32 bits.
207 MCOperand RegO7 = MCOperand::CreateReg(SP::O7);
208 EmitHiLo(OutStreamer, GOTLabel,
209 SparcMCExpr::VK_Sparc_HI, SparcMCExpr::VK_Sparc_LO,
210 RegO7, OutContext);
211 EmitADD(OutStreamer, MCRegOP, RegO7, MCRegOP);
212 }
213 }
214 return;
215 }
216
217 MCSymbol *StartLabel = OutContext.CreateTempSymbol();
218 MCSymbol *EndLabel = OutContext.CreateTempSymbol();
219 MCSymbol *SethiLabel = OutContext.CreateTempSymbol();
220
221 MCOperand RegO7 = MCOperand::CreateReg(SP::O7);
222
223 // <StartLabel>:
224 // call <EndLabel>
225 // <SethiLabel>:
226 // sethi %hi(_GLOBAL_OFFSET_TABLE_+(<SethiLabel>-<StartLabel>)), <MO>
227 // <EndLabel>:
228 // or <MO>, %lo(_GLOBAL_OFFSET_TABLE_+(<EndLabel>-<StartLabel>))), <MO>
229 // add <MO>, %o7, <MO>
230
231 OutStreamer.EmitLabel(StartLabel);
232 MCOperand Callee = createPCXCallOP(EndLabel, OutContext);
233 EmitCall(OutStreamer, Callee);
234 OutStreamer.EmitLabel(SethiLabel);
235 MCOperand hiImm = createPCXRelExprOp(SparcMCExpr::VK_Sparc_PC22,
236 GOTLabel, StartLabel, SethiLabel,
237 OutContext);
238 EmitSETHI(OutStreamer, hiImm, MCRegOP);
239 OutStreamer.EmitLabel(EndLabel);
240 MCOperand loImm = createPCXRelExprOp(SparcMCExpr::VK_Sparc_PC10,
241 GOTLabel, StartLabel, EndLabel,
242 OutContext);
243 EmitOR(OutStreamer, MCRegOP, loImm, MCRegOP);
244 EmitADD(OutStreamer, MCRegOP, RegO7, MCRegOP);
245}
246
247void SparcAsmPrinter::EmitInstruction(const MachineInstr *MI)
248{
249
250 switch (MI->getOpcode()) {
251 default: break;
252 case TargetOpcode::DBG_VALUE:
253 // FIXME: Debug Value.
254 return;
255 case SP::GETPCX:
256 LowerGETPCXAndEmitMCInsts(MI);
257 return;
258 }
259 MachineBasicBlock::const_instr_iterator I = MI;
260 MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
261 do {
262 MCInst TmpInst;
263 LowerSparcMachineInstrToMCInst(I, TmpInst, *this);
264 OutStreamer.EmitInstruction(TmpInst);
265 } while ((++I != E) && I->isInsideBundle()); // Delay slot check.
266}
267
268void SparcAsmPrinter::EmitFunctionBodyStart() {
269 if (!TM.getSubtarget<SparcSubtarget>().is64Bit())
270 return;
271
272 const MachineRegisterInfo &MRI = MF->getRegInfo();
273 const unsigned globalRegs[] = { SP::G2, SP::G3, SP::G6, SP::G7, 0 };
274 for (unsigned i = 0; globalRegs[i] != 0; ++i) {
275 unsigned reg = globalRegs[i];
276 if (MRI.use_empty(reg))
277 continue;
278
279 if (reg == SP::G6 || reg == SP::G7)
280 getTargetStreamer().emitSparcRegisterIgnore(reg);
281 else
282 getTargetStreamer().emitSparcRegisterScratch(reg);
283 }
284}
285
286void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
287 raw_ostream &O) {
288 const MachineOperand &MO = MI->getOperand (opNum);
289 SparcMCExpr::VariantKind TF = (SparcMCExpr::VariantKind) MO.getTargetFlags();
290
291#ifndef NDEBUG
292 // Verify the target flags.
293 if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
294 if (MI->getOpcode() == SP::CALL)
295 assert(TF == SparcMCExpr::VK_Sparc_None &&
296 "Cannot handle target flags on call address");
297 else if (MI->getOpcode() == SP::SETHIi || MI->getOpcode() == SP::SETHIXi)
298 assert((TF == SparcMCExpr::VK_Sparc_HI
299 || TF == SparcMCExpr::VK_Sparc_H44
300 || TF == SparcMCExpr::VK_Sparc_HH
301 || TF == SparcMCExpr::VK_Sparc_TLS_GD_HI22
302 || TF == SparcMCExpr::VK_Sparc_TLS_LDM_HI22
303 || TF == SparcMCExpr::VK_Sparc_TLS_LDO_HIX22
304 || TF == SparcMCExpr::VK_Sparc_TLS_IE_HI22
305 || TF == SparcMCExpr::VK_Sparc_TLS_LE_HIX22) &&
306 "Invalid target flags for address operand on sethi");
307 else if (MI->getOpcode() == SP::TLS_CALL)
308 assert((TF == SparcMCExpr::VK_Sparc_None
309 || TF == SparcMCExpr::VK_Sparc_TLS_GD_CALL
310 || TF == SparcMCExpr::VK_Sparc_TLS_LDM_CALL) &&
311 "Cannot handle target flags on tls call address");
312 else if (MI->getOpcode() == SP::TLS_ADDrr)
313 assert((TF == SparcMCExpr::VK_Sparc_TLS_GD_ADD
314 || TF == SparcMCExpr::VK_Sparc_TLS_LDM_ADD
315 || TF == SparcMCExpr::VK_Sparc_TLS_LDO_ADD
316 || TF == SparcMCExpr::VK_Sparc_TLS_IE_ADD) &&
317 "Cannot handle target flags on add for TLS");
318 else if (MI->getOpcode() == SP::TLS_LDrr)
319 assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LD &&
320 "Cannot handle target flags on ld for TLS");
321 else if (MI->getOpcode() == SP::TLS_LDXrr)
322 assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LDX &&
323 "Cannot handle target flags on ldx for TLS");
324 else if (MI->getOpcode() == SP::XORri || MI->getOpcode() == SP::XORXri)
325 assert((TF == SparcMCExpr::VK_Sparc_TLS_LDO_LOX10
326 || TF == SparcMCExpr::VK_Sparc_TLS_LE_LOX10) &&
327 "Cannot handle target flags on xor for TLS");
328 else
329 assert((TF == SparcMCExpr::VK_Sparc_LO
330 || TF == SparcMCExpr::VK_Sparc_M44
331 || TF == SparcMCExpr::VK_Sparc_L44
332 || TF == SparcMCExpr::VK_Sparc_HM
333 || TF == SparcMCExpr::VK_Sparc_TLS_GD_LO10
334 || TF == SparcMCExpr::VK_Sparc_TLS_LDM_LO10
335 || TF == SparcMCExpr::VK_Sparc_TLS_IE_LO10 ) &&
336 "Invalid target flags for small address operand");
337 }
338#endif
339
340
341 bool CloseParen = SparcMCExpr::printVariantKind(O, TF);
342
343 switch (MO.getType()) {
344 case MachineOperand::MO_Register:
345 O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
346 break;
347
348 case MachineOperand::MO_Immediate:
349 O << (int)MO.getImm();
350 break;
351 case MachineOperand::MO_MachineBasicBlock:
352 O << *MO.getMBB()->getSymbol();
353 return;
354 case MachineOperand::MO_GlobalAddress:
355 O << *getSymbol(MO.getGlobal());
356 break;
357 case MachineOperand::MO_BlockAddress:
358 O << GetBlockAddressSymbol(MO.getBlockAddress())->getName();
359 break;
360 case MachineOperand::MO_ExternalSymbol:
361 O << MO.getSymbolName();
362 break;
363 case MachineOperand::MO_ConstantPoolIndex:
364 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
365 << MO.getIndex();
366 break;
367 default:
368 llvm_unreachable("<unknown operand type>");
369 }
370 if (CloseParen) O << ")";
371}
372
373void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
374 raw_ostream &O, const char *Modifier) {
375 printOperand(MI, opNum, O);
376
377 // If this is an ADD operand, emit it like normal operands.
378 if (Modifier && !strcmp(Modifier, "arith")) {
379 O << ", ";
380 printOperand(MI, opNum+1, O);
381 return;
382 }
383
384 if (MI->getOperand(opNum+1).isReg() &&
385 MI->getOperand(opNum+1).getReg() == SP::G0)
386 return; // don't print "+%g0"
387 if (MI->getOperand(opNum+1).isImm() &&
388 MI->getOperand(opNum+1).getImm() == 0)
389 return; // don't print "+0"
390
391 O << "+";
392 printOperand(MI, opNum+1, O);
393}
394
395/// PrintAsmOperand - Print out an operand for an inline asm expression.
396///
397bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
398 unsigned AsmVariant,
399 const char *ExtraCode,
400 raw_ostream &O) {
401 if (ExtraCode && ExtraCode[0]) {
402 if (ExtraCode[1] != 0) return true; // Unknown modifier.
403
404 switch (ExtraCode[0]) {
405 default:
406 // See if this is a generic print operand
407 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O);
408 case 'r':
409 break;
410 }
411 }
412
413 printOperand(MI, OpNo, O);
414
415 return false;
416}
417
418bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
419 unsigned OpNo, unsigned AsmVariant,
420 const char *ExtraCode,
421 raw_ostream &O) {
422 if (ExtraCode && ExtraCode[0])
423 return true; // Unknown modifier
424
425 O << '[';
426 printMemOperand(MI, OpNo, O);
427 O << ']';
428
429 return false;
430}
431
432void SparcAsmPrinter::EmitEndOfAsmFile(Module &M) {
433 const TargetLoweringObjectFileELF &TLOFELF =
434 static_cast<const TargetLoweringObjectFileELF &>(getObjFileLowering());
435 MachineModuleInfoELF &MMIELF = MMI->getObjFileInfo<MachineModuleInfoELF>();
436
437 // Generate stubs for global variables.
438 MachineModuleInfoELF::SymbolListTy Stubs = MMIELF.GetGVStubList();
439 if (!Stubs.empty()) {
440 OutStreamer.SwitchSection(TLOFELF.getDataSection());
441 unsigned PtrSize = TM.getDataLayout()->getPointerSize(0);
442 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
443 OutStreamer.EmitLabel(Stubs[i].first);
444 OutStreamer.EmitSymbolValue(Stubs[i].second.getPointer(), PtrSize);
445 }
446 }
447}
448
449// Force static initialization.
450extern "C" void LLVMInitializeSparcAsmPrinter() {
451 RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
452 RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);
453}