1//===-- PPCISelLowering.cpp - PPC DAG Lowering Implementation -------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 2674 unchanged lines hidden (view full) --- 2683 for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) { 2684 SDValue ArgVal; 2685 bool needsLoad = false; 2686 EVT ObjectVT = Ins[ArgNo].VT; 2687 EVT OrigVT = Ins[ArgNo].ArgVT; 2688 unsigned ObjSize = ObjectVT.getStoreSize(); 2689 unsigned ArgSize = ObjSize; 2690 ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; |
2691 if (Ins[ArgNo].isOrigArg()) { 2692 std::advance(FuncArg, Ins[ArgNo].getOrigArgIndex() - CurArgIdx); 2693 CurArgIdx = Ins[ArgNo].getOrigArgIndex(); 2694 } |
2695 /* Respect alignment of argument on the stack. */ 2696 unsigned Align = 2697 CalculateStackSlotAlignment(ObjectVT, OrigVT, Flags, PtrByteSize); 2698 ArgOffset = ((ArgOffset + Align - 1) / Align) * Align; 2699 unsigned CurArgOffset = ArgOffset; 2700 2701 /* Compute GPR index associated with argument offset. */ 2702 GPR_idx = (ArgOffset - LinkageSize) / PtrByteSize; 2703 GPR_idx = std::min(GPR_idx, Num_GPR_Regs); 2704 2705 // FIXME the codegen can be much improved in some cases. 2706 // We do not have to keep everything in memory. 2707 if (Flags.isByVal()) { |
2708 assert(Ins[ArgNo].isOrigArg() && "Byval arguments cannot be implicit"); 2709 |
2710 // ObjSize is the true size, ArgSize rounded up to multiple of registers. 2711 ObjSize = Flags.getByValSize(); 2712 ArgSize = ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; 2713 // Empty aggregate parameters do not take up registers. Examples: 2714 // struct { } a; 2715 // union { } b; 2716 // int c[0]; 2717 // etc. However, we have to provide a place-holder in InVals, so --- 344 unchanged lines hidden (view full) --- 3062 unsigned CurArgIdx = 0; 3063 for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) { 3064 SDValue ArgVal; 3065 bool needsLoad = false; 3066 EVT ObjectVT = Ins[ArgNo].VT; 3067 unsigned ObjSize = ObjectVT.getSizeInBits()/8; 3068 unsigned ArgSize = ObjSize; 3069 ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; |
3070 if (Ins[ArgNo].isOrigArg()) { 3071 std::advance(FuncArg, Ins[ArgNo].getOrigArgIndex() - CurArgIdx); 3072 CurArgIdx = Ins[ArgNo].getOrigArgIndex(); 3073 } |
3074 unsigned CurArgOffset = ArgOffset; 3075 3076 // Varargs or 64 bit Altivec parameters are padded to a 16 byte boundary. 3077 if (ObjectVT==MVT::v4f32 || ObjectVT==MVT::v4i32 || 3078 ObjectVT==MVT::v8i16 || ObjectVT==MVT::v16i8) { 3079 if (isVarArg || isPPC64) { 3080 MinReservedArea = ((MinReservedArea+15)/16)*16; 3081 MinReservedArea += CalculateStackSlotSize(ObjectVT, --- 4 unchanged lines hidden (view full) --- 3086 // Calculate min reserved area. 3087 MinReservedArea += CalculateStackSlotSize(Ins[ArgNo].VT, 3088 Flags, 3089 PtrByteSize); 3090 3091 // FIXME the codegen can be much improved in some cases. 3092 // We do not have to keep everything in memory. 3093 if (Flags.isByVal()) { |
3094 assert(Ins[ArgNo].isOrigArg() && "Byval arguments cannot be implicit"); 3095 |
3096 // ObjSize is the true size, ArgSize rounded up to multiple of registers. 3097 ObjSize = Flags.getByValSize(); 3098 ArgSize = ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; 3099 // Objects of size 1 and 2 are right justified, everything else is 3100 // left justified. This means the memory address is adjusted forwards. 3101 if (ObjSize==1 || ObjSize==2) { 3102 CurArgOffset = CurArgOffset + (4 - ObjSize); 3103 } --- 6840 unchanged lines hidden --- |