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MipsLongBranch.cpp (276479) MipsLongBranch.cpp (277320)
1//===-- MipsLongBranch.cpp - Emit long branches ---------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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59
60 class MipsLongBranch : public MachineFunctionPass {
61
62 public:
63 static char ID;
64 MipsLongBranch(TargetMachine &tm)
65 : MachineFunctionPass(ID), TM(tm),
66 IsPIC(TM.getRelocationModel() == Reloc::PIC_),
1//===-- MipsLongBranch.cpp - Emit long branches ---------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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59
60 class MipsLongBranch : public MachineFunctionPass {
61
62 public:
63 static char ID;
64 MipsLongBranch(TargetMachine &tm)
65 : MachineFunctionPass(ID), TM(tm),
66 IsPIC(TM.getRelocationModel() == Reloc::PIC_),
67 ABI(TM.getSubtarget<MipsSubtarget>().getTargetABI()),
68 LongBranchSeqSize(!IsPIC ? 2 : (ABI == MipsSubtarget::N64 ? 10 :
67 ABI(TM.getSubtarget().getABI()),
68 LongBranchSeqSize(!IsPIC ? 2 : (ABI.IsN64() ? 10 :
69 (!TM.getSubtarget<MipsSubtarget>().isTargetNaCl() ? 9 : 10))) {}
70
71 const char *getPassName() const override {
72 return "Mips Long Branch";
73 }
74
75 bool runOnMachineFunction(MachineFunction &F) override;
76

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81 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL,
82 MachineBasicBlock *MBBOpnd);
83 void expandToLongBranch(MBBInfo &Info);
84
85 const TargetMachine &TM;
86 MachineFunction *MF;
87 SmallVector<MBBInfo, 16> MBBInfos;
88 bool IsPIC;
69 (!TM.getSubtarget<MipsSubtarget>().isTargetNaCl() ? 9 : 10))) {}
70
71 const char *getPassName() const override {
72 return "Mips Long Branch";
73 }
74
75 bool runOnMachineFunction(MachineFunction &F) override;
76

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81 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL,
82 MachineBasicBlock *MBBOpnd);
83 void expandToLongBranch(MBBInfo &Info);
84
85 const TargetMachine &TM;
86 MachineFunction *MF;
87 SmallVector<MBBInfo, 16> MBBInfos;
88 bool IsPIC;
89 unsigned ABI;
89 MipsABIInfo ABI;
90 unsigned LongBranchSeqSize;
91 };
92
93 char MipsLongBranch::ID = 0;
94} // end of anonymous namespace
95
96/// createMipsLongBranchPass - Returns a pass that converts branches to long
97/// branches.

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268
269 // We must select between the MIPS32r6/MIPS64r6 BAL (which is a normal
270 // instruction) and the pre-MIPS32r6/MIPS64r6 definition (which is an
271 // pseudo-instruction wrapping BGEZAL).
272
273 const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>();
274 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR;
275
90 unsigned LongBranchSeqSize;
91 };
92
93 char MipsLongBranch::ID = 0;
94} // end of anonymous namespace
95
96/// createMipsLongBranchPass - Returns a pass that converts branches to long
97/// branches.

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268
269 // We must select between the MIPS32r6/MIPS64r6 BAL (which is a normal
270 // instruction) and the pre-MIPS32r6/MIPS64r6 definition (which is an
271 // pseudo-instruction wrapping BGEZAL).
272
273 const MipsSubtarget &Subtarget = TM.getSubtarget<MipsSubtarget>();
274 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR;
275
276 if (ABI != MipsSubtarget::N64) {
276 if (!ABI.IsN64()) {
277 // $longbr:
278 // addiu $sp, $sp, -8
279 // sw $ra, 0($sp)
280 // lui $at, %hi($tgt - $baltgt)
281 // bal $baltgt
282 // addiu $at, $at, %lo($tgt - $baltgt)
283 // $baltgt:
284 // addu $at, $ra, $at

--- 235 unchanged lines hidden --- 		277 // $longbr:
278 // addiu $sp, $sp, -8
279 // sw $ra, 0($sp)
280 // lui $at, %hi($tgt - $baltgt)
281 // bal $baltgt
282 // addiu $at, $at, %lo($tgt - $baltgt)
283 // $baltgt:
284 // addu $at, $ra, $at

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