1//===-- MipsInstrFPU.td - Mips FPU Instruction Information -*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// --- 444 unchanged lines hidden (view full) --- 453def FMUL_S : MMRel, ADDS_FT<"mul.s", FGR32Opnd, II_MUL_S, 1, fmul>, 454 ADDS_FM<0x02, 16>; 455defm FMUL : ADDS_M<"mul.d", II_MUL_D, 1, fmul>, ADDS_FM<0x02, 17>; 456def FSUB_S : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>, 457 ADDS_FM<0x01, 16>; 458defm FSUB : ADDS_M<"sub.d", II_SUB_D, 0, fsub>, ADDS_FM<0x01, 17>; 459 460def MADD_S : MMRel, MADDS_FT<"madd.s", FGR32Opnd, II_MADD_S, fadd>, |
461 MADDS_FM<4, 0>, INSN_MIPS4_32R2_NOT_32R6_64R6; |
462def MSUB_S : MMRel, MADDS_FT<"msub.s", FGR32Opnd, II_MSUB_S, fsub>, |
463 MADDS_FM<5, 0>, INSN_MIPS4_32R2_NOT_32R6_64R6; |
464 465let AdditionalPredicates = [NoNaNsFPMath] in { 466 def NMADD_S : MMRel, NMADDS_FT<"nmadd.s", FGR32Opnd, II_NMADD_S, fadd>, |
467 MADDS_FM<6, 0>, INSN_MIPS4_32R2_NOT_32R6_64R6; |
468 def NMSUB_S : MMRel, NMADDS_FT<"nmsub.s", FGR32Opnd, II_NMSUB_S, fsub>, |
469 MADDS_FM<7, 0>, INSN_MIPS4_32R2_NOT_32R6_64R6; |
470} 471 472def MADD_D32 : MMRel, MADDS_FT<"madd.d", AFGR64Opnd, II_MADD_D, fadd>, |
473 MADDS_FM<4, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_32; |
474def MSUB_D32 : MMRel, MADDS_FT<"msub.d", AFGR64Opnd, II_MSUB_D, fsub>, |
475 MADDS_FM<5, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_32; |
476 477let AdditionalPredicates = [NoNaNsFPMath] in { 478 def NMADD_D32 : MMRel, NMADDS_FT<"nmadd.d", AFGR64Opnd, II_NMADD_D, fadd>, |
479 MADDS_FM<6, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_32; |
480 def NMSUB_D32 : MMRel, NMADDS_FT<"nmsub.d", AFGR64Opnd, II_NMSUB_D, fsub>, |
481 MADDS_FM<7, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_32; |
482} 483 |
484let DecoderNamespace = "Mips64" in { |
485 def MADD_D64 : MADDS_FT<"madd.d", FGR64Opnd, II_MADD_D, fadd>, |
486 MADDS_FM<4, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_64; |
487 def MSUB_D64 : MADDS_FT<"msub.d", FGR64Opnd, II_MSUB_D, fsub>, |
488 MADDS_FM<5, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_64; |
489} 490 491let AdditionalPredicates = [NoNaNsFPMath], |
492 DecoderNamespace = "Mips64" in { |
493 def NMADD_D64 : NMADDS_FT<"nmadd.d", FGR64Opnd, II_NMADD_D, fadd>, |
494 MADDS_FM<6, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_64; |
495 def NMSUB_D64 : NMADDS_FT<"nmsub.d", FGR64Opnd, II_NMSUB_D, fsub>, |
496 MADDS_FM<7, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_64; |
497} 498 499//===----------------------------------------------------------------------===// 500// Floating Point Branch Codes 501//===----------------------------------------------------------------------===// 502// Mips branch codes. These correspond to condcode in MipsInstrInfo.h. 503// They must be kept in synch. 504def MIPS_BRANCH_F : PatLeaf<(i32 0)>; --- 135 unchanged lines hidden --- |