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Mips32r6InstrInfo.td (280031) Mips32r6InstrInfo.td (283526)
1//=- Mips32r6InstrInfo.td - Mips32r6 Instruction Information -*- tablegen -*-=//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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374
375class JMP_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
376 RegisterOperand GPROpnd> {
377 dag InOperandList = (ins GPROpnd:$rt, opnd:$offset);
378 string AsmString = !strconcat(opstr, "\t$rt, $offset");
379 list<dag> Pattern = [];
380 bit isTerminator = 1;
381 bit hasDelaySlot = 0;
1//=- Mips32r6InstrInfo.td - Mips32r6 Instruction Information -*- tablegen -*-=//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//

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374
375class JMP_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
376 RegisterOperand GPROpnd> {
377 dag InOperandList = (ins GPROpnd:$rt, opnd:$offset);
378 string AsmString = !strconcat(opstr, "\t$rt, $offset");
379 list<dag> Pattern = [];
380 bit isTerminator = 1;
381 bit hasDelaySlot = 0;
382 string DecoderMethod = "DecodeSimm16";
383}
384
385class JIALC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
386 GPR32Opnd> {
387 bit isCall = 1;
388 list<Register> Defs = [RA];
389}
390

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545class CLASS_D_DESC : CLASS_RINT_DESC_BASE<"class.d", FGR64Opnd>;
546
547class CACHE_HINT_DESC<string instr_asm, Operand MemOpnd,
548 RegisterOperand GPROpnd> {
549 dag OutOperandList = (outs);
550 dag InOperandList = (ins MemOpnd:$addr, uimm5:$hint);
551 string AsmString = !strconcat(instr_asm, "\t$hint, $addr");
552 list<dag> Pattern = [];
382}
383
384class JIALC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
385 GPR32Opnd> {
386 bit isCall = 1;
387 list<Register> Defs = [RA];
388}
389

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544class CLASS_D_DESC : CLASS_RINT_DESC_BASE<"class.d", FGR64Opnd>;
545
546class CACHE_HINT_DESC<string instr_asm, Operand MemOpnd,
547 RegisterOperand GPROpnd> {
548 dag OutOperandList = (outs);
549 dag InOperandList = (ins MemOpnd:$addr, uimm5:$hint);
550 string AsmString = !strconcat(instr_asm, "\t$hint, $addr");
551 list<dag> Pattern = [];
552 string DecoderMethod = "DecodeCacheOpR6";
553}
554
555class CACHE_DESC : CACHE_HINT_DESC<"cache", mem_simm9, GPR32Opnd>;
556class PREF_DESC : CACHE_HINT_DESC<"pref", mem_simm9, GPR32Opnd>;
557
558class COP2LD_DESC_BASE<string instr_asm, RegisterOperand COPOpnd> {
559 dag OutOperandList = (outs COPOpnd:$rt);
560 dag InOperandList = (ins mem_simm11:$addr);
561 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
562 list<dag> Pattern = [];
563 bit mayLoad = 1;
553}
554
555class CACHE_DESC : CACHE_HINT_DESC<"cache", mem_simm9, GPR32Opnd>;
556class PREF_DESC : CACHE_HINT_DESC<"pref", mem_simm9, GPR32Opnd>;
557
558class COP2LD_DESC_BASE<string instr_asm, RegisterOperand COPOpnd> {
559 dag OutOperandList = (outs COPOpnd:$rt);
560 dag InOperandList = (ins mem_simm11:$addr);
561 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
562 list<dag> Pattern = [];
563 bit mayLoad = 1;
564 string DecoderMethod = "DecodeFMemCop2R6";
564}
565
566class LDC2_R6_DESC : COP2LD_DESC_BASE<"ldc2", COP2Opnd>;
567class LWC2_R6_DESC : COP2LD_DESC_BASE<"lwc2", COP2Opnd>;
568
569class COP2ST_DESC_BASE<string instr_asm, RegisterOperand COPOpnd> {
570 dag OutOperandList = (outs);
571 dag InOperandList = (ins COPOpnd:$rt, mem_simm11:$addr);
572 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
573 list<dag> Pattern = [];
574 bit mayStore = 1;
565}
566
567class LDC2_R6_DESC : COP2LD_DESC_BASE<"ldc2", COP2Opnd>;
568class LWC2_R6_DESC : COP2LD_DESC_BASE<"lwc2", COP2Opnd>;
569
570class COP2ST_DESC_BASE<string instr_asm, RegisterOperand COPOpnd> {
571 dag OutOperandList = (outs);
572 dag InOperandList = (ins COPOpnd:$rt, mem_simm11:$addr);
573 string AsmString = !strconcat(instr_asm, "\t$rt, $addr");
574 list<dag> Pattern = [];
575 bit mayStore = 1;
576 string DecoderMethod = "DecodeFMemCop2R6";
575}
576
577class SDC2_R6_DESC : COP2ST_DESC_BASE<"sdc2", COP2Opnd>;
578class SWC2_R6_DESC : COP2ST_DESC_BASE<"swc2", COP2Opnd>;
579
580class LSA_R6_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
581 Operand ImmOpnd> {
582 dag OutOperandList = (outs GPROpnd:$rd);

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578
579class SDC2_R6_DESC : COP2ST_DESC_BASE<"sdc2", COP2Opnd>;
580class SWC2_R6_DESC : COP2ST_DESC_BASE<"swc2", COP2Opnd>;
581
582class LSA_R6_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
583 Operand ImmOpnd> {
584 dag OutOperandList = (outs GPROpnd:$rd);

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