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ARMSchedule.td (198090) ARMSchedule.td (207618)
1//===- ARMSchedule.td - ARM Scheduling Definitions ---------*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
1//===- ARMSchedule.td - ARM Scheduling Definitions ---------*- tablegen -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11// Functional units across ARM processors
12//
13def FU_Issue : FuncUnit; // issue
14def FU_Pipe0 : FuncUnit; // pipeline 0
15def FU_Pipe1 : FuncUnit; // pipeline 1
16def FU_LdSt0 : FuncUnit; // pipeline 0 load/store
17def FU_LdSt1 : FuncUnit; // pipeline 1 load/store
18def FU_NPipe : FuncUnit; // NEON ALU/MUL pipe
19def FU_NLSPipe : FuncUnit; // NEON LS pipe
20
21//===----------------------------------------------------------------------===//
22// Instruction Itinerary classes used for ARM
23//
24def IIC_iALUx : InstrItinClass;
25def IIC_iALUi : InstrItinClass;
26def IIC_iALUr : InstrItinClass;
27def IIC_iALUsi : InstrItinClass;
28def IIC_iALUsr : InstrItinClass;
29def IIC_iUNAr : InstrItinClass;

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64def IIC_Br : InstrItinClass;
65def IIC_fpSTAT : InstrItinClass;
66def IIC_fpUNA32 : InstrItinClass;
67def IIC_fpUNA64 : InstrItinClass;
68def IIC_fpCMP32 : InstrItinClass;
69def IIC_fpCMP64 : InstrItinClass;
70def IIC_fpCVTSD : InstrItinClass;
71def IIC_fpCVTDS : InstrItinClass;
11// Instruction Itinerary classes used for ARM
12//
13def IIC_iALUx : InstrItinClass;
14def IIC_iALUi : InstrItinClass;
15def IIC_iALUr : InstrItinClass;
16def IIC_iALUsi : InstrItinClass;
17def IIC_iALUsr : InstrItinClass;
18def IIC_iUNAr : InstrItinClass;

--- 34 unchanged lines hidden (view full) ---

53def IIC_Br : InstrItinClass;
54def IIC_fpSTAT : InstrItinClass;
55def IIC_fpUNA32 : InstrItinClass;
56def IIC_fpUNA64 : InstrItinClass;
57def IIC_fpCMP32 : InstrItinClass;
58def IIC_fpCMP64 : InstrItinClass;
59def IIC_fpCVTSD : InstrItinClass;
60def IIC_fpCVTDS : InstrItinClass;
61def IIC_fpCVTSH : InstrItinClass;
62def IIC_fpCVTHS : InstrItinClass;
72def IIC_fpCVTIS : InstrItinClass;
73def IIC_fpCVTID : InstrItinClass;
74def IIC_fpCVTSI : InstrItinClass;
75def IIC_fpCVTDI : InstrItinClass;
63def IIC_fpCVTIS : InstrItinClass;
64def IIC_fpCVTID : InstrItinClass;
65def IIC_fpCVTSI : InstrItinClass;
66def IIC_fpCVTDI : InstrItinClass;
67def IIC_fpMOVIS : InstrItinClass;
68def IIC_fpMOVID : InstrItinClass;
69def IIC_fpMOVSI : InstrItinClass;
70def IIC_fpMOVDI : InstrItinClass;
76def IIC_fpALU32 : InstrItinClass;
77def IIC_fpALU64 : InstrItinClass;
78def IIC_fpMUL32 : InstrItinClass;
79def IIC_fpMUL64 : InstrItinClass;
80def IIC_fpMAC32 : InstrItinClass;
81def IIC_fpMAC64 : InstrItinClass;
82def IIC_fpDIV32 : InstrItinClass;
83def IIC_fpDIV64 : InstrItinClass;

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120def IIC_VQUNAiD : InstrItinClass;
121def IIC_VQUNAiQ : InstrItinClass;
122def IIC_VBINiD : InstrItinClass;
123def IIC_VBINiQ : InstrItinClass;
124def IIC_VSUBiD : InstrItinClass;
125def IIC_VSUBiQ : InstrItinClass;
126def IIC_VBINi4D : InstrItinClass;
127def IIC_VBINi4Q : InstrItinClass;
71def IIC_fpALU32 : InstrItinClass;
72def IIC_fpALU64 : InstrItinClass;
73def IIC_fpMUL32 : InstrItinClass;
74def IIC_fpMUL64 : InstrItinClass;
75def IIC_fpMAC32 : InstrItinClass;
76def IIC_fpMAC64 : InstrItinClass;
77def IIC_fpDIV32 : InstrItinClass;
78def IIC_fpDIV64 : InstrItinClass;

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115def IIC_VQUNAiD : InstrItinClass;
116def IIC_VQUNAiQ : InstrItinClass;
117def IIC_VBINiD : InstrItinClass;
118def IIC_VBINiQ : InstrItinClass;
119def IIC_VSUBiD : InstrItinClass;
120def IIC_VSUBiQ : InstrItinClass;
121def IIC_VBINi4D : InstrItinClass;
122def IIC_VBINi4Q : InstrItinClass;
123def IIC_VSUBi4D : InstrItinClass;
124def IIC_VSUBi4Q : InstrItinClass;
125def IIC_VABAD : InstrItinClass;
126def IIC_VABAQ : InstrItinClass;
128def IIC_VSHLiD : InstrItinClass;
129def IIC_VSHLiQ : InstrItinClass;
130def IIC_VSHLi4D : InstrItinClass;
131def IIC_VSHLi4Q : InstrItinClass;
132def IIC_VPALiD : InstrItinClass;
133def IIC_VPALiQ : InstrItinClass;
134def IIC_VMULi16D : InstrItinClass;
135def IIC_VMULi32D : InstrItinClass;

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148def IIC_VTBX1 : InstrItinClass;
149def IIC_VTBX2 : InstrItinClass;
150def IIC_VTBX3 : InstrItinClass;
151def IIC_VTBX4 : InstrItinClass;
152
153//===----------------------------------------------------------------------===//
154// Processor instruction itineraries.
155
127def IIC_VSHLiD : InstrItinClass;
128def IIC_VSHLiQ : InstrItinClass;
129def IIC_VSHLi4D : InstrItinClass;
130def IIC_VSHLi4Q : InstrItinClass;
131def IIC_VPALiD : InstrItinClass;
132def IIC_VPALiQ : InstrItinClass;
133def IIC_VMULi16D : InstrItinClass;
134def IIC_VMULi32D : InstrItinClass;

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147def IIC_VTBX1 : InstrItinClass;
148def IIC_VTBX2 : InstrItinClass;
149def IIC_VTBX3 : InstrItinClass;
150def IIC_VTBX4 : InstrItinClass;
151
152//===----------------------------------------------------------------------===//
153// Processor instruction itineraries.
154
156def GenericItineraries : ProcessorItineraries<[]>;
155def GenericItineraries : ProcessorItineraries<[], []>;
157
156
158
159include "ARMScheduleV6.td"
157include "ARMScheduleV6.td"
160include "ARMScheduleV7.td"
158include "ARMScheduleA8.td"
159include "ARMScheduleA9.td"