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reload.c (107605) reload.c (117404)
1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free

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239static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
241 enum insn_code *));
242#endif
243static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
244 unsigned int));
245static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
246static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free

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239static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
241 enum insn_code *));
242#endif
243static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
244 unsigned int));
245static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
246static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
247static void dup_replacements PARAMS ((rtx *, rtx *));
247static void combine_reloads PARAMS ((void));
248static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
249 enum reload_type, int, int));
250static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
251 enum machine_mode, enum machine_mode,
252 enum reg_class, int, int));
253static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
254static struct decomposition decompose PARAMS ((rtx));
255static int immune_p PARAMS ((rtx, rtx, struct decomposition));
256static int alternative_allows_memconst PARAMS ((const char *, int));
257static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
258 int, rtx, int *));
259static rtx make_memloc PARAMS ((rtx, int));
248static void combine_reloads PARAMS ((void));
249static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
250 enum reload_type, int, int));
251static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
252 enum machine_mode, enum machine_mode,
253 enum reg_class, int, int));
254static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
255static struct decomposition decompose PARAMS ((rtx));
256static int immune_p PARAMS ((rtx, rtx, struct decomposition));
257static int alternative_allows_memconst PARAMS ((const char *, int));
258static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
259 int, rtx, int *));
260static rtx make_memloc PARAMS ((rtx, int));
261static int maybe_memory_address_p PARAMS ((enum machine_mode, rtx, rtx *));
260static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
261 int, enum reload_type, int, rtx));
262static rtx subst_reg_equivs PARAMS ((rtx, rtx));
263static rtx subst_indexed_address PARAMS ((rtx));
264static void update_auto_inc_notes PARAMS ((rtx, int, int));
265static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
266 int, enum reload_type,int, rtx));
267static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
268 enum machine_mode, int,
269 enum reload_type, int));
270static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
271 enum reload_type, int, rtx));
272static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
273static int find_inc_amount PARAMS ((rtx, rtx));
274
275#ifdef HAVE_SECONDARY_RELOADS
276
277/* Determine if any secondary reloads are needed for loading (if IN_P is
262static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
263 int, enum reload_type, int, rtx));
264static rtx subst_reg_equivs PARAMS ((rtx, rtx));
265static rtx subst_indexed_address PARAMS ((rtx));
266static void update_auto_inc_notes PARAMS ((rtx, int, int));
267static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
268 int, enum reload_type,int, rtx));
269static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
270 enum machine_mode, int,
271 enum reload_type, int));
272static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
273 enum reload_type, int, rtx));
274static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
275static int find_inc_amount PARAMS ((rtx, rtx));
276
277#ifdef HAVE_SECONDARY_RELOADS
278
279/* Determine if any secondary reloads are needed for loading (if IN_P is
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
280 nonzero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
281
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
285
286static int

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362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
366 register. */
367
368 if (icode != CODE_FOR_nothing)
369 {
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
283
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
287
288static int

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364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
368 register. */
369
370 if (icode != CODE_FOR_nothing)
371 {
370 /* If IN_P is non-zero, the reload register will be the output in
372 /* If IN_P is nonzero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
373 skip. */
374
375 enum reg_class insn_class;
376
377 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
378 insn_class = ALL_REGS;

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639 don't save it. */
640
641 if (! mem_valid)
642 {
643 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
644 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
645 : RELOAD_OTHER);
646
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
375 skip. */
376
377 enum reg_class insn_class;
378
379 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
380 insn_class = ALL_REGS;

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641 don't save it. */
642
643 if (! mem_valid)
644 {
645 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
646 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
647 : RELOAD_OTHER);
648
647 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0),
649 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
648 opnum, type, 0, 0);
649 }
650
651 secondary_memlocs_elim[(int) mode][opnum] = loc;
652 return loc;
653}
654
655/* Clear any secondary memory locations we've made. */

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812 return 1;
813
814 /* If INNER is not a hard register, then INNER will not need to
815 be reloaded. */
816 if (GET_CODE (inner) != REG
817 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
818 return 0;
819
650 opnum, type, 0, 0);
651 }
652
653 secondary_memlocs_elim[(int) mode][opnum] = loc;
654 return loc;
655}
656
657/* Clear any secondary memory locations we've made. */

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814 return 1;
815
816 /* If INNER is not a hard register, then INNER will not need to
817 be reloaded. */
818 if (GET_CODE (inner) != REG
819 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
820 return 0;
821
822 if (!subreg_offset_representable_p
823 (REGNO (SUBREG_REG (x)),
824 GET_MODE (SUBREG_REG (x)),
825 SUBREG_BYTE (x),
826 GET_MODE (x)))
827 return 1;
828
820 /* If INNER is not ok for MODE, then INNER will need reloading. */
821 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
822 return 1;
823
824 /* If the outer part is a word or smaller, INNER larger than a
825 word and the number of regs for INNER is not the same as the
826 number of words in INNER, then INNER will need reloading. */
827 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
828 && output
829 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
830 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
829 /* If INNER is not ok for MODE, then INNER will need reloading. */
830 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
831 return 1;
832
833 /* If the outer part is a word or smaller, INNER larger than a
834 word and the number of regs for INNER is not the same as the
835 number of words in INNER, then INNER will need reloading. */
836 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
837 && output
838 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
839 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
831 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
840 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
832}
833
834/* Record one reload that needs to be performed.
835 IN is an rtx saying where the data are to be found before this instruction.
836 OUT says where they must be stored after the instruction.
837 (IN is zero for data not read, and OUT is zero for data not written.)
838 INLOC and OUTLOC point to the places in the instructions where
839 IN and OUT were found.
841}
842
843/* Record one reload that needs to be performed.
844 IN is an rtx saying where the data are to be found before this instruction.
845 OUT says where they must be stored after the instruction.
846 (IN is zero for data not read, and OUT is zero for data not written.)
847 INLOC and OUTLOC point to the places in the instructions where
848 IN and OUT were found.
840 If IN and OUT are both non-zero, it means the same register must be used
849 If IN and OUT are both nonzero, it means the same register must be used
841 to reload both IN and OUT.
842
843 CLASS is a register class required for the reloaded data.
844 INMODE is the machine mode that the instruction requires
845 for the reg that replaces IN and OUTMODE is likewise for OUT.
846
847 If IN is zero, then OUT's location and mode should be passed as
848 INLOC and INMODE.

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961 the class whose registers cannot be referenced in a different size
962 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
963 cannot reload just the inside since we might end up with the wrong
964 register class. But if it is inside a STRICT_LOW_PART, we have
965 no choice, so we hope we do get the right register class there. */
966
967 if (in != 0 && GET_CODE (in) == SUBREG
968 && (subreg_lowpart_p (in) || strict_low)
850 to reload both IN and OUT.
851
852 CLASS is a register class required for the reloaded data.
853 INMODE is the machine mode that the instruction requires
854 for the reg that replaces IN and OUTMODE is likewise for OUT.
855
856 If IN is zero, then OUT's location and mode should be passed as
857 INLOC and INMODE.

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970 the class whose registers cannot be referenced in a different size
971 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
972 cannot reload just the inside since we might end up with the wrong
973 register class. But if it is inside a STRICT_LOW_PART, we have
974 no choice, so we hope we do get the right register class there. */
975
976 if (in != 0 && GET_CODE (in) == SUBREG
977 && (subreg_lowpart_p (in) || strict_low)
969#ifdef CLASS_CANNOT_CHANGE_MODE
970 && (class != CLASS_CANNOT_CHANGE_MODE
971 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode))
978#ifdef CANNOT_CHANGE_MODE_CLASS
979 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
972#endif
973 && (CONSTANT_P (SUBREG_REG (in))
974 || GET_CODE (SUBREG_REG (in)) == PLUS
975 || strict_low
976 || (((GET_CODE (SUBREG_REG (in)) == REG
977 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
978 || GET_CODE (SUBREG_REG (in)) == MEM)
979 && ((GET_MODE_SIZE (inmode)

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1000 /* The case where out is nonzero
1001 is handled differently in the following statement. */
1002 && (out == 0 || subreg_lowpart_p (in))
1003 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1004 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1005 > UNITS_PER_WORD)
1006 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1007 / UNITS_PER_WORD)
980#endif
981 && (CONSTANT_P (SUBREG_REG (in))
982 || GET_CODE (SUBREG_REG (in)) == PLUS
983 || strict_low
984 || (((GET_CODE (SUBREG_REG (in)) == REG
985 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
986 || GET_CODE (SUBREG_REG (in)) == MEM)
987 && ((GET_MODE_SIZE (inmode)

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1008 /* The case where out is nonzero
1009 is handled differently in the following statement. */
1010 && (out == 0 || subreg_lowpart_p (in))
1011 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1013 > UNITS_PER_WORD)
1014 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1015 / UNITS_PER_WORD)
1008 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1009 GET_MODE (SUBREG_REG (in)))))
1016 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1017 GET_MODE (SUBREG_REG (in)))))
1010 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1011#ifdef SECONDARY_INPUT_RELOAD_CLASS
1012 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1013 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1014 GET_MODE (SUBREG_REG (in)),
1015 SUBREG_REG (in))
1016 == NO_REGS))
1017#endif
1018 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1019#ifdef SECONDARY_INPUT_RELOAD_CLASS
1020 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1021 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1022 GET_MODE (SUBREG_REG (in)),
1023 SUBREG_REG (in))
1024 == NO_REGS))
1025#endif
1018#ifdef CLASS_CANNOT_CHANGE_MODE
1026#ifdef CANNOT_CHANGE_MODE_CLASS
1019 || (GET_CODE (SUBREG_REG (in)) == REG
1020 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1027 || (GET_CODE (SUBREG_REG (in)) == REG
1028 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1021 && (TEST_HARD_REG_BIT
1022 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1023 REGNO (SUBREG_REG (in))))
1024 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
1025 inmode))
1029 && REG_CANNOT_CHANGE_MODE_P
1030 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1026#endif
1027 ))
1028 {
1029 in_subreg_loc = inloc;
1030 inloc = &SUBREG_REG (in);
1031 in = *inloc;
1032#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1033 if (GET_CODE (in) == MEM)

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1075 /* Similarly for paradoxical and problematical SUBREGs on the output.
1076 Note that there is no reason we need worry about the previous value
1077 of SUBREG_REG (out); even if wider than out,
1078 storing in a subreg is entitled to clobber it all
1079 (except in the case of STRICT_LOW_PART,
1080 and in that case the constraint should label it input-output.) */
1081 if (out != 0 && GET_CODE (out) == SUBREG
1082 && (subreg_lowpart_p (out) || strict_low)
1031#endif
1032 ))
1033 {
1034 in_subreg_loc = inloc;
1035 inloc = &SUBREG_REG (in);
1036 in = *inloc;
1037#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1038 if (GET_CODE (in) == MEM)

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1080 /* Similarly for paradoxical and problematical SUBREGs on the output.
1081 Note that there is no reason we need worry about the previous value
1082 of SUBREG_REG (out); even if wider than out,
1083 storing in a subreg is entitled to clobber it all
1084 (except in the case of STRICT_LOW_PART,
1085 and in that case the constraint should label it input-output.) */
1086 if (out != 0 && GET_CODE (out) == SUBREG
1087 && (subreg_lowpart_p (out) || strict_low)
1083#ifdef CLASS_CANNOT_CHANGE_MODE
1084 && (class != CLASS_CANNOT_CHANGE_MODE
1085 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1086 outmode))
1088#ifdef CANNOT_CHANGE_MODE_CLASS
1089 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1087#endif
1088 && (CONSTANT_P (SUBREG_REG (out))
1089 || strict_low
1090 || (((GET_CODE (SUBREG_REG (out)) == REG
1091 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1092 || GET_CODE (SUBREG_REG (out)) == MEM)
1093 && ((GET_MODE_SIZE (outmode)
1094 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))

--- 7 unchanged lines hidden (view full) ---

1102 ))
1103 || (GET_CODE (SUBREG_REG (out)) == REG
1104 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1105 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1106 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1107 > UNITS_PER_WORD)
1108 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1109 / UNITS_PER_WORD)
1090#endif
1091 && (CONSTANT_P (SUBREG_REG (out))
1092 || strict_low
1093 || (((GET_CODE (SUBREG_REG (out)) == REG
1094 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1095 || GET_CODE (SUBREG_REG (out)) == MEM)
1096 && ((GET_MODE_SIZE (outmode)
1097 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))

--- 7 unchanged lines hidden (view full) ---

1105 ))
1106 || (GET_CODE (SUBREG_REG (out)) == REG
1107 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1108 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1109 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1110 > UNITS_PER_WORD)
1111 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1112 / UNITS_PER_WORD)
1110 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1111 GET_MODE (SUBREG_REG (out)))))
1113 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1114 GET_MODE (SUBREG_REG (out)))))
1112 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1113#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1114 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1115 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1116 GET_MODE (SUBREG_REG (out)),
1117 SUBREG_REG (out))
1118 == NO_REGS))
1119#endif
1115 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1116#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1117 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1118 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1119 GET_MODE (SUBREG_REG (out)),
1120 SUBREG_REG (out))
1121 == NO_REGS))
1122#endif
1120#ifdef CLASS_CANNOT_CHANGE_MODE
1123#ifdef CANNOT_CHANGE_MODE_CLASS
1121 || (GET_CODE (SUBREG_REG (out)) == REG
1122 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1124 || (GET_CODE (SUBREG_REG (out)) == REG
1125 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1123 && (TEST_HARD_REG_BIT
1124 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1125 REGNO (SUBREG_REG (out))))
1126 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1127 outmode))
1126 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1127 GET_MODE (SUBREG_REG (out)),
1128 outmode))
1128#endif
1129 ))
1130 {
1131 out_subreg_loc = outloc;
1132 outloc = &SUBREG_REG (out);
1133 out = *outloc;
1134#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1135 if (GET_CODE (out) == MEM

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1280 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1281 type, &secondary_out_icode);
1282#endif
1283
1284 /* We found no existing reload suitable for re-use.
1285 So add an additional reload. */
1286
1287#ifdef SECONDARY_MEMORY_NEEDED
1129#endif
1130 ))
1131 {
1132 out_subreg_loc = outloc;
1133 outloc = &SUBREG_REG (out);
1134 out = *outloc;
1135#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1136 if (GET_CODE (out) == MEM

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1281 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1282 type, &secondary_out_icode);
1283#endif
1284
1285 /* We found no existing reload suitable for re-use.
1286 So add an additional reload. */
1287
1288#ifdef SECONDARY_MEMORY_NEEDED
1288 {
1289 int regnum;
1290
1291 /* If a memory location is needed for the copy, make one. */
1292 if (in != 0
1293 && ((regnum = true_regnum (in)) >= 0)
1294 && regnum < FIRST_PSEUDO_REGISTER
1295 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (regnum),
1296 class, inmode))
1297 get_secondary_mem (in, inmode, opnum, type);
1298 }
1289 /* If a memory location is needed for the copy, make one. */
1290 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1291 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1292 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1293 class, inmode))
1294 get_secondary_mem (in, inmode, opnum, type);
1299#endif
1300
1301 i = n_reloads;
1302 rld[i].in = in;
1303 rld[i].out = out;
1304 rld[i].class = class;
1305 rld[i].inmode = inmode;
1306 rld[i].outmode = outmode;

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1316 rld[i].secondary_out_reload = secondary_out_reload;
1317 rld[i].secondary_in_icode = secondary_in_icode;
1318 rld[i].secondary_out_icode = secondary_out_icode;
1319 rld[i].secondary_p = 0;
1320
1321 n_reloads++;
1322
1323#ifdef SECONDARY_MEMORY_NEEDED
1295#endif
1296
1297 i = n_reloads;
1298 rld[i].in = in;
1299 rld[i].out = out;
1300 rld[i].class = class;
1301 rld[i].inmode = inmode;
1302 rld[i].outmode = outmode;

--- 9 unchanged lines hidden (view full) ---

1312 rld[i].secondary_out_reload = secondary_out_reload;
1313 rld[i].secondary_in_icode = secondary_in_icode;
1314 rld[i].secondary_out_icode = secondary_out_icode;
1315 rld[i].secondary_p = 0;
1316
1317 n_reloads++;
1318
1319#ifdef SECONDARY_MEMORY_NEEDED
1324 {
1325 int regnum;
1326
1327 if (out != 0
1328 && ((regnum = true_regnum (out)) >= 0)
1329 && regnum < FIRST_PSEUDO_REGISTER
1330 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (regnum),
1331 outmode))
1332 get_secondary_mem (out, outmode, opnum, type);
1333 }
1320 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1321 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (class,
1323 REGNO_REG_CLASS (reg_or_subregno (out)),
1324 outmode))
1325 get_secondary_mem (out, outmode, opnum, type);
1334#endif
1335 }
1336 else
1337 {
1338 /* We are reusing an existing reload,
1339 but we may have additional information for it.
1340 For example, we may now have both IN and OUT
1341 while the old one may have just one of them. */

--- 228 unchanged lines hidden (view full) ---

1570 {
1571 struct replacement *r = &replacements[n_replacements++];
1572 r->what = reloadnum;
1573 r->where = loc;
1574 r->subreg_loc = 0;
1575 r->mode = mode;
1576 }
1577}
1326#endif
1327 }
1328 else
1329 {
1330 /* We are reusing an existing reload,
1331 but we may have additional information for it.
1332 For example, we may now have both IN and OUT
1333 while the old one may have just one of them. */

--- 228 unchanged lines hidden (view full) ---

1562 {
1563 struct replacement *r = &replacements[n_replacements++];
1564 r->what = reloadnum;
1565 r->where = loc;
1566 r->subreg_loc = 0;
1567 r->mode = mode;
1568 }
1569}
1570
1571/* Duplicate any replacement we have recorded to apply at
1572 location ORIG_LOC to also be performed at DUP_LOC.
1573 This is used in insn patterns that use match_dup. */
1574
1575static void
1576dup_replacements (dup_loc, orig_loc)
1577 rtx *dup_loc;
1578 rtx *orig_loc;
1579{
1580 int i, n = n_replacements;
1581
1582 for (i = 0; i < n; i++)
1583 {
1584 struct replacement *r = &replacements[i];
1585 if (r->where == orig_loc)
1586 push_replacement (dup_loc, r->what, r->mode);
1587 }
1588}
1578
1579/* Transfer all replacements that used to be in reload FROM to be in
1580 reload TO. */
1581
1582void
1583transfer_replacements (to, from)
1584 int to, from;
1585{
1586 int i;
1587
1588 for (i = 0; i < n_replacements; i++)
1589 if (replacements[i].what == from)
1590 replacements[i].what = to;
1591}
1592
1593/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1594 or a subpart of it. If we have any replacements registered for IN_RTX,
1595 cancel the reloads that were supposed to load them.
1589
1590/* Transfer all replacements that used to be in reload FROM to be in
1591 reload TO. */
1592
1593void
1594transfer_replacements (to, from)
1595 int to, from;
1596{
1597 int i;
1598
1599 for (i = 0; i < n_replacements; i++)
1600 if (replacements[i].what == from)
1601 replacements[i].what = to;
1602}
1603
1604/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1605 or a subpart of it. If we have any replacements registered for IN_RTX,
1606 cancel the reloads that were supposed to load them.
1596 Return non-zero if we canceled any reloads. */
1607 Return nonzero if we canceled any reloads. */
1597int
1598remove_address_replacements (in_rtx)
1599 rtx in_rtx;
1600{
1601 int i, j;
1602 char reload_flags[MAX_RELOADS];
1603 int something_changed = 0;
1604

--- 223 unchanged lines hidden (view full) ---

1828
1829 If FOR_REAL is >= 0, it is the number of the reload,
1830 and in some cases when it can be discovered that OUT doesn't need
1831 to be computed, clear out rld[FOR_REAL].out.
1832
1833 If FOR_REAL is -1, this should not be done, because this call
1834 is just to see if a register can be found, not to find and install it.
1835
1608int
1609remove_address_replacements (in_rtx)
1610 rtx in_rtx;
1611{
1612 int i, j;
1613 char reload_flags[MAX_RELOADS];
1614 int something_changed = 0;
1615

--- 223 unchanged lines hidden (view full) ---

1839
1840 If FOR_REAL is >= 0, it is the number of the reload,
1841 and in some cases when it can be discovered that OUT doesn't need
1842 to be computed, clear out rld[FOR_REAL].out.
1843
1844 If FOR_REAL is -1, this should not be done, because this call
1845 is just to see if a register can be found, not to find and install it.
1846
1836 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1847 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1837 puts an additional constraint on being able to use IN for OUT since
1838 IN must not appear elsewhere in the insn (it is assumed that IN itself
1839 is safe from the earlyclobber). */
1840
1841static rtx
1842find_dummy_reload (real_in, real_out, inloc, outloc,
1843 inmode, outmode, class, for_real, earlyclobber)
1844 rtx real_in, real_out;

--- 286 unchanged lines hidden (view full) ---

2131 && j < FIRST_PSEUDO_REGISTER)
2132 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2133
2134 return i == j;
2135 }
2136 /* If two operands must match, because they are really a single
2137 operand of an assembler insn, then two postincrements are invalid
2138 because the assembler insn would increment only once.
1848 puts an additional constraint on being able to use IN for OUT since
1849 IN must not appear elsewhere in the insn (it is assumed that IN itself
1850 is safe from the earlyclobber). */
1851
1852static rtx
1853find_dummy_reload (real_in, real_out, inloc, outloc,
1854 inmode, outmode, class, for_real, earlyclobber)
1855 rtx real_in, real_out;

--- 286 unchanged lines hidden (view full) ---

2142 && j < FIRST_PSEUDO_REGISTER)
2143 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2144
2145 return i == j;
2146 }
2147 /* If two operands must match, because they are really a single
2148 operand of an assembler insn, then two postincrements are invalid
2149 because the assembler insn would increment only once.
2139 On the other hand, an postincrement matches ordinary indexing
2150 On the other hand, a postincrement matches ordinary indexing
2140 if the postincrement is the output operand. */
2141 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2142 return operands_match_p (XEXP (x, 0), y);
2143 /* Two preincrements are invalid
2144 because the assembler insn would increment only once.
2151 if the postincrement is the output operand. */
2152 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2153 return operands_match_p (XEXP (x, 0), y);
2154 /* Two preincrements are invalid
2155 because the assembler insn would increment only once.
2145 On the other hand, an preincrement matches ordinary indexing
2156 On the other hand, a preincrement matches ordinary indexing
2146 if the preincrement is the input operand.
2147 In this case, return 2, since some callers need to do special
2148 things when this happens. */
2149 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2150 || GET_CODE (y) == PRE_MODIFY)
2151 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2152
2153 slow:

--- 306 unchanged lines hidden (view full) ---

2460 and they are chewed up as we consider alternatives. */
2461 char *constraints[MAX_RECOG_OPERANDS];
2462 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2463 a register. */
2464 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2465 char pref_or_nothing[MAX_RECOG_OPERANDS];
2466 /* Nonzero for a MEM operand whose entire address needs a reload. */
2467 int address_reloaded[MAX_RECOG_OPERANDS];
2157 if the preincrement is the input operand.
2158 In this case, return 2, since some callers need to do special
2159 things when this happens. */
2160 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2161 || GET_CODE (y) == PRE_MODIFY)
2162 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2163
2164 slow:

--- 306 unchanged lines hidden (view full) ---

2471 and they are chewed up as we consider alternatives. */
2472 char *constraints[MAX_RECOG_OPERANDS];
2473 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2474 a register. */
2475 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2476 char pref_or_nothing[MAX_RECOG_OPERANDS];
2477 /* Nonzero for a MEM operand whose entire address needs a reload. */
2478 int address_reloaded[MAX_RECOG_OPERANDS];
2479 /* Nonzero for an address operand that needs to be completely reloaded. */
2480 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2468 /* Value of enum reload_type to use for operand. */
2469 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2470 /* Value of enum reload_type to use within address of operand. */
2471 enum reload_type address_type[MAX_RECOG_OPERANDS];
2472 /* Save the usage of each operand. */
2473 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2474 int no_input_reloads = 0, no_output_reloads = 0;
2475 int n_alternatives;

--- 162 unchanged lines hidden (view full) ---

2638
2639 Finally, set up the preferred classes of each operand. */
2640
2641 for (i = 0; i < noperands; i++)
2642 {
2643 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2644
2645 address_reloaded[i] = 0;
2481 /* Value of enum reload_type to use for operand. */
2482 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2483 /* Value of enum reload_type to use within address of operand. */
2484 enum reload_type address_type[MAX_RECOG_OPERANDS];
2485 /* Save the usage of each operand. */
2486 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2487 int no_input_reloads = 0, no_output_reloads = 0;
2488 int n_alternatives;

--- 162 unchanged lines hidden (view full) ---

2651
2652 Finally, set up the preferred classes of each operand. */
2653
2654 for (i = 0; i < noperands; i++)
2655 {
2656 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2657
2658 address_reloaded[i] = 0;
2659 address_operand_reloaded[i] = 0;
2646 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2647 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2648 : RELOAD_OTHER);
2649 address_type[i]
2650 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2651 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2652 : RELOAD_OTHER);
2653
2654 if (*constraints[i] == 0)
2655 /* Ignore things like match_operator operands. */
2656 ;
2660 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2661 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2662 : RELOAD_OTHER);
2663 address_type[i]
2664 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2665 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2666 : RELOAD_OTHER);
2667
2668 if (*constraints[i] == 0)
2669 /* Ignore things like match_operator operands. */
2670 ;
2657 else if (constraints[i][0] == 'p')
2671 else if (constraints[i][0] == 'p'
2672 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0]))
2658 {
2673 {
2659 find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2660 recog_data.operand[i],
2661 recog_data.operand_loc[i],
2662 i, operand_type[i], ind_levels, insn);
2674 address_operand_reloaded[i]
2675 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2676 recog_data.operand[i],
2677 recog_data.operand_loc[i],
2678 i, operand_type[i], ind_levels, insn);
2663
2664 /* If we now have a simple operand where we used to have a
2665 PLUS or MULT, re-recognize and try again. */
2666 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2667 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2668 && (GET_CODE (recog_data.operand[i]) == MULT
2669 || GET_CODE (recog_data.operand[i]) == PLUS))
2670 {
2671 INSN_CODE (insn) = -1;
2672 retval = find_reloads (insn, replace, ind_levels, live_known,
2673 reload_reg_p);
2674 return retval;
2675 }
2676
2677 recog_data.operand[i] = *recog_data.operand_loc[i];
2678 substed_operand[i] = recog_data.operand[i];
2679
2680 /* If we now have a simple operand where we used to have a
2681 PLUS or MULT, re-recognize and try again. */
2682 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2683 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2684 && (GET_CODE (recog_data.operand[i]) == MULT
2685 || GET_CODE (recog_data.operand[i]) == PLUS))
2686 {
2687 INSN_CODE (insn) = -1;
2688 retval = find_reloads (insn, replace, ind_levels, live_known,
2689 reload_reg_p);
2690 return retval;
2691 }
2692
2693 recog_data.operand[i] = *recog_data.operand_loc[i];
2694 substed_operand[i] = recog_data.operand[i];
2695
2696 /* Address operands are reloaded in their existing mode,
2697 no matter what is specified in the machine description. */
2698 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2679 }
2680 else if (code == MEM)
2681 {
2682 address_reloaded[i]
2683 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2684 recog_data.operand_loc[i],
2685 XEXP (recog_data.operand[i], 0),
2686 &XEXP (recog_data.operand[i], 0),

--- 164 unchanged lines hidden (view full) ---

2851 {
2852 /* Offset only matters when operand is a REG and
2853 it is a hard reg. This is because it is passed
2854 to reg_fits_class_p if it is a REG and all pseudos
2855 return 0 from that function. */
2856 if (GET_CODE (SUBREG_REG (operand)) == REG
2857 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2858 {
2699 }
2700 else if (code == MEM)
2701 {
2702 address_reloaded[i]
2703 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2704 recog_data.operand_loc[i],
2705 XEXP (recog_data.operand[i], 0),
2706 &XEXP (recog_data.operand[i], 0),

--- 164 unchanged lines hidden (view full) ---

2871 {
2872 /* Offset only matters when operand is a REG and
2873 it is a hard reg. This is because it is passed
2874 to reg_fits_class_p if it is a REG and all pseudos
2875 return 0 from that function. */
2876 if (GET_CODE (SUBREG_REG (operand)) == REG
2877 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2878 {
2879 if (!subreg_offset_representable_p
2880 (REGNO (SUBREG_REG (operand)),
2881 GET_MODE (SUBREG_REG (operand)),
2882 SUBREG_BYTE (operand),
2883 GET_MODE (operand)))
2884 force_reload = 1;
2859 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2860 GET_MODE (SUBREG_REG (operand)),
2861 SUBREG_BYTE (operand),
2862 GET_MODE (operand));
2863 }
2864 operand = SUBREG_REG (operand);
2865 /* Force reload if this is a constant or PLUS or if there may
2866 be a problem accessing OPERAND in the outer mode. */

--- 39 unchanged lines hidden (view full) ---

2906 && (GET_MODE_SIZE (operand_mode[i])
2907 > GET_MODE_SIZE (GET_MODE (operand)))
2908 && INTEGRAL_MODE_P (GET_MODE (operand))
2909 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2910#endif
2911 )
2912#endif
2913 )
2885 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2886 GET_MODE (SUBREG_REG (operand)),
2887 SUBREG_BYTE (operand),
2888 GET_MODE (operand));
2889 }
2890 operand = SUBREG_REG (operand);
2891 /* Force reload if this is a constant or PLUS or if there may
2892 be a problem accessing OPERAND in the outer mode. */

--- 39 unchanged lines hidden (view full) ---

2932 && (GET_MODE_SIZE (operand_mode[i])
2933 > GET_MODE_SIZE (GET_MODE (operand)))
2934 && INTEGRAL_MODE_P (GET_MODE (operand))
2935 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2936#endif
2937 )
2938#endif
2939 )
2914 /* This following hunk of code should no longer be
2915 needed at all with SUBREG_BYTE. If you need this
2916 code back, please explain to me why so I can
2917 fix the real problem. -DaveM */
2918#if 0
2919 /* Subreg of a hard reg which can't handle the subreg's mode
2920 or which would handle that mode in the wrong number of
2921 registers for subregging to work. */
2922 || (GET_CODE (operand) == REG
2923 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2924 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2925 && (GET_MODE_SIZE (GET_MODE (operand))
2926 > UNITS_PER_WORD)
2927 && ((GET_MODE_SIZE (GET_MODE (operand))
2928 / UNITS_PER_WORD)
2929 != HARD_REGNO_NREGS (REGNO (operand),
2930 GET_MODE (operand))))
2931 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2932 operand_mode[i])))
2933#endif
2934 )
2935 force_reload = 1;
2936 }
2937
2938 this_alternative[i] = (int) NO_REGS;
2939 this_alternative_win[i] = 0;
2940 this_alternative_match_win[i] = 0;
2941 this_alternative_offmemok[i] = 0;

--- 207 unchanged lines hidden (view full) ---

3149
3150 case '&':
3151 /* Output operand that is stored before the need for the
3152 input operands (and their index registers) is over. */
3153 earlyclobber = 1, this_earlyclobber = 1;
3154 break;
3155
3156 case 'E':
2940 )
2941 force_reload = 1;
2942 }
2943
2944 this_alternative[i] = (int) NO_REGS;
2945 this_alternative_win[i] = 0;
2946 this_alternative_match_win[i] = 0;
2947 this_alternative_offmemok[i] = 0;

--- 207 unchanged lines hidden (view full) ---

3155
3156 case '&':
3157 /* Output operand that is stored before the need for the
3158 input operands (and their index registers) is over. */
3159 earlyclobber = 1, this_earlyclobber = 1;
3160 break;
3161
3162 case 'E':
3157#ifndef REAL_ARITHMETIC
3158 /* Match any floating double constant, but only if
3159 we can examine the bits of it reliably. */
3160 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3161 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3162 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3163 break;
3164#endif
3165 if (GET_CODE (operand) == CONST_DOUBLE)
3166 win = 1;
3167 break;
3168
3169 case 'F':
3163 case 'F':
3170 if (GET_CODE (operand) == CONST_DOUBLE)
3164 if (GET_CODE (operand) == CONST_DOUBLE
3165 || (GET_CODE (operand) == CONST_VECTOR
3166 && (GET_MODE_CLASS (GET_MODE (operand))
3167 == MODE_VECTOR_FLOAT)))
3171 win = 1;
3172 break;
3173
3174 case 'G':
3175 case 'H':
3176 if (GET_CODE (operand) == CONST_DOUBLE
3177 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3178 win = 1;

--- 60 unchanged lines hidden (view full) ---

3239 this_alternative[i]
3240 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3241 goto reg;
3242
3243 default:
3244 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3245 {
3246#ifdef EXTRA_CONSTRAINT
3168 win = 1;
3169 break;
3170
3171 case 'G':
3172 case 'H':
3173 if (GET_CODE (operand) == CONST_DOUBLE
3174 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3175 win = 1;

--- 60 unchanged lines hidden (view full) ---

3236 this_alternative[i]
3237 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3238 goto reg;
3239
3240 default:
3241 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3242 {
3243#ifdef EXTRA_CONSTRAINT
3244 if (EXTRA_MEMORY_CONSTRAINT (c))
3245 {
3246 if (force_reload)
3247 break;
3248 if (EXTRA_CONSTRAINT (operand, c))
3249 win = 1;
3250 /* If the address was already reloaded,
3251 we win as well. */
3252 if (GET_CODE (operand) == MEM && address_reloaded[i])
3253 win = 1;
3254 /* Likewise if the address will be reloaded because
3255 reg_equiv_address is nonzero. For reg_equiv_mem
3256 we have to check. */
3257 if (GET_CODE (operand) == REG
3258 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3259 && reg_renumber[REGNO (operand)] < 0
3260 && ((reg_equiv_mem[REGNO (operand)] != 0
3261 && EXTRA_CONSTRAINT (reg_equiv_mem[REGNO (operand)], c))
3262 || (reg_equiv_address[REGNO (operand)] != 0)))
3263 win = 1;
3264
3265 /* If we didn't already win, we can reload
3266 constants via force_const_mem, and other
3267 MEMs by reloading the address like for 'o'. */
3268 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3269 || GET_CODE (operand) == MEM)
3270 badop = 0;
3271 constmemok = 1;
3272 offmemok = 1;
3273 break;
3274 }
3275 if (EXTRA_ADDRESS_CONSTRAINT (c))
3276 {
3277 if (EXTRA_CONSTRAINT (operand, c))
3278 win = 1;
3279
3280 /* If we didn't already win, we can reload
3281 the address into a base register. */
3282 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3283 badop = 0;
3284 break;
3285 }
3286
3247 if (EXTRA_CONSTRAINT (operand, c))
3248 win = 1;
3249#endif
3250 break;
3251 }
3252
3253 this_alternative[i]
3254 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];

--- 346 unchanged lines hidden (view full) ---

3601 /* Right now, for any pair of operands I and J that are required to match,
3602 with I < J,
3603 goal_alternative_matches[J] is I.
3604 Set up goal_alternative_matched as the inverse function:
3605 goal_alternative_matched[I] = J. */
3606
3607 for (i = 0; i < noperands; i++)
3608 goal_alternative_matched[i] = -1;
3287 if (EXTRA_CONSTRAINT (operand, c))
3288 win = 1;
3289#endif
3290 break;
3291 }
3292
3293 this_alternative[i]
3294 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];

--- 346 unchanged lines hidden (view full) ---

3641 /* Right now, for any pair of operands I and J that are required to match,
3642 with I < J,
3643 goal_alternative_matches[J] is I.
3644 Set up goal_alternative_matched as the inverse function:
3645 goal_alternative_matched[I] = J. */
3646
3647 for (i = 0; i < noperands; i++)
3648 goal_alternative_matched[i] = -1;
3609
3649
3610 for (i = 0; i < noperands; i++)
3611 if (! goal_alternative_win[i]
3612 && goal_alternative_matches[i] >= 0)
3613 goal_alternative_matched[goal_alternative_matches[i]] = i;
3614
3615 for (i = 0; i < noperands; i++)
3616 goal_alternative_win[i] |= goal_alternative_match_win[i];
3617

--- 187 unchanged lines hidden (view full) ---

3805 /* Avoid further trouble with this insn. */
3806 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3807 n_reloads = 0;
3808 return 0;
3809 }
3810 }
3811 else if (goal_alternative_matched[i] < 0
3812 && goal_alternative_matches[i] < 0
3650 for (i = 0; i < noperands; i++)
3651 if (! goal_alternative_win[i]
3652 && goal_alternative_matches[i] >= 0)
3653 goal_alternative_matched[goal_alternative_matches[i]] = i;
3654
3655 for (i = 0; i < noperands; i++)
3656 goal_alternative_win[i] |= goal_alternative_match_win[i];
3657

--- 187 unchanged lines hidden (view full) ---

3845 /* Avoid further trouble with this insn. */
3846 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3847 n_reloads = 0;
3848 return 0;
3849 }
3850 }
3851 else if (goal_alternative_matched[i] < 0
3852 && goal_alternative_matches[i] < 0
3853 && !address_operand_reloaded[i]
3813 && optimize)
3814 {
3815 /* For each non-matching operand that's a MEM or a pseudo-register
3816 that didn't get a hard register, make an optional reload.
3817 This may get done even if the insn needs no reloads otherwise. */
3818
3819 rtx operand = recog_data.operand[i];
3820

--- 131 unchanged lines hidden (view full) ---

3952 propagating things allocated by frame pointer elimination into places
3953 it doesn't expect. */
3954
3955 if (insn_code_number >= 0 && replace)
3956 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3957 {
3958 int opno = recog_data.dup_num[i];
3959 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3854 && optimize)
3855 {
3856 /* For each non-matching operand that's a MEM or a pseudo-register
3857 that didn't get a hard register, make an optional reload.
3858 This may get done even if the insn needs no reloads otherwise. */
3859
3860 rtx operand = recog_data.operand[i];
3861

--- 131 unchanged lines hidden (view full) ---

3993 propagating things allocated by frame pointer elimination into places
3994 it doesn't expect. */
3995
3996 if (insn_code_number >= 0 && replace)
3997 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3998 {
3999 int opno = recog_data.dup_num[i];
4000 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3960 if (operand_reloadnum[opno] >= 0)
3961 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3962 insn_data[insn_code_number].operand[opno].mode);
4001 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
3963 }
3964
3965#if 0
3966 /* This loses because reloading of prior insns can invalidate the equivalence
3967 (or at least find_equiv_reg isn't smart enough to find it any more),
3968 causing this insn to need more reload regs than it needed before.
3969 It may be too late to make the reload regs available.
3970 Now this optimization is done safely in choose_reload_regs. */

--- 337 unchanged lines hidden (view full) ---

4308 while (altnum > 0)
4309 {
4310 while (*constraint++ != ',');
4311 altnum--;
4312 }
4313 /* Scan the requested alternative for 'm' or 'o'.
4314 If one of them is present, this alternative accepts memory constants. */
4315 while ((c = *constraint++) && c != ',' && c != '#')
4002 }
4003
4004#if 0
4005 /* This loses because reloading of prior insns can invalidate the equivalence
4006 (or at least find_equiv_reg isn't smart enough to find it any more),
4007 causing this insn to need more reload regs than it needed before.
4008 It may be too late to make the reload regs available.
4009 Now this optimization is done safely in choose_reload_regs. */

--- 337 unchanged lines hidden (view full) ---

4347 while (altnum > 0)
4348 {
4349 while (*constraint++ != ',');
4350 altnum--;
4351 }
4352 /* Scan the requested alternative for 'm' or 'o'.
4353 If one of them is present, this alternative accepts memory constants. */
4354 while ((c = *constraint++) && c != ',' && c != '#')
4316 if (c == 'm' || c == 'o')
4355 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c))
4317 return 1;
4318 return 0;
4319}
4320
4321/* Scan X for memory references and scan the addresses for reloading.
4322 Also checks for references to "constant" regs that we want to eliminate
4323 and replaces them with the values they stand for.
4324 We may alter X destructively if it contains a reference to such.

--- 108 unchanged lines hidden (view full) ---

4433 tem =
4434 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4435 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4436 if (!tem)
4437 abort ();
4438 return tem;
4439 }
4440
4356 return 1;
4357 return 0;
4358}
4359
4360/* Scan X for memory references and scan the addresses for reloading.
4361 Also checks for references to "constant" regs that we want to eliminate
4362 and replaces them with the values they stand for.
4363 We may alter X destructively if it contains a reference to such.

--- 108 unchanged lines hidden (view full) ---

4472 tem =
4473 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4474 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4475 if (!tem)
4476 abort ();
4477 return tem;
4478 }
4479
4441 /* If the SUBREG is wider than a word, the above test will fail.
4442 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4443 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4444 a 32 bit target. We still can - and have to - handle this
4445 for non-paradoxical subregs of CONST_INTs. */
4446 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4447 && reg_equiv_constant[regno] != 0
4448 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4449 && (GET_MODE_SIZE (GET_MODE (x))
4450 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4451 {
4452 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT;
4453 if (WORDS_BIG_ENDIAN)
4454 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4455 - GET_MODE_BITSIZE (GET_MODE (x))
4456 - shift);
4457 /* Here we use the knowledge that CONST_INTs have a
4458 HOST_WIDE_INT field. */
4459 if (shift >= HOST_BITS_PER_WIDE_INT)
4460 shift = HOST_BITS_PER_WIDE_INT - 1;
4461 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4462 }
4463
4464 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4465 && reg_equiv_constant[regno] != 0
4466 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4467 abort ();
4468
4469 /* If the subreg contains a reg that will be converted to a mem,
4470 convert the subreg to a narrower memref now.
4471 Otherwise, we would get (subreg (mem ...) ...),
4472 which would force reload of the mem.
4473
4474 We also need to do this if there is an equivalent MEM that is
4475 not offsettable. In that case, alter_subreg would produce an
4476 invalid address on big-endian machines.

--- 63 unchanged lines hidden (view full) ---

4540
4541 /* Copy the result if it's still the same as the equivalence, to avoid
4542 modifying it when we do the substitution for the reload. */
4543 if (tem == reg_equiv_memory_loc[regno])
4544 tem = copy_rtx (tem);
4545 return tem;
4546}
4547
4480 /* If the subreg contains a reg that will be converted to a mem,
4481 convert the subreg to a narrower memref now.
4482 Otherwise, we would get (subreg (mem ...) ...),
4483 which would force reload of the mem.
4484
4485 We also need to do this if there is an equivalent MEM that is
4486 not offsettable. In that case, alter_subreg would produce an
4487 invalid address on big-endian machines.

--- 63 unchanged lines hidden (view full) ---

4551
4552 /* Copy the result if it's still the same as the equivalence, to avoid
4553 modifying it when we do the substitution for the reload. */
4554 if (tem == reg_equiv_memory_loc[regno])
4555 tem = copy_rtx (tem);
4556 return tem;
4557}
4558
4559/* Returns true if AD could be turned into a valid memory reference
4560 to mode MODE by reloading the part pointed to by PART into a
4561 register. */
4562
4563static int
4564maybe_memory_address_p (mode, ad, part)
4565 enum machine_mode mode;
4566 rtx ad;
4567 rtx *part;
4568{
4569 int retv;
4570 rtx tem = *part;
4571 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4572
4573 *part = reg;
4574 retv = memory_address_p (mode, ad);
4575 *part = tem;
4576
4577 return retv;
4578}
4579
4548/* Record all reloads needed for handling memory address AD
4549 which appears in *LOC in a memory reference to mode MODE
4550 which itself is found in location *MEMREFLOC.
4551 Note that we take shortcuts assuming that no multi-reg machine mode
4552 occurs as part of an address.
4553
4554 OPNUM and TYPE specify the purpose of this reload.
4555

--- 50 unchanged lines hidden (view full) ---

4606 tem = reg_equiv_memory_loc[regno];
4607 if (tem != 0)
4608 {
4609 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4610 {
4611 tem = make_memloc (ad, regno);
4612 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4613 {
4580/* Record all reloads needed for handling memory address AD
4581 which appears in *LOC in a memory reference to mode MODE
4582 which itself is found in location *MEMREFLOC.
4583 Note that we take shortcuts assuming that no multi-reg machine mode
4584 occurs as part of an address.
4585
4586 OPNUM and TYPE specify the purpose of this reload.
4587

--- 50 unchanged lines hidden (view full) ---

4638 tem = reg_equiv_memory_loc[regno];
4639 if (tem != 0)
4640 {
4641 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4642 {
4643 tem = make_memloc (ad, regno);
4644 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4645 {
4614 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0),
4615 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4616 ind_levels, insn);
4646 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4647 &XEXP (tem, 0), opnum,
4648 ADDR_TYPE (type), ind_levels, insn);
4617 }
4618 /* We can avoid a reload if the register's equivalent memory
4619 expression is valid as an indirect memory address.
4620 But not all addresses are valid in a mem used as an indirect
4621 address: only reg or reg+constant. */
4622
4623 if (ind_levels > 0
4624 && strict_memory_address_p (mode, tem)

--- 195 unchanged lines hidden (view full) ---

4820
4821 We can easily check for an index needing reload, but even if that is the
4822 case, we might also have an invalid constant. To avoid making the
4823 conservative assumption and requiring two reloads, we see if this address
4824 is valid when not interpreted strictly. If it is, the only problem is
4825 that the index needs a reload and find_reloads_address_1 will take care
4826 of it.
4827
4649 }
4650 /* We can avoid a reload if the register's equivalent memory
4651 expression is valid as an indirect memory address.
4652 But not all addresses are valid in a mem used as an indirect
4653 address: only reg or reg+constant. */
4654
4655 if (ind_levels > 0
4656 && strict_memory_address_p (mode, tem)

--- 195 unchanged lines hidden (view full) ---

4852
4853 We can easily check for an index needing reload, but even if that is the
4854 case, we might also have an invalid constant. To avoid making the
4855 conservative assumption and requiring two reloads, we see if this address
4856 is valid when not interpreted strictly. If it is, the only problem is
4857 that the index needs a reload and find_reloads_address_1 will take care
4858 of it.
4859
4828 If we decide to do something here, it must be that
4829 `double_reg_address_ok' is true and that this address rtl was made by
4830 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4860 Handle all base registers here, not just fp/ap/sp, because on some
4861 targets (namely Sparc) we can also get invalid addresses from preventive
4862 subreg big-endian corrections made by find_reloads_toplev.
4863
4864 If we decide to do something, it must be that `double_reg_address_ok'
4865 is true. We generate a reload of the base register + constant and
4831 rework the sum so that the reload register will be added to the index.
4832 This is safe because we know the address isn't shared.
4833
4866 rework the sum so that the reload register will be added to the index.
4867 This is safe because we know the address isn't shared.
4868
4834 We check for fp/ap/sp as both the first and second operand of the
4835 innermost PLUS. */
4869 We check for the base register as both the first and second operand of
4870 the innermost PLUS. */
4836
4837 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4838 && GET_CODE (XEXP (ad, 0)) == PLUS
4871
4872 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4873 && GET_CODE (XEXP (ad, 0)) == PLUS
4839 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4840#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4841 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4842#endif
4843#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4844 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4845#endif
4846 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4847 && ! memory_address_p (mode, ad))
4874 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4875 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4876 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4877 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4848 {
4849 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4850 plus_constant (XEXP (XEXP (ad, 0), 0),
4851 INTVAL (XEXP (ad, 1))),
4852 XEXP (XEXP (ad, 0), 1));
4853 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4854 MODE_BASE_REG_CLASS (mode),
4855 GET_MODE (ad), opnum, type, ind_levels);
4856 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4857 type, 0, insn);
4858
4859 return 0;
4860 }
4861
4862 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4863 && GET_CODE (XEXP (ad, 0)) == PLUS
4878 {
4879 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4880 plus_constant (XEXP (XEXP (ad, 0), 0),
4881 INTVAL (XEXP (ad, 1))),
4882 XEXP (XEXP (ad, 0), 1));
4883 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4884 MODE_BASE_REG_CLASS (mode),
4885 GET_MODE (ad), opnum, type, ind_levels);
4886 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4887 type, 0, insn);
4888
4889 return 0;
4890 }
4891
4892 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4893 && GET_CODE (XEXP (ad, 0)) == PLUS
4864 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4865#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4866 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4867#endif
4868#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4869 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4870#endif
4871 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4872 && ! memory_address_p (mode, ad))
4894 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4895 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4896 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4897 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4873 {
4874 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4875 XEXP (XEXP (ad, 0), 0),
4876 plus_constant (XEXP (XEXP (ad, 0), 1),
4877 INTVAL (XEXP (ad, 1))));
4878 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4879 MODE_BASE_REG_CLASS (mode),
4880 GET_MODE (ad), opnum, type, ind_levels);

--- 328 unchanged lines hidden (view full) ---

5209 ??? op0 SUBREGs we use word_mode? */
5210 op1 = gen_rtx_REG (GET_MODE (op1),
5211 (REGNO (op1) +
5212 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5213 GET_MODE (SUBREG_REG (orig_op1)),
5214 SUBREG_BYTE (orig_op1),
5215 GET_MODE (orig_op1))));
5216 }
4898 {
4899 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4900 XEXP (XEXP (ad, 0), 0),
4901 plus_constant (XEXP (XEXP (ad, 0), 1),
4902 INTVAL (XEXP (ad, 1))));
4903 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4904 MODE_BASE_REG_CLASS (mode),
4905 GET_MODE (ad), opnum, type, ind_levels);

--- 328 unchanged lines hidden (view full) ---

5234 ??? op0 SUBREGs we use word_mode? */
5235 op1 = gen_rtx_REG (GET_MODE (op1),
5236 (REGNO (op1) +
5237 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5238 GET_MODE (SUBREG_REG (orig_op1)),
5239 SUBREG_BYTE (orig_op1),
5240 GET_MODE (orig_op1))));
5241 }
5242 /* Plus in the index register may be created only as a result of
5243 register remateralization for expresion like &localvar*4. Reload it.
5244 It may be possible to combine the displacement on the outer level,
5245 but it is probably not worthwhile to do so. */
5246 if (context)
5247 {
5248 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5249 opnum, ADDR_TYPE (type), ind_levels, insn);
5250 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5251 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5252 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5253 return 1;
5254 }
5217
5218 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5219 || code0 == ZERO_EXTEND || code1 == MEM)
5220 {
5221 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5222 type, ind_levels, insn);
5223 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5224 type, ind_levels, insn);

--- 111 unchanged lines hidden (view full) ---

5336
5337 if (reg_equiv_address[regno]
5338 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5339 {
5340 /* First reload the memory location's address.
5341 We can't use ADDR_TYPE (type) here, because we need to
5342 write back the value after reading it, hence we actually
5343 need two registers. */
5255
5256 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5257 || code0 == ZERO_EXTEND || code1 == MEM)
5258 {
5259 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5260 type, ind_levels, insn);
5261 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5262 type, ind_levels, insn);

--- 111 unchanged lines hidden (view full) ---

5374
5375 if (reg_equiv_address[regno]
5376 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5377 {
5378 /* First reload the memory location's address.
5379 We can't use ADDR_TYPE (type) here, because we need to
5380 write back the value after reading it, hence we actually
5381 need two registers. */
5344 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
5382 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5345 &XEXP (tem, 0), opnum,
5346 RELOAD_OTHER,
5347 ind_levels, insn);
5348
5349 /* Then reload the memory location into a base
5350 register. */
5351 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5352 &XEXP (op1, 0),

--- 286 unchanged lines hidden (view full) ---

5639 }
5640 }
5641 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5642 is larger than the class size, then reload the whole SUBREG. */
5643 else
5644 {
5645 enum reg_class class = (context ? INDEX_REG_CLASS
5646 : MODE_BASE_REG_CLASS (mode));
5383 &XEXP (tem, 0), opnum,
5384 RELOAD_OTHER,
5385 ind_levels, insn);
5386
5387 /* Then reload the memory location into a base
5388 register. */
5389 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5390 &XEXP (op1, 0),

--- 286 unchanged lines hidden (view full) ---

5677 }
5678 }
5679 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5680 is larger than the class size, then reload the whole SUBREG. */
5681 else
5682 {
5683 enum reg_class class = (context ? INDEX_REG_CLASS
5684 : MODE_BASE_REG_CLASS (mode));
5647 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5685 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5648 > reg_class_size[class])
5649 {
5650 x = find_reloads_subreg_address (x, 0, opnum, type,
5651 ind_levels, insn);
5652 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5653 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5654 return 1;
5655 }

--- 327 unchanged lines hidden (view full) ---

5983 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
5984 else if (fmt[i] == 'E')
5985 for (j = XVECLEN (x, i); --j >= 0; )
5986 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
5987 orig_replacements);
5988 }
5989}
5990
5686 > reg_class_size[class])
5687 {
5688 x = find_reloads_subreg_address (x, 0, opnum, type,
5689 ind_levels, insn);
5690 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5691 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5692 return 1;
5693 }

--- 327 unchanged lines hidden (view full) ---

6021 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6022 else if (fmt[i] == 'E')
6023 for (j = XVECLEN (x, i); --j >= 0; )
6024 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6025 orig_replacements);
6026 }
6027}
6028
5991/* Change any replacements being done to *X to be done to *Y */
6029/* Change any replacements being done to *X to be done to *Y. */
5992
5993void
5994move_replacements (x, y)
5995 rtx *x;
5996 rtx *y;
5997{
5998 int i;
5999

--- 854 unchanged lines hidden (view full) ---

6854 for (; i >= 0; i--)
6855 {
6856 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6857 if ((GET_CODE (elt) == CLOBBER
6858 || (sets && GET_CODE (PATTERN (insn)) == SET))
6859 && GET_CODE (XEXP (elt, 0)) == REG)
6860 {
6861 unsigned int test = REGNO (XEXP (elt, 0));
6030
6031void
6032move_replacements (x, y)
6033 rtx *x;
6034 rtx *y;
6035{
6036 int i;
6037

--- 854 unchanged lines hidden (view full) ---

6892 for (; i >= 0; i--)
6893 {
6894 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6895 if ((GET_CODE (elt) == CLOBBER
6896 || (sets && GET_CODE (PATTERN (insn)) == SET))
6897 && GET_CODE (XEXP (elt, 0)) == REG)
6898 {
6899 unsigned int test = REGNO (XEXP (elt, 0));
6862
6900
6863 if (test >= regno && test < endregno)
6864 return 1;
6865 }
6866 }
6867 }
6868
6869 return 0;
6870}

--- 121 unchanged lines hidden --- 		6901 if (test >= regno && test < endregno)
6902 return 1;
6903 }
6904 }
6905 }
6906
6907 return 0;
6908}

--- 121 unchanged lines hidden ---