1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
| 1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
|
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
| 3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation,
4 Inc.
|
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
| 5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING. If not, write to the Free
|
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
| 20Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
2102110-1301, USA. */
|
21
22/* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
28
29 Before processing the first insn of the function, call `init_reload'.
| 22
23/* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
29
30 Before processing the first insn of the function, call `init_reload'.
|
| 31 init_reload actually has to be called earlier anyway.
|
30
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
37
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
44
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
53
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
56
57NOTE SIDE EFFECTS:
58
59 find_reloads can alter the operands of the instruction it is called on.
60
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
64 better that way.
65
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
68
691 happens every time find_reloads is called.
702 happens only when REPLACE is 1, which is only when
71actually doing the reloads, not when just counting them.
72
73Using a reload register for several reloads in one insn:
74
75When an insn has reloads, it is considered as having three parts:
76the input reloads, the insn itself after reloading, and the output reloads.
77Reloads of values used in memory addresses are often needed for only one part.
78
79When this is so, reload_when_needed records which part needs the reload.
80Two reloads for different parts of the insn can share the same reload
81register.
82
83When a reload is used for addresses in multiple parts, or when it is
84an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85a register with any other reload. */
86
87#define REG_OK_STRICT
88
89#include "config.h"
90#include "system.h"
91#include "coretypes.h"
92#include "tm.h"
93#include "rtl.h"
94#include "tm_p.h"
95#include "insn-config.h"
96#include "expr.h"
97#include "optabs.h"
98#include "recog.h"
99#include "reload.h"
100#include "regs.h"
| 32
33 To scan an insn, call `find_reloads'. This does two things:
34 1. sets up tables describing which values must be reloaded
35 for this insn, and what kind of hard regs they must be reloaded into;
36 2. optionally record the locations where those values appear in
37 the data, so they can be replaced properly later.
38 This is done only if the second arg to `find_reloads' is nonzero.
39
40 The third arg to `find_reloads' specifies the number of levels
41 of indirect addressing supported by the machine. If it is zero,
42 indirect addressing is not valid. If it is one, (MEM (REG n))
43 is valid even if (REG n) did not get a hard register; if it is two,
44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
45 hard register, and similarly for higher values.
46
47 Then you must choose the hard regs to reload those pseudo regs into,
48 and generate appropriate load insns before this insn and perhaps
49 also store insns after this insn. Set up the array `reload_reg_rtx'
50 to contain the REG rtx's for the registers you used. In some
51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
52 for certain reloads. Then that tells you which register to use,
53 so you do not need to allocate one. But you still do need to add extra
54 instructions to copy the value into and out of that register.
55
56 Finally you must call `subst_reloads' to substitute the reload reg rtx's
57 into the locations already recorded.
58
59NOTE SIDE EFFECTS:
60
61 find_reloads can alter the operands of the instruction it is called on.
62
63 1. Two operands of any sort may be interchanged, if they are in a
64 commutative instruction.
65 This happens only if find_reloads thinks the instruction will compile
66 better that way.
67
68 2. Pseudo-registers that are equivalent to constants are replaced
69 with those constants if they are not in hard registers.
70
711 happens every time find_reloads is called.
722 happens only when REPLACE is 1, which is only when
73actually doing the reloads, not when just counting them.
74
75Using a reload register for several reloads in one insn:
76
77When an insn has reloads, it is considered as having three parts:
78the input reloads, the insn itself after reloading, and the output reloads.
79Reloads of values used in memory addresses are often needed for only one part.
80
81When this is so, reload_when_needed records which part needs the reload.
82Two reloads for different parts of the insn can share the same reload
83register.
84
85When a reload is used for addresses in multiple parts, or when it is
86an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87a register with any other reload. */
88
89#define REG_OK_STRICT
90
91#include "config.h"
92#include "system.h"
93#include "coretypes.h"
94#include "tm.h"
95#include "rtl.h"
96#include "tm_p.h"
97#include "insn-config.h"
98#include "expr.h"
99#include "optabs.h"
100#include "recog.h"
101#include "reload.h"
102#include "regs.h"
|
| 103#include "addresses.h"
|
101#include "hard-reg-set.h"
102#include "flags.h"
103#include "real.h"
104#include "output.h"
105#include "function.h"
106#include "toplev.h"
107#include "params.h"
| 104#include "hard-reg-set.h"
105#include "flags.h"
106#include "real.h"
107#include "output.h"
108#include "function.h"
109#include "toplev.h"
110#include "params.h"
|
| 111#include "target.h"
|
108
| 112
|
109#ifndef REGNO_MODE_OK_FOR_BASE_P
110#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
111#endif
| 113/* True if X is a constant that can be forced into the constant pool. */
114#define CONST_POOL_OK_P(X) \
115 (CONSTANT_P (X) \
116 && GET_CODE (X) != HIGH \
117 && !targetm.cannot_force_const_mem (X))
|
112
| 118
|
113#ifndef REG_MODE_OK_FOR_BASE_P
114#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
115#endif
| 119/* True if C is a non-empty register class that has too few registers
120 to be safely used as a reload target class. */
121#define SMALL_REGISTER_CLASS_P(C) \
122 (reg_class_size [(C)] == 1 \
123 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
124
|
116
117/* All reloads of the current insn are recorded here. See reload.h for
118 comments. */
119int n_reloads;
120struct reload rld[MAX_RELOADS];
121
122/* All the "earlyclobber" operands of the current insn
123 are recorded here. */
124int n_earlyclobbers;
125rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
126
127int reload_n_operands;
128
129/* Replacing reloads.
130
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
135
136/* Nonzero means record the places to replace. */
137static int replace_reloads;
138
139/* Each replacement is recorded with a structure like this. */
140struct replacement
141{
142 rtx *where; /* Location to store in */
143 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what; /* which reload this is for */
146 enum machine_mode mode; /* mode it must have */
147};
148
149static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
150
151/* Number of replacements currently recorded. */
152static int n_replacements;
153
154/* Used to track what is modified by an operand. */
155struct decomposition
156{
157 int reg_flag; /* Nonzero if referencing a register. */
158 int safe; /* Nonzero if this can't conflict with anything. */
159 rtx base; /* Base address for MEM. */
160 HOST_WIDE_INT start; /* Starting offset or register number. */
161 HOST_WIDE_INT end; /* Ending offset or register number. */
162};
163
164#ifdef SECONDARY_MEMORY_NEEDED
165
166/* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
168
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
172 reload each. */
173
174static rtx secondary_memlocs[NUM_MACHINE_MODES];
175static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
176static int secondary_memlocs_elim_used = 0;
177#endif
178
179/* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181static rtx this_insn;
182
183/* Nonzero if this instruction is a user-specified asm with operands. */
184static int this_insn_is_asm;
185
186/* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189static int hard_regs_live_known;
190
191/* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195static short *static_reload_reg_p;
196
197/* Set to 1 in subst_reg_equivs if it changes anything. */
198static int subst_reg_equivs_changed;
199
200/* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202static int output_reloadnum;
203
204 /* Compare two RTX's. */
205#define MATCHES(x, y) \
| 125
126/* All reloads of the current insn are recorded here. See reload.h for
127 comments. */
128int n_reloads;
129struct reload rld[MAX_RELOADS];
130
131/* All the "earlyclobber" operands of the current insn
132 are recorded here. */
133int n_earlyclobbers;
134rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
135
136int reload_n_operands;
137
138/* Replacing reloads.
139
140 If `replace_reloads' is nonzero, then as each reload is recorded
141 an entry is made for it in the table `replacements'.
142 Then later `subst_reloads' can look through that table and
143 perform all the replacements needed. */
144
145/* Nonzero means record the places to replace. */
146static int replace_reloads;
147
148/* Each replacement is recorded with a structure like this. */
149struct replacement
150{
151 rtx *where; /* Location to store in */
152 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
153 a SUBREG; 0 otherwise. */
154 int what; /* which reload this is for */
155 enum machine_mode mode; /* mode it must have */
156};
157
158static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
159
160/* Number of replacements currently recorded. */
161static int n_replacements;
162
163/* Used to track what is modified by an operand. */
164struct decomposition
165{
166 int reg_flag; /* Nonzero if referencing a register. */
167 int safe; /* Nonzero if this can't conflict with anything. */
168 rtx base; /* Base address for MEM. */
169 HOST_WIDE_INT start; /* Starting offset or register number. */
170 HOST_WIDE_INT end; /* Ending offset or register number. */
171};
172
173#ifdef SECONDARY_MEMORY_NEEDED
174
175/* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used.
177
178 We keep two versions, before and after register elimination. The one
179 after register elimination is record separately for each operand. This
180 is done in case the address is not valid to be sure that we separately
181 reload each. */
182
183static rtx secondary_memlocs[NUM_MACHINE_MODES];
184static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
185static int secondary_memlocs_elim_used = 0;
186#endif
187
188/* The instruction we are doing reloads for;
189 so we can test whether a register dies in it. */
190static rtx this_insn;
191
192/* Nonzero if this instruction is a user-specified asm with operands. */
193static int this_insn_is_asm;
194
195/* If hard_regs_live_known is nonzero,
196 we can tell which hard regs are currently live,
197 at least enough to succeed in choosing dummy reloads. */
198static int hard_regs_live_known;
199
200/* Indexed by hard reg number,
201 element is nonnegative if hard reg has been spilled.
202 This vector is passed to `find_reloads' as an argument
203 and is not changed here. */
204static short *static_reload_reg_p;
205
206/* Set to 1 in subst_reg_equivs if it changes anything. */
207static int subst_reg_equivs_changed;
208
209/* On return from push_reload, holds the reload-number for the OUT
210 operand, which can be different for that from the input operand. */
211static int output_reloadnum;
212
213 /* Compare two RTX's. */
214#define MATCHES(x, y) \
|
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
| 215 (x == y || (x != 0 && (REG_P (x) \
216 ? REG_P (y) && REGNO (x) == REGNO (y) \
|
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212#define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222#define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228
229 /* If we are going to reload an address, compute the reload type to
230 use. */
231#define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
236 : (type)))
237
| 217 : rtx_equal_p (x, y) && ! side_effects_p (x))))
218
219 /* Indicates if two reloads purposes are for similar enough things that we
220 can merge their reloads. */
221#define MERGABLE_RELOADS(when1, when2, op1, op2) \
222 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
223 || ((when1) == (when2) && (op1) == (op2)) \
224 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
225 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
227 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
228 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
229
230 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
231#define MERGE_TO_OTHER(when1, when2, op1, op2) \
232 ((when1) != (when2) \
233 || ! ((op1) == (op2) \
234 || (when1) == RELOAD_FOR_INPUT \
235 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
236 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
237
238 /* If we are going to reload an address, compute the reload type to
239 use. */
240#define ADDR_TYPE(type) \
241 ((type) == RELOAD_FOR_INPUT_ADDRESS \
242 ? RELOAD_FOR_INPADDR_ADDRESS \
243 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
244 ? RELOAD_FOR_OUTADDR_ADDRESS \
245 : (type)))
246
|
238#ifdef HAVE_SECONDARY_RELOADS
| |
239static int push_secondary_reload (int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
| 247static int push_secondary_reload (int, rtx, int, int, enum reg_class,
248 enum machine_mode, enum reload_type,
|
241 enum insn_code *);
242#endif
243static enum reg_class find_valid_class (enum machine_mode, int, unsigned int);
| 249 enum insn_code *, secondary_reload_info *);
250static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
251 int, unsigned int);
|
244static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
245static void push_replacement (rtx *, int, enum machine_mode);
246static void dup_replacements (rtx *, rtx *);
247static void combine_reloads (void);
248static int find_reusable_reload (rtx *, rtx, enum reg_class,
249 enum reload_type, int, int);
250static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
251 enum machine_mode, enum reg_class, int, int);
252static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
253static struct decomposition decompose (rtx);
254static int immune_p (rtx, rtx, struct decomposition);
255static int alternative_allows_memconst (const char *, int);
256static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
257 int *);
258static rtx make_memloc (rtx, int);
259static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
260static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
261 int, enum reload_type, int, rtx);
262static rtx subst_reg_equivs (rtx, rtx);
263static rtx subst_indexed_address (rtx);
264static void update_auto_inc_notes (rtx, int, int);
| 252static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
253static void push_replacement (rtx *, int, enum machine_mode);
254static void dup_replacements (rtx *, rtx *);
255static void combine_reloads (void);
256static int find_reusable_reload (rtx *, rtx, enum reg_class,
257 enum reload_type, int, int);
258static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
259 enum machine_mode, enum reg_class, int, int);
260static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
261static struct decomposition decompose (rtx);
262static int immune_p (rtx, rtx, struct decomposition);
263static int alternative_allows_memconst (const char *, int);
264static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
265 int *);
266static rtx make_memloc (rtx, int);
267static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
268static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
269 int, enum reload_type, int, rtx);
270static rtx subst_reg_equivs (rtx, rtx);
271static rtx subst_indexed_address (rtx);
272static void update_auto_inc_notes (rtx, int, int);
|
265static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
| 273static int find_reloads_address_1 (enum machine_mode, rtx, int,
274 enum rtx_code, enum rtx_code, rtx *,
|
266 int, enum reload_type,int, rtx);
267static void find_reloads_address_part (rtx, rtx *, enum reg_class,
268 enum machine_mode, int,
269 enum reload_type, int);
270static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
271 int, rtx);
272static void copy_replacements_1 (rtx *, rtx *, int);
273static int find_inc_amount (rtx, rtx);
| 275 int, enum reload_type,int, rtx);
276static void find_reloads_address_part (rtx, rtx *, enum reg_class,
277 enum machine_mode, int,
278 enum reload_type, int);
279static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
280 int, rtx);
281static void copy_replacements_1 (rtx *, rtx *, int);
282static int find_inc_amount (rtx, rtx);
|
274
275#ifdef HAVE_SECONDARY_RELOADS
| 283static int refers_to_mem_for_reload_p (rtx);
284static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
285 rtx, rtx *);
|
276
| 286
|
| 287/* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
288 list yet. */
289
290static void
291push_reg_equiv_alt_mem (int regno, rtx mem)
292{
293 rtx it;
294
295 for (it = reg_equiv_alt_mem_list [regno]; it; it = XEXP (it, 1))
296 if (rtx_equal_p (XEXP (it, 0), mem))
297 return;
298
299 reg_equiv_alt_mem_list [regno]
300 = alloc_EXPR_LIST (REG_EQUIV, mem,
301 reg_equiv_alt_mem_list [regno]);
302}
303
|
277/* Determine if any secondary reloads are needed for loading (if IN_P is
278 nonzero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
281
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
285
286static int
287push_secondary_reload (int in_p, rtx x, int opnum, int optional,
288 enum reg_class reload_class,
289 enum machine_mode reload_mode, enum reload_type type,
| 304/* Determine if any secondary reloads are needed for loading (if IN_P is
305 nonzero) or storing (if IN_P is zero) X to or from a reload register of
306 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
307 are needed, push them.
308
309 Return the reload number of the secondary reload we made, or -1 if
310 we didn't need one. *PICODE is set to the insn_code to use if we do
311 need a secondary reload. */
312
313static int
314push_secondary_reload (int in_p, rtx x, int opnum, int optional,
315 enum reg_class reload_class,
316 enum machine_mode reload_mode, enum reload_type type,
|
290 enum insn_code *picode)
| 317 enum insn_code *picode, secondary_reload_info *prev_sri)
|
291{
292 enum reg_class class = NO_REGS;
| 318{
319 enum reg_class class = NO_REGS;
|
| 320 enum reg_class scratch_class;
|
293 enum machine_mode mode = reload_mode;
294 enum insn_code icode = CODE_FOR_nothing;
| 321 enum machine_mode mode = reload_mode;
322 enum insn_code icode = CODE_FOR_nothing;
|
295 enum reg_class t_class = NO_REGS;
296 enum machine_mode t_mode = VOIDmode;
| |
297 enum insn_code t_icode = CODE_FOR_nothing;
298 enum reload_type secondary_type;
299 int s_reload, t_reload = -1;
| 323 enum insn_code t_icode = CODE_FOR_nothing;
324 enum reload_type secondary_type;
325 int s_reload, t_reload = -1;
|
| 326 const char *scratch_constraint;
327 char letter;
328 secondary_reload_info sri;
|
300
301 if (type == RELOAD_FOR_INPUT_ADDRESS
302 || type == RELOAD_FOR_OUTPUT_ADDRESS
303 || type == RELOAD_FOR_INPADDR_ADDRESS
304 || type == RELOAD_FOR_OUTADDR_ADDRESS)
305 secondary_type = type;
306 else
307 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
308
309 *picode = CODE_FOR_nothing;
310
311 /* If X is a paradoxical SUBREG, use the inner value to determine both the
312 mode and object being reloaded. */
313 if (GET_CODE (x) == SUBREG
314 && (GET_MODE_SIZE (GET_MODE (x))
315 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
316 {
317 x = SUBREG_REG (x);
318 reload_mode = GET_MODE (x);
319 }
320
321 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
322 is still a pseudo-register by now, it *must* have an equivalent MEM
323 but we don't want to assume that), use that equivalent when seeing if
324 a secondary reload is needed since whether or not a reload is needed
325 might be sensitive to the form of the MEM. */
326
| 329
330 if (type == RELOAD_FOR_INPUT_ADDRESS
331 || type == RELOAD_FOR_OUTPUT_ADDRESS
332 || type == RELOAD_FOR_INPADDR_ADDRESS
333 || type == RELOAD_FOR_OUTADDR_ADDRESS)
334 secondary_type = type;
335 else
336 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
337
338 *picode = CODE_FOR_nothing;
339
340 /* If X is a paradoxical SUBREG, use the inner value to determine both the
341 mode and object being reloaded. */
342 if (GET_CODE (x) == SUBREG
343 && (GET_MODE_SIZE (GET_MODE (x))
344 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
345 {
346 x = SUBREG_REG (x);
347 reload_mode = GET_MODE (x);
348 }
349
350 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
351 is still a pseudo-register by now, it *must* have an equivalent MEM
352 but we don't want to assume that), use that equivalent when seeing if
353 a secondary reload is needed since whether or not a reload is needed
354 might be sensitive to the form of the MEM. */
355
|
327 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
| 356 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
|
328 && reg_equiv_mem[REGNO (x)] != 0)
329 x = reg_equiv_mem[REGNO (x)];
330
| 357 && reg_equiv_mem[REGNO (x)] != 0)
358 x = reg_equiv_mem[REGNO (x)];
359
|
331#ifdef SECONDARY_INPUT_RELOAD_CLASS
332 if (in_p)
333 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
334#endif
| 360 sri.icode = CODE_FOR_nothing;
361 sri.prev_sri = prev_sri;
362 class = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
363 icode = sri.icode;
|
335
| 364
|
336#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
337 if (! in_p)
338 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
339#endif
340
| |
341 /* If we don't need any secondary registers, done. */
| 365 /* If we don't need any secondary registers, done. */
|
342 if (class == NO_REGS)
| 366 if (class == NO_REGS && icode == CODE_FOR_nothing)
|
343 return -1;
344
| 367 return -1;
368
|
345 /* Get a possible insn to use. If the predicate doesn't accept X, don't
346 use the insn. */
| 369 if (class != NO_REGS)
370 t_reload = push_secondary_reload (in_p, x, opnum, optional, class,
371 reload_mode, type, &t_icode, &sri);
|
347
| 372
|
348 icode = (in_p ? reload_in_optab[(int) reload_mode]
349 : reload_out_optab[(int) reload_mode]);
| 373 /* If we will be using an insn, the secondary reload is for a
374 scratch register. */
|
350
| 375
|
351 if (icode != CODE_FOR_nothing
352 && insn_data[(int) icode].operand[in_p].predicate
353 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
354 icode = CODE_FOR_nothing;
355
356 /* If we will be using an insn, see if it can directly handle the reload
357 register we will be using. If it can, the secondary reload is for a
358 scratch register. If it can't, we will use the secondary reload for
359 an intermediate register and require a tertiary reload for the scratch
360 register. */
361
| |
362 if (icode != CODE_FOR_nothing)
363 {
364 /* If IN_P is nonzero, the reload register will be the output in
365 operand 0. If IN_P is zero, the reload register will be the input
366 in operand 1. Outputs should have an initial "=", which we must
367 skip. */
368
| 376 if (icode != CODE_FOR_nothing)
377 {
378 /* If IN_P is nonzero, the reload register will be the output in
379 operand 0. If IN_P is zero, the reload register will be the input
380 in operand 1. Outputs should have an initial "=", which we must
381 skip. */
382
|
369 enum reg_class insn_class;
| 383 /* ??? It would be useful to be able to handle only two, or more than
384 three, operands, but for now we can only handle the case of having
385 exactly three: output, input and one temp/scratch. */
386 gcc_assert (insn_data[(int) icode].n_operands == 3);
|
370
| 387
|
371 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
372 insn_class = ALL_REGS;
373 else
374 {
375 const char *insn_constraint
376 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
377 char insn_letter = *insn_constraint;
378 insn_class
379 = (insn_letter == 'r' ? GENERAL_REGS
380 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
381 insn_constraint));
| 388 /* ??? We currently have no way to represent a reload that needs
389 an icode to reload from an intermediate tertiary reload register.
390 We should probably have a new field in struct reload to tag a
391 chain of scratch operand reloads onto. */
392 gcc_assert (class == NO_REGS);
|
382
| 393
|
383 if (insn_class == NO_REGS)
384 abort ();
385 if (in_p
386 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
387 abort ();
388 }
| 394 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
395 gcc_assert (*scratch_constraint == '=');
396 scratch_constraint++;
397 if (*scratch_constraint == '&')
398 scratch_constraint++;
399 letter = *scratch_constraint;
400 scratch_class = (letter == 'r' ? GENERAL_REGS
401 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
402 scratch_constraint));
|
389
| 403
|
390 /* The scratch register's constraint must start with "=&". */
391 if (insn_data[(int) icode].operand[2].constraint[0] != '='
392 || insn_data[(int) icode].operand[2].constraint[1] != '&')
393 abort ();
394
395 if (reg_class_subset_p (reload_class, insn_class))
396 mode = insn_data[(int) icode].operand[2].mode;
397 else
398 {
399 const char *t_constraint
400 = &insn_data[(int) icode].operand[2].constraint[2];
401 char t_letter = *t_constraint;
402 class = insn_class;
403 t_mode = insn_data[(int) icode].operand[2].mode;
404 t_class = (t_letter == 'r' ? GENERAL_REGS
405 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
406 t_constraint));
407 t_icode = icode;
408 icode = CODE_FOR_nothing;
409 }
| 404 class = scratch_class;
405 mode = insn_data[(int) icode].operand[2].mode;
|
410 }
411
412 /* This case isn't valid, so fail. Reload is allowed to use the same
413 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
414 in the case of a secondary register, we actually need two different
415 registers for correct code. We fail here to prevent the possibility of
416 silently generating incorrect code later.
417
418 The convention is that secondary input reloads are valid only if the
419 secondary_class is different from class. If you have such a case, you
420 can not use secondary reloads, you must work around the problem some
421 other way.
422
423 Allow this when a reload_in/out pattern is being used. I.e. assume
424 that the generated code handles this case. */
425
| 406 }
407
408 /* This case isn't valid, so fail. Reload is allowed to use the same
409 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
410 in the case of a secondary register, we actually need two different
411 registers for correct code. We fail here to prevent the possibility of
412 silently generating incorrect code later.
413
414 The convention is that secondary input reloads are valid only if the
415 secondary_class is different from class. If you have such a case, you
416 can not use secondary reloads, you must work around the problem some
417 other way.
418
419 Allow this when a reload_in/out pattern is being used. I.e. assume
420 that the generated code handles this case. */
421
|
426 if (in_p && class == reload_class && icode == CODE_FOR_nothing
427 && t_icode == CODE_FOR_nothing)
428 abort ();
| 422 gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
423 || t_icode != CODE_FOR_nothing);
|
429
| 424
|
430 /* If we need a tertiary reload, see if we have one we can reuse or else
431 make a new one. */
432
433 if (t_class != NO_REGS)
434 {
435 for (t_reload = 0; t_reload < n_reloads; t_reload++)
436 if (rld[t_reload].secondary_p
437 && (reg_class_subset_p (t_class, rld[t_reload].class)
438 || reg_class_subset_p (rld[t_reload].class, t_class))
439 && ((in_p && rld[t_reload].inmode == t_mode)
440 || (! in_p && rld[t_reload].outmode == t_mode))
441 && ((in_p && (rld[t_reload].secondary_in_icode
442 == CODE_FOR_nothing))
443 || (! in_p &&(rld[t_reload].secondary_out_icode
444 == CODE_FOR_nothing)))
445 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
446 && MERGABLE_RELOADS (secondary_type,
447 rld[t_reload].when_needed,
448 opnum, rld[t_reload].opnum))
449 {
450 if (in_p)
451 rld[t_reload].inmode = t_mode;
452 if (! in_p)
453 rld[t_reload].outmode = t_mode;
454
455 if (reg_class_subset_p (t_class, rld[t_reload].class))
456 rld[t_reload].class = t_class;
457
458 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
459 rld[t_reload].optional &= optional;
460 rld[t_reload].secondary_p = 1;
461 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
462 opnum, rld[t_reload].opnum))
463 rld[t_reload].when_needed = RELOAD_OTHER;
464 }
465
466 if (t_reload == n_reloads)
467 {
468 /* We need to make a new tertiary reload for this register class. */
469 rld[t_reload].in = rld[t_reload].out = 0;
470 rld[t_reload].class = t_class;
471 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
472 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
473 rld[t_reload].reg_rtx = 0;
474 rld[t_reload].optional = optional;
475 rld[t_reload].inc = 0;
476 /* Maybe we could combine these, but it seems too tricky. */
477 rld[t_reload].nocombine = 1;
478 rld[t_reload].in_reg = 0;
479 rld[t_reload].out_reg = 0;
480 rld[t_reload].opnum = opnum;
481 rld[t_reload].when_needed = secondary_type;
482 rld[t_reload].secondary_in_reload = -1;
483 rld[t_reload].secondary_out_reload = -1;
484 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
485 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
486 rld[t_reload].secondary_p = 1;
487
488 n_reloads++;
489 }
490 }
491
| |
492 /* See if we can reuse an existing secondary reload. */
493 for (s_reload = 0; s_reload < n_reloads; s_reload++)
494 if (rld[s_reload].secondary_p
495 && (reg_class_subset_p (class, rld[s_reload].class)
496 || reg_class_subset_p (rld[s_reload].class, class))
497 && ((in_p && rld[s_reload].inmode == mode)
498 || (! in_p && rld[s_reload].outmode == mode))
499 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
500 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
501 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
502 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
| 425 /* See if we can reuse an existing secondary reload. */
426 for (s_reload = 0; s_reload < n_reloads; s_reload++)
427 if (rld[s_reload].secondary_p
428 && (reg_class_subset_p (class, rld[s_reload].class)
429 || reg_class_subset_p (rld[s_reload].class, class))
430 && ((in_p && rld[s_reload].inmode == mode)
431 || (! in_p && rld[s_reload].outmode == mode))
432 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
433 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
434 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
435 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
|
503 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
| 436 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
|
504 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
505 opnum, rld[s_reload].opnum))
506 {
507 if (in_p)
508 rld[s_reload].inmode = mode;
509 if (! in_p)
510 rld[s_reload].outmode = mode;
511
512 if (reg_class_subset_p (class, rld[s_reload].class))
513 rld[s_reload].class = class;
514
515 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
516 rld[s_reload].optional &= optional;
517 rld[s_reload].secondary_p = 1;
518 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
519 opnum, rld[s_reload].opnum))
520 rld[s_reload].when_needed = RELOAD_OTHER;
521 }
522
523 if (s_reload == n_reloads)
524 {
525#ifdef SECONDARY_MEMORY_NEEDED
526 /* If we need a memory location to copy between the two reload regs,
527 set it up now. Note that we do the input case before making
528 the reload and the output case after. This is due to the
529 way reloads are output. */
530
531 if (in_p && icode == CODE_FOR_nothing
532 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
533 {
534 get_secondary_mem (x, reload_mode, opnum, type);
535
536 /* We may have just added new reloads. Make sure we add
537 the new reload at the end. */
538 s_reload = n_reloads;
539 }
540#endif
541
542 /* We need to make a new secondary reload for this register class. */
543 rld[s_reload].in = rld[s_reload].out = 0;
544 rld[s_reload].class = class;
545
546 rld[s_reload].inmode = in_p ? mode : VOIDmode;
547 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
548 rld[s_reload].reg_rtx = 0;
549 rld[s_reload].optional = optional;
550 rld[s_reload].inc = 0;
551 /* Maybe we could combine these, but it seems too tricky. */
552 rld[s_reload].nocombine = 1;
553 rld[s_reload].in_reg = 0;
554 rld[s_reload].out_reg = 0;
555 rld[s_reload].opnum = opnum;
556 rld[s_reload].when_needed = secondary_type;
557 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
558 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
559 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
560 rld[s_reload].secondary_out_icode
561 = ! in_p ? t_icode : CODE_FOR_nothing;
562 rld[s_reload].secondary_p = 1;
563
564 n_reloads++;
565
566#ifdef SECONDARY_MEMORY_NEEDED
567 if (! in_p && icode == CODE_FOR_nothing
568 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
569 get_secondary_mem (x, mode, opnum, type);
570#endif
571 }
572
573 *picode = icode;
574 return s_reload;
575}
| 437 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
438 opnum, rld[s_reload].opnum))
439 {
440 if (in_p)
441 rld[s_reload].inmode = mode;
442 if (! in_p)
443 rld[s_reload].outmode = mode;
444
445 if (reg_class_subset_p (class, rld[s_reload].class))
446 rld[s_reload].class = class;
447
448 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
449 rld[s_reload].optional &= optional;
450 rld[s_reload].secondary_p = 1;
451 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
452 opnum, rld[s_reload].opnum))
453 rld[s_reload].when_needed = RELOAD_OTHER;
454 }
455
456 if (s_reload == n_reloads)
457 {
458#ifdef SECONDARY_MEMORY_NEEDED
459 /* If we need a memory location to copy between the two reload regs,
460 set it up now. Note that we do the input case before making
461 the reload and the output case after. This is due to the
462 way reloads are output. */
463
464 if (in_p && icode == CODE_FOR_nothing
465 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
466 {
467 get_secondary_mem (x, reload_mode, opnum, type);
468
469 /* We may have just added new reloads. Make sure we add
470 the new reload at the end. */
471 s_reload = n_reloads;
472 }
473#endif
474
475 /* We need to make a new secondary reload for this register class. */
476 rld[s_reload].in = rld[s_reload].out = 0;
477 rld[s_reload].class = class;
478
479 rld[s_reload].inmode = in_p ? mode : VOIDmode;
480 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
481 rld[s_reload].reg_rtx = 0;
482 rld[s_reload].optional = optional;
483 rld[s_reload].inc = 0;
484 /* Maybe we could combine these, but it seems too tricky. */
485 rld[s_reload].nocombine = 1;
486 rld[s_reload].in_reg = 0;
487 rld[s_reload].out_reg = 0;
488 rld[s_reload].opnum = opnum;
489 rld[s_reload].when_needed = secondary_type;
490 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
491 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
492 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
493 rld[s_reload].secondary_out_icode
494 = ! in_p ? t_icode : CODE_FOR_nothing;
495 rld[s_reload].secondary_p = 1;
496
497 n_reloads++;
498
499#ifdef SECONDARY_MEMORY_NEEDED
500 if (! in_p && icode == CODE_FOR_nothing
501 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
502 get_secondary_mem (x, mode, opnum, type);
503#endif
504 }
505
506 *picode = icode;
507 return s_reload;
508}
|
576#endif /* HAVE_SECONDARY_RELOADS */
| 509
510/* If a secondary reload is needed, return its class. If both an intermediate
511 register and a scratch register is needed, we return the class of the
512 intermediate register. */
513enum reg_class
514secondary_reload_class (bool in_p, enum reg_class class,
515 enum machine_mode mode, rtx x)
516{
517 enum insn_code icode;
518 secondary_reload_info sri;
519
520 sri.icode = CODE_FOR_nothing;
521 sri.prev_sri = NULL;
522 class = targetm.secondary_reload (in_p, x, class, mode, &sri);
523 icode = sri.icode;
524
525 /* If there are no secondary reloads at all, we return NO_REGS.
526 If an intermediate register is needed, we return its class. */
527 if (icode == CODE_FOR_nothing || class != NO_REGS)
528 return class;
529
530 /* No intermediate register is needed, but we have a special reload
531 pattern, which we assume for now needs a scratch register. */
532 return scratch_reload_class (icode);
533}
534
535/* ICODE is the insn_code of a reload pattern. Check that it has exactly
536 three operands, verify that operand 2 is an output operand, and return
537 its register class.
538 ??? We'd like to be able to handle any pattern with at least 2 operands,
539 for zero or more scratch registers, but that needs more infrastructure. */
540enum reg_class
541scratch_reload_class (enum insn_code icode)
542{
543 const char *scratch_constraint;
544 char scratch_letter;
545 enum reg_class class;
546
547 gcc_assert (insn_data[(int) icode].n_operands == 3);
548 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
549 gcc_assert (*scratch_constraint == '=');
550 scratch_constraint++;
551 if (*scratch_constraint == '&')
552 scratch_constraint++;
553 scratch_letter = *scratch_constraint;
554 if (scratch_letter == 'r')
555 return GENERAL_REGS;
556 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
557 scratch_constraint);
558 gcc_assert (class != NO_REGS);
559 return class;
560}
|
577
578#ifdef SECONDARY_MEMORY_NEEDED
579
580/* Return a memory location that will be used to copy X in mode MODE.
581 If we haven't already made a location for this mode in this insn,
582 call find_reloads_address on the location being returned. */
583
584rtx
585get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
586 int opnum, enum reload_type type)
587{
588 rtx loc;
589 int mem_valid;
590
591 /* By default, if MODE is narrower than a word, widen it to a word.
592 This is required because most machines that require these memory
593 locations do not support short load and stores from all registers
594 (e.g., FP registers). */
595
596#ifdef SECONDARY_MEMORY_NEEDED_MODE
597 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
598#else
599 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
600 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
601#endif
602
603 /* If we already have made a MEM for this operand in MODE, return it. */
604 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
605 return secondary_memlocs_elim[(int) mode][opnum];
606
607 /* If this is the first time we've tried to get a MEM for this mode,
608 allocate a new one. `something_changed' in reload will get set
609 by noticing that the frame size has changed. */
610
611 if (secondary_memlocs[(int) mode] == 0)
612 {
613#ifdef SECONDARY_MEMORY_NEEDED_RTX
614 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
615#else
616 secondary_memlocs[(int) mode]
617 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
618#endif
619 }
620
621 /* Get a version of the address doing any eliminations needed. If that
622 didn't give us a new MEM, make a new one if it isn't valid. */
623
624 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
625 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
626
627 if (! mem_valid && loc == secondary_memlocs[(int) mode])
628 loc = copy_rtx (loc);
629
630 /* The only time the call below will do anything is if the stack
631 offset is too large. In that case IND_LEVELS doesn't matter, so we
632 can just pass a zero. Adjust the type to be the address of the
633 corresponding object. If the address was valid, save the eliminated
634 address. If it wasn't valid, we need to make a reload each time, so
635 don't save it. */
636
637 if (! mem_valid)
638 {
639 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
640 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
641 : RELOAD_OTHER);
642
643 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
644 opnum, type, 0, 0);
645 }
646
647 secondary_memlocs_elim[(int) mode][opnum] = loc;
648 if (secondary_memlocs_elim_used <= (int)mode)
649 secondary_memlocs_elim_used = (int)mode + 1;
650 return loc;
651}
652
653/* Clear any secondary memory locations we've made. */
654
655void
656clear_secondary_mem (void)
657{
658 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
659}
660#endif /* SECONDARY_MEMORY_NEEDED */
661
| 561
562#ifdef SECONDARY_MEMORY_NEEDED
563
564/* Return a memory location that will be used to copy X in mode MODE.
565 If we haven't already made a location for this mode in this insn,
566 call find_reloads_address on the location being returned. */
567
568rtx
569get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
570 int opnum, enum reload_type type)
571{
572 rtx loc;
573 int mem_valid;
574
575 /* By default, if MODE is narrower than a word, widen it to a word.
576 This is required because most machines that require these memory
577 locations do not support short load and stores from all registers
578 (e.g., FP registers). */
579
580#ifdef SECONDARY_MEMORY_NEEDED_MODE
581 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
582#else
583 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
584 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
585#endif
586
587 /* If we already have made a MEM for this operand in MODE, return it. */
588 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
589 return secondary_memlocs_elim[(int) mode][opnum];
590
591 /* If this is the first time we've tried to get a MEM for this mode,
592 allocate a new one. `something_changed' in reload will get set
593 by noticing that the frame size has changed. */
594
595 if (secondary_memlocs[(int) mode] == 0)
596 {
597#ifdef SECONDARY_MEMORY_NEEDED_RTX
598 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
599#else
600 secondary_memlocs[(int) mode]
601 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
602#endif
603 }
604
605 /* Get a version of the address doing any eliminations needed. If that
606 didn't give us a new MEM, make a new one if it isn't valid. */
607
608 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
609 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
610
611 if (! mem_valid && loc == secondary_memlocs[(int) mode])
612 loc = copy_rtx (loc);
613
614 /* The only time the call below will do anything is if the stack
615 offset is too large. In that case IND_LEVELS doesn't matter, so we
616 can just pass a zero. Adjust the type to be the address of the
617 corresponding object. If the address was valid, save the eliminated
618 address. If it wasn't valid, we need to make a reload each time, so
619 don't save it. */
620
621 if (! mem_valid)
622 {
623 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
624 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
625 : RELOAD_OTHER);
626
627 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
628 opnum, type, 0, 0);
629 }
630
631 secondary_memlocs_elim[(int) mode][opnum] = loc;
632 if (secondary_memlocs_elim_used <= (int)mode)
633 secondary_memlocs_elim_used = (int)mode + 1;
634 return loc;
635}
636
637/* Clear any secondary memory locations we've made. */
638
639void
640clear_secondary_mem (void)
641{
642 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
643}
644#endif /* SECONDARY_MEMORY_NEEDED */
645
|
662/* Find the largest class for which every register number plus N is valid in
663 M1 (if in range) and is cheap to move into REGNO.
664 Abort if no such class exists. */
| |
665
| 646
|
| 647/* Find the largest class which has at least one register valid in
648 mode INNER, and which for every such register, that register number
649 plus N is also valid in OUTER (if in range) and is cheap to move
650 into REGNO. Such a class must exist. */
651
|
666static enum reg_class
| 652static enum reg_class
|
667find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED, int n,
| 653find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
654 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
|
668 unsigned int dest_regno ATTRIBUTE_UNUSED)
669{
670 int best_cost = -1;
671 int class;
672 int regno;
673 enum reg_class best_class = NO_REGS;
674 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
675 unsigned int best_size = 0;
676 int cost;
677
678 for (class = 1; class < N_REG_CLASSES; class++)
679 {
680 int bad = 0;
| 655 unsigned int dest_regno ATTRIBUTE_UNUSED)
656{
657 int best_cost = -1;
658 int class;
659 int regno;
660 enum reg_class best_class = NO_REGS;
661 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
662 unsigned int best_size = 0;
663 int cost;
664
665 for (class = 1; class < N_REG_CLASSES; class++)
666 {
667 int bad = 0;
|
681 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
682 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
683 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
684 && ! HARD_REGNO_MODE_OK (regno + n, m1))
685 bad = 1;
| 668 int good = 0;
669 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
670 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno))
671 {
672 if (HARD_REGNO_MODE_OK (regno, inner))
673 {
674 good = 1;
675 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
676 || ! HARD_REGNO_MODE_OK (regno + n, outer))
677 bad = 1;
678 }
679 }
|
686
| 680
|
687 if (bad)
| 681 if (bad || !good)
|
688 continue;
| 682 continue;
|
689 cost = REGISTER_MOVE_COST (m1, class, dest_class);
| 683 cost = REGISTER_MOVE_COST (outer, class, dest_class);
|
690
691 if ((reg_class_size[class] > best_size
692 && (best_cost < 0 || best_cost >= cost))
693 || best_cost > cost)
694 {
695 best_class = class;
696 best_size = reg_class_size[class];
| 684
685 if ((reg_class_size[class] > best_size
686 && (best_cost < 0 || best_cost >= cost))
687 || best_cost > cost)
688 {
689 best_class = class;
690 best_size = reg_class_size[class];
|
697 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
| 691 best_cost = REGISTER_MOVE_COST (outer, class, dest_class);
|
698 }
699 }
700
| 692 }
693 }
694
|
701 if (best_size == 0)
702 abort ();
| 695 gcc_assert (best_size != 0);
|
703
704 return best_class;
705}
706
707/* Return the number of a previously made reload that can be combined with
708 a new one, or n_reloads if none of the existing reloads can be used.
709 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
710 push_reload, they determine the kind of the new reload that we try to
711 combine. P_IN points to the corresponding value of IN, which can be
712 modified by this function.
713 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
714
715static int
716find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
717 enum reload_type type, int opnum, int dont_share)
718{
719 rtx in = *p_in;
720 int i;
721 /* We can't merge two reloads if the output of either one is
722 earlyclobbered. */
723
724 if (earlyclobber_operand_p (out))
725 return n_reloads;
726
727 /* We can use an existing reload if the class is right
728 and at least one of IN and OUT is a match
729 and the other is at worst neutral.
730 (A zero compared against anything is neutral.)
731
732 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
733 for the same thing since that can cause us to need more reload registers
734 than we otherwise would. */
735
736 for (i = 0; i < n_reloads; i++)
737 if ((reg_class_subset_p (class, rld[i].class)
738 || reg_class_subset_p (rld[i].class, class))
739 /* If the existing reload has a register, it must fit our class. */
740 && (rld[i].reg_rtx == 0
741 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
742 true_regnum (rld[i].reg_rtx)))
743 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
744 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
745 || (out != 0 && MATCHES (rld[i].out, out)
746 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
747 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
| 696
697 return best_class;
698}
699
700/* Return the number of a previously made reload that can be combined with
701 a new one, or n_reloads if none of the existing reloads can be used.
702 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
703 push_reload, they determine the kind of the new reload that we try to
704 combine. P_IN points to the corresponding value of IN, which can be
705 modified by this function.
706 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
707
708static int
709find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
710 enum reload_type type, int opnum, int dont_share)
711{
712 rtx in = *p_in;
713 int i;
714 /* We can't merge two reloads if the output of either one is
715 earlyclobbered. */
716
717 if (earlyclobber_operand_p (out))
718 return n_reloads;
719
720 /* We can use an existing reload if the class is right
721 and at least one of IN and OUT is a match
722 and the other is at worst neutral.
723 (A zero compared against anything is neutral.)
724
725 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
726 for the same thing since that can cause us to need more reload registers
727 than we otherwise would. */
728
729 for (i = 0; i < n_reloads; i++)
730 if ((reg_class_subset_p (class, rld[i].class)
731 || reg_class_subset_p (rld[i].class, class))
732 /* If the existing reload has a register, it must fit our class. */
733 && (rld[i].reg_rtx == 0
734 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
735 true_regnum (rld[i].reg_rtx)))
736 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
737 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
738 || (out != 0 && MATCHES (rld[i].out, out)
739 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
740 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
|
748 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
| 741 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
|
749 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
750 return i;
751
752 /* Reloading a plain reg for input can match a reload to postincrement
753 that reg, since the postincrement's value is the right value.
754 Likewise, it can match a preincrement reload, since we regard
755 the preincrementation as happening before any ref in this insn
756 to that register. */
757 for (i = 0; i < n_reloads; i++)
758 if ((reg_class_subset_p (class, rld[i].class)
759 || reg_class_subset_p (rld[i].class, class))
760 /* If the existing reload has a register, it must fit our
761 class. */
762 && (rld[i].reg_rtx == 0
763 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
764 true_regnum (rld[i].reg_rtx)))
765 && out == 0 && rld[i].out == 0 && rld[i].in != 0
| 742 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
743 return i;
744
745 /* Reloading a plain reg for input can match a reload to postincrement
746 that reg, since the postincrement's value is the right value.
747 Likewise, it can match a preincrement reload, since we regard
748 the preincrementation as happening before any ref in this insn
749 to that register. */
750 for (i = 0; i < n_reloads; i++)
751 if ((reg_class_subset_p (class, rld[i].class)
752 || reg_class_subset_p (rld[i].class, class))
753 /* If the existing reload has a register, it must fit our
754 class. */
755 && (rld[i].reg_rtx == 0
756 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
757 true_regnum (rld[i].reg_rtx)))
758 && out == 0 && rld[i].out == 0 && rld[i].in != 0
|
766 && ((GET_CODE (in) == REG
767 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
| 759 && ((REG_P (in)
760 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
|
768 && MATCHES (XEXP (rld[i].in, 0), in))
| 761 && MATCHES (XEXP (rld[i].in, 0), in))
|
769 || (GET_CODE (rld[i].in) == REG
770 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
| 762 || (REG_P (rld[i].in)
763 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
|
771 && MATCHES (XEXP (in, 0), rld[i].in)))
772 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
| 764 && MATCHES (XEXP (in, 0), rld[i].in)))
765 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
|
773 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
| 766 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
|
774 && MERGABLE_RELOADS (type, rld[i].when_needed,
775 opnum, rld[i].opnum))
776 {
777 /* Make sure reload_in ultimately has the increment,
778 not the plain register. */
| 767 && MERGABLE_RELOADS (type, rld[i].when_needed,
768 opnum, rld[i].opnum))
769 {
770 /* Make sure reload_in ultimately has the increment,
771 not the plain register. */
|
779 if (GET_CODE (in) == REG)
| 772 if (REG_P (in))
|
780 *p_in = rld[i].in;
781 return i;
782 }
783 return n_reloads;
784}
785
786/* Return nonzero if X is a SUBREG which will require reloading of its
787 SUBREG_REG expression. */
788
789static int
790reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
791{
792 rtx inner;
793
794 /* Only SUBREGs are problematical. */
795 if (GET_CODE (x) != SUBREG)
796 return 0;
797
798 inner = SUBREG_REG (x);
799
800 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
801 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
802 return 1;
803
804 /* If INNER is not a hard register, then INNER will not need to
805 be reloaded. */
| 773 *p_in = rld[i].in;
774 return i;
775 }
776 return n_reloads;
777}
778
779/* Return nonzero if X is a SUBREG which will require reloading of its
780 SUBREG_REG expression. */
781
782static int
783reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
784{
785 rtx inner;
786
787 /* Only SUBREGs are problematical. */
788 if (GET_CODE (x) != SUBREG)
789 return 0;
790
791 inner = SUBREG_REG (x);
792
793 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
794 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
795 return 1;
796
797 /* If INNER is not a hard register, then INNER will not need to
798 be reloaded. */
|
806 if (GET_CODE (inner) != REG
| 799 if (!REG_P (inner)
|
807 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
808 return 0;
809
810 /* If INNER is not ok for MODE, then INNER will need reloading. */
811 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
812 return 1;
813
814 /* If the outer part is a word or smaller, INNER larger than a
815 word and the number of regs for INNER is not the same as the
816 number of words in INNER, then INNER will need reloading. */
817 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
818 && output
819 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
820 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
| 800 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
801 return 0;
802
803 /* If INNER is not ok for MODE, then INNER will need reloading. */
804 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
805 return 1;
806
807 /* If the outer part is a word or smaller, INNER larger than a
808 word and the number of regs for INNER is not the same as the
809 number of words in INNER, then INNER will need reloading. */
810 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
811 && output
812 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
813 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
|
821 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
| 814 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
|
822}
823
824/* Return nonzero if IN can be reloaded into REGNO with mode MODE without
825 requiring an extra reload register. The caller has already found that
826 IN contains some reference to REGNO, so check that we can produce the
827 new value in a single step. E.g. if we have
828 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
829 instruction that adds one to a register, this should succeed.
830 However, if we have something like
831 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
832 needs to be loaded into a register first, we need a separate reload
833 register.
834 Such PLUS reloads are generated by find_reload_address_part.
835 The out-of-range PLUS expressions are usually introduced in the instruction
836 patterns by register elimination and substituting pseudos without a home
837 by their function-invariant equivalences. */
838static int
839can_reload_into (rtx in, int regno, enum machine_mode mode)
840{
841 rtx dst, test_insn;
842 int r = 0;
843 struct recog_data save_recog_data;
844
845 /* For matching constraints, we often get notional input reloads where
846 we want to use the original register as the reload register. I.e.
847 technically this is a non-optional input-output reload, but IN is
848 already a valid register, and has been chosen as the reload register.
849 Speed this up, since it trivially works. */
| 815}
816
817/* Return nonzero if IN can be reloaded into REGNO with mode MODE without
818 requiring an extra reload register. The caller has already found that
819 IN contains some reference to REGNO, so check that we can produce the
820 new value in a single step. E.g. if we have
821 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
822 instruction that adds one to a register, this should succeed.
823 However, if we have something like
824 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
825 needs to be loaded into a register first, we need a separate reload
826 register.
827 Such PLUS reloads are generated by find_reload_address_part.
828 The out-of-range PLUS expressions are usually introduced in the instruction
829 patterns by register elimination and substituting pseudos without a home
830 by their function-invariant equivalences. */
831static int
832can_reload_into (rtx in, int regno, enum machine_mode mode)
833{
834 rtx dst, test_insn;
835 int r = 0;
836 struct recog_data save_recog_data;
837
838 /* For matching constraints, we often get notional input reloads where
839 we want to use the original register as the reload register. I.e.
840 technically this is a non-optional input-output reload, but IN is
841 already a valid register, and has been chosen as the reload register.
842 Speed this up, since it trivially works. */
|
850 if (GET_CODE (in) == REG)
| 843 if (REG_P (in))
|
851 return 1;
852
853 /* To test MEMs properly, we'd have to take into account all the reloads
854 that are already scheduled, which can become quite complicated.
855 And since we've already handled address reloads for this MEM, it
856 should always succeed anyway. */
| 844 return 1;
845
846 /* To test MEMs properly, we'd have to take into account all the reloads
847 that are already scheduled, which can become quite complicated.
848 And since we've already handled address reloads for this MEM, it
849 should always succeed anyway. */
|
857 if (GET_CODE (in) == MEM)
| 850 if (MEM_P (in))
|
858 return 1;
859
860 /* If we can make a simple SET insn that does the job, everything should
861 be fine. */
862 dst = gen_rtx_REG (mode, regno);
863 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
864 save_recog_data = recog_data;
865 if (recog_memoized (test_insn) >= 0)
866 {
867 extract_insn (test_insn);
868 r = constrain_operands (1);
869 }
870 recog_data = save_recog_data;
871 return r;
872}
873
874/* Record one reload that needs to be performed.
875 IN is an rtx saying where the data are to be found before this instruction.
876 OUT says where they must be stored after the instruction.
877 (IN is zero for data not read, and OUT is zero for data not written.)
878 INLOC and OUTLOC point to the places in the instructions where
879 IN and OUT were found.
880 If IN and OUT are both nonzero, it means the same register must be used
881 to reload both IN and OUT.
882
883 CLASS is a register class required for the reloaded data.
884 INMODE is the machine mode that the instruction requires
885 for the reg that replaces IN and OUTMODE is likewise for OUT.
886
887 If IN is zero, then OUT's location and mode should be passed as
888 INLOC and INMODE.
889
890 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
891
892 OPTIONAL nonzero means this reload does not need to be performed:
893 it can be discarded if that is more convenient.
894
895 OPNUM and TYPE say what the purpose of this reload is.
896
897 The return value is the reload-number for this reload.
898
899 If both IN and OUT are nonzero, in some rare cases we might
900 want to make two separate reloads. (Actually we never do this now.)
901 Therefore, the reload-number for OUT is stored in
902 output_reloadnum when we return; the return value applies to IN.
903 Usually (presently always), when IN and OUT are nonzero,
904 the two reload-numbers are equal, but the caller should be careful to
905 distinguish them. */
906
907int
908push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
909 enum reg_class class, enum machine_mode inmode,
910 enum machine_mode outmode, int strict_low, int optional,
911 int opnum, enum reload_type type)
912{
913 int i;
914 int dont_share = 0;
915 int dont_remove_subreg = 0;
916 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
917 int secondary_in_reload = -1, secondary_out_reload = -1;
918 enum insn_code secondary_in_icode = CODE_FOR_nothing;
919 enum insn_code secondary_out_icode = CODE_FOR_nothing;
920
921 /* INMODE and/or OUTMODE could be VOIDmode if no mode
922 has been specified for the operand. In that case,
923 use the operand's mode as the mode to reload. */
924 if (inmode == VOIDmode && in != 0)
925 inmode = GET_MODE (in);
926 if (outmode == VOIDmode && out != 0)
927 outmode = GET_MODE (out);
928
929 /* If IN is a pseudo register everywhere-equivalent to a constant, and
930 it is not in a hard register, reload straight from the constant,
931 since we want to get rid of such pseudo registers.
932 Often this is done earlier, but not always in find_reloads_address. */
| 851 return 1;
852
853 /* If we can make a simple SET insn that does the job, everything should
854 be fine. */
855 dst = gen_rtx_REG (mode, regno);
856 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
857 save_recog_data = recog_data;
858 if (recog_memoized (test_insn) >= 0)
859 {
860 extract_insn (test_insn);
861 r = constrain_operands (1);
862 }
863 recog_data = save_recog_data;
864 return r;
865}
866
867/* Record one reload that needs to be performed.
868 IN is an rtx saying where the data are to be found before this instruction.
869 OUT says where they must be stored after the instruction.
870 (IN is zero for data not read, and OUT is zero for data not written.)
871 INLOC and OUTLOC point to the places in the instructions where
872 IN and OUT were found.
873 If IN and OUT are both nonzero, it means the same register must be used
874 to reload both IN and OUT.
875
876 CLASS is a register class required for the reloaded data.
877 INMODE is the machine mode that the instruction requires
878 for the reg that replaces IN and OUTMODE is likewise for OUT.
879
880 If IN is zero, then OUT's location and mode should be passed as
881 INLOC and INMODE.
882
883 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
884
885 OPTIONAL nonzero means this reload does not need to be performed:
886 it can be discarded if that is more convenient.
887
888 OPNUM and TYPE say what the purpose of this reload is.
889
890 The return value is the reload-number for this reload.
891
892 If both IN and OUT are nonzero, in some rare cases we might
893 want to make two separate reloads. (Actually we never do this now.)
894 Therefore, the reload-number for OUT is stored in
895 output_reloadnum when we return; the return value applies to IN.
896 Usually (presently always), when IN and OUT are nonzero,
897 the two reload-numbers are equal, but the caller should be careful to
898 distinguish them. */
899
900int
901push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
902 enum reg_class class, enum machine_mode inmode,
903 enum machine_mode outmode, int strict_low, int optional,
904 int opnum, enum reload_type type)
905{
906 int i;
907 int dont_share = 0;
908 int dont_remove_subreg = 0;
909 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
910 int secondary_in_reload = -1, secondary_out_reload = -1;
911 enum insn_code secondary_in_icode = CODE_FOR_nothing;
912 enum insn_code secondary_out_icode = CODE_FOR_nothing;
913
914 /* INMODE and/or OUTMODE could be VOIDmode if no mode
915 has been specified for the operand. In that case,
916 use the operand's mode as the mode to reload. */
917 if (inmode == VOIDmode && in != 0)
918 inmode = GET_MODE (in);
919 if (outmode == VOIDmode && out != 0)
920 outmode = GET_MODE (out);
921
922 /* If IN is a pseudo register everywhere-equivalent to a constant, and
923 it is not in a hard register, reload straight from the constant,
924 since we want to get rid of such pseudo registers.
925 Often this is done earlier, but not always in find_reloads_address. */
|
933 if (in != 0 && GET_CODE (in) == REG)
| 926 if (in != 0 && REG_P (in))
|
934 {
935 int regno = REGNO (in);
936
937 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
938 && reg_equiv_constant[regno] != 0)
939 in = reg_equiv_constant[regno];
940 }
941
942 /* Likewise for OUT. Of course, OUT will never be equivalent to
943 an actual constant, but it might be equivalent to a memory location
944 (in the case of a parameter). */
| 927 {
928 int regno = REGNO (in);
929
930 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
931 && reg_equiv_constant[regno] != 0)
932 in = reg_equiv_constant[regno];
933 }
934
935 /* Likewise for OUT. Of course, OUT will never be equivalent to
936 an actual constant, but it might be equivalent to a memory location
937 (in the case of a parameter). */
|
945 if (out != 0 && GET_CODE (out) == REG)
| 938 if (out != 0 && REG_P (out))
|
946 {
947 int regno = REGNO (out);
948
949 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
950 && reg_equiv_constant[regno] != 0)
951 out = reg_equiv_constant[regno];
952 }
953
954 /* If we have a read-write operand with an address side-effect,
955 change either IN or OUT so the side-effect happens only once. */
| 939 {
940 int regno = REGNO (out);
941
942 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
943 && reg_equiv_constant[regno] != 0)
944 out = reg_equiv_constant[regno];
945 }
946
947 /* If we have a read-write operand with an address side-effect,
948 change either IN or OUT so the side-effect happens only once. */
|
956 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
| 949 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
|
957 switch (GET_CODE (XEXP (in, 0)))
958 {
959 case POST_INC: case POST_DEC: case POST_MODIFY:
960 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
961 break;
962
963 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
964 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
965 break;
966
967 default:
968 break;
969 }
970
971 /* If we are reloading a (SUBREG constant ...), really reload just the
972 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
973 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
974 a pseudo and hence will become a MEM) with M1 wider than M2 and the
975 register is a pseudo, also reload the inside expression.
976 For machines that extend byte loads, do this for any SUBREG of a pseudo
977 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
978 M2 is an integral mode that gets extended when loaded.
979 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
980 either M1 is not valid for R or M2 is wider than a word but we only
981 need one word to store an M2-sized quantity in R.
982 (However, if OUT is nonzero, we need to reload the reg *and*
983 the subreg, so do nothing here, and let following statement handle it.)
984
985 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
986 we can't handle it here because CONST_INT does not indicate a mode.
987
988 Similarly, we must reload the inside expression if we have a
989 STRICT_LOW_PART (presumably, in == out in the cas).
990
991 Also reload the inner expression if it does not require a secondary
992 reload but the SUBREG does.
993
994 Finally, reload the inner expression if it is a register that is in
995 the class whose registers cannot be referenced in a different size
996 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
997 cannot reload just the inside since we might end up with the wrong
998 register class. But if it is inside a STRICT_LOW_PART, we have
999 no choice, so we hope we do get the right register class there. */
1000
1001 if (in != 0 && GET_CODE (in) == SUBREG
1002 && (subreg_lowpart_p (in) || strict_low)
1003#ifdef CANNOT_CHANGE_MODE_CLASS
1004 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1005#endif
1006 && (CONSTANT_P (SUBREG_REG (in))
1007 || GET_CODE (SUBREG_REG (in)) == PLUS
1008 || strict_low
| 950 switch (GET_CODE (XEXP (in, 0)))
951 {
952 case POST_INC: case POST_DEC: case POST_MODIFY:
953 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
954 break;
955
956 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
957 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
958 break;
959
960 default:
961 break;
962 }
963
964 /* If we are reloading a (SUBREG constant ...), really reload just the
965 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
966 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
967 a pseudo and hence will become a MEM) with M1 wider than M2 and the
968 register is a pseudo, also reload the inside expression.
969 For machines that extend byte loads, do this for any SUBREG of a pseudo
970 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
971 M2 is an integral mode that gets extended when loaded.
972 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
973 either M1 is not valid for R or M2 is wider than a word but we only
974 need one word to store an M2-sized quantity in R.
975 (However, if OUT is nonzero, we need to reload the reg *and*
976 the subreg, so do nothing here, and let following statement handle it.)
977
978 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
979 we can't handle it here because CONST_INT does not indicate a mode.
980
981 Similarly, we must reload the inside expression if we have a
982 STRICT_LOW_PART (presumably, in == out in the cas).
983
984 Also reload the inner expression if it does not require a secondary
985 reload but the SUBREG does.
986
987 Finally, reload the inner expression if it is a register that is in
988 the class whose registers cannot be referenced in a different size
989 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
990 cannot reload just the inside since we might end up with the wrong
991 register class. But if it is inside a STRICT_LOW_PART, we have
992 no choice, so we hope we do get the right register class there. */
993
994 if (in != 0 && GET_CODE (in) == SUBREG
995 && (subreg_lowpart_p (in) || strict_low)
996#ifdef CANNOT_CHANGE_MODE_CLASS
997 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
998#endif
999 && (CONSTANT_P (SUBREG_REG (in))
1000 || GET_CODE (SUBREG_REG (in)) == PLUS
1001 || strict_low
|
1009 || (((GET_CODE (SUBREG_REG (in)) == REG
| 1002 || (((REG_P (SUBREG_REG (in))
|
1010 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
| 1003 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
|
1011 || GET_CODE (SUBREG_REG (in)) == MEM)
| 1004 || MEM_P (SUBREG_REG (in)))
|
1012 && ((GET_MODE_SIZE (inmode)
1013 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1014#ifdef LOAD_EXTEND_OP
1015 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1016 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1017 <= UNITS_PER_WORD)
1018 && (GET_MODE_SIZE (inmode)
1019 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1020 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
| 1005 && ((GET_MODE_SIZE (inmode)
1006 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1007#ifdef LOAD_EXTEND_OP
1008 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1009 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1010 <= UNITS_PER_WORD)
1011 && (GET_MODE_SIZE (inmode)
1012 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1013 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
|
1021 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
| 1014 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
|
1022#endif
1023#ifdef WORD_REGISTER_OPERATIONS
1024 || ((GET_MODE_SIZE (inmode)
1025 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1026 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1027 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1028 / UNITS_PER_WORD)))
1029#endif
1030 ))
| 1015#endif
1016#ifdef WORD_REGISTER_OPERATIONS
1017 || ((GET_MODE_SIZE (inmode)
1018 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1019 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1020 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1021 / UNITS_PER_WORD)))
1022#endif
1023 ))
|
1031 || (GET_CODE (SUBREG_REG (in)) == REG
| 1024 || (REG_P (SUBREG_REG (in))
|
1032 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1033 /* The case where out is nonzero
1034 is handled differently in the following statement. */
1035 && (out == 0 || subreg_lowpart_p (in))
1036 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1037 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1038 > UNITS_PER_WORD)
1039 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1040 / UNITS_PER_WORD)
| 1025 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1026 /* The case where out is nonzero
1027 is handled differently in the following statement. */
1028 && (out == 0 || subreg_lowpart_p (in))
1029 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1030 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1031 > UNITS_PER_WORD)
1032 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1033 / UNITS_PER_WORD)
|
1041 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1042 GET_MODE (SUBREG_REG (in)))))
| 1034 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1035 [GET_MODE (SUBREG_REG (in))]))
|
1043 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
| 1036 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
|
1044#ifdef SECONDARY_INPUT_RELOAD_CLASS
1045 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1046 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1047 GET_MODE (SUBREG_REG (in)),
1048 SUBREG_REG (in))
| 1037 || (secondary_reload_class (1, class, inmode, in) != NO_REGS
1038 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in)),
1039 SUBREG_REG (in))
|
1049 == NO_REGS))
| 1040 == NO_REGS))
|
1050#endif
| |
1051#ifdef CANNOT_CHANGE_MODE_CLASS
| 1041#ifdef CANNOT_CHANGE_MODE_CLASS
|
1052 || (GET_CODE (SUBREG_REG (in)) == REG
| 1042 || (REG_P (SUBREG_REG (in))
|
1053 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1054 && REG_CANNOT_CHANGE_MODE_P
1055 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1056#endif
1057 ))
1058 {
1059 in_subreg_loc = inloc;
1060 inloc = &SUBREG_REG (in);
1061 in = *inloc;
1062#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
| 1043 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1044 && REG_CANNOT_CHANGE_MODE_P
1045 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1046#endif
1047 ))
1048 {
1049 in_subreg_loc = inloc;
1050 inloc = &SUBREG_REG (in);
1051 in = *inloc;
1052#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
|
1063 if (GET_CODE (in) == MEM)
| 1053 if (MEM_P (in))
|
1064 /* This is supposed to happen only for paradoxical subregs made by
1065 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
| 1054 /* This is supposed to happen only for paradoxical subregs made by
1055 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
|
1066 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1067 abort ();
| 1056 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
|
1068#endif
1069 inmode = GET_MODE (in);
1070 }
1071
1072 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1073 either M1 is not valid for R or M2 is wider than a word but we only
1074 need one word to store an M2-sized quantity in R.
1075
1076 However, we must reload the inner reg *as well as* the subreg in
1077 that case. */
1078
1079 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1080 code above. This can happen if SUBREG_BYTE != 0. */
1081
1082 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1083 {
1084 enum reg_class in_class = class;
1085
| 1057#endif
1058 inmode = GET_MODE (in);
1059 }
1060
1061 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1062 either M1 is not valid for R or M2 is wider than a word but we only
1063 need one word to store an M2-sized quantity in R.
1064
1065 However, we must reload the inner reg *as well as* the subreg in
1066 that case. */
1067
1068 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1069 code above. This can happen if SUBREG_BYTE != 0. */
1070
1071 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1072 {
1073 enum reg_class in_class = class;
1074
|
1086 if (GET_CODE (SUBREG_REG (in)) == REG)
| 1075 if (REG_P (SUBREG_REG (in)))
|
1087 in_class
| 1076 in_class
|
1088 = find_valid_class (inmode,
| 1077 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
|
1089 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1090 GET_MODE (SUBREG_REG (in)),
1091 SUBREG_BYTE (in),
1092 GET_MODE (in)),
1093 REGNO (SUBREG_REG (in)));
1094
1095 /* This relies on the fact that emit_reload_insns outputs the
1096 instructions for input reloads of type RELOAD_OTHER in the same
1097 order as the reloads. Thus if the outer reload is also of type
1098 RELOAD_OTHER, we are guaranteed that this inner reload will be
1099 output before the outer reload. */
1100 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1101 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1102 dont_remove_subreg = 1;
1103 }
1104
1105 /* Similarly for paradoxical and problematical SUBREGs on the output.
1106 Note that there is no reason we need worry about the previous value
1107 of SUBREG_REG (out); even if wider than out,
1108 storing in a subreg is entitled to clobber it all
1109 (except in the case of STRICT_LOW_PART,
1110 and in that case the constraint should label it input-output.) */
1111 if (out != 0 && GET_CODE (out) == SUBREG
1112 && (subreg_lowpart_p (out) || strict_low)
1113#ifdef CANNOT_CHANGE_MODE_CLASS
1114 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1115#endif
1116 && (CONSTANT_P (SUBREG_REG (out))
1117 || strict_low
| 1078 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1079 GET_MODE (SUBREG_REG (in)),
1080 SUBREG_BYTE (in),
1081 GET_MODE (in)),
1082 REGNO (SUBREG_REG (in)));
1083
1084 /* This relies on the fact that emit_reload_insns outputs the
1085 instructions for input reloads of type RELOAD_OTHER in the same
1086 order as the reloads. Thus if the outer reload is also of type
1087 RELOAD_OTHER, we are guaranteed that this inner reload will be
1088 output before the outer reload. */
1089 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1090 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1091 dont_remove_subreg = 1;
1092 }
1093
1094 /* Similarly for paradoxical and problematical SUBREGs on the output.
1095 Note that there is no reason we need worry about the previous value
1096 of SUBREG_REG (out); even if wider than out,
1097 storing in a subreg is entitled to clobber it all
1098 (except in the case of STRICT_LOW_PART,
1099 and in that case the constraint should label it input-output.) */
1100 if (out != 0 && GET_CODE (out) == SUBREG
1101 && (subreg_lowpart_p (out) || strict_low)
1102#ifdef CANNOT_CHANGE_MODE_CLASS
1103 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1104#endif
1105 && (CONSTANT_P (SUBREG_REG (out))
1106 || strict_low
|
1118 || (((GET_CODE (SUBREG_REG (out)) == REG
| 1107 || (((REG_P (SUBREG_REG (out))
|
1119 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
| 1108 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
|
1120 || GET_CODE (SUBREG_REG (out)) == MEM)
| 1109 || MEM_P (SUBREG_REG (out)))
|
1121 && ((GET_MODE_SIZE (outmode)
1122 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1123#ifdef WORD_REGISTER_OPERATIONS
1124 || ((GET_MODE_SIZE (outmode)
1125 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1126 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1127 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1128 / UNITS_PER_WORD)))
1129#endif
1130 ))
| 1110 && ((GET_MODE_SIZE (outmode)
1111 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1112#ifdef WORD_REGISTER_OPERATIONS
1113 || ((GET_MODE_SIZE (outmode)
1114 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1115 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1116 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1117 / UNITS_PER_WORD)))
1118#endif
1119 ))
|
1131 || (GET_CODE (SUBREG_REG (out)) == REG
| 1120 || (REG_P (SUBREG_REG (out))
|
1132 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1133 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1134 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1135 > UNITS_PER_WORD)
1136 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1137 / UNITS_PER_WORD)
| 1121 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1122 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1123 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1124 > UNITS_PER_WORD)
1125 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1126 / UNITS_PER_WORD)
|
1138 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1139 GET_MODE (SUBREG_REG (out)))))
| 1127 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1128 [GET_MODE (SUBREG_REG (out))]))
|
1140 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
| 1129 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
|
1141#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1142 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1143 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1144 GET_MODE (SUBREG_REG (out)),
1145 SUBREG_REG (out))
| 1130 || (secondary_reload_class (0, class, outmode, out) != NO_REGS
1131 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out)),
1132 SUBREG_REG (out))
|
1146 == NO_REGS))
| 1133 == NO_REGS))
|
1147#endif
| |
1148#ifdef CANNOT_CHANGE_MODE_CLASS
| 1134#ifdef CANNOT_CHANGE_MODE_CLASS
|
1149 || (GET_CODE (SUBREG_REG (out)) == REG
| 1135 || (REG_P (SUBREG_REG (out))
|
1150 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1151 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1152 GET_MODE (SUBREG_REG (out)),
1153 outmode))
1154#endif
1155 ))
1156 {
1157 out_subreg_loc = outloc;
1158 outloc = &SUBREG_REG (out);
1159 out = *outloc;
1160#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
| 1136 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1137 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1138 GET_MODE (SUBREG_REG (out)),
1139 outmode))
1140#endif
1141 ))
1142 {
1143 out_subreg_loc = outloc;
1144 outloc = &SUBREG_REG (out);
1145 out = *outloc;
1146#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
|
1161 if (GET_CODE (out) == MEM
1162 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1163 abort ();
| 1147 gcc_assert (!MEM_P (out)
1148 || GET_MODE_SIZE (GET_MODE (out))
1149 <= GET_MODE_SIZE (outmode));
|
1164#endif
1165 outmode = GET_MODE (out);
1166 }
1167
1168 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1169 either M1 is not valid for R or M2 is wider than a word but we only
1170 need one word to store an M2-sized quantity in R.
1171
1172 However, we must reload the inner reg *as well as* the subreg in
1173 that case. In this case, the inner reg is an in-out reload. */
1174
1175 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1176 {
1177 /* This relies on the fact that emit_reload_insns outputs the
1178 instructions for output reloads of type RELOAD_OTHER in reverse
1179 order of the reloads. Thus if the outer reload is also of type
1180 RELOAD_OTHER, we are guaranteed that this inner reload will be
1181 output after the outer reload. */
1182 dont_remove_subreg = 1;
1183 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1184 &SUBREG_REG (out),
| 1150#endif
1151 outmode = GET_MODE (out);
1152 }
1153
1154 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1155 either M1 is not valid for R or M2 is wider than a word but we only
1156 need one word to store an M2-sized quantity in R.
1157
1158 However, we must reload the inner reg *as well as* the subreg in
1159 that case. In this case, the inner reg is an in-out reload. */
1160
1161 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1162 {
1163 /* This relies on the fact that emit_reload_insns outputs the
1164 instructions for output reloads of type RELOAD_OTHER in reverse
1165 order of the reloads. Thus if the outer reload is also of type
1166 RELOAD_OTHER, we are guaranteed that this inner reload will be
1167 output after the outer reload. */
1168 dont_remove_subreg = 1;
1169 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1170 &SUBREG_REG (out),
|
1185 find_valid_class (outmode,
| 1171 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
|
1186 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1187 GET_MODE (SUBREG_REG (out)),
1188 SUBREG_BYTE (out),
1189 GET_MODE (out)),
1190 REGNO (SUBREG_REG (out))),
1191 VOIDmode, VOIDmode, 0, 0,
1192 opnum, RELOAD_OTHER);
1193 }
1194
1195 /* If IN appears in OUT, we can't share any input-only reload for IN. */
| 1172 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1173 GET_MODE (SUBREG_REG (out)),
1174 SUBREG_BYTE (out),
1175 GET_MODE (out)),
1176 REGNO (SUBREG_REG (out))),
1177 VOIDmode, VOIDmode, 0, 0,
1178 opnum, RELOAD_OTHER);
1179 }
1180
1181 /* If IN appears in OUT, we can't share any input-only reload for IN. */
|
1196 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1197 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
| 1182 if (in != 0 && out != 0 && MEM_P (out)
1183 && (REG_P (in) || MEM_P (in))
|
1198 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1199 dont_share = 1;
1200
1201 /* If IN is a SUBREG of a hard register, make a new REG. This
1202 simplifies some of the cases below. */
1203
| 1184 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1185 dont_share = 1;
1186
1187 /* If IN is a SUBREG of a hard register, make a new REG. This
1188 simplifies some of the cases below. */
1189
|
1204 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
| 1190 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
|
1205 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1206 && ! dont_remove_subreg)
1207 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1208
1209 /* Similarly for OUT. */
1210 if (out != 0 && GET_CODE (out) == SUBREG
| 1191 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1192 && ! dont_remove_subreg)
1193 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1194
1195 /* Similarly for OUT. */
1196 if (out != 0 && GET_CODE (out) == SUBREG
|
1211 && GET_CODE (SUBREG_REG (out)) == REG
| 1197 && REG_P (SUBREG_REG (out))
|
1212 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1213 && ! dont_remove_subreg)
1214 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1215
1216 /* Narrow down the class of register wanted if that is
1217 desirable on this machine for efficiency. */
| 1198 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1199 && ! dont_remove_subreg)
1200 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1201
1202 /* Narrow down the class of register wanted if that is
1203 desirable on this machine for efficiency. */
|
1218 if (in != 0)
1219 class = PREFERRED_RELOAD_CLASS (in, class);
| 1204 {
1205 enum reg_class preferred_class = class;
|
1220
| 1206
|
| 1207 if (in != 0)
1208 preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1209
|
1221 /* Output reloads may need analogous treatment, different in detail. */
1222#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
| 1210 /* Output reloads may need analogous treatment, different in detail. */
1211#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
|
1223 if (out != 0)
1224 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
| 1212 if (out != 0)
1213 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
|
1225#endif
1226
| 1214#endif
1215
|
| 1216 /* Discard what the target said if we cannot do it. */
1217 if (preferred_class != NO_REGS
1218 || (optional && type == RELOAD_FOR_OUTPUT))
1219 class = preferred_class;
1220 }
1221
|
1227 /* Make sure we use a class that can handle the actual pseudo
1228 inside any subreg. For example, on the 386, QImode regs
1229 can appear within SImode subregs. Although GENERAL_REGS
1230 can handle SImode, QImode needs a smaller class. */
1231#ifdef LIMIT_RELOAD_CLASS
1232 if (in_subreg_loc)
1233 class = LIMIT_RELOAD_CLASS (inmode, class);
1234 else if (in != 0 && GET_CODE (in) == SUBREG)
1235 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1236
1237 if (out_subreg_loc)
1238 class = LIMIT_RELOAD_CLASS (outmode, class);
1239 if (out != 0 && GET_CODE (out) == SUBREG)
1240 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1241#endif
1242
1243 /* Verify that this class is at least possible for the mode that
1244 is specified. */
1245 if (this_insn_is_asm)
1246 {
1247 enum machine_mode mode;
1248 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1249 mode = inmode;
1250 else
1251 mode = outmode;
1252 if (mode == VOIDmode)
1253 {
| 1222 /* Make sure we use a class that can handle the actual pseudo
1223 inside any subreg. For example, on the 386, QImode regs
1224 can appear within SImode subregs. Although GENERAL_REGS
1225 can handle SImode, QImode needs a smaller class. */
1226#ifdef LIMIT_RELOAD_CLASS
1227 if (in_subreg_loc)
1228 class = LIMIT_RELOAD_CLASS (inmode, class);
1229 else if (in != 0 && GET_CODE (in) == SUBREG)
1230 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1231
1232 if (out_subreg_loc)
1233 class = LIMIT_RELOAD_CLASS (outmode, class);
1234 if (out != 0 && GET_CODE (out) == SUBREG)
1235 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1236#endif
1237
1238 /* Verify that this class is at least possible for the mode that
1239 is specified. */
1240 if (this_insn_is_asm)
1241 {
1242 enum machine_mode mode;
1243 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1244 mode = inmode;
1245 else
1246 mode = outmode;
1247 if (mode == VOIDmode)
1248 {
|
1254 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
| 1249 error_for_asm (this_insn, "cannot reload integer constant "
1250 "operand in %<asm%>");
|
1255 mode = word_mode;
1256 if (in != 0)
1257 inmode = word_mode;
1258 if (out != 0)
1259 outmode = word_mode;
1260 }
1261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1262 if (HARD_REGNO_MODE_OK (i, mode)
1263 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1264 {
| 1251 mode = word_mode;
1252 if (in != 0)
1253 inmode = word_mode;
1254 if (out != 0)
1255 outmode = word_mode;
1256 }
1257 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1258 if (HARD_REGNO_MODE_OK (i, mode)
1259 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1260 {
|
1265 int nregs = HARD_REGNO_NREGS (i, mode);
| 1261 int nregs = hard_regno_nregs[i][mode];
|
1266
1267 int j;
1268 for (j = 1; j < nregs; j++)
1269 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1270 break;
1271 if (j == nregs)
1272 break;
1273 }
1274 if (i == FIRST_PSEUDO_REGISTER)
1275 {
| 1262
1263 int j;
1264 for (j = 1; j < nregs; j++)
1265 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1266 break;
1267 if (j == nregs)
1268 break;
1269 }
1270 if (i == FIRST_PSEUDO_REGISTER)
1271 {
|
1276 error_for_asm (this_insn, "impossible register constraint in `asm'");
1277 class = ALL_REGS;
| 1272 error_for_asm (this_insn, "impossible register constraint "
1273 "in %<asm%>");
1274 /* Avoid further trouble with this insn. */
1275 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1276 /* We used to continue here setting class to ALL_REGS, but it triggers
1277 sanity check on i386 for:
1278 void foo(long double d)
1279 {
1280 asm("" :: "a" (d));
1281 }
1282 Returning zero here ought to be safe as we take care in
1283 find_reloads to not process the reloads when instruction was
1284 replaced by USE. */
1285
1286 return 0;
|
1278 }
1279 }
1280
1281 /* Optional output reloads are always OK even if we have no register class,
1282 since the function of these reloads is only to have spill_reg_store etc.
1283 set, so that the storing insn can be deleted later. */
| 1287 }
1288 }
1289
1290 /* Optional output reloads are always OK even if we have no register class,
1291 since the function of these reloads is only to have spill_reg_store etc.
1292 set, so that the storing insn can be deleted later. */
|
1284 if (class == NO_REGS
1285 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1286 abort ();
| 1293 gcc_assert (class != NO_REGS
1294 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
|
1287
1288 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1289
1290 if (i == n_reloads)
1291 {
1292 /* See if we need a secondary reload register to move between CLASS
1293 and IN or CLASS and OUT. Get the icode and push any required reloads
1294 needed for each of them if so. */
1295
| 1295
1296 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1297
1298 if (i == n_reloads)
1299 {
1300 /* See if we need a secondary reload register to move between CLASS
1301 and IN or CLASS and OUT. Get the icode and push any required reloads
1302 needed for each of them if so. */
1303
|
1296#ifdef SECONDARY_INPUT_RELOAD_CLASS
| |
1297 if (in != 0)
1298 secondary_in_reload
1299 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
| 1304 if (in != 0)
1305 secondary_in_reload
1306 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
|
1300 &secondary_in_icode);
1301#endif
1302
1303#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
| 1307 &secondary_in_icode, NULL);
|
1304 if (out != 0 && GET_CODE (out) != SCRATCH)
1305 secondary_out_reload
1306 = push_secondary_reload (0, out, opnum, optional, class, outmode,
| 1308 if (out != 0 && GET_CODE (out) != SCRATCH)
1309 secondary_out_reload
1310 = push_secondary_reload (0, out, opnum, optional, class, outmode,
|
1307 type, &secondary_out_icode);
1308#endif
| 1311 type, &secondary_out_icode, NULL);
|
1309
1310 /* We found no existing reload suitable for re-use.
1311 So add an additional reload. */
1312
1313#ifdef SECONDARY_MEMORY_NEEDED
1314 /* If a memory location is needed for the copy, make one. */
| 1312
1313 /* We found no existing reload suitable for re-use.
1314 So add an additional reload. */
1315
1316#ifdef SECONDARY_MEMORY_NEEDED
1317 /* If a memory location is needed for the copy, make one. */
|
1315 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
| 1318 if (in != 0
1319 && (REG_P (in)
1320 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
|
1316 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1317 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1318 class, inmode))
1319 get_secondary_mem (in, inmode, opnum, type);
1320#endif
1321
1322 i = n_reloads;
1323 rld[i].in = in;
1324 rld[i].out = out;
1325 rld[i].class = class;
1326 rld[i].inmode = inmode;
1327 rld[i].outmode = outmode;
1328 rld[i].reg_rtx = 0;
1329 rld[i].optional = optional;
1330 rld[i].inc = 0;
1331 rld[i].nocombine = 0;
1332 rld[i].in_reg = inloc ? *inloc : 0;
1333 rld[i].out_reg = outloc ? *outloc : 0;
1334 rld[i].opnum = opnum;
1335 rld[i].when_needed = type;
1336 rld[i].secondary_in_reload = secondary_in_reload;
1337 rld[i].secondary_out_reload = secondary_out_reload;
1338 rld[i].secondary_in_icode = secondary_in_icode;
1339 rld[i].secondary_out_icode = secondary_out_icode;
1340 rld[i].secondary_p = 0;
1341
1342 n_reloads++;
1343
1344#ifdef SECONDARY_MEMORY_NEEDED
| 1321 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1323 class, inmode))
1324 get_secondary_mem (in, inmode, opnum, type);
1325#endif
1326
1327 i = n_reloads;
1328 rld[i].in = in;
1329 rld[i].out = out;
1330 rld[i].class = class;
1331 rld[i].inmode = inmode;
1332 rld[i].outmode = outmode;
1333 rld[i].reg_rtx = 0;
1334 rld[i].optional = optional;
1335 rld[i].inc = 0;
1336 rld[i].nocombine = 0;
1337 rld[i].in_reg = inloc ? *inloc : 0;
1338 rld[i].out_reg = outloc ? *outloc : 0;
1339 rld[i].opnum = opnum;
1340 rld[i].when_needed = type;
1341 rld[i].secondary_in_reload = secondary_in_reload;
1342 rld[i].secondary_out_reload = secondary_out_reload;
1343 rld[i].secondary_in_icode = secondary_in_icode;
1344 rld[i].secondary_out_icode = secondary_out_icode;
1345 rld[i].secondary_p = 0;
1346
1347 n_reloads++;
1348
1349#ifdef SECONDARY_MEMORY_NEEDED
|
1345 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
| 1350 if (out != 0
1351 && (REG_P (out)
1352 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
|
1346 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1347 && SECONDARY_MEMORY_NEEDED (class,
1348 REGNO_REG_CLASS (reg_or_subregno (out)),
1349 outmode))
1350 get_secondary_mem (out, outmode, opnum, type);
1351#endif
1352 }
1353 else
1354 {
1355 /* We are reusing an existing reload,
1356 but we may have additional information for it.
1357 For example, we may now have both IN and OUT
1358 while the old one may have just one of them. */
1359
1360 /* The modes can be different. If they are, we want to reload in
1361 the larger mode, so that the value is valid for both modes. */
1362 if (inmode != VOIDmode
1363 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1364 rld[i].inmode = inmode;
1365 if (outmode != VOIDmode
1366 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1367 rld[i].outmode = outmode;
1368 if (in != 0)
1369 {
1370 rtx in_reg = inloc ? *inloc : 0;
1371 /* If we merge reloads for two distinct rtl expressions that
1372 are identical in content, there might be duplicate address
1373 reloads. Remove the extra set now, so that if we later find
1374 that we can inherit this reload, we can get rid of the
1375 address reloads altogether.
1376
1377 Do not do this if both reloads are optional since the result
1378 would be an optional reload which could potentially leave
1379 unresolved address replacements.
1380
1381 It is not sufficient to call transfer_replacements since
1382 choose_reload_regs will remove the replacements for address
1383 reloads of inherited reloads which results in the same
1384 problem. */
1385 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1386 && ! (rld[i].optional && optional))
1387 {
1388 /* We must keep the address reload with the lower operand
1389 number alive. */
1390 if (opnum > rld[i].opnum)
1391 {
1392 remove_address_replacements (in);
1393 in = rld[i].in;
1394 in_reg = rld[i].in_reg;
1395 }
1396 else
1397 remove_address_replacements (rld[i].in);
1398 }
1399 rld[i].in = in;
1400 rld[i].in_reg = in_reg;
1401 }
1402 if (out != 0)
1403 {
1404 rld[i].out = out;
1405 rld[i].out_reg = outloc ? *outloc : 0;
1406 }
1407 if (reg_class_subset_p (class, rld[i].class))
1408 rld[i].class = class;
1409 rld[i].optional &= optional;
1410 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1411 opnum, rld[i].opnum))
1412 rld[i].when_needed = RELOAD_OTHER;
1413 rld[i].opnum = MIN (rld[i].opnum, opnum);
1414 }
1415
1416 /* If the ostensible rtx being reloaded differs from the rtx found
1417 in the location to substitute, this reload is not safe to combine
1418 because we cannot reliably tell whether it appears in the insn. */
1419
1420 if (in != 0 && in != *inloc)
1421 rld[i].nocombine = 1;
1422
1423#if 0
1424 /* This was replaced by changes in find_reloads_address_1 and the new
1425 function inc_for_reload, which go with a new meaning of reload_inc. */
1426
1427 /* If this is an IN/OUT reload in an insn that sets the CC,
1428 it must be for an autoincrement. It doesn't work to store
1429 the incremented value after the insn because that would clobber the CC.
1430 So we must do the increment of the value reloaded from,
1431 increment it, store it back, then decrement again. */
1432 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1433 {
1434 out = 0;
1435 rld[i].out = 0;
1436 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1437 /* If we did not find a nonzero amount-to-increment-by,
1438 that contradicts the belief that IN is being incremented
1439 in an address in this insn. */
| 1353 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1354 && SECONDARY_MEMORY_NEEDED (class,
1355 REGNO_REG_CLASS (reg_or_subregno (out)),
1356 outmode))
1357 get_secondary_mem (out, outmode, opnum, type);
1358#endif
1359 }
1360 else
1361 {
1362 /* We are reusing an existing reload,
1363 but we may have additional information for it.
1364 For example, we may now have both IN and OUT
1365 while the old one may have just one of them. */
1366
1367 /* The modes can be different. If they are, we want to reload in
1368 the larger mode, so that the value is valid for both modes. */
1369 if (inmode != VOIDmode
1370 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1371 rld[i].inmode = inmode;
1372 if (outmode != VOIDmode
1373 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1374 rld[i].outmode = outmode;
1375 if (in != 0)
1376 {
1377 rtx in_reg = inloc ? *inloc : 0;
1378 /* If we merge reloads for two distinct rtl expressions that
1379 are identical in content, there might be duplicate address
1380 reloads. Remove the extra set now, so that if we later find
1381 that we can inherit this reload, we can get rid of the
1382 address reloads altogether.
1383
1384 Do not do this if both reloads are optional since the result
1385 would be an optional reload which could potentially leave
1386 unresolved address replacements.
1387
1388 It is not sufficient to call transfer_replacements since
1389 choose_reload_regs will remove the replacements for address
1390 reloads of inherited reloads which results in the same
1391 problem. */
1392 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1393 && ! (rld[i].optional && optional))
1394 {
1395 /* We must keep the address reload with the lower operand
1396 number alive. */
1397 if (opnum > rld[i].opnum)
1398 {
1399 remove_address_replacements (in);
1400 in = rld[i].in;
1401 in_reg = rld[i].in_reg;
1402 }
1403 else
1404 remove_address_replacements (rld[i].in);
1405 }
1406 rld[i].in = in;
1407 rld[i].in_reg = in_reg;
1408 }
1409 if (out != 0)
1410 {
1411 rld[i].out = out;
1412 rld[i].out_reg = outloc ? *outloc : 0;
1413 }
1414 if (reg_class_subset_p (class, rld[i].class))
1415 rld[i].class = class;
1416 rld[i].optional &= optional;
1417 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1418 opnum, rld[i].opnum))
1419 rld[i].when_needed = RELOAD_OTHER;
1420 rld[i].opnum = MIN (rld[i].opnum, opnum);
1421 }
1422
1423 /* If the ostensible rtx being reloaded differs from the rtx found
1424 in the location to substitute, this reload is not safe to combine
1425 because we cannot reliably tell whether it appears in the insn. */
1426
1427 if (in != 0 && in != *inloc)
1428 rld[i].nocombine = 1;
1429
1430#if 0
1431 /* This was replaced by changes in find_reloads_address_1 and the new
1432 function inc_for_reload, which go with a new meaning of reload_inc. */
1433
1434 /* If this is an IN/OUT reload in an insn that sets the CC,
1435 it must be for an autoincrement. It doesn't work to store
1436 the incremented value after the insn because that would clobber the CC.
1437 So we must do the increment of the value reloaded from,
1438 increment it, store it back, then decrement again. */
1439 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1440 {
1441 out = 0;
1442 rld[i].out = 0;
1443 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1444 /* If we did not find a nonzero amount-to-increment-by,
1445 that contradicts the belief that IN is being incremented
1446 in an address in this insn. */
|
1440 if (rld[i].inc == 0)
1441 abort ();
| 1447 gcc_assert (rld[i].inc != 0);
|
1442 }
1443#endif
1444
1445 /* If we will replace IN and OUT with the reload-reg,
1446 record where they are located so that substitution need
1447 not do a tree walk. */
1448
1449 if (replace_reloads)
1450 {
1451 if (inloc != 0)
1452 {
1453 struct replacement *r = &replacements[n_replacements++];
1454 r->what = i;
1455 r->subreg_loc = in_subreg_loc;
1456 r->where = inloc;
1457 r->mode = inmode;
1458 }
1459 if (outloc != 0 && outloc != inloc)
1460 {
1461 struct replacement *r = &replacements[n_replacements++];
1462 r->what = i;
1463 r->where = outloc;
1464 r->subreg_loc = out_subreg_loc;
1465 r->mode = outmode;
1466 }
1467 }
1468
1469 /* If this reload is just being introduced and it has both
1470 an incoming quantity and an outgoing quantity that are
1471 supposed to be made to match, see if either one of the two
1472 can serve as the place to reload into.
1473
1474 If one of them is acceptable, set rld[i].reg_rtx
1475 to that one. */
1476
1477 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1478 {
1479 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1480 inmode, outmode,
1481 rld[i].class, i,
1482 earlyclobber_operand_p (out));
1483
1484 /* If the outgoing register already contains the same value
1485 as the incoming one, we can dispense with loading it.
1486 The easiest way to tell the caller that is to give a phony
1487 value for the incoming operand (same as outgoing one). */
1488 if (rld[i].reg_rtx == out
| 1448 }
1449#endif
1450
1451 /* If we will replace IN and OUT with the reload-reg,
1452 record where they are located so that substitution need
1453 not do a tree walk. */
1454
1455 if (replace_reloads)
1456 {
1457 if (inloc != 0)
1458 {
1459 struct replacement *r = &replacements[n_replacements++];
1460 r->what = i;
1461 r->subreg_loc = in_subreg_loc;
1462 r->where = inloc;
1463 r->mode = inmode;
1464 }
1465 if (outloc != 0 && outloc != inloc)
1466 {
1467 struct replacement *r = &replacements[n_replacements++];
1468 r->what = i;
1469 r->where = outloc;
1470 r->subreg_loc = out_subreg_loc;
1471 r->mode = outmode;
1472 }
1473 }
1474
1475 /* If this reload is just being introduced and it has both
1476 an incoming quantity and an outgoing quantity that are
1477 supposed to be made to match, see if either one of the two
1478 can serve as the place to reload into.
1479
1480 If one of them is acceptable, set rld[i].reg_rtx
1481 to that one. */
1482
1483 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1484 {
1485 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1486 inmode, outmode,
1487 rld[i].class, i,
1488 earlyclobber_operand_p (out));
1489
1490 /* If the outgoing register already contains the same value
1491 as the incoming one, we can dispense with loading it.
1492 The easiest way to tell the caller that is to give a phony
1493 value for the incoming operand (same as outgoing one). */
1494 if (rld[i].reg_rtx == out
|
1489 && (GET_CODE (in) == REG || CONSTANT_P (in))
| 1495 && (REG_P (in) || CONSTANT_P (in))
|
1490 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1491 static_reload_reg_p, i, inmode))
1492 rld[i].in = out;
1493 }
1494
1495 /* If this is an input reload and the operand contains a register that
1496 dies in this insn and is used nowhere else, see if it is the right class
1497 to be used for this reload. Use it if so. (This occurs most commonly
1498 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1499 this if it is also an output reload that mentions the register unless
1500 the output is a SUBREG that clobbers an entire register.
1501
1502 Note that the operand might be one of the spill regs, if it is a
1503 pseudo reg and we are in a block where spilling has not taken place.
1504 But if there is no spilling in this block, that is OK.
1505 An explicitly used hard reg cannot be a spill reg. */
1506
| 1496 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1497 static_reload_reg_p, i, inmode))
1498 rld[i].in = out;
1499 }
1500
1501 /* If this is an input reload and the operand contains a register that
1502 dies in this insn and is used nowhere else, see if it is the right class
1503 to be used for this reload. Use it if so. (This occurs most commonly
1504 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1505 this if it is also an output reload that mentions the register unless
1506 the output is a SUBREG that clobbers an entire register.
1507
1508 Note that the operand might be one of the spill regs, if it is a
1509 pseudo reg and we are in a block where spilling has not taken place.
1510 But if there is no spilling in this block, that is OK.
1511 An explicitly used hard reg cannot be a spill reg. */
1512
|
1507 if (rld[i].reg_rtx == 0 && in != 0)
| 1513 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
|
1508 {
1509 rtx note;
1510 int regno;
1511 enum machine_mode rel_mode = inmode;
1512
1513 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1514 rel_mode = outmode;
1515
1516 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1517 if (REG_NOTE_KIND (note) == REG_DEAD
| 1514 {
1515 rtx note;
1516 int regno;
1517 enum machine_mode rel_mode = inmode;
1518
1519 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1520 rel_mode = outmode;
1521
1522 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1523 if (REG_NOTE_KIND (note) == REG_DEAD
|
1518 && GET_CODE (XEXP (note, 0)) == REG
| 1524 && REG_P (XEXP (note, 0))
|
1519 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1520 && reg_mentioned_p (XEXP (note, 0), in)
| 1525 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1526 && reg_mentioned_p (XEXP (note, 0), in)
|
| 1527 /* Check that we don't use a hardreg for an uninitialized
1528 pseudo. See also find_dummy_reload(). */
1529 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1530 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1531 ORIGINAL_REGNO (XEXP (note, 0))))
|
1521 && ! refers_to_regno_for_reload_p (regno,
1522 (regno
| 1532 && ! refers_to_regno_for_reload_p (regno,
1533 (regno
|
1523 + HARD_REGNO_NREGS (regno,
1524 rel_mode)),
| 1534 + hard_regno_nregs[regno]
1535 [rel_mode]),
|
1525 PATTERN (this_insn), inloc)
1526 /* If this is also an output reload, IN cannot be used as
1527 the reload register if it is set in this insn unless IN
1528 is also OUT. */
1529 && (out == 0 || in == out
1530 || ! hard_reg_set_here_p (regno,
1531 (regno
| 1536 PATTERN (this_insn), inloc)
1537 /* If this is also an output reload, IN cannot be used as
1538 the reload register if it is set in this insn unless IN
1539 is also OUT. */
1540 && (out == 0 || in == out
1541 || ! hard_reg_set_here_p (regno,
1542 (regno
|
1532 + HARD_REGNO_NREGS (regno,
1533 rel_mode)),
| 1543 + hard_regno_nregs[regno]
1544 [rel_mode]),
|
1534 PATTERN (this_insn)))
1535 /* ??? Why is this code so different from the previous?
1536 Is there any simple coherent way to describe the two together?
1537 What's going on here. */
1538 && (in != out
1539 || (GET_CODE (in) == SUBREG
1540 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1541 / UNITS_PER_WORD)
1542 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1543 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1544 /* Make sure the operand fits in the reg that dies. */
1545 && (GET_MODE_SIZE (rel_mode)
1546 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1547 && HARD_REGNO_MODE_OK (regno, inmode)
1548 && HARD_REGNO_MODE_OK (regno, outmode))
1549 {
1550 unsigned int offs;
| 1545 PATTERN (this_insn)))
1546 /* ??? Why is this code so different from the previous?
1547 Is there any simple coherent way to describe the two together?
1548 What's going on here. */
1549 && (in != out
1550 || (GET_CODE (in) == SUBREG
1551 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1552 / UNITS_PER_WORD)
1553 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1554 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1555 /* Make sure the operand fits in the reg that dies. */
1556 && (GET_MODE_SIZE (rel_mode)
1557 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1558 && HARD_REGNO_MODE_OK (regno, inmode)
1559 && HARD_REGNO_MODE_OK (regno, outmode))
1560 {
1561 unsigned int offs;
|
1551 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1552 HARD_REGNO_NREGS (regno, outmode));
| 1562 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1563 hard_regno_nregs[regno][outmode]);
|
1553
1554 for (offs = 0; offs < nregs; offs++)
1555 if (fixed_regs[regno + offs]
1556 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1557 regno + offs))
1558 break;
1559
1560 if (offs == nregs
1561 && (! (refers_to_regno_for_reload_p
| 1564
1565 for (offs = 0; offs < nregs; offs++)
1566 if (fixed_regs[regno + offs]
1567 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1568 regno + offs))
1569 break;
1570
1571 if (offs == nregs
1572 && (! (refers_to_regno_for_reload_p
|
1562 (regno, (regno + HARD_REGNO_NREGS (regno, inmode)),
| 1573 (regno, (regno + hard_regno_nregs[regno][inmode]),
|
1563 in, (rtx *)0))
1564 || can_reload_into (in, regno, inmode)))
1565 {
1566 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1567 break;
1568 }
1569 }
1570 }
1571
1572 if (out)
1573 output_reloadnum = i;
1574
1575 return i;
1576}
1577
1578/* Record an additional place we must replace a value
1579 for which we have already recorded a reload.
1580 RELOADNUM is the value returned by push_reload
1581 when the reload was recorded.
1582 This is used in insn patterns that use match_dup. */
1583
1584static void
1585push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1586{
1587 if (replace_reloads)
1588 {
1589 struct replacement *r = &replacements[n_replacements++];
1590 r->what = reloadnum;
1591 r->where = loc;
1592 r->subreg_loc = 0;
1593 r->mode = mode;
1594 }
1595}
1596
1597/* Duplicate any replacement we have recorded to apply at
1598 location ORIG_LOC to also be performed at DUP_LOC.
1599 This is used in insn patterns that use match_dup. */
1600
1601static void
1602dup_replacements (rtx *dup_loc, rtx *orig_loc)
1603{
1604 int i, n = n_replacements;
1605
1606 for (i = 0; i < n; i++)
1607 {
1608 struct replacement *r = &replacements[i];
1609 if (r->where == orig_loc)
1610 push_replacement (dup_loc, r->what, r->mode);
1611 }
1612}
1613
1614/* Transfer all replacements that used to be in reload FROM to be in
1615 reload TO. */
1616
1617void
1618transfer_replacements (int to, int from)
1619{
1620 int i;
1621
1622 for (i = 0; i < n_replacements; i++)
1623 if (replacements[i].what == from)
1624 replacements[i].what = to;
1625}
1626
1627/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1628 or a subpart of it. If we have any replacements registered for IN_RTX,
1629 cancel the reloads that were supposed to load them.
1630 Return nonzero if we canceled any reloads. */
1631int
1632remove_address_replacements (rtx in_rtx)
1633{
1634 int i, j;
1635 char reload_flags[MAX_RELOADS];
1636 int something_changed = 0;
1637
1638 memset (reload_flags, 0, sizeof reload_flags);
1639 for (i = 0, j = 0; i < n_replacements; i++)
1640 {
1641 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1642 reload_flags[replacements[i].what] |= 1;
1643 else
1644 {
1645 replacements[j++] = replacements[i];
1646 reload_flags[replacements[i].what] |= 2;
1647 }
1648 }
1649 /* Note that the following store must be done before the recursive calls. */
1650 n_replacements = j;
1651
1652 for (i = n_reloads - 1; i >= 0; i--)
1653 {
1654 if (reload_flags[i] == 1)
1655 {
1656 deallocate_reload_reg (i);
1657 remove_address_replacements (rld[i].in);
1658 rld[i].in = 0;
1659 something_changed = 1;
1660 }
1661 }
1662 return something_changed;
1663}
1664
1665/* If there is only one output reload, and it is not for an earlyclobber
1666 operand, try to combine it with a (logically unrelated) input reload
1667 to reduce the number of reload registers needed.
1668
1669 This is safe if the input reload does not appear in
1670 the value being output-reloaded, because this implies
1671 it is not needed any more once the original insn completes.
1672
1673 If that doesn't work, see we can use any of the registers that
1674 die in this insn as a reload register. We can if it is of the right
1675 class and does not appear in the value being output-reloaded. */
1676
1677static void
1678combine_reloads (void)
1679{
1680 int i;
1681 int output_reload = -1;
1682 int secondary_out = -1;
1683 rtx note;
1684
1685 /* Find the output reload; return unless there is exactly one
1686 and that one is mandatory. */
1687
1688 for (i = 0; i < n_reloads; i++)
1689 if (rld[i].out != 0)
1690 {
1691 if (output_reload >= 0)
1692 return;
1693 output_reload = i;
1694 }
1695
1696 if (output_reload < 0 || rld[output_reload].optional)
1697 return;
1698
1699 /* An input-output reload isn't combinable. */
1700
1701 if (rld[output_reload].in != 0)
1702 return;
1703
1704 /* If this reload is for an earlyclobber operand, we can't do anything. */
1705 if (earlyclobber_operand_p (rld[output_reload].out))
1706 return;
1707
1708 /* If there is a reload for part of the address of this operand, we would
1709 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1710 its life to the point where doing this combine would not lower the
1711 number of spill registers needed. */
1712 for (i = 0; i < n_reloads; i++)
1713 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1714 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1715 && rld[i].opnum == rld[output_reload].opnum)
1716 return;
1717
1718 /* Check each input reload; can we combine it? */
1719
1720 for (i = 0; i < n_reloads; i++)
1721 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1722 /* Life span of this reload must not extend past main insn. */
1723 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1724 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1725 && rld[i].when_needed != RELOAD_OTHER
1726 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1727 == CLASS_MAX_NREGS (rld[output_reload].class,
1728 rld[output_reload].outmode))
1729 && rld[i].inc == 0
1730 && rld[i].reg_rtx == 0
1731#ifdef SECONDARY_MEMORY_NEEDED
1732 /* Don't combine two reloads with different secondary
1733 memory locations. */
1734 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1735 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1736 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1737 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1738#endif
1739 && (SMALL_REGISTER_CLASSES
1740 ? (rld[i].class == rld[output_reload].class)
1741 : (reg_class_subset_p (rld[i].class,
1742 rld[output_reload].class)
1743 || reg_class_subset_p (rld[output_reload].class,
1744 rld[i].class)))
1745 && (MATCHES (rld[i].in, rld[output_reload].out)
1746 /* Args reversed because the first arg seems to be
1747 the one that we imagine being modified
1748 while the second is the one that might be affected. */
1749 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1750 rld[i].in)
1751 /* However, if the input is a register that appears inside
1752 the output, then we also can't share.
1753 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1754 If the same reload reg is used for both reg 69 and the
1755 result to be stored in memory, then that result
1756 will clobber the address of the memory ref. */
| 1574 in, (rtx *)0))
1575 || can_reload_into (in, regno, inmode)))
1576 {
1577 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1578 break;
1579 }
1580 }
1581 }
1582
1583 if (out)
1584 output_reloadnum = i;
1585
1586 return i;
1587}
1588
1589/* Record an additional place we must replace a value
1590 for which we have already recorded a reload.
1591 RELOADNUM is the value returned by push_reload
1592 when the reload was recorded.
1593 This is used in insn patterns that use match_dup. */
1594
1595static void
1596push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1597{
1598 if (replace_reloads)
1599 {
1600 struct replacement *r = &replacements[n_replacements++];
1601 r->what = reloadnum;
1602 r->where = loc;
1603 r->subreg_loc = 0;
1604 r->mode = mode;
1605 }
1606}
1607
1608/* Duplicate any replacement we have recorded to apply at
1609 location ORIG_LOC to also be performed at DUP_LOC.
1610 This is used in insn patterns that use match_dup. */
1611
1612static void
1613dup_replacements (rtx *dup_loc, rtx *orig_loc)
1614{
1615 int i, n = n_replacements;
1616
1617 for (i = 0; i < n; i++)
1618 {
1619 struct replacement *r = &replacements[i];
1620 if (r->where == orig_loc)
1621 push_replacement (dup_loc, r->what, r->mode);
1622 }
1623}
1624
1625/* Transfer all replacements that used to be in reload FROM to be in
1626 reload TO. */
1627
1628void
1629transfer_replacements (int to, int from)
1630{
1631 int i;
1632
1633 for (i = 0; i < n_replacements; i++)
1634 if (replacements[i].what == from)
1635 replacements[i].what = to;
1636}
1637
1638/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1639 or a subpart of it. If we have any replacements registered for IN_RTX,
1640 cancel the reloads that were supposed to load them.
1641 Return nonzero if we canceled any reloads. */
1642int
1643remove_address_replacements (rtx in_rtx)
1644{
1645 int i, j;
1646 char reload_flags[MAX_RELOADS];
1647 int something_changed = 0;
1648
1649 memset (reload_flags, 0, sizeof reload_flags);
1650 for (i = 0, j = 0; i < n_replacements; i++)
1651 {
1652 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1653 reload_flags[replacements[i].what] |= 1;
1654 else
1655 {
1656 replacements[j++] = replacements[i];
1657 reload_flags[replacements[i].what] |= 2;
1658 }
1659 }
1660 /* Note that the following store must be done before the recursive calls. */
1661 n_replacements = j;
1662
1663 for (i = n_reloads - 1; i >= 0; i--)
1664 {
1665 if (reload_flags[i] == 1)
1666 {
1667 deallocate_reload_reg (i);
1668 remove_address_replacements (rld[i].in);
1669 rld[i].in = 0;
1670 something_changed = 1;
1671 }
1672 }
1673 return something_changed;
1674}
1675
1676/* If there is only one output reload, and it is not for an earlyclobber
1677 operand, try to combine it with a (logically unrelated) input reload
1678 to reduce the number of reload registers needed.
1679
1680 This is safe if the input reload does not appear in
1681 the value being output-reloaded, because this implies
1682 it is not needed any more once the original insn completes.
1683
1684 If that doesn't work, see we can use any of the registers that
1685 die in this insn as a reload register. We can if it is of the right
1686 class and does not appear in the value being output-reloaded. */
1687
1688static void
1689combine_reloads (void)
1690{
1691 int i;
1692 int output_reload = -1;
1693 int secondary_out = -1;
1694 rtx note;
1695
1696 /* Find the output reload; return unless there is exactly one
1697 and that one is mandatory. */
1698
1699 for (i = 0; i < n_reloads; i++)
1700 if (rld[i].out != 0)
1701 {
1702 if (output_reload >= 0)
1703 return;
1704 output_reload = i;
1705 }
1706
1707 if (output_reload < 0 || rld[output_reload].optional)
1708 return;
1709
1710 /* An input-output reload isn't combinable. */
1711
1712 if (rld[output_reload].in != 0)
1713 return;
1714
1715 /* If this reload is for an earlyclobber operand, we can't do anything. */
1716 if (earlyclobber_operand_p (rld[output_reload].out))
1717 return;
1718
1719 /* If there is a reload for part of the address of this operand, we would
1720 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1721 its life to the point where doing this combine would not lower the
1722 number of spill registers needed. */
1723 for (i = 0; i < n_reloads; i++)
1724 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1725 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1726 && rld[i].opnum == rld[output_reload].opnum)
1727 return;
1728
1729 /* Check each input reload; can we combine it? */
1730
1731 for (i = 0; i < n_reloads; i++)
1732 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1733 /* Life span of this reload must not extend past main insn. */
1734 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1735 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1736 && rld[i].when_needed != RELOAD_OTHER
1737 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1738 == CLASS_MAX_NREGS (rld[output_reload].class,
1739 rld[output_reload].outmode))
1740 && rld[i].inc == 0
1741 && rld[i].reg_rtx == 0
1742#ifdef SECONDARY_MEMORY_NEEDED
1743 /* Don't combine two reloads with different secondary
1744 memory locations. */
1745 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1746 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1747 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1748 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1749#endif
1750 && (SMALL_REGISTER_CLASSES
1751 ? (rld[i].class == rld[output_reload].class)
1752 : (reg_class_subset_p (rld[i].class,
1753 rld[output_reload].class)
1754 || reg_class_subset_p (rld[output_reload].class,
1755 rld[i].class)))
1756 && (MATCHES (rld[i].in, rld[output_reload].out)
1757 /* Args reversed because the first arg seems to be
1758 the one that we imagine being modified
1759 while the second is the one that might be affected. */
1760 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1761 rld[i].in)
1762 /* However, if the input is a register that appears inside
1763 the output, then we also can't share.
1764 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1765 If the same reload reg is used for both reg 69 and the
1766 result to be stored in memory, then that result
1767 will clobber the address of the memory ref. */
|
1757 && ! (GET_CODE (rld[i].in) == REG
| 1768 && ! (REG_P (rld[i].in)
|
1758 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1759 rld[output_reload].out))))
1760 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1761 rld[i].when_needed != RELOAD_FOR_INPUT)
1762 && (reg_class_size[(int) rld[i].class]
1763 || SMALL_REGISTER_CLASSES)
1764 /* We will allow making things slightly worse by combining an
1765 input and an output, but no worse than that. */
1766 && (rld[i].when_needed == RELOAD_FOR_INPUT
1767 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1768 {
1769 int j;
1770
1771 /* We have found a reload to combine with! */
1772 rld[i].out = rld[output_reload].out;
1773 rld[i].out_reg = rld[output_reload].out_reg;
1774 rld[i].outmode = rld[output_reload].outmode;
1775 /* Mark the old output reload as inoperative. */
1776 rld[output_reload].out = 0;
1777 /* The combined reload is needed for the entire insn. */
1778 rld[i].when_needed = RELOAD_OTHER;
1779 /* If the output reload had a secondary reload, copy it. */
1780 if (rld[output_reload].secondary_out_reload != -1)
1781 {
1782 rld[i].secondary_out_reload
1783 = rld[output_reload].secondary_out_reload;
1784 rld[i].secondary_out_icode
1785 = rld[output_reload].secondary_out_icode;
1786 }
1787
1788#ifdef SECONDARY_MEMORY_NEEDED
1789 /* Copy any secondary MEM. */
1790 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1791 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1792 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1793#endif
1794 /* If required, minimize the register class. */
1795 if (reg_class_subset_p (rld[output_reload].class,
1796 rld[i].class))
1797 rld[i].class = rld[output_reload].class;
1798
1799 /* Transfer all replacements from the old reload to the combined. */
1800 for (j = 0; j < n_replacements; j++)
1801 if (replacements[j].what == output_reload)
1802 replacements[j].what = i;
1803
1804 return;
1805 }
1806
1807 /* If this insn has only one operand that is modified or written (assumed
1808 to be the first), it must be the one corresponding to this reload. It
1809 is safe to use anything that dies in this insn for that output provided
1810 that it does not occur in the output (we already know it isn't an
1811 earlyclobber. If this is an asm insn, give up. */
1812
1813 if (INSN_CODE (this_insn) == -1)
1814 return;
1815
1816 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1817 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1818 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1819 return;
1820
1821 /* See if some hard register that dies in this insn and is not used in
1822 the output is the right class. Only works if the register we pick
1823 up can fully hold our output reload. */
1824 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1825 if (REG_NOTE_KIND (note) == REG_DEAD
| 1769 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1770 rld[output_reload].out))))
1771 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1772 rld[i].when_needed != RELOAD_FOR_INPUT)
1773 && (reg_class_size[(int) rld[i].class]
1774 || SMALL_REGISTER_CLASSES)
1775 /* We will allow making things slightly worse by combining an
1776 input and an output, but no worse than that. */
1777 && (rld[i].when_needed == RELOAD_FOR_INPUT
1778 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1779 {
1780 int j;
1781
1782 /* We have found a reload to combine with! */
1783 rld[i].out = rld[output_reload].out;
1784 rld[i].out_reg = rld[output_reload].out_reg;
1785 rld[i].outmode = rld[output_reload].outmode;
1786 /* Mark the old output reload as inoperative. */
1787 rld[output_reload].out = 0;
1788 /* The combined reload is needed for the entire insn. */
1789 rld[i].when_needed = RELOAD_OTHER;
1790 /* If the output reload had a secondary reload, copy it. */
1791 if (rld[output_reload].secondary_out_reload != -1)
1792 {
1793 rld[i].secondary_out_reload
1794 = rld[output_reload].secondary_out_reload;
1795 rld[i].secondary_out_icode
1796 = rld[output_reload].secondary_out_icode;
1797 }
1798
1799#ifdef SECONDARY_MEMORY_NEEDED
1800 /* Copy any secondary MEM. */
1801 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1802 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1803 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1804#endif
1805 /* If required, minimize the register class. */
1806 if (reg_class_subset_p (rld[output_reload].class,
1807 rld[i].class))
1808 rld[i].class = rld[output_reload].class;
1809
1810 /* Transfer all replacements from the old reload to the combined. */
1811 for (j = 0; j < n_replacements; j++)
1812 if (replacements[j].what == output_reload)
1813 replacements[j].what = i;
1814
1815 return;
1816 }
1817
1818 /* If this insn has only one operand that is modified or written (assumed
1819 to be the first), it must be the one corresponding to this reload. It
1820 is safe to use anything that dies in this insn for that output provided
1821 that it does not occur in the output (we already know it isn't an
1822 earlyclobber. If this is an asm insn, give up. */
1823
1824 if (INSN_CODE (this_insn) == -1)
1825 return;
1826
1827 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1828 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1829 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1830 return;
1831
1832 /* See if some hard register that dies in this insn and is not used in
1833 the output is the right class. Only works if the register we pick
1834 up can fully hold our output reload. */
1835 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1836 if (REG_NOTE_KIND (note) == REG_DEAD
|
1826 && GET_CODE (XEXP (note, 0)) == REG
| 1837 && REG_P (XEXP (note, 0))
|
1827 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1828 rld[output_reload].out)
1829 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1830 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1831 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1832 REGNO (XEXP (note, 0)))
| 1838 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1839 rld[output_reload].out)
1840 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1841 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1842 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1843 REGNO (XEXP (note, 0)))
|
1833 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1834 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
| 1844 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1845 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
|
1835 /* Ensure that a secondary or tertiary reload for this output
1836 won't want this register. */
1837 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1838 || (! (TEST_HARD_REG_BIT
1839 (reg_class_contents[(int) rld[secondary_out].class],
1840 REGNO (XEXP (note, 0))))
1841 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1842 || ! (TEST_HARD_REG_BIT
1843 (reg_class_contents[(int) rld[secondary_out].class],
1844 REGNO (XEXP (note, 0)))))))
| 1846 /* Ensure that a secondary or tertiary reload for this output
1847 won't want this register. */
1848 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1849 || (! (TEST_HARD_REG_BIT
1850 (reg_class_contents[(int) rld[secondary_out].class],
1851 REGNO (XEXP (note, 0))))
1852 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1853 || ! (TEST_HARD_REG_BIT
1854 (reg_class_contents[(int) rld[secondary_out].class],
1855 REGNO (XEXP (note, 0)))))))
|
1845 && ! fixed_regs[REGNO (XEXP (note, 0))])
| 1856 && ! fixed_regs[REGNO (XEXP (note, 0))]
1857 /* Check that we don't use a hardreg for an uninitialized
1858 pseudo. See also find_dummy_reload(). */
1859 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1860 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1861 ORIGINAL_REGNO (XEXP (note, 0)))))
|
1846 {
1847 rld[output_reload].reg_rtx
1848 = gen_rtx_REG (rld[output_reload].outmode,
1849 REGNO (XEXP (note, 0)));
1850 return;
1851 }
1852}
1853
1854/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1855 See if one of IN and OUT is a register that may be used;
1856 this is desirable since a spill-register won't be needed.
1857 If so, return the register rtx that proves acceptable.
1858
1859 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1860 CLASS is the register class required for the reload.
1861
1862 If FOR_REAL is >= 0, it is the number of the reload,
1863 and in some cases when it can be discovered that OUT doesn't need
1864 to be computed, clear out rld[FOR_REAL].out.
1865
1866 If FOR_REAL is -1, this should not be done, because this call
1867 is just to see if a register can be found, not to find and install it.
1868
1869 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1870 puts an additional constraint on being able to use IN for OUT since
1871 IN must not appear elsewhere in the insn (it is assumed that IN itself
1872 is safe from the earlyclobber). */
1873
1874static rtx
1875find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1876 enum machine_mode inmode, enum machine_mode outmode,
1877 enum reg_class class, int for_real, int earlyclobber)
1878{
1879 rtx in = real_in;
1880 rtx out = real_out;
1881 int in_offset = 0;
1882 int out_offset = 0;
1883 rtx value = 0;
1884
1885 /* If operands exceed a word, we can't use either of them
1886 unless they have the same size. */
1887 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1888 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1889 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1890 return 0;
1891
1892 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1893 respectively refers to a hard register. */
1894
1895 /* Find the inside of any subregs. */
1896 while (GET_CODE (out) == SUBREG)
1897 {
| 1862 {
1863 rld[output_reload].reg_rtx
1864 = gen_rtx_REG (rld[output_reload].outmode,
1865 REGNO (XEXP (note, 0)));
1866 return;
1867 }
1868}
1869
1870/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1871 See if one of IN and OUT is a register that may be used;
1872 this is desirable since a spill-register won't be needed.
1873 If so, return the register rtx that proves acceptable.
1874
1875 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1876 CLASS is the register class required for the reload.
1877
1878 If FOR_REAL is >= 0, it is the number of the reload,
1879 and in some cases when it can be discovered that OUT doesn't need
1880 to be computed, clear out rld[FOR_REAL].out.
1881
1882 If FOR_REAL is -1, this should not be done, because this call
1883 is just to see if a register can be found, not to find and install it.
1884
1885 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1886 puts an additional constraint on being able to use IN for OUT since
1887 IN must not appear elsewhere in the insn (it is assumed that IN itself
1888 is safe from the earlyclobber). */
1889
1890static rtx
1891find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1892 enum machine_mode inmode, enum machine_mode outmode,
1893 enum reg_class class, int for_real, int earlyclobber)
1894{
1895 rtx in = real_in;
1896 rtx out = real_out;
1897 int in_offset = 0;
1898 int out_offset = 0;
1899 rtx value = 0;
1900
1901 /* If operands exceed a word, we can't use either of them
1902 unless they have the same size. */
1903 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1904 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1905 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1906 return 0;
1907
1908 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1909 respectively refers to a hard register. */
1910
1911 /* Find the inside of any subregs. */
1912 while (GET_CODE (out) == SUBREG)
1913 {
|
1898 if (GET_CODE (SUBREG_REG (out)) == REG
| 1914 if (REG_P (SUBREG_REG (out))
|
1899 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1900 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1901 GET_MODE (SUBREG_REG (out)),
1902 SUBREG_BYTE (out),
1903 GET_MODE (out));
1904 out = SUBREG_REG (out);
1905 }
1906 while (GET_CODE (in) == SUBREG)
1907 {
| 1915 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1916 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1917 GET_MODE (SUBREG_REG (out)),
1918 SUBREG_BYTE (out),
1919 GET_MODE (out));
1920 out = SUBREG_REG (out);
1921 }
1922 while (GET_CODE (in) == SUBREG)
1923 {
|
1908 if (GET_CODE (SUBREG_REG (in)) == REG
| 1924 if (REG_P (SUBREG_REG (in))
|
1909 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1910 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1911 GET_MODE (SUBREG_REG (in)),
1912 SUBREG_BYTE (in),
1913 GET_MODE (in));
1914 in = SUBREG_REG (in);
1915 }
1916
1917 /* Narrow down the reg class, the same way push_reload will;
1918 otherwise we might find a dummy now, but push_reload won't. */
| 1925 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1926 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1927 GET_MODE (SUBREG_REG (in)),
1928 SUBREG_BYTE (in),
1929 GET_MODE (in));
1930 in = SUBREG_REG (in);
1931 }
1932
1933 /* Narrow down the reg class, the same way push_reload will;
1934 otherwise we might find a dummy now, but push_reload won't. */
|
1919 class = PREFERRED_RELOAD_CLASS (in, class);
| 1935 {
1936 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1937 if (preferred_class != NO_REGS)
1938 class = preferred_class;
1939 }
|
1920
1921 /* See if OUT will do. */
| 1940
1941 /* See if OUT will do. */
|
1922 if (GET_CODE (out) == REG
| 1942 if (REG_P (out)
|
1923 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1924 {
1925 unsigned int regno = REGNO (out) + out_offset;
| 1943 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1944 {
1945 unsigned int regno = REGNO (out) + out_offset;
|
1926 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
| 1946 unsigned int nwords = hard_regno_nregs[regno][outmode];
|
1927 rtx saved_rtx;
1928
1929 /* When we consider whether the insn uses OUT,
1930 ignore references within IN. They don't prevent us
1931 from copying IN into OUT, because those refs would
1932 move into the insn that reloads IN.
1933
1934 However, we only ignore IN in its role as this reload.
1935 If the insn uses IN elsewhere and it contains OUT,
1936 that counts. We can't be sure it's the "same" operand
1937 so it might not go through this reload. */
1938 saved_rtx = *inloc;
1939 *inloc = const0_rtx;
1940
1941 if (regno < FIRST_PSEUDO_REGISTER
1942 && HARD_REGNO_MODE_OK (regno, outmode)
1943 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1944 PATTERN (this_insn), outloc))
1945 {
1946 unsigned int i;
1947
1948 for (i = 0; i < nwords; i++)
1949 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1950 regno + i))
1951 break;
1952
1953 if (i == nwords)
1954 {
| 1947 rtx saved_rtx;
1948
1949 /* When we consider whether the insn uses OUT,
1950 ignore references within IN. They don't prevent us
1951 from copying IN into OUT, because those refs would
1952 move into the insn that reloads IN.
1953
1954 However, we only ignore IN in its role as this reload.
1955 If the insn uses IN elsewhere and it contains OUT,
1956 that counts. We can't be sure it's the "same" operand
1957 so it might not go through this reload. */
1958 saved_rtx = *inloc;
1959 *inloc = const0_rtx;
1960
1961 if (regno < FIRST_PSEUDO_REGISTER
1962 && HARD_REGNO_MODE_OK (regno, outmode)
1963 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1964 PATTERN (this_insn), outloc))
1965 {
1966 unsigned int i;
1967
1968 for (i = 0; i < nwords; i++)
1969 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1970 regno + i))
1971 break;
1972
1973 if (i == nwords)
1974 {
|
1955 if (GET_CODE (real_out) == REG)
| 1975 if (REG_P (real_out))
|
1956 value = real_out;
1957 else
1958 value = gen_rtx_REG (outmode, regno);
1959 }
1960 }
1961
1962 *inloc = saved_rtx;
1963 }
1964
1965 /* Consider using IN if OUT was not acceptable
1966 or if OUT dies in this insn (like the quotient in a divmod insn).
1967 We can't use IN unless it is dies in this insn,
1968 which means we must know accurately which hard regs are live.
1969 Also, the result can't go in IN if IN is used within OUT,
1970 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1971 if (hard_regs_live_known
| 1976 value = real_out;
1977 else
1978 value = gen_rtx_REG (outmode, regno);
1979 }
1980 }
1981
1982 *inloc = saved_rtx;
1983 }
1984
1985 /* Consider using IN if OUT was not acceptable
1986 or if OUT dies in this insn (like the quotient in a divmod insn).
1987 We can't use IN unless it is dies in this insn,
1988 which means we must know accurately which hard regs are live.
1989 Also, the result can't go in IN if IN is used within OUT,
1990 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1991 if (hard_regs_live_known
|
1972 && GET_CODE (in) == REG
| 1992 && REG_P (in)
|
1973 && REGNO (in) < FIRST_PSEUDO_REGISTER
1974 && (value == 0
1975 || find_reg_note (this_insn, REG_UNUSED, real_out))
1976 && find_reg_note (this_insn, REG_DEAD, real_in)
1977 && !fixed_regs[REGNO (in)]
1978 && HARD_REGNO_MODE_OK (REGNO (in),
1979 /* The only case where out and real_out might
1980 have different modes is where real_out
1981 is a subreg, and in that case, out
1982 has a real mode. */
1983 (GET_MODE (out) != VOIDmode
| 1993 && REGNO (in) < FIRST_PSEUDO_REGISTER
1994 && (value == 0
1995 || find_reg_note (this_insn, REG_UNUSED, real_out))
1996 && find_reg_note (this_insn, REG_DEAD, real_in)
1997 && !fixed_regs[REGNO (in)]
1998 && HARD_REGNO_MODE_OK (REGNO (in),
1999 /* The only case where out and real_out might
2000 have different modes is where real_out
2001 is a subreg, and in that case, out
2002 has a real mode. */
2003 (GET_MODE (out) != VOIDmode
|
1984 ? GET_MODE (out) : outmode)))
| 2004 ? GET_MODE (out) : outmode))
2005 /* But only do all this if we can be sure, that this input
2006 operand doesn't correspond with an uninitialized pseudoreg.
2007 global can assign some hardreg to it, which is the same as
2008 a different pseudo also currently live (as it can ignore the
2009 conflict). So we never must introduce writes to such hardregs,
2010 as they would clobber the other live pseudo using the same.
2011 See also PR20973. */
2012 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2013 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
2014 ORIGINAL_REGNO (in))))
|
1985 {
1986 unsigned int regno = REGNO (in) + in_offset;
| 2015 {
2016 unsigned int regno = REGNO (in) + in_offset;
|
1987 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
| 2017 unsigned int nwords = hard_regno_nregs[regno][inmode];
|
1988
1989 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1990 && ! hard_reg_set_here_p (regno, regno + nwords,
1991 PATTERN (this_insn))
1992 && (! earlyclobber
1993 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1994 PATTERN (this_insn), inloc)))
1995 {
1996 unsigned int i;
1997
1998 for (i = 0; i < nwords; i++)
1999 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2000 regno + i))
2001 break;
2002
2003 if (i == nwords)
2004 {
2005 /* If we were going to use OUT as the reload reg
2006 and changed our mind, it means OUT is a dummy that
2007 dies here. So don't bother copying value to it. */
2008 if (for_real >= 0 && value == real_out)
2009 rld[for_real].out = 0;
| 2018
2019 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2020 && ! hard_reg_set_here_p (regno, regno + nwords,
2021 PATTERN (this_insn))
2022 && (! earlyclobber
2023 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2024 PATTERN (this_insn), inloc)))
2025 {
2026 unsigned int i;
2027
2028 for (i = 0; i < nwords; i++)
2029 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2030 regno + i))
2031 break;
2032
2033 if (i == nwords)
2034 {
2035 /* If we were going to use OUT as the reload reg
2036 and changed our mind, it means OUT is a dummy that
2037 dies here. So don't bother copying value to it. */
2038 if (for_real >= 0 && value == real_out)
2039 rld[for_real].out = 0;
|
2010 if (GET_CODE (real_in) == REG)
| 2040 if (REG_P (real_in))
|
2011 value = real_in;
2012 else
2013 value = gen_rtx_REG (inmode, regno);
2014 }
2015 }
2016 }
2017
2018 return value;
2019}
2020
2021/* This page contains subroutines used mainly for determining
2022 whether the IN or an OUT of a reload can serve as the
2023 reload register. */
2024
2025/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2026
2027int
2028earlyclobber_operand_p (rtx x)
2029{
2030 int i;
2031
2032 for (i = 0; i < n_earlyclobbers; i++)
2033 if (reload_earlyclobbers[i] == x)
2034 return 1;
2035
2036 return 0;
2037}
2038
2039/* Return 1 if expression X alters a hard reg in the range
2040 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2041 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2042 X should be the body of an instruction. */
2043
2044static int
2045hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2046{
2047 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2048 {
2049 rtx op0 = SET_DEST (x);
2050
2051 while (GET_CODE (op0) == SUBREG)
2052 op0 = SUBREG_REG (op0);
| 2041 value = real_in;
2042 else
2043 value = gen_rtx_REG (inmode, regno);
2044 }
2045 }
2046 }
2047
2048 return value;
2049}
2050
2051/* This page contains subroutines used mainly for determining
2052 whether the IN or an OUT of a reload can serve as the
2053 reload register. */
2054
2055/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2056
2057int
2058earlyclobber_operand_p (rtx x)
2059{
2060 int i;
2061
2062 for (i = 0; i < n_earlyclobbers; i++)
2063 if (reload_earlyclobbers[i] == x)
2064 return 1;
2065
2066 return 0;
2067}
2068
2069/* Return 1 if expression X alters a hard reg in the range
2070 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2071 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2072 X should be the body of an instruction. */
2073
2074static int
2075hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2076{
2077 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2078 {
2079 rtx op0 = SET_DEST (x);
2080
2081 while (GET_CODE (op0) == SUBREG)
2082 op0 = SUBREG_REG (op0);
|
2053 if (GET_CODE (op0) == REG)
| 2083 if (REG_P (op0))
|
2054 {
2055 unsigned int r = REGNO (op0);
2056
2057 /* See if this reg overlaps range under consideration. */
2058 if (r < end_regno
| 2084 {
2085 unsigned int r = REGNO (op0);
2086
2087 /* See if this reg overlaps range under consideration. */
2088 if (r < end_regno
|
2059 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
| 2089 && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
|
2060 return 1;
2061 }
2062 }
2063 else if (GET_CODE (x) == PARALLEL)
2064 {
2065 int i = XVECLEN (x, 0) - 1;
2066
2067 for (; i >= 0; i--)
2068 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2069 return 1;
2070 }
2071
2072 return 0;
2073}
2074
2075/* Return 1 if ADDR is a valid memory address for mode MODE,
2076 and check that each pseudo reg has the proper kind of
2077 hard reg. */
2078
2079int
2080strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2081{
2082 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2083 return 0;
2084
2085 win:
2086 return 1;
2087}
2088
2089/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2090 if they are the same hard reg, and has special hacks for
2091 autoincrement and autodecrement.
2092 This is specifically intended for find_reloads to use
2093 in determining whether two operands match.
2094 X is the operand whose number is the lower of the two.
2095
2096 The value is 2 if Y contains a pre-increment that matches
2097 a non-incrementing address in X. */
2098
2099/* ??? To be completely correct, we should arrange to pass
2100 for X the output operand and for Y the input operand.
2101 For now, we assume that the output operand has the lower number
2102 because that is natural in (SET output (... input ...)). */
2103
2104int
2105operands_match_p (rtx x, rtx y)
2106{
2107 int i;
2108 RTX_CODE code = GET_CODE (x);
2109 const char *fmt;
2110 int success_2;
2111
2112 if (x == y)
2113 return 1;
| 2090 return 1;
2091 }
2092 }
2093 else if (GET_CODE (x) == PARALLEL)
2094 {
2095 int i = XVECLEN (x, 0) - 1;
2096
2097 for (; i >= 0; i--)
2098 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2099 return 1;
2100 }
2101
2102 return 0;
2103}
2104
2105/* Return 1 if ADDR is a valid memory address for mode MODE,
2106 and check that each pseudo reg has the proper kind of
2107 hard reg. */
2108
2109int
2110strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2111{
2112 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2113 return 0;
2114
2115 win:
2116 return 1;
2117}
2118
2119/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2120 if they are the same hard reg, and has special hacks for
2121 autoincrement and autodecrement.
2122 This is specifically intended for find_reloads to use
2123 in determining whether two operands match.
2124 X is the operand whose number is the lower of the two.
2125
2126 The value is 2 if Y contains a pre-increment that matches
2127 a non-incrementing address in X. */
2128
2129/* ??? To be completely correct, we should arrange to pass
2130 for X the output operand and for Y the input operand.
2131 For now, we assume that the output operand has the lower number
2132 because that is natural in (SET output (... input ...)). */
2133
2134int
2135operands_match_p (rtx x, rtx y)
2136{
2137 int i;
2138 RTX_CODE code = GET_CODE (x);
2139 const char *fmt;
2140 int success_2;
2141
2142 if (x == y)
2143 return 1;
|
2114 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2115 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2116 && GET_CODE (SUBREG_REG (y)) == REG)))
| 2144 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2145 && (REG_P (y) || (GET_CODE (y) == SUBREG
2146 && REG_P (SUBREG_REG (y)))))
|
2117 {
2118 int j;
2119
2120 if (code == SUBREG)
2121 {
2122 i = REGNO (SUBREG_REG (x));
2123 if (i >= FIRST_PSEUDO_REGISTER)
2124 goto slow;
2125 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2126 GET_MODE (SUBREG_REG (x)),
2127 SUBREG_BYTE (x),
2128 GET_MODE (x));
2129 }
2130 else
2131 i = REGNO (x);
2132
2133 if (GET_CODE (y) == SUBREG)
2134 {
2135 j = REGNO (SUBREG_REG (y));
2136 if (j >= FIRST_PSEUDO_REGISTER)
2137 goto slow;
2138 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2139 GET_MODE (SUBREG_REG (y)),
2140 SUBREG_BYTE (y),
2141 GET_MODE (y));
2142 }
2143 else
2144 j = REGNO (y);
2145
2146 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2147 multiple hard register group of scalar integer registers, so that
2148 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2149 register. */
2150 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2151 && SCALAR_INT_MODE_P (GET_MODE (x))
2152 && i < FIRST_PSEUDO_REGISTER)
| 2147 {
2148 int j;
2149
2150 if (code == SUBREG)
2151 {
2152 i = REGNO (SUBREG_REG (x));
2153 if (i >= FIRST_PSEUDO_REGISTER)
2154 goto slow;
2155 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2156 GET_MODE (SUBREG_REG (x)),
2157 SUBREG_BYTE (x),
2158 GET_MODE (x));
2159 }
2160 else
2161 i = REGNO (x);
2162
2163 if (GET_CODE (y) == SUBREG)
2164 {
2165 j = REGNO (SUBREG_REG (y));
2166 if (j >= FIRST_PSEUDO_REGISTER)
2167 goto slow;
2168 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2169 GET_MODE (SUBREG_REG (y)),
2170 SUBREG_BYTE (y),
2171 GET_MODE (y));
2172 }
2173 else
2174 j = REGNO (y);
2175
2176 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2177 multiple hard register group of scalar integer registers, so that
2178 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2179 register. */
2180 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2181 && SCALAR_INT_MODE_P (GET_MODE (x))
2182 && i < FIRST_PSEUDO_REGISTER)
|
2153 i += HARD_REGNO_NREGS (i, GET_MODE (x)) - 1;
| 2183 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
|
2154 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2155 && SCALAR_INT_MODE_P (GET_MODE (y))
2156 && j < FIRST_PSEUDO_REGISTER)
| 2184 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2185 && SCALAR_INT_MODE_P (GET_MODE (y))
2186 && j < FIRST_PSEUDO_REGISTER)
|
2157 j += HARD_REGNO_NREGS (j, GET_MODE (y)) - 1;
| 2187 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
|
2158
2159 return i == j;
2160 }
2161 /* If two operands must match, because they are really a single
2162 operand of an assembler insn, then two postincrements are invalid
2163 because the assembler insn would increment only once.
2164 On the other hand, a postincrement matches ordinary indexing
2165 if the postincrement is the output operand. */
2166 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2167 return operands_match_p (XEXP (x, 0), y);
2168 /* Two preincrements are invalid
2169 because the assembler insn would increment only once.
2170 On the other hand, a preincrement matches ordinary indexing
2171 if the preincrement is the input operand.
2172 In this case, return 2, since some callers need to do special
2173 things when this happens. */
2174 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2175 || GET_CODE (y) == PRE_MODIFY)
2176 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2177
2178 slow:
2179
| 2188
2189 return i == j;
2190 }
2191 /* If two operands must match, because they are really a single
2192 operand of an assembler insn, then two postincrements are invalid
2193 because the assembler insn would increment only once.
2194 On the other hand, a postincrement matches ordinary indexing
2195 if the postincrement is the output operand. */
2196 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2197 return operands_match_p (XEXP (x, 0), y);
2198 /* Two preincrements are invalid
2199 because the assembler insn would increment only once.
2200 On the other hand, a preincrement matches ordinary indexing
2201 if the preincrement is the input operand.
2202 In this case, return 2, since some callers need to do special
2203 things when this happens. */
2204 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2205 || GET_CODE (y) == PRE_MODIFY)
2206 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2207
2208 slow:
2209
|
2180 /* Now we have disposed of all the cases
2181 in which different rtx codes can match. */
| 2210 /* Now we have disposed of all the cases in which different rtx codes
2211 can match. */
|
2182 if (code != GET_CODE (y))
2183 return 0;
| 2212 if (code != GET_CODE (y))
2213 return 0;
|
2184 if (code == LABEL_REF)
2185 return XEXP (x, 0) == XEXP (y, 0);
2186 if (code == SYMBOL_REF)
2187 return XSTR (x, 0) == XSTR (y, 0);
| |
2188
2189 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
| 2214
2215 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
|
2190
| |
2191 if (GET_MODE (x) != GET_MODE (y))
2192 return 0;
2193
| 2216 if (GET_MODE (x) != GET_MODE (y))
2217 return 0;
2218
|
| 2219 switch (code)
2220 {
2221 case CONST_INT:
2222 case CONST_DOUBLE:
2223 return 0;
2224
2225 case LABEL_REF:
2226 return XEXP (x, 0) == XEXP (y, 0);
2227 case SYMBOL_REF:
2228 return XSTR (x, 0) == XSTR (y, 0);
2229
2230 default:
2231 break;
2232 }
2233
|
2194 /* Compare the elements. If any pair of corresponding elements
2195 fail to match, return 0 for the whole things. */
2196
2197 success_2 = 0;
2198 fmt = GET_RTX_FORMAT (code);
2199 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2200 {
2201 int val, j;
2202 switch (fmt[i])
2203 {
2204 case 'w':
2205 if (XWINT (x, i) != XWINT (y, i))
2206 return 0;
2207 break;
2208
2209 case 'i':
2210 if (XINT (x, i) != XINT (y, i))
2211 return 0;
2212 break;
2213
2214 case 'e':
2215 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2216 if (val == 0)
2217 return 0;
2218 /* If any subexpression returns 2,
2219 we should return 2 if we are successful. */
2220 if (val == 2)
2221 success_2 = 1;
2222 break;
2223
2224 case '0':
2225 break;
2226
2227 case 'E':
2228 if (XVECLEN (x, i) != XVECLEN (y, i))
2229 return 0;
2230 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2231 {
2232 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2233 if (val == 0)
2234 return 0;
2235 if (val == 2)
2236 success_2 = 1;
2237 }
2238 break;
2239
2240 /* It is believed that rtx's at this level will never
2241 contain anything but integers and other rtx's,
2242 except for within LABEL_REFs and SYMBOL_REFs. */
2243 default:
| 2234 /* Compare the elements. If any pair of corresponding elements
2235 fail to match, return 0 for the whole things. */
2236
2237 success_2 = 0;
2238 fmt = GET_RTX_FORMAT (code);
2239 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2240 {
2241 int val, j;
2242 switch (fmt[i])
2243 {
2244 case 'w':
2245 if (XWINT (x, i) != XWINT (y, i))
2246 return 0;
2247 break;
2248
2249 case 'i':
2250 if (XINT (x, i) != XINT (y, i))
2251 return 0;
2252 break;
2253
2254 case 'e':
2255 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2256 if (val == 0)
2257 return 0;
2258 /* If any subexpression returns 2,
2259 we should return 2 if we are successful. */
2260 if (val == 2)
2261 success_2 = 1;
2262 break;
2263
2264 case '0':
2265 break;
2266
2267 case 'E':
2268 if (XVECLEN (x, i) != XVECLEN (y, i))
2269 return 0;
2270 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2271 {
2272 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2273 if (val == 0)
2274 return 0;
2275 if (val == 2)
2276 success_2 = 1;
2277 }
2278 break;
2279
2280 /* It is believed that rtx's at this level will never
2281 contain anything but integers and other rtx's,
2282 except for within LABEL_REFs and SYMBOL_REFs. */
2283 default:
|
2244 abort ();
| 2284 gcc_unreachable ();
|
2245 }
2246 }
2247 return 1 + success_2;
2248}
2249
2250/* Describe the range of registers or memory referenced by X.
2251 If X is a register, set REG_FLAG and put the first register
2252 number into START and the last plus one into END.
2253 If X is a memory reference, put a base address into BASE
2254 and a range of integer offsets into START and END.
2255 If X is pushing on the stack, we can assume it causes no trouble,
2256 so we set the SAFE field. */
2257
2258static struct decomposition
2259decompose (rtx x)
2260{
2261 struct decomposition val;
2262 int all_const = 0;
2263
| 2285 }
2286 }
2287 return 1 + success_2;
2288}
2289
2290/* Describe the range of registers or memory referenced by X.
2291 If X is a register, set REG_FLAG and put the first register
2292 number into START and the last plus one into END.
2293 If X is a memory reference, put a base address into BASE
2294 and a range of integer offsets into START and END.
2295 If X is pushing on the stack, we can assume it causes no trouble,
2296 so we set the SAFE field. */
2297
2298static struct decomposition
2299decompose (rtx x)
2300{
2301 struct decomposition val;
2302 int all_const = 0;
2303
|
2264 val.reg_flag = 0;
2265 val.safe = 0;
2266 val.base = 0;
2267 if (GET_CODE (x) == MEM)
2268 {
2269 rtx base = NULL_RTX, offset = 0;
2270 rtx addr = XEXP (x, 0);
| 2304 memset (&val, 0, sizeof (val));
|
2271
| 2305
|
2272 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2273 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2274 {
2275 val.base = XEXP (addr, 0);
2276 val.start = -GET_MODE_SIZE (GET_MODE (x));
2277 val.end = GET_MODE_SIZE (GET_MODE (x));
2278 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2279 return val;
2280 }
2281
2282 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2283 {
2284 if (GET_CODE (XEXP (addr, 1)) == PLUS
2285 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2286 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2287 {
2288 val.base = XEXP (addr, 0);
2289 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2290 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2291 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2292 return val;
2293 }
2294 }
2295
2296 if (GET_CODE (addr) == CONST)
2297 {
2298 addr = XEXP (addr, 0);
2299 all_const = 1;
2300 }
2301 if (GET_CODE (addr) == PLUS)
2302 {
2303 if (CONSTANT_P (XEXP (addr, 0)))
2304 {
2305 base = XEXP (addr, 1);
2306 offset = XEXP (addr, 0);
2307 }
2308 else if (CONSTANT_P (XEXP (addr, 1)))
2309 {
2310 base = XEXP (addr, 0);
2311 offset = XEXP (addr, 1);
2312 }
2313 }
2314
2315 if (offset == 0)
2316 {
2317 base = addr;
2318 offset = const0_rtx;
2319 }
2320 if (GET_CODE (offset) == CONST)
2321 offset = XEXP (offset, 0);
2322 if (GET_CODE (offset) == PLUS)
2323 {
2324 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2325 {
2326 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2327 offset = XEXP (offset, 0);
2328 }
2329 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2330 {
2331 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2332 offset = XEXP (offset, 1);
2333 }
2334 else
2335 {
2336 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2337 offset = const0_rtx;
2338 }
2339 }
2340 else if (GET_CODE (offset) != CONST_INT)
2341 {
2342 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2343 offset = const0_rtx;
2344 }
2345
2346 if (all_const && GET_CODE (base) == PLUS)
2347 base = gen_rtx_CONST (GET_MODE (base), base);
2348
2349 if (GET_CODE (offset) != CONST_INT)
2350 abort ();
2351
2352 val.start = INTVAL (offset);
2353 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2354 val.base = base;
2355 return val;
2356 }
2357 else if (GET_CODE (x) == REG)
| 2306 switch (GET_CODE (x))
|
2358 {
| 2307 {
|
| 2308 case MEM:
2309 {
2310 rtx base = NULL_RTX, offset = 0;
2311 rtx addr = XEXP (x, 0);
2312
2313 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2314 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2315 {
2316 val.base = XEXP (addr, 0);
2317 val.start = -GET_MODE_SIZE (GET_MODE (x));
2318 val.end = GET_MODE_SIZE (GET_MODE (x));
2319 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2320 return val;
2321 }
2322
2323 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2324 {
2325 if (GET_CODE (XEXP (addr, 1)) == PLUS
2326 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2327 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2328 {
2329 val.base = XEXP (addr, 0);
2330 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2331 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2332 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2333 return val;
2334 }
2335 }
2336
2337 if (GET_CODE (addr) == CONST)
2338 {
2339 addr = XEXP (addr, 0);
2340 all_const = 1;
2341 }
2342 if (GET_CODE (addr) == PLUS)
2343 {
2344 if (CONSTANT_P (XEXP (addr, 0)))
2345 {
2346 base = XEXP (addr, 1);
2347 offset = XEXP (addr, 0);
2348 }
2349 else if (CONSTANT_P (XEXP (addr, 1)))
2350 {
2351 base = XEXP (addr, 0);
2352 offset = XEXP (addr, 1);
2353 }
2354 }
2355
2356 if (offset == 0)
2357 {
2358 base = addr;
2359 offset = const0_rtx;
2360 }
2361 if (GET_CODE (offset) == CONST)
2362 offset = XEXP (offset, 0);
2363 if (GET_CODE (offset) == PLUS)
2364 {
2365 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2366 {
2367 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2368 offset = XEXP (offset, 0);
2369 }
2370 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2371 {
2372 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2373 offset = XEXP (offset, 1);
2374 }
2375 else
2376 {
2377 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2378 offset = const0_rtx;
2379 }
2380 }
2381 else if (GET_CODE (offset) != CONST_INT)
2382 {
2383 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2384 offset = const0_rtx;
2385 }
2386
2387 if (all_const && GET_CODE (base) == PLUS)
2388 base = gen_rtx_CONST (GET_MODE (base), base);
2389
2390 gcc_assert (GET_CODE (offset) == CONST_INT);
2391
2392 val.start = INTVAL (offset);
2393 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2394 val.base = base;
2395 }
2396 break;
2397
2398 case REG:
|
2359 val.reg_flag = 1;
2360 val.start = true_regnum (x);
| 2399 val.reg_flag = 1;
2400 val.start = true_regnum (x);
|
2361 if (val.start < 0)
| 2401 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
|
2362 {
2363 /* A pseudo with no hard reg. */
2364 val.start = REGNO (x);
2365 val.end = val.start + 1;
2366 }
2367 else
2368 /* A hard reg. */
| 2402 {
2403 /* A pseudo with no hard reg. */
2404 val.start = REGNO (x);
2405 val.end = val.start + 1;
2406 }
2407 else
2408 /* A hard reg. */
|
2369 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2370 }
2371 else if (GET_CODE (x) == SUBREG)
2372 {
2373 if (GET_CODE (SUBREG_REG (x)) != REG)
| 2409 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2410 break;
2411
2412 case SUBREG:
2413 if (!REG_P (SUBREG_REG (x)))
|
2374 /* This could be more precise, but it's good enough. */
2375 return decompose (SUBREG_REG (x));
2376 val.reg_flag = 1;
2377 val.start = true_regnum (x);
| 2414 /* This could be more precise, but it's good enough. */
2415 return decompose (SUBREG_REG (x));
2416 val.reg_flag = 1;
2417 val.start = true_regnum (x);
|
2378 if (val.start < 0)
| 2418 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
|
2379 return decompose (SUBREG_REG (x));
2380 else
2381 /* A hard reg. */
| 2419 return decompose (SUBREG_REG (x));
2420 else
2421 /* A hard reg. */
|
2382 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
| 2422 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2423 break;
2424
2425 case SCRATCH:
2426 /* This hasn't been assigned yet, so it can't conflict yet. */
2427 val.safe = 1;
2428 break;
2429
2430 default:
2431 gcc_assert (CONSTANT_P (x));
2432 val.safe = 1;
2433 break;
|
2383 }
| 2434 }
|
2384 else if (CONSTANT_P (x)
2385 /* This hasn't been assigned yet, so it can't conflict yet. */
2386 || GET_CODE (x) == SCRATCH)
2387 val.safe = 1;
2388 else
2389 abort ();
| |
2390 return val;
2391}
2392
2393/* Return 1 if altering Y will not modify the value of X.
2394 Y is also described by YDATA, which should be decompose (Y). */
2395
2396static int
2397immune_p (rtx x, rtx y, struct decomposition ydata)
2398{
2399 struct decomposition xdata;
2400
2401 if (ydata.reg_flag)
2402 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2403 if (ydata.safe)
2404 return 1;
2405
| 2435 return val;
2436}
2437
2438/* Return 1 if altering Y will not modify the value of X.
2439 Y is also described by YDATA, which should be decompose (Y). */
2440
2441static int
2442immune_p (rtx x, rtx y, struct decomposition ydata)
2443{
2444 struct decomposition xdata;
2445
2446 if (ydata.reg_flag)
2447 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2448 if (ydata.safe)
2449 return 1;
2450
|
2406 if (GET_CODE (y) != MEM)
2407 abort ();
| 2451 gcc_assert (MEM_P (y));
|
2408 /* If Y is memory and X is not, Y can't affect X. */
| 2452 /* If Y is memory and X is not, Y can't affect X. */
|
2409 if (GET_CODE (x) != MEM)
| 2453 if (!MEM_P (x))
|
2410 return 1;
2411
2412 xdata = decompose (x);
2413
2414 if (! rtx_equal_p (xdata.base, ydata.base))
2415 {
2416 /* If bases are distinct symbolic constants, there is no overlap. */
2417 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2418 return 1;
2419 /* Constants and stack slots never overlap. */
2420 if (CONSTANT_P (xdata.base)
2421 && (ydata.base == frame_pointer_rtx
2422 || ydata.base == hard_frame_pointer_rtx
2423 || ydata.base == stack_pointer_rtx))
2424 return 1;
2425 if (CONSTANT_P (ydata.base)
2426 && (xdata.base == frame_pointer_rtx
2427 || xdata.base == hard_frame_pointer_rtx
2428 || xdata.base == stack_pointer_rtx))
2429 return 1;
2430 /* If either base is variable, we don't know anything. */
2431 return 0;
2432 }
2433
2434 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2435}
2436
2437/* Similar, but calls decompose. */
2438
2439int
2440safe_from_earlyclobber (rtx op, rtx clobber)
2441{
2442 struct decomposition early_data;
2443
2444 early_data = decompose (clobber);
2445 return immune_p (op, clobber, early_data);
2446}
2447
2448/* Main entry point of this file: search the body of INSN
2449 for values that need reloading and record them with push_reload.
2450 REPLACE nonzero means record also where the values occur
2451 so that subst_reloads can be used.
2452
2453 IND_LEVELS says how many levels of indirection are supported by this
2454 machine; a value of zero means that a memory reference is not a valid
2455 memory address.
2456
2457 LIVE_KNOWN says we have valid information about which hard
2458 regs are live at each point in the program; this is true when
2459 we are called from global_alloc but false when stupid register
2460 allocation has been done.
2461
2462 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2463 which is nonnegative if the reg has been commandeered for reloading into.
2464 It is copied into STATIC_RELOAD_REG_P and referenced from there
2465 by various subroutines.
2466
2467 Return TRUE if some operands need to be changed, because of swapping
2468 commutative operands, reg_equiv_address substitution, or whatever. */
2469
2470int
2471find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2472 short *reload_reg_p)
2473{
2474 int insn_code_number;
2475 int i, j;
2476 int noperands;
2477 /* These start out as the constraints for the insn
2478 and they are chewed up as we consider alternatives. */
2479 char *constraints[MAX_RECOG_OPERANDS];
2480 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2481 a register. */
2482 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2483 char pref_or_nothing[MAX_RECOG_OPERANDS];
| 2454 return 1;
2455
2456 xdata = decompose (x);
2457
2458 if (! rtx_equal_p (xdata.base, ydata.base))
2459 {
2460 /* If bases are distinct symbolic constants, there is no overlap. */
2461 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2462 return 1;
2463 /* Constants and stack slots never overlap. */
2464 if (CONSTANT_P (xdata.base)
2465 && (ydata.base == frame_pointer_rtx
2466 || ydata.base == hard_frame_pointer_rtx
2467 || ydata.base == stack_pointer_rtx))
2468 return 1;
2469 if (CONSTANT_P (ydata.base)
2470 && (xdata.base == frame_pointer_rtx
2471 || xdata.base == hard_frame_pointer_rtx
2472 || xdata.base == stack_pointer_rtx))
2473 return 1;
2474 /* If either base is variable, we don't know anything. */
2475 return 0;
2476 }
2477
2478 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2479}
2480
2481/* Similar, but calls decompose. */
2482
2483int
2484safe_from_earlyclobber (rtx op, rtx clobber)
2485{
2486 struct decomposition early_data;
2487
2488 early_data = decompose (clobber);
2489 return immune_p (op, clobber, early_data);
2490}
2491
2492/* Main entry point of this file: search the body of INSN
2493 for values that need reloading and record them with push_reload.
2494 REPLACE nonzero means record also where the values occur
2495 so that subst_reloads can be used.
2496
2497 IND_LEVELS says how many levels of indirection are supported by this
2498 machine; a value of zero means that a memory reference is not a valid
2499 memory address.
2500
2501 LIVE_KNOWN says we have valid information about which hard
2502 regs are live at each point in the program; this is true when
2503 we are called from global_alloc but false when stupid register
2504 allocation has been done.
2505
2506 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2507 which is nonnegative if the reg has been commandeered for reloading into.
2508 It is copied into STATIC_RELOAD_REG_P and referenced from there
2509 by various subroutines.
2510
2511 Return TRUE if some operands need to be changed, because of swapping
2512 commutative operands, reg_equiv_address substitution, or whatever. */
2513
2514int
2515find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2516 short *reload_reg_p)
2517{
2518 int insn_code_number;
2519 int i, j;
2520 int noperands;
2521 /* These start out as the constraints for the insn
2522 and they are chewed up as we consider alternatives. */
2523 char *constraints[MAX_RECOG_OPERANDS];
2524 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2525 a register. */
2526 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2527 char pref_or_nothing[MAX_RECOG_OPERANDS];
|
2484 /* Nonzero for a MEM operand whose entire address needs a reload. */
| 2528 /* Nonzero for a MEM operand whose entire address needs a reload.
2529 May be -1 to indicate the entire address may or may not need a reload. */
|
2485 int address_reloaded[MAX_RECOG_OPERANDS];
| 2530 int address_reloaded[MAX_RECOG_OPERANDS];
|
2486 /* Nonzero for an address operand that needs to be completely reloaded. */
| 2531 /* Nonzero for an address operand that needs to be completely reloaded.
2532 May be -1 to indicate the entire operand may or may not need a reload. */
|
2487 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2488 /* Value of enum reload_type to use for operand. */
2489 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2490 /* Value of enum reload_type to use within address of operand. */
2491 enum reload_type address_type[MAX_RECOG_OPERANDS];
2492 /* Save the usage of each operand. */
2493 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2494 int no_input_reloads = 0, no_output_reloads = 0;
2495 int n_alternatives;
2496 int this_alternative[MAX_RECOG_OPERANDS];
2497 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2498 char this_alternative_win[MAX_RECOG_OPERANDS];
2499 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2500 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2501 int this_alternative_matches[MAX_RECOG_OPERANDS];
2502 int swapped;
2503 int goal_alternative[MAX_RECOG_OPERANDS];
2504 int this_alternative_number;
2505 int goal_alternative_number = 0;
2506 int operand_reloadnum[MAX_RECOG_OPERANDS];
2507 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2508 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2509 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2510 char goal_alternative_win[MAX_RECOG_OPERANDS];
2511 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2512 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2513 int goal_alternative_swapped;
2514 int best;
2515 int commutative;
2516 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2517 rtx substed_operand[MAX_RECOG_OPERANDS];
2518 rtx body = PATTERN (insn);
2519 rtx set = single_set (insn);
2520 int goal_earlyclobber = 0, this_earlyclobber;
2521 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2522 int retval = 0;
2523
2524 this_insn = insn;
2525 n_reloads = 0;
2526 n_replacements = 0;
2527 n_earlyclobbers = 0;
2528 replace_reloads = replace;
2529 hard_regs_live_known = live_known;
2530 static_reload_reg_p = reload_reg_p;
2531
2532 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2533 neither are insns that SET cc0. Insns that use CC0 are not allowed
2534 to have any input reloads. */
| 2533 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2534 /* Value of enum reload_type to use for operand. */
2535 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2536 /* Value of enum reload_type to use within address of operand. */
2537 enum reload_type address_type[MAX_RECOG_OPERANDS];
2538 /* Save the usage of each operand. */
2539 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2540 int no_input_reloads = 0, no_output_reloads = 0;
2541 int n_alternatives;
2542 int this_alternative[MAX_RECOG_OPERANDS];
2543 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2544 char this_alternative_win[MAX_RECOG_OPERANDS];
2545 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2546 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2547 int this_alternative_matches[MAX_RECOG_OPERANDS];
2548 int swapped;
2549 int goal_alternative[MAX_RECOG_OPERANDS];
2550 int this_alternative_number;
2551 int goal_alternative_number = 0;
2552 int operand_reloadnum[MAX_RECOG_OPERANDS];
2553 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2554 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2555 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2556 char goal_alternative_win[MAX_RECOG_OPERANDS];
2557 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2558 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2559 int goal_alternative_swapped;
2560 int best;
2561 int commutative;
2562 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2563 rtx substed_operand[MAX_RECOG_OPERANDS];
2564 rtx body = PATTERN (insn);
2565 rtx set = single_set (insn);
2566 int goal_earlyclobber = 0, this_earlyclobber;
2567 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2568 int retval = 0;
2569
2570 this_insn = insn;
2571 n_reloads = 0;
2572 n_replacements = 0;
2573 n_earlyclobbers = 0;
2574 replace_reloads = replace;
2575 hard_regs_live_known = live_known;
2576 static_reload_reg_p = reload_reg_p;
2577
2578 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2579 neither are insns that SET cc0. Insns that use CC0 are not allowed
2580 to have any input reloads. */
|
2535 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
| 2581 if (JUMP_P (insn) || CALL_P (insn))
|
2536 no_output_reloads = 1;
2537
2538#ifdef HAVE_cc0
2539 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2540 no_input_reloads = 1;
2541 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2542 no_output_reloads = 1;
2543#endif
2544
2545#ifdef SECONDARY_MEMORY_NEEDED
2546 /* The eliminated forms of any secondary memory locations are per-insn, so
2547 clear them out here. */
2548
2549 if (secondary_memlocs_elim_used)
2550 {
2551 memset (secondary_memlocs_elim, 0,
2552 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2553 secondary_memlocs_elim_used = 0;
2554 }
2555#endif
2556
2557 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2558 is cheap to move between them. If it is not, there may not be an insn
2559 to do the copy, so we may need a reload. */
2560 if (GET_CODE (body) == SET
| 2582 no_output_reloads = 1;
2583
2584#ifdef HAVE_cc0
2585 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2586 no_input_reloads = 1;
2587 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2588 no_output_reloads = 1;
2589#endif
2590
2591#ifdef SECONDARY_MEMORY_NEEDED
2592 /* The eliminated forms of any secondary memory locations are per-insn, so
2593 clear them out here. */
2594
2595 if (secondary_memlocs_elim_used)
2596 {
2597 memset (secondary_memlocs_elim, 0,
2598 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2599 secondary_memlocs_elim_used = 0;
2600 }
2601#endif
2602
2603 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2604 is cheap to move between them. If it is not, there may not be an insn
2605 to do the copy, so we may need a reload. */
2606 if (GET_CODE (body) == SET
|
2561 && GET_CODE (SET_DEST (body)) == REG
| 2607 && REG_P (SET_DEST (body))
|
2562 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
| 2608 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
|
2563 && GET_CODE (SET_SRC (body)) == REG
| 2609 && REG_P (SET_SRC (body))
|
2564 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2565 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2566 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2567 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2568 return 0;
2569
2570 extract_insn (insn);
2571
2572 noperands = reload_n_operands = recog_data.n_operands;
2573 n_alternatives = recog_data.n_alternatives;
2574
2575 /* Just return "no reloads" if insn has no operands with constraints. */
2576 if (noperands == 0 || n_alternatives == 0)
2577 return 0;
2578
2579 insn_code_number = INSN_CODE (insn);
2580 this_insn_is_asm = insn_code_number < 0;
2581
2582 memcpy (operand_mode, recog_data.operand_mode,
2583 noperands * sizeof (enum machine_mode));
2584 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2585
2586 commutative = -1;
2587
2588 /* If we will need to know, later, whether some pair of operands
2589 are the same, we must compare them now and save the result.
2590 Reloading the base and index registers will clobber them
2591 and afterward they will fail to match. */
2592
2593 for (i = 0; i < noperands; i++)
2594 {
2595 char *p;
2596 int c;
2597
2598 substed_operand[i] = recog_data.operand[i];
2599 p = constraints[i];
2600
2601 modified[i] = RELOAD_READ;
2602
2603 /* Scan this operand's constraint to see if it is an output operand,
2604 an in-out operand, is commutative, or should match another. */
2605
2606 while ((c = *p))
2607 {
2608 p += CONSTRAINT_LEN (c, p);
| 2610 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2611 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2612 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2613 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2614 return 0;
2615
2616 extract_insn (insn);
2617
2618 noperands = reload_n_operands = recog_data.n_operands;
2619 n_alternatives = recog_data.n_alternatives;
2620
2621 /* Just return "no reloads" if insn has no operands with constraints. */
2622 if (noperands == 0 || n_alternatives == 0)
2623 return 0;
2624
2625 insn_code_number = INSN_CODE (insn);
2626 this_insn_is_asm = insn_code_number < 0;
2627
2628 memcpy (operand_mode, recog_data.operand_mode,
2629 noperands * sizeof (enum machine_mode));
2630 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2631
2632 commutative = -1;
2633
2634 /* If we will need to know, later, whether some pair of operands
2635 are the same, we must compare them now and save the result.
2636 Reloading the base and index registers will clobber them
2637 and afterward they will fail to match. */
2638
2639 for (i = 0; i < noperands; i++)
2640 {
2641 char *p;
2642 int c;
2643
2644 substed_operand[i] = recog_data.operand[i];
2645 p = constraints[i];
2646
2647 modified[i] = RELOAD_READ;
2648
2649 /* Scan this operand's constraint to see if it is an output operand,
2650 an in-out operand, is commutative, or should match another. */
2651
2652 while ((c = *p))
2653 {
2654 p += CONSTRAINT_LEN (c, p);
|
2609 if (c == '=')
2610 modified[i] = RELOAD_WRITE;
2611 else if (c == '+')
2612 modified[i] = RELOAD_READ_WRITE;
2613 else if (c == '%')
| 2655 switch (c)
|
2614 {
| 2656 {
|
2615 /* The last operand should not be marked commutative. */
2616 if (i == noperands - 1)
2617 abort ();
| 2657 case '=':
2658 modified[i] = RELOAD_WRITE;
2659 break;
2660 case '+':
2661 modified[i] = RELOAD_READ_WRITE;
2662 break;
2663 case '%':
2664 {
2665 /* The last operand should not be marked commutative. */
2666 gcc_assert (i != noperands - 1);
|
2618
| 2667
|
2619 /* We currently only support one commutative pair of
2620 operands. Some existing asm code currently uses more
2621 than one pair. Previously, that would usually work,
2622 but sometimes it would crash the compiler. We
2623 continue supporting that case as well as we can by
2624 silently ignoring all but the first pair. In the
2625 future we may handle it correctly. */
2626 if (commutative < 0)
2627 commutative = i;
2628 else if (!this_insn_is_asm)
2629 abort ();
2630 }
2631 else if (ISDIGIT (c))
2632 {
2633 c = strtoul (p - 1, &p, 10);
| 2668 /* We currently only support one commutative pair of
2669 operands. Some existing asm code currently uses more
2670 than one pair. Previously, that would usually work,
2671 but sometimes it would crash the compiler. We
2672 continue supporting that case as well as we can by
2673 silently ignoring all but the first pair. In the
2674 future we may handle it correctly. */
2675 if (commutative < 0)
2676 commutative = i;
2677 else
2678 gcc_assert (this_insn_is_asm);
2679 }
2680 break;
2681 /* Use of ISDIGIT is tempting here, but it may get expensive because
2682 of locale support we don't want. */
2683 case '0': case '1': case '2': case '3': case '4':
2684 case '5': case '6': case '7': case '8': case '9':
2685 {
2686 c = strtoul (p - 1, &p, 10);
|
2634
| 2687
|
2635 operands_match[c][i]
2636 = operands_match_p (recog_data.operand[c],
2637 recog_data.operand[i]);
| 2688 operands_match[c][i]
2689 = operands_match_p (recog_data.operand[c],
2690 recog_data.operand[i]);
|
2638
| 2691
|
2639 /* An operand may not match itself. */
2640 if (c == i)
2641 abort ();
| 2692 /* An operand may not match itself. */
2693 gcc_assert (c != i);
|
2642
| 2694
|
2643 /* If C can be commuted with C+1, and C might need to match I,
2644 then C+1 might also need to match I. */
2645 if (commutative >= 0)
2646 {
2647 if (c == commutative || c == commutative + 1)
2648 {
2649 int other = c + (c == commutative ? 1 : -1);
2650 operands_match[other][i]
2651 = operands_match_p (recog_data.operand[other],
2652 recog_data.operand[i]);
2653 }
2654 if (i == commutative || i == commutative + 1)
2655 {
2656 int other = i + (i == commutative ? 1 : -1);
2657 operands_match[c][other]
2658 = operands_match_p (recog_data.operand[c],
2659 recog_data.operand[other]);
2660 }
2661 /* Note that C is supposed to be less than I.
2662 No need to consider altering both C and I because in
2663 that case we would alter one into the other. */
2664 }
| 2695 /* If C can be commuted with C+1, and C might need to match I,
2696 then C+1 might also need to match I. */
2697 if (commutative >= 0)
2698 {
2699 if (c == commutative || c == commutative + 1)
2700 {
2701 int other = c + (c == commutative ? 1 : -1);
2702 operands_match[other][i]
2703 = operands_match_p (recog_data.operand[other],
2704 recog_data.operand[i]);
2705 }
2706 if (i == commutative || i == commutative + 1)
2707 {
2708 int other = i + (i == commutative ? 1 : -1);
2709 operands_match[c][other]
2710 = operands_match_p (recog_data.operand[c],
2711 recog_data.operand[other]);
2712 }
2713 /* Note that C is supposed to be less than I.
2714 No need to consider altering both C and I because in
2715 that case we would alter one into the other. */
2716 }
2717 }
|
2665 }
2666 }
2667 }
2668
2669 /* Examine each operand that is a memory reference or memory address
2670 and reload parts of the addresses into index registers.
2671 Also here any references to pseudo regs that didn't get hard regs
2672 but are equivalent to constants get replaced in the insn itself
2673 with those constants. Nobody will ever see them again.
2674
2675 Finally, set up the preferred classes of each operand. */
2676
2677 for (i = 0; i < noperands; i++)
2678 {
2679 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2680
2681 address_reloaded[i] = 0;
2682 address_operand_reloaded[i] = 0;
2683 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2684 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2685 : RELOAD_OTHER);
2686 address_type[i]
2687 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2688 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2689 : RELOAD_OTHER);
2690
2691 if (*constraints[i] == 0)
2692 /* Ignore things like match_operator operands. */
2693 ;
2694 else if (constraints[i][0] == 'p'
2695 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2696 {
2697 address_operand_reloaded[i]
2698 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2699 recog_data.operand[i],
2700 recog_data.operand_loc[i],
2701 i, operand_type[i], ind_levels, insn);
2702
2703 /* If we now have a simple operand where we used to have a
2704 PLUS or MULT, re-recognize and try again. */
| 2718 }
2719 }
2720 }
2721
2722 /* Examine each operand that is a memory reference or memory address
2723 and reload parts of the addresses into index registers.
2724 Also here any references to pseudo regs that didn't get hard regs
2725 but are equivalent to constants get replaced in the insn itself
2726 with those constants. Nobody will ever see them again.
2727
2728 Finally, set up the preferred classes of each operand. */
2729
2730 for (i = 0; i < noperands; i++)
2731 {
2732 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2733
2734 address_reloaded[i] = 0;
2735 address_operand_reloaded[i] = 0;
2736 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2737 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2738 : RELOAD_OTHER);
2739 address_type[i]
2740 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2741 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2742 : RELOAD_OTHER);
2743
2744 if (*constraints[i] == 0)
2745 /* Ignore things like match_operator operands. */
2746 ;
2747 else if (constraints[i][0] == 'p'
2748 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2749 {
2750 address_operand_reloaded[i]
2751 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2752 recog_data.operand[i],
2753 recog_data.operand_loc[i],
2754 i, operand_type[i], ind_levels, insn);
2755
2756 /* If we now have a simple operand where we used to have a
2757 PLUS or MULT, re-recognize and try again. */
|
2705 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
| 2758 if ((OBJECT_P (*recog_data.operand_loc[i])
|
2706 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2707 && (GET_CODE (recog_data.operand[i]) == MULT
2708 || GET_CODE (recog_data.operand[i]) == PLUS))
2709 {
2710 INSN_CODE (insn) = -1;
2711 retval = find_reloads (insn, replace, ind_levels, live_known,
2712 reload_reg_p);
2713 return retval;
2714 }
2715
2716 recog_data.operand[i] = *recog_data.operand_loc[i];
2717 substed_operand[i] = recog_data.operand[i];
2718
2719 /* Address operands are reloaded in their existing mode,
2720 no matter what is specified in the machine description. */
2721 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2722 }
2723 else if (code == MEM)
2724 {
2725 address_reloaded[i]
2726 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2727 recog_data.operand_loc[i],
2728 XEXP (recog_data.operand[i], 0),
2729 &XEXP (recog_data.operand[i], 0),
2730 i, address_type[i], ind_levels, insn);
2731 recog_data.operand[i] = *recog_data.operand_loc[i];
2732 substed_operand[i] = recog_data.operand[i];
2733 }
2734 else if (code == SUBREG)
2735 {
2736 rtx reg = SUBREG_REG (recog_data.operand[i]);
2737 rtx op
2738 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2739 ind_levels,
2740 set != 0
2741 && &SET_DEST (set) == recog_data.operand_loc[i],
2742 insn,
2743 &address_reloaded[i]);
2744
2745 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2746 that didn't get a hard register, emit a USE with a REG_EQUAL
2747 note in front so that we might inherit a previous, possibly
2748 wider reload. */
2749
2750 if (replace
| 2759 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2760 && (GET_CODE (recog_data.operand[i]) == MULT
2761 || GET_CODE (recog_data.operand[i]) == PLUS))
2762 {
2763 INSN_CODE (insn) = -1;
2764 retval = find_reloads (insn, replace, ind_levels, live_known,
2765 reload_reg_p);
2766 return retval;
2767 }
2768
2769 recog_data.operand[i] = *recog_data.operand_loc[i];
2770 substed_operand[i] = recog_data.operand[i];
2771
2772 /* Address operands are reloaded in their existing mode,
2773 no matter what is specified in the machine description. */
2774 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2775 }
2776 else if (code == MEM)
2777 {
2778 address_reloaded[i]
2779 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2780 recog_data.operand_loc[i],
2781 XEXP (recog_data.operand[i], 0),
2782 &XEXP (recog_data.operand[i], 0),
2783 i, address_type[i], ind_levels, insn);
2784 recog_data.operand[i] = *recog_data.operand_loc[i];
2785 substed_operand[i] = recog_data.operand[i];
2786 }
2787 else if (code == SUBREG)
2788 {
2789 rtx reg = SUBREG_REG (recog_data.operand[i]);
2790 rtx op
2791 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2792 ind_levels,
2793 set != 0
2794 && &SET_DEST (set) == recog_data.operand_loc[i],
2795 insn,
2796 &address_reloaded[i]);
2797
2798 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2799 that didn't get a hard register, emit a USE with a REG_EQUAL
2800 note in front so that we might inherit a previous, possibly
2801 wider reload. */
2802
2803 if (replace
|
2751 && GET_CODE (op) == MEM
2752 && GET_CODE (reg) == REG
| 2804 && MEM_P (op)
2805 && REG_P (reg)
|
2753 && (GET_MODE_SIZE (GET_MODE (reg))
2754 >= GET_MODE_SIZE (GET_MODE (op))))
2755 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2756 insn),
2757 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2758
2759 substed_operand[i] = recog_data.operand[i] = op;
2760 }
| 2806 && (GET_MODE_SIZE (GET_MODE (reg))
2807 >= GET_MODE_SIZE (GET_MODE (op))))
2808 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2809 insn),
2810 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2811
2812 substed_operand[i] = recog_data.operand[i] = op;
2813 }
|
2761 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
| 2814 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
|
2762 /* We can get a PLUS as an "operand" as a result of register
2763 elimination. See eliminate_regs and gen_reload. We handle
2764 a unary operator by reloading the operand. */
2765 substed_operand[i] = recog_data.operand[i]
2766 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2767 ind_levels, 0, insn,
2768 &address_reloaded[i]);
2769 else if (code == REG)
2770 {
2771 /* This is equivalent to calling find_reloads_toplev.
2772 The code is duplicated for speed.
2773 When we find a pseudo always equivalent to a constant,
2774 we replace it by the constant. We must be sure, however,
2775 that we don't try to replace it in the insn in which it
2776 is being set. */
2777 int regno = REGNO (recog_data.operand[i]);
2778 if (reg_equiv_constant[regno] != 0
2779 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2780 {
2781 /* Record the existing mode so that the check if constants are
2782 allowed will work when operand_mode isn't specified. */
2783
2784 if (operand_mode[i] == VOIDmode)
2785 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2786
2787 substed_operand[i] = recog_data.operand[i]
2788 = reg_equiv_constant[regno];
2789 }
2790 if (reg_equiv_memory_loc[regno] != 0
2791 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2792 /* We need not give a valid is_set_dest argument since the case
2793 of a constant equivalence was checked above. */
2794 substed_operand[i] = recog_data.operand[i]
2795 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2796 ind_levels, 0, insn,
2797 &address_reloaded[i]);
2798 }
2799 /* If the operand is still a register (we didn't replace it with an
2800 equivalent), get the preferred class to reload it into. */
2801 code = GET_CODE (recog_data.operand[i]);
2802 preferred_class[i]
2803 = ((code == REG && REGNO (recog_data.operand[i])
2804 >= FIRST_PSEUDO_REGISTER)
2805 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2806 : NO_REGS);
2807 pref_or_nothing[i]
2808 = (code == REG
2809 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2810 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2811 }
2812
2813 /* If this is simply a copy from operand 1 to operand 0, merge the
2814 preferred classes for the operands. */
2815 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2816 && recog_data.operand[1] == SET_SRC (set))
2817 {
2818 preferred_class[0] = preferred_class[1]
2819 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2820 pref_or_nothing[0] |= pref_or_nothing[1];
2821 pref_or_nothing[1] |= pref_or_nothing[0];
2822 }
2823
2824 /* Now see what we need for pseudo-regs that didn't get hard regs
2825 or got the wrong kind of hard reg. For this, we must consider
2826 all the operands together against the register constraints. */
2827
2828 best = MAX_RECOG_OPERANDS * 2 + 600;
2829
2830 swapped = 0;
2831 goal_alternative_swapped = 0;
2832 try_swapped:
2833
2834 /* The constraints are made of several alternatives.
2835 Each operand's constraint looks like foo,bar,... with commas
2836 separating the alternatives. The first alternatives for all
2837 operands go together, the second alternatives go together, etc.
2838
2839 First loop over alternatives. */
2840
2841 for (this_alternative_number = 0;
2842 this_alternative_number < n_alternatives;
2843 this_alternative_number++)
2844 {
2845 /* Loop over operands for one constraint alternative. */
2846 /* LOSERS counts those that don't fit this alternative
2847 and would require loading. */
2848 int losers = 0;
2849 /* BAD is set to 1 if it some operand can't fit this alternative
2850 even after reloading. */
2851 int bad = 0;
2852 /* REJECT is a count of how undesirable this alternative says it is
2853 if any reloading is required. If the alternative matches exactly
2854 then REJECT is ignored, but otherwise it gets this much
2855 counted against it in addition to the reloading needed. Each
2856 ? counts three times here since we want the disparaging caused by
2857 a bad register class to only count 1/3 as much. */
2858 int reject = 0;
2859
2860 this_earlyclobber = 0;
2861
2862 for (i = 0; i < noperands; i++)
2863 {
2864 char *p = constraints[i];
2865 char *end;
2866 int len;
2867 int win = 0;
2868 int did_match = 0;
2869 /* 0 => this operand can be reloaded somehow for this alternative. */
2870 int badop = 1;
2871 /* 0 => this operand can be reloaded if the alternative allows regs. */
2872 int winreg = 0;
2873 int c;
2874 int m;
2875 rtx operand = recog_data.operand[i];
2876 int offset = 0;
2877 /* Nonzero means this is a MEM that must be reloaded into a reg
2878 regardless of what the constraint says. */
2879 int force_reload = 0;
2880 int offmemok = 0;
2881 /* Nonzero if a constant forced into memory would be OK for this
2882 operand. */
2883 int constmemok = 0;
2884 int earlyclobber = 0;
2885
2886 /* If the predicate accepts a unary operator, it means that
2887 we need to reload the operand, but do not do this for
2888 match_operator and friends. */
| 2815 /* We can get a PLUS as an "operand" as a result of register
2816 elimination. See eliminate_regs and gen_reload. We handle
2817 a unary operator by reloading the operand. */
2818 substed_operand[i] = recog_data.operand[i]
2819 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2820 ind_levels, 0, insn,
2821 &address_reloaded[i]);
2822 else if (code == REG)
2823 {
2824 /* This is equivalent to calling find_reloads_toplev.
2825 The code is duplicated for speed.
2826 When we find a pseudo always equivalent to a constant,
2827 we replace it by the constant. We must be sure, however,
2828 that we don't try to replace it in the insn in which it
2829 is being set. */
2830 int regno = REGNO (recog_data.operand[i]);
2831 if (reg_equiv_constant[regno] != 0
2832 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2833 {
2834 /* Record the existing mode so that the check if constants are
2835 allowed will work when operand_mode isn't specified. */
2836
2837 if (operand_mode[i] == VOIDmode)
2838 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2839
2840 substed_operand[i] = recog_data.operand[i]
2841 = reg_equiv_constant[regno];
2842 }
2843 if (reg_equiv_memory_loc[regno] != 0
2844 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2845 /* We need not give a valid is_set_dest argument since the case
2846 of a constant equivalence was checked above. */
2847 substed_operand[i] = recog_data.operand[i]
2848 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2849 ind_levels, 0, insn,
2850 &address_reloaded[i]);
2851 }
2852 /* If the operand is still a register (we didn't replace it with an
2853 equivalent), get the preferred class to reload it into. */
2854 code = GET_CODE (recog_data.operand[i]);
2855 preferred_class[i]
2856 = ((code == REG && REGNO (recog_data.operand[i])
2857 >= FIRST_PSEUDO_REGISTER)
2858 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2859 : NO_REGS);
2860 pref_or_nothing[i]
2861 = (code == REG
2862 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2863 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2864 }
2865
2866 /* If this is simply a copy from operand 1 to operand 0, merge the
2867 preferred classes for the operands. */
2868 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2869 && recog_data.operand[1] == SET_SRC (set))
2870 {
2871 preferred_class[0] = preferred_class[1]
2872 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2873 pref_or_nothing[0] |= pref_or_nothing[1];
2874 pref_or_nothing[1] |= pref_or_nothing[0];
2875 }
2876
2877 /* Now see what we need for pseudo-regs that didn't get hard regs
2878 or got the wrong kind of hard reg. For this, we must consider
2879 all the operands together against the register constraints. */
2880
2881 best = MAX_RECOG_OPERANDS * 2 + 600;
2882
2883 swapped = 0;
2884 goal_alternative_swapped = 0;
2885 try_swapped:
2886
2887 /* The constraints are made of several alternatives.
2888 Each operand's constraint looks like foo,bar,... with commas
2889 separating the alternatives. The first alternatives for all
2890 operands go together, the second alternatives go together, etc.
2891
2892 First loop over alternatives. */
2893
2894 for (this_alternative_number = 0;
2895 this_alternative_number < n_alternatives;
2896 this_alternative_number++)
2897 {
2898 /* Loop over operands for one constraint alternative. */
2899 /* LOSERS counts those that don't fit this alternative
2900 and would require loading. */
2901 int losers = 0;
2902 /* BAD is set to 1 if it some operand can't fit this alternative
2903 even after reloading. */
2904 int bad = 0;
2905 /* REJECT is a count of how undesirable this alternative says it is
2906 if any reloading is required. If the alternative matches exactly
2907 then REJECT is ignored, but otherwise it gets this much
2908 counted against it in addition to the reloading needed. Each
2909 ? counts three times here since we want the disparaging caused by
2910 a bad register class to only count 1/3 as much. */
2911 int reject = 0;
2912
2913 this_earlyclobber = 0;
2914
2915 for (i = 0; i < noperands; i++)
2916 {
2917 char *p = constraints[i];
2918 char *end;
2919 int len;
2920 int win = 0;
2921 int did_match = 0;
2922 /* 0 => this operand can be reloaded somehow for this alternative. */
2923 int badop = 1;
2924 /* 0 => this operand can be reloaded if the alternative allows regs. */
2925 int winreg = 0;
2926 int c;
2927 int m;
2928 rtx operand = recog_data.operand[i];
2929 int offset = 0;
2930 /* Nonzero means this is a MEM that must be reloaded into a reg
2931 regardless of what the constraint says. */
2932 int force_reload = 0;
2933 int offmemok = 0;
2934 /* Nonzero if a constant forced into memory would be OK for this
2935 operand. */
2936 int constmemok = 0;
2937 int earlyclobber = 0;
2938
2939 /* If the predicate accepts a unary operator, it means that
2940 we need to reload the operand, but do not do this for
2941 match_operator and friends. */
|
2889 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
| 2942 if (UNARY_P (operand) && *p != 0)
|
2890 operand = XEXP (operand, 0);
2891
2892 /* If the operand is a SUBREG, extract
2893 the REG or MEM (or maybe even a constant) within.
2894 (Constants can occur as a result of reg_equiv_constant.) */
2895
2896 while (GET_CODE (operand) == SUBREG)
2897 {
2898 /* Offset only matters when operand is a REG and
2899 it is a hard reg. This is because it is passed
2900 to reg_fits_class_p if it is a REG and all pseudos
2901 return 0 from that function. */
| 2943 operand = XEXP (operand, 0);
2944
2945 /* If the operand is a SUBREG, extract
2946 the REG or MEM (or maybe even a constant) within.
2947 (Constants can occur as a result of reg_equiv_constant.) */
2948
2949 while (GET_CODE (operand) == SUBREG)
2950 {
2951 /* Offset only matters when operand is a REG and
2952 it is a hard reg. This is because it is passed
2953 to reg_fits_class_p if it is a REG and all pseudos
2954 return 0 from that function. */
|
2902 if (GET_CODE (SUBREG_REG (operand)) == REG
| 2955 if (REG_P (SUBREG_REG (operand))
|
2903 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2904 {
2905 if (!subreg_offset_representable_p
2906 (REGNO (SUBREG_REG (operand)),
2907 GET_MODE (SUBREG_REG (operand)),
2908 SUBREG_BYTE (operand),
2909 GET_MODE (operand)))
2910 force_reload = 1;
2911 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2912 GET_MODE (SUBREG_REG (operand)),
2913 SUBREG_BYTE (operand),
2914 GET_MODE (operand));
2915 }
2916 operand = SUBREG_REG (operand);
2917 /* Force reload if this is a constant or PLUS or if there may
2918 be a problem accessing OPERAND in the outer mode. */
2919 if (CONSTANT_P (operand)
2920 || GET_CODE (operand) == PLUS
2921 /* We must force a reload of paradoxical SUBREGs
2922 of a MEM because the alignment of the inner value
2923 may not be enough to do the outer reference. On
2924 big-endian machines, it may also reference outside
2925 the object.
2926
2927 On machines that extend byte operations and we have a
2928 SUBREG where both the inner and outer modes are no wider
2929 than a word and the inner mode is narrower, is integral,
2930 and gets extended when loaded from memory, combine.c has
2931 made assumptions about the behavior of the machine in such
2932 register access. If the data is, in fact, in memory we
2933 must always load using the size assumed to be in the
2934 register and let the insn do the different-sized
2935 accesses.
2936
2937 This is doubly true if WORD_REGISTER_OPERATIONS. In
2938 this case eliminate_regs has left non-paradoxical
2939 subregs for push_reload to see. Make sure it does
2940 by forcing the reload.
2941
2942 ??? When is it right at this stage to have a subreg
2943 of a mem that is _not_ to be handled specially? IMO
2944 those should have been reduced to just a mem. */
| 2956 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2957 {
2958 if (!subreg_offset_representable_p
2959 (REGNO (SUBREG_REG (operand)),
2960 GET_MODE (SUBREG_REG (operand)),
2961 SUBREG_BYTE (operand),
2962 GET_MODE (operand)))
2963 force_reload = 1;
2964 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2965 GET_MODE (SUBREG_REG (operand)),
2966 SUBREG_BYTE (operand),
2967 GET_MODE (operand));
2968 }
2969 operand = SUBREG_REG (operand);
2970 /* Force reload if this is a constant or PLUS or if there may
2971 be a problem accessing OPERAND in the outer mode. */
2972 if (CONSTANT_P (operand)
2973 || GET_CODE (operand) == PLUS
2974 /* We must force a reload of paradoxical SUBREGs
2975 of a MEM because the alignment of the inner value
2976 may not be enough to do the outer reference. On
2977 big-endian machines, it may also reference outside
2978 the object.
2979
2980 On machines that extend byte operations and we have a
2981 SUBREG where both the inner and outer modes are no wider
2982 than a word and the inner mode is narrower, is integral,
2983 and gets extended when loaded from memory, combine.c has
2984 made assumptions about the behavior of the machine in such
2985 register access. If the data is, in fact, in memory we
2986 must always load using the size assumed to be in the
2987 register and let the insn do the different-sized
2988 accesses.
2989
2990 This is doubly true if WORD_REGISTER_OPERATIONS. In
2991 this case eliminate_regs has left non-paradoxical
2992 subregs for push_reload to see. Make sure it does
2993 by forcing the reload.
2994
2995 ??? When is it right at this stage to have a subreg
2996 of a mem that is _not_ to be handled specially? IMO
2997 those should have been reduced to just a mem. */
|
2945 || ((GET_CODE (operand) == MEM
2946 || (GET_CODE (operand)== REG
| 2998 || ((MEM_P (operand)
2999 || (REG_P (operand)
|
2947 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2948#ifndef WORD_REGISTER_OPERATIONS
2949 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2950 < BIGGEST_ALIGNMENT)
2951 && (GET_MODE_SIZE (operand_mode[i])
2952 > GET_MODE_SIZE (GET_MODE (operand))))
2953 || BYTES_BIG_ENDIAN
2954#ifdef LOAD_EXTEND_OP
2955 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2956 && (GET_MODE_SIZE (GET_MODE (operand))
2957 <= UNITS_PER_WORD)
2958 && (GET_MODE_SIZE (operand_mode[i])
2959 > GET_MODE_SIZE (GET_MODE (operand)))
2960 && INTEGRAL_MODE_P (GET_MODE (operand))
| 3000 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3001#ifndef WORD_REGISTER_OPERATIONS
3002 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3003 < BIGGEST_ALIGNMENT)
3004 && (GET_MODE_SIZE (operand_mode[i])
3005 > GET_MODE_SIZE (GET_MODE (operand))))
3006 || BYTES_BIG_ENDIAN
3007#ifdef LOAD_EXTEND_OP
3008 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3009 && (GET_MODE_SIZE (GET_MODE (operand))
3010 <= UNITS_PER_WORD)
3011 && (GET_MODE_SIZE (operand_mode[i])
3012 > GET_MODE_SIZE (GET_MODE (operand)))
3013 && INTEGRAL_MODE_P (GET_MODE (operand))
|
2961 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
| 3014 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
|
2962#endif
2963 )
2964#endif
2965 )
2966 )
2967 force_reload = 1;
2968 }
2969
2970 this_alternative[i] = (int) NO_REGS;
2971 this_alternative_win[i] = 0;
2972 this_alternative_match_win[i] = 0;
2973 this_alternative_offmemok[i] = 0;
2974 this_alternative_earlyclobber[i] = 0;
2975 this_alternative_matches[i] = -1;
2976
2977 /* An empty constraint or empty alternative
2978 allows anything which matched the pattern. */
2979 if (*p == 0 || *p == ',')
2980 win = 1, badop = 0;
2981
2982 /* Scan this alternative's specs for this operand;
2983 set WIN if the operand fits any letter in this alternative.
2984 Otherwise, clear BADOP if this operand could
2985 fit some letter after reloads,
2986 or set WINREG if this operand could fit after reloads
2987 provided the constraint allows some registers. */
2988
2989 do
2990 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
2991 {
2992 case '\0':
2993 len = 0;
2994 break;
2995 case ',':
2996 c = '\0';
2997 break;
2998
2999 case '=': case '+': case '*':
3000 break;
3001
3002 case '%':
3003 /* We only support one commutative marker, the first
3004 one. We already set commutative above. */
3005 break;
3006
3007 case '?':
3008 reject += 6;
3009 break;
3010
3011 case '!':
3012 reject = 600;
3013 break;
3014
3015 case '#':
3016 /* Ignore rest of this alternative as far as
3017 reloading is concerned. */
3018 do
3019 p++;
3020 while (*p && *p != ',');
3021 len = 0;
3022 break;
3023
3024 case '0': case '1': case '2': case '3': case '4':
3025 case '5': case '6': case '7': case '8': case '9':
3026 m = strtoul (p, &end, 10);
3027 p = end;
3028 len = 0;
3029
3030 this_alternative_matches[i] = m;
3031 /* We are supposed to match a previous operand.
3032 If we do, we win if that one did.
3033 If we do not, count both of the operands as losers.
3034 (This is too conservative, since most of the time
3035 only a single reload insn will be needed to make
3036 the two operands win. As a result, this alternative
3037 may be rejected when it is actually desirable.) */
3038 if ((swapped && (m != commutative || i != commutative + 1))
3039 /* If we are matching as if two operands were swapped,
3040 also pretend that operands_match had been computed
3041 with swapped.
3042 But if I is the second of those and C is the first,
3043 don't exchange them, because operands_match is valid
3044 only on one side of its diagonal. */
3045 ? (operands_match
3046 [(m == commutative || m == commutative + 1)
3047 ? 2 * commutative + 1 - m : m]
3048 [(i == commutative || i == commutative + 1)
3049 ? 2 * commutative + 1 - i : i])
3050 : operands_match[m][i])
3051 {
3052 /* If we are matching a non-offsettable address where an
3053 offsettable address was expected, then we must reject
3054 this combination, because we can't reload it. */
3055 if (this_alternative_offmemok[m]
| 3015#endif
3016 )
3017#endif
3018 )
3019 )
3020 force_reload = 1;
3021 }
3022
3023 this_alternative[i] = (int) NO_REGS;
3024 this_alternative_win[i] = 0;
3025 this_alternative_match_win[i] = 0;
3026 this_alternative_offmemok[i] = 0;
3027 this_alternative_earlyclobber[i] = 0;
3028 this_alternative_matches[i] = -1;
3029
3030 /* An empty constraint or empty alternative
3031 allows anything which matched the pattern. */
3032 if (*p == 0 || *p == ',')
3033 win = 1, badop = 0;
3034
3035 /* Scan this alternative's specs for this operand;
3036 set WIN if the operand fits any letter in this alternative.
3037 Otherwise, clear BADOP if this operand could
3038 fit some letter after reloads,
3039 or set WINREG if this operand could fit after reloads
3040 provided the constraint allows some registers. */
3041
3042 do
3043 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3044 {
3045 case '\0':
3046 len = 0;
3047 break;
3048 case ',':
3049 c = '\0';
3050 break;
3051
3052 case '=': case '+': case '*':
3053 break;
3054
3055 case '%':
3056 /* We only support one commutative marker, the first
3057 one. We already set commutative above. */
3058 break;
3059
3060 case '?':
3061 reject += 6;
3062 break;
3063
3064 case '!':
3065 reject = 600;
3066 break;
3067
3068 case '#':
3069 /* Ignore rest of this alternative as far as
3070 reloading is concerned. */
3071 do
3072 p++;
3073 while (*p && *p != ',');
3074 len = 0;
3075 break;
3076
3077 case '0': case '1': case '2': case '3': case '4':
3078 case '5': case '6': case '7': case '8': case '9':
3079 m = strtoul (p, &end, 10);
3080 p = end;
3081 len = 0;
3082
3083 this_alternative_matches[i] = m;
3084 /* We are supposed to match a previous operand.
3085 If we do, we win if that one did.
3086 If we do not, count both of the operands as losers.
3087 (This is too conservative, since most of the time
3088 only a single reload insn will be needed to make
3089 the two operands win. As a result, this alternative
3090 may be rejected when it is actually desirable.) */
3091 if ((swapped && (m != commutative || i != commutative + 1))
3092 /* If we are matching as if two operands were swapped,
3093 also pretend that operands_match had been computed
3094 with swapped.
3095 But if I is the second of those and C is the first,
3096 don't exchange them, because operands_match is valid
3097 only on one side of its diagonal. */
3098 ? (operands_match
3099 [(m == commutative || m == commutative + 1)
3100 ? 2 * commutative + 1 - m : m]
3101 [(i == commutative || i == commutative + 1)
3102 ? 2 * commutative + 1 - i : i])
3103 : operands_match[m][i])
3104 {
3105 /* If we are matching a non-offsettable address where an
3106 offsettable address was expected, then we must reject
3107 this combination, because we can't reload it. */
3108 if (this_alternative_offmemok[m]
|
3056 && GET_CODE (recog_data.operand[m]) == MEM
| 3109 && MEM_P (recog_data.operand[m])
|
3057 && this_alternative[m] == (int) NO_REGS
3058 && ! this_alternative_win[m])
3059 bad = 1;
3060
3061 did_match = this_alternative_win[m];
3062 }
3063 else
3064 {
3065 /* Operands don't match. */
3066 rtx value;
3067 int loc1, loc2;
3068 /* Retroactively mark the operand we had to match
3069 as a loser, if it wasn't already. */
3070 if (this_alternative_win[m])
3071 losers++;
3072 this_alternative_win[m] = 0;
3073 if (this_alternative[m] == (int) NO_REGS)
3074 bad = 1;
3075 /* But count the pair only once in the total badness of
3076 this alternative, if the pair can be a dummy reload.
3077 The pointers in operand_loc are not swapped; swap
3078 them by hand if necessary. */
3079 if (swapped && i == commutative)
3080 loc1 = commutative + 1;
3081 else if (swapped && i == commutative + 1)
3082 loc1 = commutative;
3083 else
3084 loc1 = i;
3085 if (swapped && m == commutative)
3086 loc2 = commutative + 1;
3087 else if (swapped && m == commutative + 1)
3088 loc2 = commutative;
3089 else
3090 loc2 = m;
3091 value
3092 = find_dummy_reload (recog_data.operand[i],
3093 recog_data.operand[m],
3094 recog_data.operand_loc[loc1],
3095 recog_data.operand_loc[loc2],
3096 operand_mode[i], operand_mode[m],
3097 this_alternative[m], -1,
3098 this_alternative_earlyclobber[m]);
3099
3100 if (value != 0)
3101 losers--;
3102 }
3103 /* This can be fixed with reloads if the operand
3104 we are supposed to match can be fixed with reloads. */
3105 badop = 0;
3106 this_alternative[i] = this_alternative[m];
3107
3108 /* If we have to reload this operand and some previous
3109 operand also had to match the same thing as this
3110 operand, we don't know how to do that. So reject this
3111 alternative. */
3112 if (! did_match || force_reload)
3113 for (j = 0; j < i; j++)
3114 if (this_alternative_matches[j]
3115 == this_alternative_matches[i])
3116 badop = 1;
3117 break;
3118
3119 case 'p':
3120 /* All necessary reloads for an address_operand
3121 were handled in find_reloads_address. */
| 3110 && this_alternative[m] == (int) NO_REGS
3111 && ! this_alternative_win[m])
3112 bad = 1;
3113
3114 did_match = this_alternative_win[m];
3115 }
3116 else
3117 {
3118 /* Operands don't match. */
3119 rtx value;
3120 int loc1, loc2;
3121 /* Retroactively mark the operand we had to match
3122 as a loser, if it wasn't already. */
3123 if (this_alternative_win[m])
3124 losers++;
3125 this_alternative_win[m] = 0;
3126 if (this_alternative[m] == (int) NO_REGS)
3127 bad = 1;
3128 /* But count the pair only once in the total badness of
3129 this alternative, if the pair can be a dummy reload.
3130 The pointers in operand_loc are not swapped; swap
3131 them by hand if necessary. */
3132 if (swapped && i == commutative)
3133 loc1 = commutative + 1;
3134 else if (swapped && i == commutative + 1)
3135 loc1 = commutative;
3136 else
3137 loc1 = i;
3138 if (swapped && m == commutative)
3139 loc2 = commutative + 1;
3140 else if (swapped && m == commutative + 1)
3141 loc2 = commutative;
3142 else
3143 loc2 = m;
3144 value
3145 = find_dummy_reload (recog_data.operand[i],
3146 recog_data.operand[m],
3147 recog_data.operand_loc[loc1],
3148 recog_data.operand_loc[loc2],
3149 operand_mode[i], operand_mode[m],
3150 this_alternative[m], -1,
3151 this_alternative_earlyclobber[m]);
3152
3153 if (value != 0)
3154 losers--;
3155 }
3156 /* This can be fixed with reloads if the operand
3157 we are supposed to match can be fixed with reloads. */
3158 badop = 0;
3159 this_alternative[i] = this_alternative[m];
3160
3161 /* If we have to reload this operand and some previous
3162 operand also had to match the same thing as this
3163 operand, we don't know how to do that. So reject this
3164 alternative. */
3165 if (! did_match || force_reload)
3166 for (j = 0; j < i; j++)
3167 if (this_alternative_matches[j]
3168 == this_alternative_matches[i])
3169 badop = 1;
3170 break;
3171
3172 case 'p':
3173 /* All necessary reloads for an address_operand
3174 were handled in find_reloads_address. */
|
3122 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
| 3175 this_alternative[i]
3176 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
|
3123 win = 1;
3124 badop = 0;
3125 break;
3126
3127 case 'm':
3128 if (force_reload)
3129 break;
| 3177 win = 1;
3178 badop = 0;
3179 break;
3180
3181 case 'm':
3182 if (force_reload)
3183 break;
|
3130 if (GET_CODE (operand) == MEM
3131 || (GET_CODE (operand) == REG
| 3184 if (MEM_P (operand)
3185 || (REG_P (operand)
|
3132 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3133 && reg_renumber[REGNO (operand)] < 0))
3134 win = 1;
| 3186 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3187 && reg_renumber[REGNO (operand)] < 0))
3188 win = 1;
|
3135 if (CONSTANT_P (operand)
3136 /* force_const_mem does not accept HIGH. */
3137 && GET_CODE (operand) != HIGH)
| 3189 if (CONST_POOL_OK_P (operand))
|
3138 badop = 0;
3139 constmemok = 1;
3140 break;
3141
3142 case '<':
| 3190 badop = 0;
3191 constmemok = 1;
3192 break;
3193
3194 case '<':
|
3143 if (GET_CODE (operand) == MEM
| 3195 if (MEM_P (operand)
|
3144 && ! address_reloaded[i]
3145 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3146 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3147 win = 1;
3148 break;
3149
3150 case '>':
| 3196 && ! address_reloaded[i]
3197 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3198 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3199 win = 1;
3200 break;
3201
3202 case '>':
|
3151 if (GET_CODE (operand) == MEM
| 3203 if (MEM_P (operand)
|
3152 && ! address_reloaded[i]
3153 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3154 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3155 win = 1;
3156 break;
3157
3158 /* Memory operand whose address is not offsettable. */
3159 case 'V':
3160 if (force_reload)
3161 break;
| 3204 && ! address_reloaded[i]
3205 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3206 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3207 win = 1;
3208 break;
3209
3210 /* Memory operand whose address is not offsettable. */
3211 case 'V':
3212 if (force_reload)
3213 break;
|
3162 if (GET_CODE (operand) == MEM
| 3214 if (MEM_P (operand)
|
3163 && ! (ind_levels ? offsettable_memref_p (operand)
3164 : offsettable_nonstrict_memref_p (operand))
3165 /* Certain mem addresses will become offsettable
3166 after they themselves are reloaded. This is important;
3167 we don't want our own handling of unoffsettables
3168 to override the handling of reg_equiv_address. */
| 3215 && ! (ind_levels ? offsettable_memref_p (operand)
3216 : offsettable_nonstrict_memref_p (operand))
3217 /* Certain mem addresses will become offsettable
3218 after they themselves are reloaded. This is important;
3219 we don't want our own handling of unoffsettables
3220 to override the handling of reg_equiv_address. */
|
3169 && !(GET_CODE (XEXP (operand, 0)) == REG
| 3221 && !(REG_P (XEXP (operand, 0))
|
3170 && (ind_levels == 0
3171 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3172 win = 1;
3173 break;
3174
3175 /* Memory operand whose address is offsettable. */
3176 case 'o':
3177 if (force_reload)
3178 break;
| 3222 && (ind_levels == 0
3223 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3224 win = 1;
3225 break;
3226
3227 /* Memory operand whose address is offsettable. */
3228 case 'o':
3229 if (force_reload)
3230 break;
|
3179 if ((GET_CODE (operand) == MEM
| 3231 if ((MEM_P (operand)
|
3180 /* If IND_LEVELS, find_reloads_address won't reload a
3181 pseudo that didn't get a hard reg, so we have to
3182 reject that case. */
3183 && ((ind_levels ? offsettable_memref_p (operand)
3184 : offsettable_nonstrict_memref_p (operand))
3185 /* A reloaded address is offsettable because it is now
3186 just a simple register indirect. */
| 3232 /* If IND_LEVELS, find_reloads_address won't reload a
3233 pseudo that didn't get a hard reg, so we have to
3234 reject that case. */
3235 && ((ind_levels ? offsettable_memref_p (operand)
3236 : offsettable_nonstrict_memref_p (operand))
3237 /* A reloaded address is offsettable because it is now
3238 just a simple register indirect. */
|
3187 || address_reloaded[i]))
3188 || (GET_CODE (operand) == REG
| 3239 || address_reloaded[i] == 1))
3240 || (REG_P (operand)
|
3189 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3190 && reg_renumber[REGNO (operand)] < 0
3191 /* If reg_equiv_address is nonzero, we will be
3192 loading it into a register; hence it will be
3193 offsettable, but we cannot say that reg_equiv_mem
3194 is offsettable without checking. */
3195 && ((reg_equiv_mem[REGNO (operand)] != 0
3196 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3197 || (reg_equiv_address[REGNO (operand)] != 0))))
3198 win = 1;
| 3241 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3242 && reg_renumber[REGNO (operand)] < 0
3243 /* If reg_equiv_address is nonzero, we will be
3244 loading it into a register; hence it will be
3245 offsettable, but we cannot say that reg_equiv_mem
3246 is offsettable without checking. */
3247 && ((reg_equiv_mem[REGNO (operand)] != 0
3248 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3249 || (reg_equiv_address[REGNO (operand)] != 0))))
3250 win = 1;
|
3199 /* force_const_mem does not accept HIGH. */
3200 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3201 || GET_CODE (operand) == MEM)
| 3251 if (CONST_POOL_OK_P (operand)
3252 || MEM_P (operand))
|
3202 badop = 0;
3203 constmemok = 1;
3204 offmemok = 1;
3205 break;
3206
3207 case '&':
3208 /* Output operand that is stored before the need for the
3209 input operands (and their index registers) is over. */
3210 earlyclobber = 1, this_earlyclobber = 1;
3211 break;
3212
3213 case 'E':
3214 case 'F':
3215 if (GET_CODE (operand) == CONST_DOUBLE
3216 || (GET_CODE (operand) == CONST_VECTOR
3217 && (GET_MODE_CLASS (GET_MODE (operand))
3218 == MODE_VECTOR_FLOAT)))
3219 win = 1;
3220 break;
3221
3222 case 'G':
3223 case 'H':
3224 if (GET_CODE (operand) == CONST_DOUBLE
3225 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3226 win = 1;
3227 break;
3228
3229 case 's':
3230 if (GET_CODE (operand) == CONST_INT
3231 || (GET_CODE (operand) == CONST_DOUBLE
3232 && GET_MODE (operand) == VOIDmode))
3233 break;
3234 case 'i':
3235 if (CONSTANT_P (operand)
| 3253 badop = 0;
3254 constmemok = 1;
3255 offmemok = 1;
3256 break;
3257
3258 case '&':
3259 /* Output operand that is stored before the need for the
3260 input operands (and their index registers) is over. */
3261 earlyclobber = 1, this_earlyclobber = 1;
3262 break;
3263
3264 case 'E':
3265 case 'F':
3266 if (GET_CODE (operand) == CONST_DOUBLE
3267 || (GET_CODE (operand) == CONST_VECTOR
3268 && (GET_MODE_CLASS (GET_MODE (operand))
3269 == MODE_VECTOR_FLOAT)))
3270 win = 1;
3271 break;
3272
3273 case 'G':
3274 case 'H':
3275 if (GET_CODE (operand) == CONST_DOUBLE
3276 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3277 win = 1;
3278 break;
3279
3280 case 's':
3281 if (GET_CODE (operand) == CONST_INT
3282 || (GET_CODE (operand) == CONST_DOUBLE
3283 && GET_MODE (operand) == VOIDmode))
3284 break;
3285 case 'i':
3286 if (CONSTANT_P (operand)
|
3236#ifdef LEGITIMATE_PIC_OPERAND_P
3237 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3238#endif
3239 )
| 3287 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
|
3240 win = 1;
3241 break;
3242
3243 case 'n':
3244 if (GET_CODE (operand) == CONST_INT
3245 || (GET_CODE (operand) == CONST_DOUBLE
3246 && GET_MODE (operand) == VOIDmode))
3247 win = 1;
3248 break;
3249
3250 case 'I':
3251 case 'J':
3252 case 'K':
3253 case 'L':
3254 case 'M':
3255 case 'N':
3256 case 'O':
3257 case 'P':
3258 if (GET_CODE (operand) == CONST_INT
3259 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3260 win = 1;
3261 break;
3262
3263 case 'X':
| 3288 win = 1;
3289 break;
3290
3291 case 'n':
3292 if (GET_CODE (operand) == CONST_INT
3293 || (GET_CODE (operand) == CONST_DOUBLE
3294 && GET_MODE (operand) == VOIDmode))
3295 win = 1;
3296 break;
3297
3298 case 'I':
3299 case 'J':
3300 case 'K':
3301 case 'L':
3302 case 'M':
3303 case 'N':
3304 case 'O':
3305 case 'P':
3306 if (GET_CODE (operand) == CONST_INT
3307 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3308 win = 1;
3309 break;
3310
3311 case 'X':
|
| 3312 force_reload = 0;
|
3264 win = 1;
3265 break;
3266
3267 case 'g':
3268 if (! force_reload
3269 /* A PLUS is never a valid operand, but reload can make
3270 it from a register when eliminating registers. */
3271 && GET_CODE (operand) != PLUS
3272 /* A SCRATCH is not a valid operand. */
3273 && GET_CODE (operand) != SCRATCH
| 3313 win = 1;
3314 break;
3315
3316 case 'g':
3317 if (! force_reload
3318 /* A PLUS is never a valid operand, but reload can make
3319 it from a register when eliminating registers. */
3320 && GET_CODE (operand) != PLUS
3321 /* A SCRATCH is not a valid operand. */
3322 && GET_CODE (operand) != SCRATCH
|
3274#ifdef LEGITIMATE_PIC_OPERAND_P
| |
3275 && (! CONSTANT_P (operand)
3276 || ! flag_pic
3277 || LEGITIMATE_PIC_OPERAND_P (operand))
| 3323 && (! CONSTANT_P (operand)
3324 || ! flag_pic
3325 || LEGITIMATE_PIC_OPERAND_P (operand))
|
3278#endif
| |
3279 && (GENERAL_REGS == ALL_REGS
| 3326 && (GENERAL_REGS == ALL_REGS
|
3280 || GET_CODE (operand) != REG
| 3327 || !REG_P (operand)
|
3281 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3282 && reg_renumber[REGNO (operand)] < 0)))
3283 win = 1;
3284 /* Drop through into 'r' case. */
3285
3286 case 'r':
3287 this_alternative[i]
3288 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3289 goto reg;
3290
3291 default:
3292 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3293 {
3294#ifdef EXTRA_CONSTRAINT_STR
3295 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3296 {
3297 if (force_reload)
3298 break;
3299 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3300 win = 1;
3301 /* If the address was already reloaded,
3302 we win as well. */
| 3328 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3329 && reg_renumber[REGNO (operand)] < 0)))
3330 win = 1;
3331 /* Drop through into 'r' case. */
3332
3333 case 'r':
3334 this_alternative[i]
3335 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3336 goto reg;
3337
3338 default:
3339 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3340 {
3341#ifdef EXTRA_CONSTRAINT_STR
3342 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3343 {
3344 if (force_reload)
3345 break;
3346 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3347 win = 1;
3348 /* If the address was already reloaded,
3349 we win as well. */
|
3303 else if (GET_CODE (operand) == MEM
3304 && address_reloaded[i])
| 3350 else if (MEM_P (operand)
3351 && address_reloaded[i] == 1)
|
3305 win = 1;
3306 /* Likewise if the address will be reloaded because
3307 reg_equiv_address is nonzero. For reg_equiv_mem
3308 we have to check. */
| 3352 win = 1;
3353 /* Likewise if the address will be reloaded because
3354 reg_equiv_address is nonzero. For reg_equiv_mem
3355 we have to check. */
|
3309 else if (GET_CODE (operand) == REG
| 3356 else if (REG_P (operand)
|
3310 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3311 && reg_renumber[REGNO (operand)] < 0
3312 && ((reg_equiv_mem[REGNO (operand)] != 0
3313 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3314 || (reg_equiv_address[REGNO (operand)] != 0)))
3315 win = 1;
3316
3317 /* If we didn't already win, we can reload
3318 constants via force_const_mem, and other
3319 MEMs by reloading the address like for 'o'. */
| 3357 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3358 && reg_renumber[REGNO (operand)] < 0
3359 && ((reg_equiv_mem[REGNO (operand)] != 0
3360 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3361 || (reg_equiv_address[REGNO (operand)] != 0)))
3362 win = 1;
3363
3364 /* If we didn't already win, we can reload
3365 constants via force_const_mem, and other
3366 MEMs by reloading the address like for 'o'. */
|
3320 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3321 || GET_CODE (operand) == MEM)
| 3367 if (CONST_POOL_OK_P (operand)
3368 || MEM_P (operand))
|
3322 badop = 0;
3323 constmemok = 1;
3324 offmemok = 1;
3325 break;
3326 }
3327 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3328 {
3329 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3330 win = 1;
3331
3332 /* If we didn't already win, we can reload
3333 the address into a base register. */
| 3369 badop = 0;
3370 constmemok = 1;
3371 offmemok = 1;
3372 break;
3373 }
3374 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3375 {
3376 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3377 win = 1;
3378
3379 /* If we didn't already win, we can reload
3380 the address into a base register. */
|
3334 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
| 3381 this_alternative[i]
3382 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
|
3335 badop = 0;
3336 break;
3337 }
3338
3339 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3340 win = 1;
3341#endif
3342 break;
3343 }
3344
3345 this_alternative[i]
3346 = (int) (reg_class_subunion
3347 [this_alternative[i]]
3348 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3349 reg:
3350 if (GET_MODE (operand) == BLKmode)
3351 break;
3352 winreg = 1;
| 3383 badop = 0;
3384 break;
3385 }
3386
3387 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3388 win = 1;
3389#endif
3390 break;
3391 }
3392
3393 this_alternative[i]
3394 = (int) (reg_class_subunion
3395 [this_alternative[i]]
3396 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3397 reg:
3398 if (GET_MODE (operand) == BLKmode)
3399 break;
3400 winreg = 1;
|
3353 if (GET_CODE (operand) == REG
| 3401 if (REG_P (operand)
|
3354 && reg_fits_class_p (operand, this_alternative[i],
3355 offset, GET_MODE (recog_data.operand[i])))
3356 win = 1;
3357 break;
3358 }
3359 while ((p += len), c);
3360
3361 constraints[i] = p;
3362
3363 /* If this operand could be handled with a reg,
3364 and some reg is allowed, then this operand can be handled. */
3365 if (winreg && this_alternative[i] != (int) NO_REGS)
3366 badop = 0;
3367
3368 /* Record which operands fit this alternative. */
3369 this_alternative_earlyclobber[i] = earlyclobber;
3370 if (win && ! force_reload)
3371 this_alternative_win[i] = 1;
3372 else if (did_match && ! force_reload)
3373 this_alternative_match_win[i] = 1;
3374 else
3375 {
3376 int const_to_mem = 0;
3377
3378 this_alternative_offmemok[i] = offmemok;
3379 losers++;
3380 if (badop)
3381 bad = 1;
3382 /* Alternative loses if it has no regs for a reg operand. */
| 3402 && reg_fits_class_p (operand, this_alternative[i],
3403 offset, GET_MODE (recog_data.operand[i])))
3404 win = 1;
3405 break;
3406 }
3407 while ((p += len), c);
3408
3409 constraints[i] = p;
3410
3411 /* If this operand could be handled with a reg,
3412 and some reg is allowed, then this operand can be handled. */
3413 if (winreg && this_alternative[i] != (int) NO_REGS)
3414 badop = 0;
3415
3416 /* Record which operands fit this alternative. */
3417 this_alternative_earlyclobber[i] = earlyclobber;
3418 if (win && ! force_reload)
3419 this_alternative_win[i] = 1;
3420 else if (did_match && ! force_reload)
3421 this_alternative_match_win[i] = 1;
3422 else
3423 {
3424 int const_to_mem = 0;
3425
3426 this_alternative_offmemok[i] = offmemok;
3427 losers++;
3428 if (badop)
3429 bad = 1;
3430 /* Alternative loses if it has no regs for a reg operand. */
|
3383 if (GET_CODE (operand) == REG
| 3431 if (REG_P (operand)
|
3384 && this_alternative[i] == (int) NO_REGS
3385 && this_alternative_matches[i] < 0)
3386 bad = 1;
3387
3388 /* If this is a constant that is reloaded into the desired
3389 class by copying it to memory first, count that as another
3390 reload. This is consistent with other code and is
3391 required to avoid choosing another alternative when
3392 the constant is moved into memory by this function on
3393 an early reload pass. Note that the test here is
3394 precisely the same as in the code below that calls
3395 force_const_mem. */
| 3432 && this_alternative[i] == (int) NO_REGS
3433 && this_alternative_matches[i] < 0)
3434 bad = 1;
3435
3436 /* If this is a constant that is reloaded into the desired
3437 class by copying it to memory first, count that as another
3438 reload. This is consistent with other code and is
3439 required to avoid choosing another alternative when
3440 the constant is moved into memory by this function on
3441 an early reload pass. Note that the test here is
3442 precisely the same as in the code below that calls
3443 force_const_mem. */
|
3396 if (CONSTANT_P (operand)
3397 /* force_const_mem does not accept HIGH. */
3398 && GET_CODE (operand) != HIGH
| 3444 if (CONST_POOL_OK_P (operand)
|
3399 && ((PREFERRED_RELOAD_CLASS (operand,
3400 (enum reg_class) this_alternative[i])
3401 == NO_REGS)
3402 || no_input_reloads)
3403 && operand_mode[i] != VOIDmode)
3404 {
3405 const_to_mem = 1;
3406 if (this_alternative[i] != (int) NO_REGS)
3407 losers++;
3408 }
3409
| 3445 && ((PREFERRED_RELOAD_CLASS (operand,
3446 (enum reg_class) this_alternative[i])
3447 == NO_REGS)
3448 || no_input_reloads)
3449 && operand_mode[i] != VOIDmode)
3450 {
3451 const_to_mem = 1;
3452 if (this_alternative[i] != (int) NO_REGS)
3453 losers++;
3454 }
3455
|
3410 /* If we can't reload this value at all, reject this
3411 alternative. Note that we could also lose due to
3412 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3413 here. */
3414
3415 if (! CONSTANT_P (operand)
3416 && (enum reg_class) this_alternative[i] != NO_REGS
3417 && (PREFERRED_RELOAD_CLASS (operand,
3418 (enum reg_class) this_alternative[i])
3419 == NO_REGS))
3420 bad = 1;
3421
| |
3422 /* Alternative loses if it requires a type of reload not
3423 permitted for this insn. We can always reload SCRATCH
3424 and objects with a REG_UNUSED note. */
| 3456 /* Alternative loses if it requires a type of reload not
3457 permitted for this insn. We can always reload SCRATCH
3458 and objects with a REG_UNUSED note. */
|
3425 else if (GET_CODE (operand) != SCRATCH
| 3459 if (GET_CODE (operand) != SCRATCH
|
3426 && modified[i] != RELOAD_READ && no_output_reloads
3427 && ! find_reg_note (insn, REG_UNUSED, operand))
3428 bad = 1;
3429 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3430 && ! const_to_mem)
3431 bad = 1;
3432
| 3460 && modified[i] != RELOAD_READ && no_output_reloads
3461 && ! find_reg_note (insn, REG_UNUSED, operand))
3462 bad = 1;
3463 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3464 && ! const_to_mem)
3465 bad = 1;
3466
|
3433#ifdef DISPARAGE_RELOAD_CLASS
3434 reject
3435 += DISPARAGE_RELOAD_CLASS (operand,
3436 (enum reg_class) this_alternative[i]);
| 3467 /* If we can't reload this value at all, reject this
3468 alternative. Note that we could also lose due to
3469 LIMIT_RELOAD_CLASS, but we don't check that
3470 here. */
3471
3472 if (! CONSTANT_P (operand)
3473 && (enum reg_class) this_alternative[i] != NO_REGS)
3474 {
3475 if (PREFERRED_RELOAD_CLASS
3476 (operand, (enum reg_class) this_alternative[i])
3477 == NO_REGS)
3478 reject = 600;
3479
3480#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3481 if (operand_type[i] == RELOAD_FOR_OUTPUT
3482 && PREFERRED_OUTPUT_RELOAD_CLASS
3483 (operand, (enum reg_class) this_alternative[i])
3484 == NO_REGS)
3485 reject = 600;
|
3437#endif
| 3486#endif
|
| 3487 }
|
3438
3439 /* We prefer to reload pseudos over reloading other things,
3440 since such reloads may be able to be eliminated later.
3441 If we are reloading a SCRATCH, we won't be generating any
3442 insns, just using a register, so it is also preferred.
3443 So bump REJECT in other cases. Don't do this in the
3444 case where we are forcing a constant into memory and
3445 it will then win since we don't want to have a different
3446 alternative match then. */
| 3488
3489 /* We prefer to reload pseudos over reloading other things,
3490 since such reloads may be able to be eliminated later.
3491 If we are reloading a SCRATCH, we won't be generating any
3492 insns, just using a register, so it is also preferred.
3493 So bump REJECT in other cases. Don't do this in the
3494 case where we are forcing a constant into memory and
3495 it will then win since we don't want to have a different
3496 alternative match then. */
|
3447 if (! (GET_CODE (operand) == REG
| 3497 if (! (REG_P (operand)
|
3448 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3449 && GET_CODE (operand) != SCRATCH
3450 && ! (const_to_mem && constmemok))
3451 reject += 2;
3452
3453 /* Input reloads can be inherited more often than output
3454 reloads can be removed, so penalize output reloads. */
3455 if (operand_type[i] != RELOAD_FOR_INPUT
3456 && GET_CODE (operand) != SCRATCH)
3457 reject++;
3458 }
3459
3460 /* If this operand is a pseudo register that didn't get a hard
3461 reg and this alternative accepts some register, see if the
3462 class that we want is a subset of the preferred class for this
3463 register. If not, but it intersects that class, use the
3464 preferred class instead. If it does not intersect the preferred
3465 class, show that usage of this alternative should be discouraged;
3466 it will be discouraged more still if the register is `preferred
3467 or nothing'. We do this because it increases the chance of
3468 reusing our spill register in a later insn and avoiding a pair
3469 of memory stores and loads.
3470
3471 Don't bother with this if this alternative will accept this
3472 operand.
3473
3474 Don't do this for a multiword operand, since it is only a
3475 small win and has the risk of requiring more spill registers,
3476 which could cause a large loss.
3477
3478 Don't do this if the preferred class has only one register
3479 because we might otherwise exhaust the class. */
3480
3481 if (! win && ! did_match
3482 && this_alternative[i] != (int) NO_REGS
3483 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
| 3498 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3499 && GET_CODE (operand) != SCRATCH
3500 && ! (const_to_mem && constmemok))
3501 reject += 2;
3502
3503 /* Input reloads can be inherited more often than output
3504 reloads can be removed, so penalize output reloads. */
3505 if (operand_type[i] != RELOAD_FOR_INPUT
3506 && GET_CODE (operand) != SCRATCH)
3507 reject++;
3508 }
3509
3510 /* If this operand is a pseudo register that didn't get a hard
3511 reg and this alternative accepts some register, see if the
3512 class that we want is a subset of the preferred class for this
3513 register. If not, but it intersects that class, use the
3514 preferred class instead. If it does not intersect the preferred
3515 class, show that usage of this alternative should be discouraged;
3516 it will be discouraged more still if the register is `preferred
3517 or nothing'. We do this because it increases the chance of
3518 reusing our spill register in a later insn and avoiding a pair
3519 of memory stores and loads.
3520
3521 Don't bother with this if this alternative will accept this
3522 operand.
3523
3524 Don't do this for a multiword operand, since it is only a
3525 small win and has the risk of requiring more spill registers,
3526 which could cause a large loss.
3527
3528 Don't do this if the preferred class has only one register
3529 because we might otherwise exhaust the class. */
3530
3531 if (! win && ! did_match
3532 && this_alternative[i] != (int) NO_REGS
3533 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
|
3484 && reg_class_size[(int) preferred_class[i]] > 1)
| 3534 && reg_class_size [(int) preferred_class[i]] > 0
3535 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
|
3485 {
3486 if (! reg_class_subset_p (this_alternative[i],
3487 preferred_class[i]))
3488 {
3489 /* Since we don't have a way of forming the intersection,
3490 we just do something special if the preferred class
3491 is a subset of the class we have; that's the most
3492 common case anyway. */
3493 if (reg_class_subset_p (preferred_class[i],
3494 this_alternative[i]))
3495 this_alternative[i] = (int) preferred_class[i];
3496 else
3497 reject += (2 + 2 * pref_or_nothing[i]);
3498 }
3499 }
3500 }
3501
3502 /* Now see if any output operands that are marked "earlyclobber"
3503 in this alternative conflict with any input operands
3504 or any memory addresses. */
3505
3506 for (i = 0; i < noperands; i++)
3507 if (this_alternative_earlyclobber[i]
3508 && (this_alternative_win[i] || this_alternative_match_win[i]))
3509 {
3510 struct decomposition early_data;
3511
3512 early_data = decompose (recog_data.operand[i]);
3513
| 3536 {
3537 if (! reg_class_subset_p (this_alternative[i],
3538 preferred_class[i]))
3539 {
3540 /* Since we don't have a way of forming the intersection,
3541 we just do something special if the preferred class
3542 is a subset of the class we have; that's the most
3543 common case anyway. */
3544 if (reg_class_subset_p (preferred_class[i],
3545 this_alternative[i]))
3546 this_alternative[i] = (int) preferred_class[i];
3547 else
3548 reject += (2 + 2 * pref_or_nothing[i]);
3549 }
3550 }
3551 }
3552
3553 /* Now see if any output operands that are marked "earlyclobber"
3554 in this alternative conflict with any input operands
3555 or any memory addresses. */
3556
3557 for (i = 0; i < noperands; i++)
3558 if (this_alternative_earlyclobber[i]
3559 && (this_alternative_win[i] || this_alternative_match_win[i]))
3560 {
3561 struct decomposition early_data;
3562
3563 early_data = decompose (recog_data.operand[i]);
3564
|
3514 if (modified[i] == RELOAD_READ)
3515 abort ();
| 3565 gcc_assert (modified[i] != RELOAD_READ);
|
3516
3517 if (this_alternative[i] == NO_REGS)
3518 {
3519 this_alternative_earlyclobber[i] = 0;
| 3566
3567 if (this_alternative[i] == NO_REGS)
3568 {
3569 this_alternative_earlyclobber[i] = 0;
|
3520 if (this_insn_is_asm)
3521 error_for_asm (this_insn,
3522 "`&' constraint used with no register class");
3523 else
3524 abort ();
| 3570 gcc_assert (this_insn_is_asm);
3571 error_for_asm (this_insn,
3572 "%<&%> constraint used with no register class");
|
3525 }
3526
3527 for (j = 0; j < noperands; j++)
3528 /* Is this an input operand or a memory ref? */
| 3573 }
3574
3575 for (j = 0; j < noperands; j++)
3576 /* Is this an input operand or a memory ref? */
|
3529 if ((GET_CODE (recog_data.operand[j]) == MEM
| 3577 if ((MEM_P (recog_data.operand[j])
|
3530 || modified[j] != RELOAD_WRITE)
3531 && j != i
3532 /* Ignore things like match_operator operands. */
3533 && *recog_data.constraints[j] != 0
3534 /* Don't count an input operand that is constrained to match
3535 the early clobber operand. */
3536 && ! (this_alternative_matches[j] == i
3537 && rtx_equal_p (recog_data.operand[i],
3538 recog_data.operand[j]))
3539 /* Is it altered by storing the earlyclobber operand? */
3540 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3541 early_data))
3542 {
| 3578 || modified[j] != RELOAD_WRITE)
3579 && j != i
3580 /* Ignore things like match_operator operands. */
3581 && *recog_data.constraints[j] != 0
3582 /* Don't count an input operand that is constrained to match
3583 the early clobber operand. */
3584 && ! (this_alternative_matches[j] == i
3585 && rtx_equal_p (recog_data.operand[i],
3586 recog_data.operand[j]))
3587 /* Is it altered by storing the earlyclobber operand? */
3588 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3589 early_data))
3590 {
|
3543 /* If the output is in a single-reg class,
| 3591 /* If the output is in a non-empty few-regs class,
|
3544 it's costly to reload it, so reload the input instead. */
| 3592 it's costly to reload it, so reload the input instead. */
|
3545 if (reg_class_size[this_alternative[i]] == 1
3546 && (GET_CODE (recog_data.operand[j]) == REG
| 3593 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3594 && (REG_P (recog_data.operand[j])
|
3547 || GET_CODE (recog_data.operand[j]) == SUBREG))
3548 {
3549 losers++;
3550 this_alternative_win[j] = 0;
3551 this_alternative_match_win[j] = 0;
3552 }
3553 else
3554 break;
3555 }
3556 /* If an earlyclobber operand conflicts with something,
3557 it must be reloaded, so request this and count the cost. */
3558 if (j != noperands)
3559 {
3560 losers++;
3561 this_alternative_win[i] = 0;
3562 this_alternative_match_win[j] = 0;
3563 for (j = 0; j < noperands; j++)
3564 if (this_alternative_matches[j] == i
3565 && this_alternative_match_win[j])
3566 {
3567 this_alternative_win[j] = 0;
3568 this_alternative_match_win[j] = 0;
3569 losers++;
3570 }
3571 }
3572 }
3573
3574 /* If one alternative accepts all the operands, no reload required,
3575 choose that alternative; don't consider the remaining ones. */
3576 if (losers == 0)
3577 {
3578 /* Unswap these so that they are never swapped at `finish'. */
3579 if (commutative >= 0)
3580 {
3581 recog_data.operand[commutative] = substed_operand[commutative];
3582 recog_data.operand[commutative + 1]
3583 = substed_operand[commutative + 1];
3584 }
3585 for (i = 0; i < noperands; i++)
3586 {
3587 goal_alternative_win[i] = this_alternative_win[i];
3588 goal_alternative_match_win[i] = this_alternative_match_win[i];
3589 goal_alternative[i] = this_alternative[i];
3590 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3591 goal_alternative_matches[i] = this_alternative_matches[i];
3592 goal_alternative_earlyclobber[i]
3593 = this_alternative_earlyclobber[i];
3594 }
3595 goal_alternative_number = this_alternative_number;
3596 goal_alternative_swapped = swapped;
3597 goal_earlyclobber = this_earlyclobber;
3598 goto finish;
3599 }
3600
3601 /* REJECT, set by the ! and ? constraint characters and when a register
3602 would be reloaded into a non-preferred class, discourages the use of
3603 this alternative for a reload goal. REJECT is incremented by six
3604 for each ? and two for each non-preferred class. */
3605 losers = losers * 6 + reject;
3606
3607 /* If this alternative can be made to work by reloading,
3608 and it needs less reloading than the others checked so far,
3609 record it as the chosen goal for reloading. */
3610 if (! bad && best > losers)
3611 {
3612 for (i = 0; i < noperands; i++)
3613 {
3614 goal_alternative[i] = this_alternative[i];
3615 goal_alternative_win[i] = this_alternative_win[i];
3616 goal_alternative_match_win[i] = this_alternative_match_win[i];
3617 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3618 goal_alternative_matches[i] = this_alternative_matches[i];
3619 goal_alternative_earlyclobber[i]
3620 = this_alternative_earlyclobber[i];
3621 }
3622 goal_alternative_swapped = swapped;
3623 best = losers;
3624 goal_alternative_number = this_alternative_number;
3625 goal_earlyclobber = this_earlyclobber;
3626 }
3627 }
3628
3629 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3630 then we need to try each alternative twice,
3631 the second time matching those two operands
3632 as if we had exchanged them.
3633 To do this, really exchange them in operands.
3634
3635 If we have just tried the alternatives the second time,
3636 return operands to normal and drop through. */
3637
3638 if (commutative >= 0)
3639 {
3640 swapped = !swapped;
3641 if (swapped)
3642 {
3643 enum reg_class tclass;
3644 int t;
3645
3646 recog_data.operand[commutative] = substed_operand[commutative + 1];
3647 recog_data.operand[commutative + 1] = substed_operand[commutative];
3648 /* Swap the duplicates too. */
3649 for (i = 0; i < recog_data.n_dups; i++)
3650 if (recog_data.dup_num[i] == commutative
3651 || recog_data.dup_num[i] == commutative + 1)
3652 *recog_data.dup_loc[i]
3653 = recog_data.operand[(int) recog_data.dup_num[i]];
3654
3655 tclass = preferred_class[commutative];
3656 preferred_class[commutative] = preferred_class[commutative + 1];
3657 preferred_class[commutative + 1] = tclass;
3658
3659 t = pref_or_nothing[commutative];
3660 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3661 pref_or_nothing[commutative + 1] = t;
3662
| 3595 || GET_CODE (recog_data.operand[j]) == SUBREG))
3596 {
3597 losers++;
3598 this_alternative_win[j] = 0;
3599 this_alternative_match_win[j] = 0;
3600 }
3601 else
3602 break;
3603 }
3604 /* If an earlyclobber operand conflicts with something,
3605 it must be reloaded, so request this and count the cost. */
3606 if (j != noperands)
3607 {
3608 losers++;
3609 this_alternative_win[i] = 0;
3610 this_alternative_match_win[j] = 0;
3611 for (j = 0; j < noperands; j++)
3612 if (this_alternative_matches[j] == i
3613 && this_alternative_match_win[j])
3614 {
3615 this_alternative_win[j] = 0;
3616 this_alternative_match_win[j] = 0;
3617 losers++;
3618 }
3619 }
3620 }
3621
3622 /* If one alternative accepts all the operands, no reload required,
3623 choose that alternative; don't consider the remaining ones. */
3624 if (losers == 0)
3625 {
3626 /* Unswap these so that they are never swapped at `finish'. */
3627 if (commutative >= 0)
3628 {
3629 recog_data.operand[commutative] = substed_operand[commutative];
3630 recog_data.operand[commutative + 1]
3631 = substed_operand[commutative + 1];
3632 }
3633 for (i = 0; i < noperands; i++)
3634 {
3635 goal_alternative_win[i] = this_alternative_win[i];
3636 goal_alternative_match_win[i] = this_alternative_match_win[i];
3637 goal_alternative[i] = this_alternative[i];
3638 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3639 goal_alternative_matches[i] = this_alternative_matches[i];
3640 goal_alternative_earlyclobber[i]
3641 = this_alternative_earlyclobber[i];
3642 }
3643 goal_alternative_number = this_alternative_number;
3644 goal_alternative_swapped = swapped;
3645 goal_earlyclobber = this_earlyclobber;
3646 goto finish;
3647 }
3648
3649 /* REJECT, set by the ! and ? constraint characters and when a register
3650 would be reloaded into a non-preferred class, discourages the use of
3651 this alternative for a reload goal. REJECT is incremented by six
3652 for each ? and two for each non-preferred class. */
3653 losers = losers * 6 + reject;
3654
3655 /* If this alternative can be made to work by reloading,
3656 and it needs less reloading than the others checked so far,
3657 record it as the chosen goal for reloading. */
3658 if (! bad && best > losers)
3659 {
3660 for (i = 0; i < noperands; i++)
3661 {
3662 goal_alternative[i] = this_alternative[i];
3663 goal_alternative_win[i] = this_alternative_win[i];
3664 goal_alternative_match_win[i] = this_alternative_match_win[i];
3665 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3666 goal_alternative_matches[i] = this_alternative_matches[i];
3667 goal_alternative_earlyclobber[i]
3668 = this_alternative_earlyclobber[i];
3669 }
3670 goal_alternative_swapped = swapped;
3671 best = losers;
3672 goal_alternative_number = this_alternative_number;
3673 goal_earlyclobber = this_earlyclobber;
3674 }
3675 }
3676
3677 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3678 then we need to try each alternative twice,
3679 the second time matching those two operands
3680 as if we had exchanged them.
3681 To do this, really exchange them in operands.
3682
3683 If we have just tried the alternatives the second time,
3684 return operands to normal and drop through. */
3685
3686 if (commutative >= 0)
3687 {
3688 swapped = !swapped;
3689 if (swapped)
3690 {
3691 enum reg_class tclass;
3692 int t;
3693
3694 recog_data.operand[commutative] = substed_operand[commutative + 1];
3695 recog_data.operand[commutative + 1] = substed_operand[commutative];
3696 /* Swap the duplicates too. */
3697 for (i = 0; i < recog_data.n_dups; i++)
3698 if (recog_data.dup_num[i] == commutative
3699 || recog_data.dup_num[i] == commutative + 1)
3700 *recog_data.dup_loc[i]
3701 = recog_data.operand[(int) recog_data.dup_num[i]];
3702
3703 tclass = preferred_class[commutative];
3704 preferred_class[commutative] = preferred_class[commutative + 1];
3705 preferred_class[commutative + 1] = tclass;
3706
3707 t = pref_or_nothing[commutative];
3708 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3709 pref_or_nothing[commutative + 1] = t;
3710
|
| 3711 t = address_reloaded[commutative];
3712 address_reloaded[commutative] = address_reloaded[commutative + 1];
3713 address_reloaded[commutative + 1] = t;
3714
|
3663 memcpy (constraints, recog_data.constraints,
3664 noperands * sizeof (char *));
3665 goto try_swapped;
3666 }
3667 else
3668 {
3669 recog_data.operand[commutative] = substed_operand[commutative];
3670 recog_data.operand[commutative + 1]
3671 = substed_operand[commutative + 1];
3672 /* Unswap the duplicates too. */
3673 for (i = 0; i < recog_data.n_dups; i++)
3674 if (recog_data.dup_num[i] == commutative
3675 || recog_data.dup_num[i] == commutative + 1)
3676 *recog_data.dup_loc[i]
3677 = recog_data.operand[(int) recog_data.dup_num[i]];
3678 }
3679 }
3680
3681 /* The operands don't meet the constraints.
3682 goal_alternative describes the alternative
3683 that we could reach by reloading the fewest operands.
3684 Reload so as to fit it. */
3685
3686 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3687 {
3688 /* No alternative works with reloads?? */
3689 if (insn_code_number >= 0)
3690 fatal_insn ("unable to generate reloads for:", insn);
| 3715 memcpy (constraints, recog_data.constraints,
3716 noperands * sizeof (char *));
3717 goto try_swapped;
3718 }
3719 else
3720 {
3721 recog_data.operand[commutative] = substed_operand[commutative];
3722 recog_data.operand[commutative + 1]
3723 = substed_operand[commutative + 1];
3724 /* Unswap the duplicates too. */
3725 for (i = 0; i < recog_data.n_dups; i++)
3726 if (recog_data.dup_num[i] == commutative
3727 || recog_data.dup_num[i] == commutative + 1)
3728 *recog_data.dup_loc[i]
3729 = recog_data.operand[(int) recog_data.dup_num[i]];
3730 }
3731 }
3732
3733 /* The operands don't meet the constraints.
3734 goal_alternative describes the alternative
3735 that we could reach by reloading the fewest operands.
3736 Reload so as to fit it. */
3737
3738 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3739 {
3740 /* No alternative works with reloads?? */
3741 if (insn_code_number >= 0)
3742 fatal_insn ("unable to generate reloads for:", insn);
|
3691 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
| 3743 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
|
3692 /* Avoid further trouble with this insn. */
3693 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3694 n_reloads = 0;
3695 return 0;
3696 }
3697
3698 /* Jump to `finish' from above if all operands are valid already.
3699 In that case, goal_alternative_win is all 1. */
3700 finish:
3701
3702 /* Right now, for any pair of operands I and J that are required to match,
3703 with I < J,
3704 goal_alternative_matches[J] is I.
3705 Set up goal_alternative_matched as the inverse function:
3706 goal_alternative_matched[I] = J. */
3707
3708 for (i = 0; i < noperands; i++)
3709 goal_alternative_matched[i] = -1;
3710
3711 for (i = 0; i < noperands; i++)
3712 if (! goal_alternative_win[i]
3713 && goal_alternative_matches[i] >= 0)
3714 goal_alternative_matched[goal_alternative_matches[i]] = i;
3715
3716 for (i = 0; i < noperands; i++)
3717 goal_alternative_win[i] |= goal_alternative_match_win[i];
3718
3719 /* If the best alternative is with operands 1 and 2 swapped,
3720 consider them swapped before reporting the reloads. Update the
3721 operand numbers of any reloads already pushed. */
3722
3723 if (goal_alternative_swapped)
3724 {
3725 rtx tem;
3726
3727 tem = substed_operand[commutative];
3728 substed_operand[commutative] = substed_operand[commutative + 1];
3729 substed_operand[commutative + 1] = tem;
3730 tem = recog_data.operand[commutative];
3731 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3732 recog_data.operand[commutative + 1] = tem;
3733 tem = *recog_data.operand_loc[commutative];
3734 *recog_data.operand_loc[commutative]
3735 = *recog_data.operand_loc[commutative + 1];
3736 *recog_data.operand_loc[commutative + 1] = tem;
3737
3738 for (i = 0; i < n_reloads; i++)
3739 {
3740 if (rld[i].opnum == commutative)
3741 rld[i].opnum = commutative + 1;
3742 else if (rld[i].opnum == commutative + 1)
3743 rld[i].opnum = commutative;
3744 }
3745 }
3746
3747 for (i = 0; i < noperands; i++)
3748 {
3749 operand_reloadnum[i] = -1;
3750
3751 /* If this is an earlyclobber operand, we need to widen the scope.
3752 The reload must remain valid from the start of the insn being
3753 reloaded until after the operand is stored into its destination.
3754 We approximate this with RELOAD_OTHER even though we know that we
3755 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3756
3757 One special case that is worth checking is when we have an
3758 output that is earlyclobber but isn't used past the insn (typically
3759 a SCRATCH). In this case, we only need have the reload live
3760 through the insn itself, but not for any of our input or output
3761 reloads.
3762 But we must not accidentally narrow the scope of an existing
3763 RELOAD_OTHER reload - leave these alone.
3764
3765 In any case, anything needed to address this operand can remain
3766 however they were previously categorized. */
3767
3768 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3769 operand_type[i]
3770 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3771 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3772 }
3773
3774 /* Any constants that aren't allowed and can't be reloaded
3775 into registers are here changed into memory references. */
3776 for (i = 0; i < noperands; i++)
3777 if (! goal_alternative_win[i]
| 3744 /* Avoid further trouble with this insn. */
3745 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3746 n_reloads = 0;
3747 return 0;
3748 }
3749
3750 /* Jump to `finish' from above if all operands are valid already.
3751 In that case, goal_alternative_win is all 1. */
3752 finish:
3753
3754 /* Right now, for any pair of operands I and J that are required to match,
3755 with I < J,
3756 goal_alternative_matches[J] is I.
3757 Set up goal_alternative_matched as the inverse function:
3758 goal_alternative_matched[I] = J. */
3759
3760 for (i = 0; i < noperands; i++)
3761 goal_alternative_matched[i] = -1;
3762
3763 for (i = 0; i < noperands; i++)
3764 if (! goal_alternative_win[i]
3765 && goal_alternative_matches[i] >= 0)
3766 goal_alternative_matched[goal_alternative_matches[i]] = i;
3767
3768 for (i = 0; i < noperands; i++)
3769 goal_alternative_win[i] |= goal_alternative_match_win[i];
3770
3771 /* If the best alternative is with operands 1 and 2 swapped,
3772 consider them swapped before reporting the reloads. Update the
3773 operand numbers of any reloads already pushed. */
3774
3775 if (goal_alternative_swapped)
3776 {
3777 rtx tem;
3778
3779 tem = substed_operand[commutative];
3780 substed_operand[commutative] = substed_operand[commutative + 1];
3781 substed_operand[commutative + 1] = tem;
3782 tem = recog_data.operand[commutative];
3783 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3784 recog_data.operand[commutative + 1] = tem;
3785 tem = *recog_data.operand_loc[commutative];
3786 *recog_data.operand_loc[commutative]
3787 = *recog_data.operand_loc[commutative + 1];
3788 *recog_data.operand_loc[commutative + 1] = tem;
3789
3790 for (i = 0; i < n_reloads; i++)
3791 {
3792 if (rld[i].opnum == commutative)
3793 rld[i].opnum = commutative + 1;
3794 else if (rld[i].opnum == commutative + 1)
3795 rld[i].opnum = commutative;
3796 }
3797 }
3798
3799 for (i = 0; i < noperands; i++)
3800 {
3801 operand_reloadnum[i] = -1;
3802
3803 /* If this is an earlyclobber operand, we need to widen the scope.
3804 The reload must remain valid from the start of the insn being
3805 reloaded until after the operand is stored into its destination.
3806 We approximate this with RELOAD_OTHER even though we know that we
3807 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3808
3809 One special case that is worth checking is when we have an
3810 output that is earlyclobber but isn't used past the insn (typically
3811 a SCRATCH). In this case, we only need have the reload live
3812 through the insn itself, but not for any of our input or output
3813 reloads.
3814 But we must not accidentally narrow the scope of an existing
3815 RELOAD_OTHER reload - leave these alone.
3816
3817 In any case, anything needed to address this operand can remain
3818 however they were previously categorized. */
3819
3820 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3821 operand_type[i]
3822 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3823 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3824 }
3825
3826 /* Any constants that aren't allowed and can't be reloaded
3827 into registers are here changed into memory references. */
3828 for (i = 0; i < noperands; i++)
3829 if (! goal_alternative_win[i]
|
3778 && CONSTANT_P (recog_data.operand[i])
3779 /* force_const_mem does not accept HIGH. */
3780 && GET_CODE (recog_data.operand[i]) != HIGH
| 3830 && CONST_POOL_OK_P (recog_data.operand[i])
|
3781 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3782 (enum reg_class) goal_alternative[i])
3783 == NO_REGS)
3784 || no_input_reloads)
3785 && operand_mode[i] != VOIDmode)
3786 {
3787 substed_operand[i] = recog_data.operand[i]
3788 = find_reloads_toplev (force_const_mem (operand_mode[i],
3789 recog_data.operand[i]),
3790 i, address_type[i], ind_levels, 0, insn,
3791 NULL);
3792 if (alternative_allows_memconst (recog_data.constraints[i],
3793 goal_alternative_number))
3794 goal_alternative_win[i] = 1;
3795 }
3796
| 3831 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3832 (enum reg_class) goal_alternative[i])
3833 == NO_REGS)
3834 || no_input_reloads)
3835 && operand_mode[i] != VOIDmode)
3836 {
3837 substed_operand[i] = recog_data.operand[i]
3838 = find_reloads_toplev (force_const_mem (operand_mode[i],
3839 recog_data.operand[i]),
3840 i, address_type[i], ind_levels, 0, insn,
3841 NULL);
3842 if (alternative_allows_memconst (recog_data.constraints[i],
3843 goal_alternative_number))
3844 goal_alternative_win[i] = 1;
3845 }
3846
|
| 3847 /* Likewise any invalid constants appearing as operand of a PLUS
3848 that is to be reloaded. */
3849 for (i = 0; i < noperands; i++)
3850 if (! goal_alternative_win[i]
3851 && GET_CODE (recog_data.operand[i]) == PLUS
3852 && CONST_POOL_OK_P (XEXP (recog_data.operand[i], 1))
3853 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data.operand[i], 1),
3854 (enum reg_class) goal_alternative[i])
3855 == NO_REGS)
3856 && operand_mode[i] != VOIDmode)
3857 {
3858 rtx tem = force_const_mem (operand_mode[i],
3859 XEXP (recog_data.operand[i], 1));
3860 tem = gen_rtx_PLUS (operand_mode[i],
3861 XEXP (recog_data.operand[i], 0), tem);
3862
3863 substed_operand[i] = recog_data.operand[i]
3864 = find_reloads_toplev (tem, i, address_type[i],
3865 ind_levels, 0, insn, NULL);
3866 }
3867
|
3797 /* Record the values of the earlyclobber operands for the caller. */
3798 if (goal_earlyclobber)
3799 for (i = 0; i < noperands; i++)
3800 if (goal_alternative_earlyclobber[i])
3801 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3802
3803 /* Now record reloads for all the operands that need them. */
3804 for (i = 0; i < noperands; i++)
3805 if (! goal_alternative_win[i])
3806 {
3807 /* Operands that match previous ones have already been handled. */
3808 if (goal_alternative_matches[i] >= 0)
3809 ;
3810 /* Handle an operand with a nonoffsettable address
3811 appearing where an offsettable address will do
3812 by reloading the address into a base register.
3813
3814 ??? We can also do this when the operand is a register and
3815 reg_equiv_mem is not offsettable, but this is a bit tricky,
3816 so we don't bother with it. It may not be worth doing. */
3817 else if (goal_alternative_matched[i] == -1
3818 && goal_alternative_offmemok[i]
| 3868 /* Record the values of the earlyclobber operands for the caller. */
3869 if (goal_earlyclobber)
3870 for (i = 0; i < noperands; i++)
3871 if (goal_alternative_earlyclobber[i])
3872 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3873
3874 /* Now record reloads for all the operands that need them. */
3875 for (i = 0; i < noperands; i++)
3876 if (! goal_alternative_win[i])
3877 {
3878 /* Operands that match previous ones have already been handled. */
3879 if (goal_alternative_matches[i] >= 0)
3880 ;
3881 /* Handle an operand with a nonoffsettable address
3882 appearing where an offsettable address will do
3883 by reloading the address into a base register.
3884
3885 ??? We can also do this when the operand is a register and
3886 reg_equiv_mem is not offsettable, but this is a bit tricky,
3887 so we don't bother with it. It may not be worth doing. */
3888 else if (goal_alternative_matched[i] == -1
3889 && goal_alternative_offmemok[i]
|
3819 && GET_CODE (recog_data.operand[i]) == MEM)
| 3890 && MEM_P (recog_data.operand[i]))
|
3820 {
| 3891 {
|
| 3892 /* If the address to be reloaded is a VOIDmode constant,
3893 use Pmode as mode of the reload register, as would have
3894 been done by find_reloads_address. */
3895 enum machine_mode address_mode;
3896 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3897 if (address_mode == VOIDmode)
3898 address_mode = Pmode;
3899
|
3821 operand_reloadnum[i]
3822 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3823 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
| 3900 operand_reloadnum[i]
3901 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3902 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
|
3824 MODE_BASE_REG_CLASS (VOIDmode),
3825 GET_MODE (XEXP (recog_data.operand[i], 0)),
| 3903 base_reg_class (VOIDmode, MEM, SCRATCH),
3904 address_mode,
|
3826 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3827 rld[operand_reloadnum[i]].inc
3828 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3829
3830 /* If this operand is an output, we will have made any
3831 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3832 now we are treating part of the operand as an input, so
3833 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3834
3835 if (modified[i] == RELOAD_WRITE)
3836 {
3837 for (j = 0; j < n_reloads; j++)
3838 {
3839 if (rld[j].opnum == i)
3840 {
3841 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3842 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3843 else if (rld[j].when_needed
3844 == RELOAD_FOR_OUTADDR_ADDRESS)
3845 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3846 }
3847 }
3848 }
3849 }
3850 else if (goal_alternative_matched[i] == -1)
3851 {
3852 operand_reloadnum[i]
3853 = push_reload ((modified[i] != RELOAD_WRITE
3854 ? recog_data.operand[i] : 0),
3855 (modified[i] != RELOAD_READ
3856 ? recog_data.operand[i] : 0),
3857 (modified[i] != RELOAD_WRITE
3858 ? recog_data.operand_loc[i] : 0),
3859 (modified[i] != RELOAD_READ
3860 ? recog_data.operand_loc[i] : 0),
3861 (enum reg_class) goal_alternative[i],
3862 (modified[i] == RELOAD_WRITE
3863 ? VOIDmode : operand_mode[i]),
3864 (modified[i] == RELOAD_READ
3865 ? VOIDmode : operand_mode[i]),
3866 (insn_code_number < 0 ? 0
3867 : insn_data[insn_code_number].operand[i].strict_low),
3868 0, i, operand_type[i]);
3869 }
3870 /* In a matching pair of operands, one must be input only
3871 and the other must be output only.
3872 Pass the input operand as IN and the other as OUT. */
3873 else if (modified[i] == RELOAD_READ
3874 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3875 {
3876 operand_reloadnum[i]
3877 = push_reload (recog_data.operand[i],
3878 recog_data.operand[goal_alternative_matched[i]],
3879 recog_data.operand_loc[i],
3880 recog_data.operand_loc[goal_alternative_matched[i]],
3881 (enum reg_class) goal_alternative[i],
3882 operand_mode[i],
3883 operand_mode[goal_alternative_matched[i]],
3884 0, 0, i, RELOAD_OTHER);
3885 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3886 }
3887 else if (modified[i] == RELOAD_WRITE
3888 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3889 {
3890 operand_reloadnum[goal_alternative_matched[i]]
3891 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3892 recog_data.operand[i],
3893 recog_data.operand_loc[goal_alternative_matched[i]],
3894 recog_data.operand_loc[i],
3895 (enum reg_class) goal_alternative[i],
3896 operand_mode[goal_alternative_matched[i]],
3897 operand_mode[i],
3898 0, 0, i, RELOAD_OTHER);
3899 operand_reloadnum[i] = output_reloadnum;
3900 }
| 3905 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3906 rld[operand_reloadnum[i]].inc
3907 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3908
3909 /* If this operand is an output, we will have made any
3910 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3911 now we are treating part of the operand as an input, so
3912 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3913
3914 if (modified[i] == RELOAD_WRITE)
3915 {
3916 for (j = 0; j < n_reloads; j++)
3917 {
3918 if (rld[j].opnum == i)
3919 {
3920 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3921 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3922 else if (rld[j].when_needed
3923 == RELOAD_FOR_OUTADDR_ADDRESS)
3924 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3925 }
3926 }
3927 }
3928 }
3929 else if (goal_alternative_matched[i] == -1)
3930 {
3931 operand_reloadnum[i]
3932 = push_reload ((modified[i] != RELOAD_WRITE
3933 ? recog_data.operand[i] : 0),
3934 (modified[i] != RELOAD_READ
3935 ? recog_data.operand[i] : 0),
3936 (modified[i] != RELOAD_WRITE
3937 ? recog_data.operand_loc[i] : 0),
3938 (modified[i] != RELOAD_READ
3939 ? recog_data.operand_loc[i] : 0),
3940 (enum reg_class) goal_alternative[i],
3941 (modified[i] == RELOAD_WRITE
3942 ? VOIDmode : operand_mode[i]),
3943 (modified[i] == RELOAD_READ
3944 ? VOIDmode : operand_mode[i]),
3945 (insn_code_number < 0 ? 0
3946 : insn_data[insn_code_number].operand[i].strict_low),
3947 0, i, operand_type[i]);
3948 }
3949 /* In a matching pair of operands, one must be input only
3950 and the other must be output only.
3951 Pass the input operand as IN and the other as OUT. */
3952 else if (modified[i] == RELOAD_READ
3953 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3954 {
3955 operand_reloadnum[i]
3956 = push_reload (recog_data.operand[i],
3957 recog_data.operand[goal_alternative_matched[i]],
3958 recog_data.operand_loc[i],
3959 recog_data.operand_loc[goal_alternative_matched[i]],
3960 (enum reg_class) goal_alternative[i],
3961 operand_mode[i],
3962 operand_mode[goal_alternative_matched[i]],
3963 0, 0, i, RELOAD_OTHER);
3964 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3965 }
3966 else if (modified[i] == RELOAD_WRITE
3967 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3968 {
3969 operand_reloadnum[goal_alternative_matched[i]]
3970 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3971 recog_data.operand[i],
3972 recog_data.operand_loc[goal_alternative_matched[i]],
3973 recog_data.operand_loc[i],
3974 (enum reg_class) goal_alternative[i],
3975 operand_mode[goal_alternative_matched[i]],
3976 operand_mode[i],
3977 0, 0, i, RELOAD_OTHER);
3978 operand_reloadnum[i] = output_reloadnum;
3979 }
|
3901 else if (insn_code_number >= 0)
3902 abort ();
| |
3903 else
3904 {
| 3980 else
3981 {
|
3905 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
| 3982 gcc_assert (insn_code_number < 0);
3983 error_for_asm (insn, "inconsistent operand constraints "
3984 "in an %<asm%>");
|
3906 /* Avoid further trouble with this insn. */
3907 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3908 n_reloads = 0;
3909 return 0;
3910 }
3911 }
3912 else if (goal_alternative_matched[i] < 0
3913 && goal_alternative_matches[i] < 0
| 3985 /* Avoid further trouble with this insn. */
3986 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3987 n_reloads = 0;
3988 return 0;
3989 }
3990 }
3991 else if (goal_alternative_matched[i] < 0
3992 && goal_alternative_matches[i] < 0
|
3914 && !address_operand_reloaded[i]
| 3993 && address_operand_reloaded[i] != 1
|
3915 && optimize)
3916 {
3917 /* For each non-matching operand that's a MEM or a pseudo-register
3918 that didn't get a hard register, make an optional reload.
3919 This may get done even if the insn needs no reloads otherwise. */
3920
3921 rtx operand = recog_data.operand[i];
3922
3923 while (GET_CODE (operand) == SUBREG)
3924 operand = SUBREG_REG (operand);
| 3994 && optimize)
3995 {
3996 /* For each non-matching operand that's a MEM or a pseudo-register
3997 that didn't get a hard register, make an optional reload.
3998 This may get done even if the insn needs no reloads otherwise. */
3999
4000 rtx operand = recog_data.operand[i];
4001
4002 while (GET_CODE (operand) == SUBREG)
4003 operand = SUBREG_REG (operand);
|
3925 if ((GET_CODE (operand) == MEM
3926 || (GET_CODE (operand) == REG
| 4004 if ((MEM_P (operand)
4005 || (REG_P (operand)
|
3927 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3928 /* If this is only for an output, the optional reload would not
3929 actually cause us to use a register now, just note that
3930 something is stored here. */
3931 && ((enum reg_class) goal_alternative[i] != NO_REGS
3932 || modified[i] == RELOAD_WRITE)
3933 && ! no_input_reloads
3934 /* An optional output reload might allow to delete INSN later.
3935 We mustn't make in-out reloads on insns that are not permitted
3936 output reloads.
3937 If this is an asm, we can't delete it; we must not even call
3938 push_reload for an optional output reload in this case,
3939 because we can't be sure that the constraint allows a register,
3940 and push_reload verifies the constraints for asms. */
3941 && (modified[i] == RELOAD_READ
3942 || (! no_output_reloads && ! this_insn_is_asm)))
3943 operand_reloadnum[i]
3944 = push_reload ((modified[i] != RELOAD_WRITE
3945 ? recog_data.operand[i] : 0),
3946 (modified[i] != RELOAD_READ
3947 ? recog_data.operand[i] : 0),
3948 (modified[i] != RELOAD_WRITE
3949 ? recog_data.operand_loc[i] : 0),
3950 (modified[i] != RELOAD_READ
3951 ? recog_data.operand_loc[i] : 0),
3952 (enum reg_class) goal_alternative[i],
3953 (modified[i] == RELOAD_WRITE
3954 ? VOIDmode : operand_mode[i]),
3955 (modified[i] == RELOAD_READ
3956 ? VOIDmode : operand_mode[i]),
3957 (insn_code_number < 0 ? 0
3958 : insn_data[insn_code_number].operand[i].strict_low),
3959 1, i, operand_type[i]);
3960 /* If a memory reference remains (either as a MEM or a pseudo that
3961 did not get a hard register), yet we can't make an optional
3962 reload, check if this is actually a pseudo register reference;
3963 we then need to emit a USE and/or a CLOBBER so that reload
3964 inheritance will do the right thing. */
3965 else if (replace
| 4006 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4007 /* If this is only for an output, the optional reload would not
4008 actually cause us to use a register now, just note that
4009 something is stored here. */
4010 && ((enum reg_class) goal_alternative[i] != NO_REGS
4011 || modified[i] == RELOAD_WRITE)
4012 && ! no_input_reloads
4013 /* An optional output reload might allow to delete INSN later.
4014 We mustn't make in-out reloads on insns that are not permitted
4015 output reloads.
4016 If this is an asm, we can't delete it; we must not even call
4017 push_reload for an optional output reload in this case,
4018 because we can't be sure that the constraint allows a register,
4019 and push_reload verifies the constraints for asms. */
4020 && (modified[i] == RELOAD_READ
4021 || (! no_output_reloads && ! this_insn_is_asm)))
4022 operand_reloadnum[i]
4023 = push_reload ((modified[i] != RELOAD_WRITE
4024 ? recog_data.operand[i] : 0),
4025 (modified[i] != RELOAD_READ
4026 ? recog_data.operand[i] : 0),
4027 (modified[i] != RELOAD_WRITE
4028 ? recog_data.operand_loc[i] : 0),
4029 (modified[i] != RELOAD_READ
4030 ? recog_data.operand_loc[i] : 0),
4031 (enum reg_class) goal_alternative[i],
4032 (modified[i] == RELOAD_WRITE
4033 ? VOIDmode : operand_mode[i]),
4034 (modified[i] == RELOAD_READ
4035 ? VOIDmode : operand_mode[i]),
4036 (insn_code_number < 0 ? 0
4037 : insn_data[insn_code_number].operand[i].strict_low),
4038 1, i, operand_type[i]);
4039 /* If a memory reference remains (either as a MEM or a pseudo that
4040 did not get a hard register), yet we can't make an optional
4041 reload, check if this is actually a pseudo register reference;
4042 we then need to emit a USE and/or a CLOBBER so that reload
4043 inheritance will do the right thing. */
4044 else if (replace
|
3966 && (GET_CODE (operand) == MEM
3967 || (GET_CODE (operand) == REG
| 4045 && (MEM_P (operand)
4046 || (REG_P (operand)
|
3968 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3969 && reg_renumber [REGNO (operand)] < 0)))
3970 {
3971 operand = *recog_data.operand_loc[i];
3972
3973 while (GET_CODE (operand) == SUBREG)
3974 operand = SUBREG_REG (operand);
| 4047 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4048 && reg_renumber [REGNO (operand)] < 0)))
4049 {
4050 operand = *recog_data.operand_loc[i];
4051
4052 while (GET_CODE (operand) == SUBREG)
4053 operand = SUBREG_REG (operand);
|
3975 if (GET_CODE (operand) == REG)
| 4054 if (REG_P (operand))
|
3976 {
3977 if (modified[i] != RELOAD_WRITE)
3978 /* We mark the USE with QImode so that we recognize
3979 it as one that can be safely deleted at the end
3980 of reload. */
3981 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3982 insn), QImode);
3983 if (modified[i] != RELOAD_READ)
3984 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3985 }
3986 }
3987 }
3988 else if (goal_alternative_matches[i] >= 0
3989 && goal_alternative_win[goal_alternative_matches[i]]
3990 && modified[i] == RELOAD_READ
3991 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3992 && ! no_input_reloads && ! no_output_reloads
3993 && optimize)
3994 {
3995 /* Similarly, make an optional reload for a pair of matching
3996 objects that are in MEM or a pseudo that didn't get a hard reg. */
3997
3998 rtx operand = recog_data.operand[i];
3999
4000 while (GET_CODE (operand) == SUBREG)
4001 operand = SUBREG_REG (operand);
| 4055 {
4056 if (modified[i] != RELOAD_WRITE)
4057 /* We mark the USE with QImode so that we recognize
4058 it as one that can be safely deleted at the end
4059 of reload. */
4060 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4061 insn), QImode);
4062 if (modified[i] != RELOAD_READ)
4063 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
4064 }
4065 }
4066 }
4067 else if (goal_alternative_matches[i] >= 0
4068 && goal_alternative_win[goal_alternative_matches[i]]
4069 && modified[i] == RELOAD_READ
4070 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4071 && ! no_input_reloads && ! no_output_reloads
4072 && optimize)
4073 {
4074 /* Similarly, make an optional reload for a pair of matching
4075 objects that are in MEM or a pseudo that didn't get a hard reg. */
4076
4077 rtx operand = recog_data.operand[i];
4078
4079 while (GET_CODE (operand) == SUBREG)
4080 operand = SUBREG_REG (operand);
|
4002 if ((GET_CODE (operand) == MEM
4003 || (GET_CODE (operand) == REG
| 4081 if ((MEM_P (operand)
4082 || (REG_P (operand)
|
4004 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4005 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4006 != NO_REGS))
4007 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4008 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4009 recog_data.operand[i],
4010 recog_data.operand_loc[goal_alternative_matches[i]],
4011 recog_data.operand_loc[i],
4012 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4013 operand_mode[goal_alternative_matches[i]],
4014 operand_mode[i],
4015 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4016 }
4017
4018 /* Perform whatever substitutions on the operands we are supposed
4019 to make due to commutativity or replacement of registers
4020 with equivalent constants or memory slots. */
4021
4022 for (i = 0; i < noperands; i++)
4023 {
4024 /* We only do this on the last pass through reload, because it is
4025 possible for some data (like reg_equiv_address) to be changed during
| 4083 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4084 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4085 != NO_REGS))
4086 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4087 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4088 recog_data.operand[i],
4089 recog_data.operand_loc[goal_alternative_matches[i]],
4090 recog_data.operand_loc[i],
4091 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4092 operand_mode[goal_alternative_matches[i]],
4093 operand_mode[i],
4094 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4095 }
4096
4097 /* Perform whatever substitutions on the operands we are supposed
4098 to make due to commutativity or replacement of registers
4099 with equivalent constants or memory slots. */
4100
4101 for (i = 0; i < noperands; i++)
4102 {
4103 /* We only do this on the last pass through reload, because it is
4104 possible for some data (like reg_equiv_address) to be changed during
|
4026 later passes. Moreover, we loose the opportunity to get a useful
| 4105 later passes. Moreover, we lose the opportunity to get a useful
|
4027 reload_{in,out}_reg when we do these replacements. */
4028
4029 if (replace)
4030 {
4031 rtx substitution = substed_operand[i];
4032
4033 *recog_data.operand_loc[i] = substitution;
4034
4035 /* If we're replacing an operand with a LABEL_REF, we need
4036 to make sure that there's a REG_LABEL note attached to
4037 this instruction. */
| 4106 reload_{in,out}_reg when we do these replacements. */
4107
4108 if (replace)
4109 {
4110 rtx substitution = substed_operand[i];
4111
4112 *recog_data.operand_loc[i] = substitution;
4113
4114 /* If we're replacing an operand with a LABEL_REF, we need
4115 to make sure that there's a REG_LABEL note attached to
4116 this instruction. */
|
4038 if (GET_CODE (insn) != JUMP_INSN
| 4117 if (!JUMP_P (insn)
|
4039 && GET_CODE (substitution) == LABEL_REF
4040 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4041 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4042 XEXP (substitution, 0),
4043 REG_NOTES (insn));
4044 }
4045 else
4046 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4047 }
4048
4049 /* If this insn pattern contains any MATCH_DUP's, make sure that
4050 they will be substituted if the operands they match are substituted.
4051 Also do now any substitutions we already did on the operands.
4052
4053 Don't do this if we aren't making replacements because we might be
4054 propagating things allocated by frame pointer elimination into places
4055 it doesn't expect. */
4056
4057 if (insn_code_number >= 0 && replace)
4058 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4059 {
4060 int opno = recog_data.dup_num[i];
4061 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4062 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4063 }
4064
4065#if 0
4066 /* This loses because reloading of prior insns can invalidate the equivalence
4067 (or at least find_equiv_reg isn't smart enough to find it any more),
4068 causing this insn to need more reload regs than it needed before.
4069 It may be too late to make the reload regs available.
4070 Now this optimization is done safely in choose_reload_regs. */
4071
4072 /* For each reload of a reg into some other class of reg,
4073 search for an existing equivalent reg (same value now) in the right class.
4074 We can use it as long as we don't need to change its contents. */
4075 for (i = 0; i < n_reloads; i++)
4076 if (rld[i].reg_rtx == 0
4077 && rld[i].in != 0
| 4118 && GET_CODE (substitution) == LABEL_REF
4119 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4120 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4121 XEXP (substitution, 0),
4122 REG_NOTES (insn));
4123 }
4124 else
4125 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4126 }
4127
4128 /* If this insn pattern contains any MATCH_DUP's, make sure that
4129 they will be substituted if the operands they match are substituted.
4130 Also do now any substitutions we already did on the operands.
4131
4132 Don't do this if we aren't making replacements because we might be
4133 propagating things allocated by frame pointer elimination into places
4134 it doesn't expect. */
4135
4136 if (insn_code_number >= 0 && replace)
4137 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4138 {
4139 int opno = recog_data.dup_num[i];
4140 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4141 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4142 }
4143
4144#if 0
4145 /* This loses because reloading of prior insns can invalidate the equivalence
4146 (or at least find_equiv_reg isn't smart enough to find it any more),
4147 causing this insn to need more reload regs than it needed before.
4148 It may be too late to make the reload regs available.
4149 Now this optimization is done safely in choose_reload_regs. */
4150
4151 /* For each reload of a reg into some other class of reg,
4152 search for an existing equivalent reg (same value now) in the right class.
4153 We can use it as long as we don't need to change its contents. */
4154 for (i = 0; i < n_reloads; i++)
4155 if (rld[i].reg_rtx == 0
4156 && rld[i].in != 0
|
4078 && GET_CODE (rld[i].in) == REG
| 4157 && REG_P (rld[i].in)
|
4079 && rld[i].out == 0)
4080 {
4081 rld[i].reg_rtx
4082 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4083 static_reload_reg_p, 0, rld[i].inmode);
4084 /* Prevent generation of insn to load the value
4085 because the one we found already has the value. */
4086 if (rld[i].reg_rtx)
4087 rld[i].in = rld[i].reg_rtx;
4088 }
4089#endif
4090
| 4158 && rld[i].out == 0)
4159 {
4160 rld[i].reg_rtx
4161 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4162 static_reload_reg_p, 0, rld[i].inmode);
4163 /* Prevent generation of insn to load the value
4164 because the one we found already has the value. */
4165 if (rld[i].reg_rtx)
4166 rld[i].in = rld[i].reg_rtx;
4167 }
4168#endif
4169
|
| 4170 /* If we detected error and replaced asm instruction by USE, forget about the
4171 reloads. */
4172 if (GET_CODE (PATTERN (insn)) == USE
4173 && GET_CODE (XEXP (PATTERN (insn), 0)) == CONST_INT)
4174 n_reloads = 0;
4175
|
4091 /* Perhaps an output reload can be combined with another
4092 to reduce needs by one. */
4093 if (!goal_earlyclobber)
4094 combine_reloads ();
4095
4096 /* If we have a pair of reloads for parts of an address, they are reloading
4097 the same object, the operands themselves were not reloaded, and they
4098 are for two operands that are supposed to match, merge the reloads and
4099 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4100
4101 for (i = 0; i < n_reloads; i++)
4102 {
4103 int k;
4104
4105 for (j = i + 1; j < n_reloads; j++)
4106 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4107 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4108 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4109 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4110 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4111 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4112 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4113 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4114 && rtx_equal_p (rld[i].in, rld[j].in)
4115 && (operand_reloadnum[rld[i].opnum] < 0
4116 || rld[operand_reloadnum[rld[i].opnum]].optional)
4117 && (operand_reloadnum[rld[j].opnum] < 0
4118 || rld[operand_reloadnum[rld[j].opnum]].optional)
4119 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4120 || (goal_alternative_matches[rld[j].opnum]
4121 == rld[i].opnum)))
4122 {
4123 for (k = 0; k < n_replacements; k++)
4124 if (replacements[k].what == j)
4125 replacements[k].what = i;
4126
4127 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4128 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4129 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4130 else
4131 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4132 rld[j].in = 0;
4133 }
4134 }
4135
4136 /* Scan all the reloads and update their type.
4137 If a reload is for the address of an operand and we didn't reload
4138 that operand, change the type. Similarly, change the operand number
4139 of a reload when two operands match. If a reload is optional, treat it
4140 as though the operand isn't reloaded.
4141
4142 ??? This latter case is somewhat odd because if we do the optional
4143 reload, it means the object is hanging around. Thus we need only
4144 do the address reload if the optional reload was NOT done.
4145
4146 Change secondary reloads to be the address type of their operand, not
4147 the normal type.
4148
4149 If an operand's reload is now RELOAD_OTHER, change any
4150 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4151 RELOAD_FOR_OTHER_ADDRESS. */
4152
4153 for (i = 0; i < n_reloads; i++)
4154 {
4155 if (rld[i].secondary_p
4156 && rld[i].when_needed == operand_type[rld[i].opnum])
4157 rld[i].when_needed = address_type[rld[i].opnum];
4158
4159 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4160 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4161 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4162 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4163 && (operand_reloadnum[rld[i].opnum] < 0
4164 || rld[operand_reloadnum[rld[i].opnum]].optional))
4165 {
4166 /* If we have a secondary reload to go along with this reload,
4167 change its type to RELOAD_FOR_OPADDR_ADDR. */
4168
4169 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4170 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4171 && rld[i].secondary_in_reload != -1)
4172 {
4173 int secondary_in_reload = rld[i].secondary_in_reload;
4174
4175 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4176
4177 /* If there's a tertiary reload we have to change it also. */
4178 if (secondary_in_reload > 0
4179 && rld[secondary_in_reload].secondary_in_reload != -1)
4180 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4181 = RELOAD_FOR_OPADDR_ADDR;
4182 }
4183
4184 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4185 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4186 && rld[i].secondary_out_reload != -1)
4187 {
4188 int secondary_out_reload = rld[i].secondary_out_reload;
4189
4190 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4191
4192 /* If there's a tertiary reload we have to change it also. */
4193 if (secondary_out_reload
4194 && rld[secondary_out_reload].secondary_out_reload != -1)
4195 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4196 = RELOAD_FOR_OPADDR_ADDR;
4197 }
4198
4199 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4200 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4201 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4202 else
4203 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4204 }
4205
4206 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4207 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4208 && operand_reloadnum[rld[i].opnum] >= 0
4209 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4210 == RELOAD_OTHER))
4211 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4212
4213 if (goal_alternative_matches[rld[i].opnum] >= 0)
4214 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4215 }
4216
4217 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4218 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4219 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4220
4221 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4222 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4223 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4224 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4225 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4226 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4227 This is complicated by the fact that a single operand can have more
4228 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4229 choose_reload_regs without affecting code quality, and cases that
4230 actually fail are extremely rare, so it turns out to be better to fix
4231 the problem here by not generating cases that choose_reload_regs will
4232 fail for. */
4233 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4234 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4235 a single operand.
4236 We can reduce the register pressure by exploiting that a
4237 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4238 does not conflict with any of them, if it is only used for the first of
4239 the RELOAD_FOR_X_ADDRESS reloads. */
4240 {
4241 int first_op_addr_num = -2;
4242 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4243 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4244 int need_change = 0;
4245 /* We use last_op_addr_reload and the contents of the above arrays
4246 first as flags - -2 means no instance encountered, -1 means exactly
4247 one instance encountered.
4248 If more than one instance has been encountered, we store the reload
4249 number of the first reload of the kind in question; reload numbers
4250 are known to be non-negative. */
4251 for (i = 0; i < noperands; i++)
4252 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4253 for (i = n_reloads - 1; i >= 0; i--)
4254 {
4255 switch (rld[i].when_needed)
4256 {
4257 case RELOAD_FOR_OPERAND_ADDRESS:
4258 if (++first_op_addr_num >= 0)
4259 {
4260 first_op_addr_num = i;
4261 need_change = 1;
4262 }
4263 break;
4264 case RELOAD_FOR_INPUT_ADDRESS:
4265 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4266 {
4267 first_inpaddr_num[rld[i].opnum] = i;
4268 need_change = 1;
4269 }
4270 break;
4271 case RELOAD_FOR_OUTPUT_ADDRESS:
4272 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4273 {
4274 first_outpaddr_num[rld[i].opnum] = i;
4275 need_change = 1;
4276 }
4277 break;
4278 default:
4279 break;
4280 }
4281 }
4282
4283 if (need_change)
4284 {
4285 for (i = 0; i < n_reloads; i++)
4286 {
4287 int first_num;
4288 enum reload_type type;
4289
4290 switch (rld[i].when_needed)
4291 {
4292 case RELOAD_FOR_OPADDR_ADDR:
4293 first_num = first_op_addr_num;
4294 type = RELOAD_FOR_OPERAND_ADDRESS;
4295 break;
4296 case RELOAD_FOR_INPADDR_ADDRESS:
4297 first_num = first_inpaddr_num[rld[i].opnum];
4298 type = RELOAD_FOR_INPUT_ADDRESS;
4299 break;
4300 case RELOAD_FOR_OUTADDR_ADDRESS:
4301 first_num = first_outpaddr_num[rld[i].opnum];
4302 type = RELOAD_FOR_OUTPUT_ADDRESS;
4303 break;
4304 default:
4305 continue;
4306 }
4307 if (first_num < 0)
4308 continue;
4309 else if (i > first_num)
4310 rld[i].when_needed = type;
4311 else
4312 {
4313 /* Check if the only TYPE reload that uses reload I is
4314 reload FIRST_NUM. */
4315 for (j = n_reloads - 1; j > first_num; j--)
4316 {
4317 if (rld[j].when_needed == type
4318 && (rld[i].secondary_p
4319 ? rld[j].secondary_in_reload == i
4320 : reg_mentioned_p (rld[i].in, rld[j].in)))
4321 {
4322 rld[i].when_needed = type;
4323 break;
4324 }
4325 }
4326 }
4327 }
4328 }
4329 }
4330
4331 /* See if we have any reloads that are now allowed to be merged
4332 because we've changed when the reload is needed to
4333 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4334 check for the most common cases. */
4335
4336 for (i = 0; i < n_reloads; i++)
4337 if (rld[i].in != 0 && rld[i].out == 0
4338 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4339 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4340 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4341 for (j = 0; j < n_reloads; j++)
4342 if (i != j && rld[j].in != 0 && rld[j].out == 0
4343 && rld[j].when_needed == rld[i].when_needed
4344 && MATCHES (rld[i].in, rld[j].in)
4345 && rld[i].class == rld[j].class
4346 && !rld[i].nocombine && !rld[j].nocombine
4347 && rld[i].reg_rtx == rld[j].reg_rtx)
4348 {
4349 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4350 transfer_replacements (i, j);
4351 rld[j].in = 0;
4352 }
4353
4354#ifdef HAVE_cc0
4355 /* If we made any reloads for addresses, see if they violate a
4356 "no input reloads" requirement for this insn. But loads that we
4357 do after the insn (such as for output addresses) are fine. */
4358 if (no_input_reloads)
4359 for (i = 0; i < n_reloads; i++)
| 4176 /* Perhaps an output reload can be combined with another
4177 to reduce needs by one. */
4178 if (!goal_earlyclobber)
4179 combine_reloads ();
4180
4181 /* If we have a pair of reloads for parts of an address, they are reloading
4182 the same object, the operands themselves were not reloaded, and they
4183 are for two operands that are supposed to match, merge the reloads and
4184 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4185
4186 for (i = 0; i < n_reloads; i++)
4187 {
4188 int k;
4189
4190 for (j = i + 1; j < n_reloads; j++)
4191 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4192 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4193 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4194 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4195 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4196 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4197 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4198 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4199 && rtx_equal_p (rld[i].in, rld[j].in)
4200 && (operand_reloadnum[rld[i].opnum] < 0
4201 || rld[operand_reloadnum[rld[i].opnum]].optional)
4202 && (operand_reloadnum[rld[j].opnum] < 0
4203 || rld[operand_reloadnum[rld[j].opnum]].optional)
4204 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4205 || (goal_alternative_matches[rld[j].opnum]
4206 == rld[i].opnum)))
4207 {
4208 for (k = 0; k < n_replacements; k++)
4209 if (replacements[k].what == j)
4210 replacements[k].what = i;
4211
4212 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4213 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4214 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4215 else
4216 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4217 rld[j].in = 0;
4218 }
4219 }
4220
4221 /* Scan all the reloads and update their type.
4222 If a reload is for the address of an operand and we didn't reload
4223 that operand, change the type. Similarly, change the operand number
4224 of a reload when two operands match. If a reload is optional, treat it
4225 as though the operand isn't reloaded.
4226
4227 ??? This latter case is somewhat odd because if we do the optional
4228 reload, it means the object is hanging around. Thus we need only
4229 do the address reload if the optional reload was NOT done.
4230
4231 Change secondary reloads to be the address type of their operand, not
4232 the normal type.
4233
4234 If an operand's reload is now RELOAD_OTHER, change any
4235 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4236 RELOAD_FOR_OTHER_ADDRESS. */
4237
4238 for (i = 0; i < n_reloads; i++)
4239 {
4240 if (rld[i].secondary_p
4241 && rld[i].when_needed == operand_type[rld[i].opnum])
4242 rld[i].when_needed = address_type[rld[i].opnum];
4243
4244 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4245 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4246 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4247 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4248 && (operand_reloadnum[rld[i].opnum] < 0
4249 || rld[operand_reloadnum[rld[i].opnum]].optional))
4250 {
4251 /* If we have a secondary reload to go along with this reload,
4252 change its type to RELOAD_FOR_OPADDR_ADDR. */
4253
4254 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4255 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4256 && rld[i].secondary_in_reload != -1)
4257 {
4258 int secondary_in_reload = rld[i].secondary_in_reload;
4259
4260 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4261
4262 /* If there's a tertiary reload we have to change it also. */
4263 if (secondary_in_reload > 0
4264 && rld[secondary_in_reload].secondary_in_reload != -1)
4265 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4266 = RELOAD_FOR_OPADDR_ADDR;
4267 }
4268
4269 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4270 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4271 && rld[i].secondary_out_reload != -1)
4272 {
4273 int secondary_out_reload = rld[i].secondary_out_reload;
4274
4275 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4276
4277 /* If there's a tertiary reload we have to change it also. */
4278 if (secondary_out_reload
4279 && rld[secondary_out_reload].secondary_out_reload != -1)
4280 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4281 = RELOAD_FOR_OPADDR_ADDR;
4282 }
4283
4284 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4285 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4286 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4287 else
4288 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4289 }
4290
4291 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4292 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4293 && operand_reloadnum[rld[i].opnum] >= 0
4294 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4295 == RELOAD_OTHER))
4296 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4297
4298 if (goal_alternative_matches[rld[i].opnum] >= 0)
4299 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4300 }
4301
4302 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4303 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4304 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4305
4306 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4307 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4308 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4309 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4310 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4311 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4312 This is complicated by the fact that a single operand can have more
4313 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4314 choose_reload_regs without affecting code quality, and cases that
4315 actually fail are extremely rare, so it turns out to be better to fix
4316 the problem here by not generating cases that choose_reload_regs will
4317 fail for. */
4318 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4319 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4320 a single operand.
4321 We can reduce the register pressure by exploiting that a
4322 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4323 does not conflict with any of them, if it is only used for the first of
4324 the RELOAD_FOR_X_ADDRESS reloads. */
4325 {
4326 int first_op_addr_num = -2;
4327 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4328 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4329 int need_change = 0;
4330 /* We use last_op_addr_reload and the contents of the above arrays
4331 first as flags - -2 means no instance encountered, -1 means exactly
4332 one instance encountered.
4333 If more than one instance has been encountered, we store the reload
4334 number of the first reload of the kind in question; reload numbers
4335 are known to be non-negative. */
4336 for (i = 0; i < noperands; i++)
4337 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4338 for (i = n_reloads - 1; i >= 0; i--)
4339 {
4340 switch (rld[i].when_needed)
4341 {
4342 case RELOAD_FOR_OPERAND_ADDRESS:
4343 if (++first_op_addr_num >= 0)
4344 {
4345 first_op_addr_num = i;
4346 need_change = 1;
4347 }
4348 break;
4349 case RELOAD_FOR_INPUT_ADDRESS:
4350 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4351 {
4352 first_inpaddr_num[rld[i].opnum] = i;
4353 need_change = 1;
4354 }
4355 break;
4356 case RELOAD_FOR_OUTPUT_ADDRESS:
4357 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4358 {
4359 first_outpaddr_num[rld[i].opnum] = i;
4360 need_change = 1;
4361 }
4362 break;
4363 default:
4364 break;
4365 }
4366 }
4367
4368 if (need_change)
4369 {
4370 for (i = 0; i < n_reloads; i++)
4371 {
4372 int first_num;
4373 enum reload_type type;
4374
4375 switch (rld[i].when_needed)
4376 {
4377 case RELOAD_FOR_OPADDR_ADDR:
4378 first_num = first_op_addr_num;
4379 type = RELOAD_FOR_OPERAND_ADDRESS;
4380 break;
4381 case RELOAD_FOR_INPADDR_ADDRESS:
4382 first_num = first_inpaddr_num[rld[i].opnum];
4383 type = RELOAD_FOR_INPUT_ADDRESS;
4384 break;
4385 case RELOAD_FOR_OUTADDR_ADDRESS:
4386 first_num = first_outpaddr_num[rld[i].opnum];
4387 type = RELOAD_FOR_OUTPUT_ADDRESS;
4388 break;
4389 default:
4390 continue;
4391 }
4392 if (first_num < 0)
4393 continue;
4394 else if (i > first_num)
4395 rld[i].when_needed = type;
4396 else
4397 {
4398 /* Check if the only TYPE reload that uses reload I is
4399 reload FIRST_NUM. */
4400 for (j = n_reloads - 1; j > first_num; j--)
4401 {
4402 if (rld[j].when_needed == type
4403 && (rld[i].secondary_p
4404 ? rld[j].secondary_in_reload == i
4405 : reg_mentioned_p (rld[i].in, rld[j].in)))
4406 {
4407 rld[i].when_needed = type;
4408 break;
4409 }
4410 }
4411 }
4412 }
4413 }
4414 }
4415
4416 /* See if we have any reloads that are now allowed to be merged
4417 because we've changed when the reload is needed to
4418 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4419 check for the most common cases. */
4420
4421 for (i = 0; i < n_reloads; i++)
4422 if (rld[i].in != 0 && rld[i].out == 0
4423 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4424 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4425 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4426 for (j = 0; j < n_reloads; j++)
4427 if (i != j && rld[j].in != 0 && rld[j].out == 0
4428 && rld[j].when_needed == rld[i].when_needed
4429 && MATCHES (rld[i].in, rld[j].in)
4430 && rld[i].class == rld[j].class
4431 && !rld[i].nocombine && !rld[j].nocombine
4432 && rld[i].reg_rtx == rld[j].reg_rtx)
4433 {
4434 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4435 transfer_replacements (i, j);
4436 rld[j].in = 0;
4437 }
4438
4439#ifdef HAVE_cc0
4440 /* If we made any reloads for addresses, see if they violate a
4441 "no input reloads" requirement for this insn. But loads that we
4442 do after the insn (such as for output addresses) are fine. */
4443 if (no_input_reloads)
4444 for (i = 0; i < n_reloads; i++)
|
4360 if (rld[i].in != 0
4361 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4362 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4363 abort ();
| 4445 gcc_assert (rld[i].in == 0
4446 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4447 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
|
4364#endif
4365
4366 /* Compute reload_mode and reload_nregs. */
4367 for (i = 0; i < n_reloads; i++)
4368 {
4369 rld[i].mode
4370 = (rld[i].inmode == VOIDmode
4371 || (GET_MODE_SIZE (rld[i].outmode)
4372 > GET_MODE_SIZE (rld[i].inmode)))
4373 ? rld[i].outmode : rld[i].inmode;
4374
4375 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4376 }
4377
4378 /* Special case a simple move with an input reload and a
4379 destination of a hard reg, if the hard reg is ok, use it. */
4380 for (i = 0; i < n_reloads; i++)
4381 if (rld[i].when_needed == RELOAD_FOR_INPUT
4382 && GET_CODE (PATTERN (insn)) == SET
| 4448#endif
4449
4450 /* Compute reload_mode and reload_nregs. */
4451 for (i = 0; i < n_reloads; i++)
4452 {
4453 rld[i].mode
4454 = (rld[i].inmode == VOIDmode
4455 || (GET_MODE_SIZE (rld[i].outmode)
4456 > GET_MODE_SIZE (rld[i].inmode)))
4457 ? rld[i].outmode : rld[i].inmode;
4458
4459 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4460 }
4461
4462 /* Special case a simple move with an input reload and a
4463 destination of a hard reg, if the hard reg is ok, use it. */
4464 for (i = 0; i < n_reloads; i++)
4465 if (rld[i].when_needed == RELOAD_FOR_INPUT
4466 && GET_CODE (PATTERN (insn)) == SET
|
4383 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
| 4467 && REG_P (SET_DEST (PATTERN (insn)))
|
4384 && SET_SRC (PATTERN (insn)) == rld[i].in)
4385 {
4386 rtx dest = SET_DEST (PATTERN (insn));
4387 unsigned int regno = REGNO (dest);
4388
4389 if (regno < FIRST_PSEUDO_REGISTER
4390 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4391 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4392 {
| 4468 && SET_SRC (PATTERN (insn)) == rld[i].in)
4469 {
4470 rtx dest = SET_DEST (PATTERN (insn));
4471 unsigned int regno = REGNO (dest);
4472
4473 if (regno < FIRST_PSEUDO_REGISTER
4474 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4475 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4476 {
|
4393 int nr = HARD_REGNO_NREGS (regno, rld[i].mode);
| 4477 int nr = hard_regno_nregs[regno][rld[i].mode];
|
4394 int ok = 1, nri;
4395
4396 for (nri = 1; nri < nr; nri ++)
4397 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4398 ok = 0;
4399
4400 if (ok)
4401 rld[i].reg_rtx = dest;
4402 }
4403 }
4404
4405 return retval;
4406}
4407
4408/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4409 accepts a memory operand with constant address. */
4410
4411static int
4412alternative_allows_memconst (const char *constraint, int altnum)
4413{
4414 int c;
4415 /* Skip alternatives before the one requested. */
4416 while (altnum > 0)
4417 {
4418 while (*constraint++ != ',');
4419 altnum--;
4420 }
4421 /* Scan the requested alternative for 'm' or 'o'.
4422 If one of them is present, this alternative accepts memory constants. */
4423 for (; (c = *constraint) && c != ',' && c != '#';
4424 constraint += CONSTRAINT_LEN (c, constraint))
4425 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4426 return 1;
4427 return 0;
4428}
4429
4430/* Scan X for memory references and scan the addresses for reloading.
4431 Also checks for references to "constant" regs that we want to eliminate
4432 and replaces them with the values they stand for.
4433 We may alter X destructively if it contains a reference to such.
4434 If X is just a constant reg, we return the equivalent value
4435 instead of X.
4436
4437 IND_LEVELS says how many levels of indirect addressing this machine
4438 supports.
4439
4440 OPNUM and TYPE identify the purpose of the reload.
4441
4442 IS_SET_DEST is true if X is the destination of a SET, which is not
4443 appropriate to be replaced by a constant.
4444
4445 INSN, if nonzero, is the insn in which we do the reload. It is used
4446 to determine if we may generate output reloads, and where to put USEs
4447 for pseudos that we have to replace with stack slots.
4448
4449 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4450 result of find_reloads_address. */
4451
4452static rtx
4453find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4454 int ind_levels, int is_set_dest, rtx insn,
4455 int *address_reloaded)
4456{
4457 RTX_CODE code = GET_CODE (x);
4458
4459 const char *fmt = GET_RTX_FORMAT (code);
4460 int i;
4461 int copied;
4462
4463 if (code == REG)
4464 {
4465 /* This code is duplicated for speed in find_reloads. */
4466 int regno = REGNO (x);
4467 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4468 x = reg_equiv_constant[regno];
4469#if 0
4470 /* This creates (subreg (mem...)) which would cause an unnecessary
4471 reload of the mem. */
4472 else if (reg_equiv_mem[regno] != 0)
4473 x = reg_equiv_mem[regno];
4474#endif
4475 else if (reg_equiv_memory_loc[regno]
4476 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4477 {
4478 rtx mem = make_memloc (x, regno);
4479 if (reg_equiv_address[regno]
4480 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4481 {
4482 /* If this is not a toplevel operand, find_reloads doesn't see
4483 this substitution. We have to emit a USE of the pseudo so
4484 that delete_output_reload can see it. */
4485 if (replace_reloads && recog_data.operand[opnum] != x)
4486 /* We mark the USE with QImode so that we recognize it
4487 as one that can be safely deleted at the end of
4488 reload. */
4489 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4490 QImode);
4491 x = mem;
4492 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4493 opnum, type, ind_levels, insn);
| 4478 int ok = 1, nri;
4479
4480 for (nri = 1; nri < nr; nri ++)
4481 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4482 ok = 0;
4483
4484 if (ok)
4485 rld[i].reg_rtx = dest;
4486 }
4487 }
4488
4489 return retval;
4490}
4491
4492/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4493 accepts a memory operand with constant address. */
4494
4495static int
4496alternative_allows_memconst (const char *constraint, int altnum)
4497{
4498 int c;
4499 /* Skip alternatives before the one requested. */
4500 while (altnum > 0)
4501 {
4502 while (*constraint++ != ',');
4503 altnum--;
4504 }
4505 /* Scan the requested alternative for 'm' or 'o'.
4506 If one of them is present, this alternative accepts memory constants. */
4507 for (; (c = *constraint) && c != ',' && c != '#';
4508 constraint += CONSTRAINT_LEN (c, constraint))
4509 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4510 return 1;
4511 return 0;
4512}
4513
4514/* Scan X for memory references and scan the addresses for reloading.
4515 Also checks for references to "constant" regs that we want to eliminate
4516 and replaces them with the values they stand for.
4517 We may alter X destructively if it contains a reference to such.
4518 If X is just a constant reg, we return the equivalent value
4519 instead of X.
4520
4521 IND_LEVELS says how many levels of indirect addressing this machine
4522 supports.
4523
4524 OPNUM and TYPE identify the purpose of the reload.
4525
4526 IS_SET_DEST is true if X is the destination of a SET, which is not
4527 appropriate to be replaced by a constant.
4528
4529 INSN, if nonzero, is the insn in which we do the reload. It is used
4530 to determine if we may generate output reloads, and where to put USEs
4531 for pseudos that we have to replace with stack slots.
4532
4533 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4534 result of find_reloads_address. */
4535
4536static rtx
4537find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4538 int ind_levels, int is_set_dest, rtx insn,
4539 int *address_reloaded)
4540{
4541 RTX_CODE code = GET_CODE (x);
4542
4543 const char *fmt = GET_RTX_FORMAT (code);
4544 int i;
4545 int copied;
4546
4547 if (code == REG)
4548 {
4549 /* This code is duplicated for speed in find_reloads. */
4550 int regno = REGNO (x);
4551 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4552 x = reg_equiv_constant[regno];
4553#if 0
4554 /* This creates (subreg (mem...)) which would cause an unnecessary
4555 reload of the mem. */
4556 else if (reg_equiv_mem[regno] != 0)
4557 x = reg_equiv_mem[regno];
4558#endif
4559 else if (reg_equiv_memory_loc[regno]
4560 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4561 {
4562 rtx mem = make_memloc (x, regno);
4563 if (reg_equiv_address[regno]
4564 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4565 {
4566 /* If this is not a toplevel operand, find_reloads doesn't see
4567 this substitution. We have to emit a USE of the pseudo so
4568 that delete_output_reload can see it. */
4569 if (replace_reloads && recog_data.operand[opnum] != x)
4570 /* We mark the USE with QImode so that we recognize it
4571 as one that can be safely deleted at the end of
4572 reload. */
4573 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4574 QImode);
4575 x = mem;
4576 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4577 opnum, type, ind_levels, insn);
|
| 4578 if (x != mem)
4579 push_reg_equiv_alt_mem (regno, x);
|
4494 if (address_reloaded)
4495 *address_reloaded = i;
4496 }
4497 }
4498 return x;
4499 }
4500 if (code == MEM)
4501 {
4502 rtx tem = x;
4503
4504 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4505 opnum, type, ind_levels, insn);
4506 if (address_reloaded)
4507 *address_reloaded = i;
4508
4509 return tem;
4510 }
4511
| 4580 if (address_reloaded)
4581 *address_reloaded = i;
4582 }
4583 }
4584 return x;
4585 }
4586 if (code == MEM)
4587 {
4588 rtx tem = x;
4589
4590 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4591 opnum, type, ind_levels, insn);
4592 if (address_reloaded)
4593 *address_reloaded = i;
4594
4595 return tem;
4596 }
4597
|
4512 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
| 4598 if (code == SUBREG && REG_P (SUBREG_REG (x)))
|
4513 {
| 4599 {
|
4514 /* Check for SUBREG containing a REG that's equivalent to a constant.
4515 If the constant has a known value, truncate it right now.
4516 Similarly if we are extracting a single-word of a multi-word
4517 constant. If the constant is symbolic, allow it to be substituted
4518 normally. push_reload will strip the subreg later. If the
4519 constant is VOIDmode, abort because we will lose the mode of
4520 the register (this should never happen because one of the cases
4521 above should handle it). */
| 4600 /* Check for SUBREG containing a REG that's equivalent to a
4601 constant. If the constant has a known value, truncate it
4602 right now. Similarly if we are extracting a single-word of a
4603 multi-word constant. If the constant is symbolic, allow it
4604 to be substituted normally. push_reload will strip the
4605 subreg later. The constant must not be VOIDmode, because we
4606 will lose the mode of the register (this should never happen
4607 because one of the cases above should handle it). */
|
4522
4523 int regno = REGNO (SUBREG_REG (x));
4524 rtx tem;
4525
4526 if (subreg_lowpart_p (x)
| 4608
4609 int regno = REGNO (SUBREG_REG (x));
4610 rtx tem;
4611
4612 if (subreg_lowpart_p (x)
|
4527 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
| 4613 && regno >= FIRST_PSEUDO_REGISTER
4614 && reg_renumber[regno] < 0
|
4528 && reg_equiv_constant[regno] != 0
4529 && (tem = gen_lowpart_common (GET_MODE (x),
4530 reg_equiv_constant[regno])) != 0)
4531 return tem;
4532
| 4615 && reg_equiv_constant[regno] != 0
4616 && (tem = gen_lowpart_common (GET_MODE (x),
4617 reg_equiv_constant[regno])) != 0)
4618 return tem;
4619
|
4533 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
| 4620 if (regno >= FIRST_PSEUDO_REGISTER
4621 && reg_renumber[regno] < 0
|
4534 && reg_equiv_constant[regno] != 0)
4535 {
4536 tem =
4537 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4538 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
| 4622 && reg_equiv_constant[regno] != 0)
4623 {
4624 tem =
4625 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4626 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
|
4539 if (!tem)
4540 abort ();
| 4627 gcc_assert (tem);
|
4541 return tem;
4542 }
4543
4544 /* If the subreg contains a reg that will be converted to a mem,
4545 convert the subreg to a narrower memref now.
4546 Otherwise, we would get (subreg (mem ...) ...),
4547 which would force reload of the mem.
4548
4549 We also need to do this if there is an equivalent MEM that is
4550 not offsettable. In that case, alter_subreg would produce an
4551 invalid address on big-endian machines.
4552
4553 For machines that extend byte loads, we must not reload using
4554 a wider mode if we have a paradoxical SUBREG. find_reloads will
4555 force a reload in that case. So we should not do anything here. */
4556
| 4628 return tem;
4629 }
4630
4631 /* If the subreg contains a reg that will be converted to a mem,
4632 convert the subreg to a narrower memref now.
4633 Otherwise, we would get (subreg (mem ...) ...),
4634 which would force reload of the mem.
4635
4636 We also need to do this if there is an equivalent MEM that is
4637 not offsettable. In that case, alter_subreg would produce an
4638 invalid address on big-endian machines.
4639
4640 For machines that extend byte loads, we must not reload using
4641 a wider mode if we have a paradoxical SUBREG. find_reloads will
4642 force a reload in that case. So we should not do anything here. */
4643
|
4557 else if (regno >= FIRST_PSEUDO_REGISTER
| 4644 if (regno >= FIRST_PSEUDO_REGISTER
|
4558#ifdef LOAD_EXTEND_OP
4559 && (GET_MODE_SIZE (GET_MODE (x))
4560 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4561#endif
4562 && (reg_equiv_address[regno] != 0
4563 || (reg_equiv_mem[regno] != 0
4564 && (! strict_memory_address_p (GET_MODE (x),
4565 XEXP (reg_equiv_mem[regno], 0))
4566 || ! offsettable_memref_p (reg_equiv_mem[regno])
4567 || num_not_at_initial_offset))))
4568 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4569 insn);
4570 }
4571
4572 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4573 {
4574 if (fmt[i] == 'e')
4575 {
4576 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4577 ind_levels, is_set_dest, insn,
4578 address_reloaded);
4579 /* If we have replaced a reg with it's equivalent memory loc -
4580 that can still be handled here e.g. if it's in a paradoxical
4581 subreg - we must make the change in a copy, rather than using
4582 a destructive change. This way, find_reloads can still elect
4583 not to do the change. */
4584 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4585 {
4586 x = shallow_copy_rtx (x);
4587 copied = 1;
4588 }
4589 XEXP (x, i) = new_part;
4590 }
4591 }
4592 return x;
4593}
4594
4595/* Return a mem ref for the memory equivalent of reg REGNO.
4596 This mem ref is not shared with anything. */
4597
4598static rtx
4599make_memloc (rtx ad, int regno)
4600{
4601 /* We must rerun eliminate_regs, in case the elimination
4602 offsets have changed. */
4603 rtx tem
4604 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4605
4606 /* If TEM might contain a pseudo, we must copy it to avoid
4607 modifying it when we do the substitution for the reload. */
4608 if (rtx_varies_p (tem, 0))
4609 tem = copy_rtx (tem);
4610
4611 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4612 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4613
4614 /* Copy the result if it's still the same as the equivalence, to avoid
4615 modifying it when we do the substitution for the reload. */
4616 if (tem == reg_equiv_memory_loc[regno])
4617 tem = copy_rtx (tem);
4618 return tem;
4619}
4620
4621/* Returns true if AD could be turned into a valid memory reference
4622 to mode MODE by reloading the part pointed to by PART into a
4623 register. */
4624
4625static int
4626maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4627{
4628 int retv;
4629 rtx tem = *part;
4630 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4631
4632 *part = reg;
4633 retv = memory_address_p (mode, ad);
4634 *part = tem;
4635
4636 return retv;
4637}
4638
4639/* Record all reloads needed for handling memory address AD
4640 which appears in *LOC in a memory reference to mode MODE
4641 which itself is found in location *MEMREFLOC.
4642 Note that we take shortcuts assuming that no multi-reg machine mode
4643 occurs as part of an address.
4644
4645 OPNUM and TYPE specify the purpose of this reload.
4646
4647 IND_LEVELS says how many levels of indirect addressing this machine
4648 supports.
4649
4650 INSN, if nonzero, is the insn in which we do the reload. It is used
4651 to determine if we may generate output reloads, and where to put USEs
4652 for pseudos that we have to replace with stack slots.
4653
| 4645#ifdef LOAD_EXTEND_OP
4646 && (GET_MODE_SIZE (GET_MODE (x))
4647 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4648#endif
4649 && (reg_equiv_address[regno] != 0
4650 || (reg_equiv_mem[regno] != 0
4651 && (! strict_memory_address_p (GET_MODE (x),
4652 XEXP (reg_equiv_mem[regno], 0))
4653 || ! offsettable_memref_p (reg_equiv_mem[regno])
4654 || num_not_at_initial_offset))))
4655 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4656 insn);
4657 }
4658
4659 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4660 {
4661 if (fmt[i] == 'e')
4662 {
4663 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4664 ind_levels, is_set_dest, insn,
4665 address_reloaded);
4666 /* If we have replaced a reg with it's equivalent memory loc -
4667 that can still be handled here e.g. if it's in a paradoxical
4668 subreg - we must make the change in a copy, rather than using
4669 a destructive change. This way, find_reloads can still elect
4670 not to do the change. */
4671 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4672 {
4673 x = shallow_copy_rtx (x);
4674 copied = 1;
4675 }
4676 XEXP (x, i) = new_part;
4677 }
4678 }
4679 return x;
4680}
4681
4682/* Return a mem ref for the memory equivalent of reg REGNO.
4683 This mem ref is not shared with anything. */
4684
4685static rtx
4686make_memloc (rtx ad, int regno)
4687{
4688 /* We must rerun eliminate_regs, in case the elimination
4689 offsets have changed. */
4690 rtx tem
4691 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4692
4693 /* If TEM might contain a pseudo, we must copy it to avoid
4694 modifying it when we do the substitution for the reload. */
4695 if (rtx_varies_p (tem, 0))
4696 tem = copy_rtx (tem);
4697
4698 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4699 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4700
4701 /* Copy the result if it's still the same as the equivalence, to avoid
4702 modifying it when we do the substitution for the reload. */
4703 if (tem == reg_equiv_memory_loc[regno])
4704 tem = copy_rtx (tem);
4705 return tem;
4706}
4707
4708/* Returns true if AD could be turned into a valid memory reference
4709 to mode MODE by reloading the part pointed to by PART into a
4710 register. */
4711
4712static int
4713maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4714{
4715 int retv;
4716 rtx tem = *part;
4717 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4718
4719 *part = reg;
4720 retv = memory_address_p (mode, ad);
4721 *part = tem;
4722
4723 return retv;
4724}
4725
4726/* Record all reloads needed for handling memory address AD
4727 which appears in *LOC in a memory reference to mode MODE
4728 which itself is found in location *MEMREFLOC.
4729 Note that we take shortcuts assuming that no multi-reg machine mode
4730 occurs as part of an address.
4731
4732 OPNUM and TYPE specify the purpose of this reload.
4733
4734 IND_LEVELS says how many levels of indirect addressing this machine
4735 supports.
4736
4737 INSN, if nonzero, is the insn in which we do the reload. It is used
4738 to determine if we may generate output reloads, and where to put USEs
4739 for pseudos that we have to replace with stack slots.
4740
|
4654 Value is nonzero if this address is reloaded or replaced as a whole.
4655 This is interesting to the caller if the address is an autoincrement.
| 4741 Value is one if this address is reloaded or replaced as a whole; it is
4742 zero if the top level of this address was not reloaded or replaced, and
4743 it is -1 if it may or may not have been reloaded or replaced.
|
4656
4657 Note that there is no verification that the address will be valid after
4658 this routine does its work. Instead, we rely on the fact that the address
4659 was valid when reload started. So we need only undo things that reload
4660 could have broken. These are wrong register types, pseudos not allocated
4661 to a hard register, and frame pointer elimination. */
4662
4663static int
4664find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4665 rtx *loc, int opnum, enum reload_type type,
4666 int ind_levels, rtx insn)
4667{
4668 int regno;
4669 int removed_and = 0;
| 4744
4745 Note that there is no verification that the address will be valid after
4746 this routine does its work. Instead, we rely on the fact that the address
4747 was valid when reload started. So we need only undo things that reload
4748 could have broken. These are wrong register types, pseudos not allocated
4749 to a hard register, and frame pointer elimination. */
4750
4751static int
4752find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4753 rtx *loc, int opnum, enum reload_type type,
4754 int ind_levels, rtx insn)
4755{
4756 int regno;
4757 int removed_and = 0;
|
| 4758 int op_index;
|
4670 rtx tem;
4671
4672 /* If the address is a register, see if it is a legitimate address and
4673 reload if not. We first handle the cases where we need not reload
4674 or where we must reload in a non-standard way. */
4675
| 4759 rtx tem;
4760
4761 /* If the address is a register, see if it is a legitimate address and
4762 reload if not. We first handle the cases where we need not reload
4763 or where we must reload in a non-standard way. */
4764
|
4676 if (GET_CODE (ad) == REG)
| 4765 if (REG_P (ad))
|
4677 {
4678 regno = REGNO (ad);
4679
4680 /* If the register is equivalent to an invariant expression, substitute
4681 the invariant, and eliminate any eliminable register references. */
4682 tem = reg_equiv_constant[regno];
4683 if (tem != 0
4684 && (tem = eliminate_regs (tem, mode, insn))
4685 && strict_memory_address_p (mode, tem))
4686 {
4687 *loc = ad = tem;
4688 return 0;
4689 }
4690
4691 tem = reg_equiv_memory_loc[regno];
4692 if (tem != 0)
4693 {
4694 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4695 {
4696 tem = make_memloc (ad, regno);
4697 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4698 {
| 4766 {
4767 regno = REGNO (ad);
4768
4769 /* If the register is equivalent to an invariant expression, substitute
4770 the invariant, and eliminate any eliminable register references. */
4771 tem = reg_equiv_constant[regno];
4772 if (tem != 0
4773 && (tem = eliminate_regs (tem, mode, insn))
4774 && strict_memory_address_p (mode, tem))
4775 {
4776 *loc = ad = tem;
4777 return 0;
4778 }
4779
4780 tem = reg_equiv_memory_loc[regno];
4781 if (tem != 0)
4782 {
4783 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4784 {
4785 tem = make_memloc (ad, regno);
4786 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4787 {
|
| 4788 rtx orig = tem;
4789
|
4699 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4700 &XEXP (tem, 0), opnum,
4701 ADDR_TYPE (type), ind_levels, insn);
| 4790 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4791 &XEXP (tem, 0), opnum,
4792 ADDR_TYPE (type), ind_levels, insn);
|
| 4793 if (tem != orig)
4794 push_reg_equiv_alt_mem (regno, tem);
|
4702 }
4703 /* We can avoid a reload if the register's equivalent memory
4704 expression is valid as an indirect memory address.
4705 But not all addresses are valid in a mem used as an indirect
4706 address: only reg or reg+constant. */
4707
4708 if (ind_levels > 0
4709 && strict_memory_address_p (mode, tem)
| 4795 }
4796 /* We can avoid a reload if the register's equivalent memory
4797 expression is valid as an indirect memory address.
4798 But not all addresses are valid in a mem used as an indirect
4799 address: only reg or reg+constant. */
4800
4801 if (ind_levels > 0
4802 && strict_memory_address_p (mode, tem)
|
4710 && (GET_CODE (XEXP (tem, 0)) == REG
| 4803 && (REG_P (XEXP (tem, 0))
|
4711 || (GET_CODE (XEXP (tem, 0)) == PLUS
| 4804 || (GET_CODE (XEXP (tem, 0)) == PLUS
|
4712 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
| 4805 && REG_P (XEXP (XEXP (tem, 0), 0))
|
4713 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4714 {
4715 /* TEM is not the same as what we'll be replacing the
4716 pseudo with after reload, put a USE in front of INSN
4717 in the final reload pass. */
4718 if (replace_reloads
4719 && num_not_at_initial_offset
4720 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4721 {
4722 *loc = tem;
4723 /* We mark the USE with QImode so that we
4724 recognize it as one that can be safely
4725 deleted at the end of reload. */
4726 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4727 insn), QImode);
4728
4729 /* This doesn't really count as replacing the address
4730 as a whole, since it is still a memory access. */
4731 }
4732 return 0;
4733 }
4734 ad = tem;
4735 }
4736 }
4737
4738 /* The only remaining case where we can avoid a reload is if this is a
4739 hard register that is valid as a base register and which is not the
4740 subject of a CLOBBER in this insn. */
4741
4742 else if (regno < FIRST_PSEUDO_REGISTER
| 4806 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4807 {
4808 /* TEM is not the same as what we'll be replacing the
4809 pseudo with after reload, put a USE in front of INSN
4810 in the final reload pass. */
4811 if (replace_reloads
4812 && num_not_at_initial_offset
4813 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4814 {
4815 *loc = tem;
4816 /* We mark the USE with QImode so that we
4817 recognize it as one that can be safely
4818 deleted at the end of reload. */
4819 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4820 insn), QImode);
4821
4822 /* This doesn't really count as replacing the address
4823 as a whole, since it is still a memory access. */
4824 }
4825 return 0;
4826 }
4827 ad = tem;
4828 }
4829 }
4830
4831 /* The only remaining case where we can avoid a reload is if this is a
4832 hard register that is valid as a base register and which is not the
4833 subject of a CLOBBER in this insn. */
4834
4835 else if (regno < FIRST_PSEUDO_REGISTER
|
4743 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
| 4836 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
|
4744 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4745 return 0;
4746
4747 /* If we do not have one of the cases above, we must do the reload. */
| 4837 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4838 return 0;
4839
4840 /* If we do not have one of the cases above, we must do the reload. */
|
4748 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
| 4841 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
|
4749 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4750 return 1;
4751 }
4752
4753 if (strict_memory_address_p (mode, ad))
4754 {
4755 /* The address appears valid, so reloads are not needed.
4756 But the address may contain an eliminable register.
4757 This can happen because a machine with indirect addressing
4758 may consider a pseudo register by itself a valid address even when
4759 it has failed to get a hard reg.
4760 So do a tree-walk to find and eliminate all such regs. */
4761
4762 /* But first quickly dispose of a common case. */
4763 if (GET_CODE (ad) == PLUS
4764 && GET_CODE (XEXP (ad, 1)) == CONST_INT
| 4842 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4843 return 1;
4844 }
4845
4846 if (strict_memory_address_p (mode, ad))
4847 {
4848 /* The address appears valid, so reloads are not needed.
4849 But the address may contain an eliminable register.
4850 This can happen because a machine with indirect addressing
4851 may consider a pseudo register by itself a valid address even when
4852 it has failed to get a hard reg.
4853 So do a tree-walk to find and eliminate all such regs. */
4854
4855 /* But first quickly dispose of a common case. */
4856 if (GET_CODE (ad) == PLUS
4857 && GET_CODE (XEXP (ad, 1)) == CONST_INT
|
4765 && GET_CODE (XEXP (ad, 0)) == REG
| 4858 && REG_P (XEXP (ad, 0))
|
4766 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4767 return 0;
4768
4769 subst_reg_equivs_changed = 0;
4770 *loc = subst_reg_equivs (ad, insn);
4771
4772 if (! subst_reg_equivs_changed)
4773 return 0;
4774
4775 /* Check result for validity after substitution. */
4776 if (strict_memory_address_p (mode, ad))
4777 return 0;
4778 }
4779
4780#ifdef LEGITIMIZE_RELOAD_ADDRESS
4781 do
4782 {
4783 if (memrefloc)
4784 {
4785 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4786 ind_levels, win);
4787 }
4788 break;
4789 win:
4790 *memrefloc = copy_rtx (*memrefloc);
4791 XEXP (*memrefloc, 0) = ad;
4792 move_replacements (&ad, &XEXP (*memrefloc, 0));
| 4859 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4860 return 0;
4861
4862 subst_reg_equivs_changed = 0;
4863 *loc = subst_reg_equivs (ad, insn);
4864
4865 if (! subst_reg_equivs_changed)
4866 return 0;
4867
4868 /* Check result for validity after substitution. */
4869 if (strict_memory_address_p (mode, ad))
4870 return 0;
4871 }
4872
4873#ifdef LEGITIMIZE_RELOAD_ADDRESS
4874 do
4875 {
4876 if (memrefloc)
4877 {
4878 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4879 ind_levels, win);
4880 }
4881 break;
4882 win:
4883 *memrefloc = copy_rtx (*memrefloc);
4884 XEXP (*memrefloc, 0) = ad;
4885 move_replacements (&ad, &XEXP (*memrefloc, 0));
|
4793 return 1;
| 4886 return -1;
|
4794 }
4795 while (0);
4796#endif
4797
4798 /* The address is not valid. We have to figure out why. First see if
4799 we have an outer AND and remove it if so. Then analyze what's inside. */
4800
4801 if (GET_CODE (ad) == AND)
4802 {
4803 removed_and = 1;
4804 loc = &XEXP (ad, 0);
4805 ad = *loc;
4806 }
4807
4808 /* One possibility for why the address is invalid is that it is itself
4809 a MEM. This can happen when the frame pointer is being eliminated, a
4810 pseudo is not allocated to a hard register, and the offset between the
4811 frame and stack pointers is not its initial value. In that case the
4812 pseudo will have been replaced by a MEM referring to the
4813 stack pointer. */
| 4887 }
4888 while (0);
4889#endif
4890
4891 /* The address is not valid. We have to figure out why. First see if
4892 we have an outer AND and remove it if so. Then analyze what's inside. */
4893
4894 if (GET_CODE (ad) == AND)
4895 {
4896 removed_and = 1;
4897 loc = &XEXP (ad, 0);
4898 ad = *loc;
4899 }
4900
4901 /* One possibility for why the address is invalid is that it is itself
4902 a MEM. This can happen when the frame pointer is being eliminated, a
4903 pseudo is not allocated to a hard register, and the offset between the
4904 frame and stack pointers is not its initial value. In that case the
4905 pseudo will have been replaced by a MEM referring to the
4906 stack pointer. */
|
4814 if (GET_CODE (ad) == MEM)
| 4907 if (MEM_P (ad))
|
4815 {
4816 /* First ensure that the address in this MEM is valid. Then, unless
4817 indirect addresses are valid, reload the MEM into a register. */
4818 tem = ad;
4819 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4820 opnum, ADDR_TYPE (type),
4821 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4822
4823 /* If tem was changed, then we must create a new memory reference to
4824 hold it and store it back into memrefloc. */
4825 if (tem != ad && memrefloc)
4826 {
4827 *memrefloc = copy_rtx (*memrefloc);
4828 copy_replacements (tem, XEXP (*memrefloc, 0));
4829 loc = &XEXP (*memrefloc, 0);
4830 if (removed_and)
4831 loc = &XEXP (*loc, 0);
4832 }
4833
4834 /* Check similar cases as for indirect addresses as above except
4835 that we can allow pseudos and a MEM since they should have been
4836 taken care of above. */
4837
4838 if (ind_levels == 0
4839 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
| 4908 {
4909 /* First ensure that the address in this MEM is valid. Then, unless
4910 indirect addresses are valid, reload the MEM into a register. */
4911 tem = ad;
4912 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4913 opnum, ADDR_TYPE (type),
4914 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4915
4916 /* If tem was changed, then we must create a new memory reference to
4917 hold it and store it back into memrefloc. */
4918 if (tem != ad && memrefloc)
4919 {
4920 *memrefloc = copy_rtx (*memrefloc);
4921 copy_replacements (tem, XEXP (*memrefloc, 0));
4922 loc = &XEXP (*memrefloc, 0);
4923 if (removed_and)
4924 loc = &XEXP (*loc, 0);
4925 }
4926
4927 /* Check similar cases as for indirect addresses as above except
4928 that we can allow pseudos and a MEM since they should have been
4929 taken care of above. */
4930
4931 if (ind_levels == 0
4932 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
|
4840 || GET_CODE (XEXP (tem, 0)) == MEM
4841 || ! (GET_CODE (XEXP (tem, 0)) == REG
| 4933 || MEM_P (XEXP (tem, 0))
4934 || ! (REG_P (XEXP (tem, 0))
|
4842 || (GET_CODE (XEXP (tem, 0)) == PLUS
| 4935 || (GET_CODE (XEXP (tem, 0)) == PLUS
|
4843 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
| 4936 && REG_P (XEXP (XEXP (tem, 0), 0))
|
4844 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4845 {
4846 /* Must use TEM here, not AD, since it is the one that will
4847 have any subexpressions reloaded, if needed. */
4848 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
| 4937 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4938 {
4939 /* Must use TEM here, not AD, since it is the one that will
4940 have any subexpressions reloaded, if needed. */
4941 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
|
4849 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
| 4942 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
|
4850 VOIDmode, 0,
4851 0, opnum, type);
4852 return ! removed_and;
4853 }
4854 else
4855 return 0;
4856 }
4857
4858 /* If we have address of a stack slot but it's not valid because the
4859 displacement is too large, compute the sum in a register.
4860 Handle all base registers here, not just fp/ap/sp, because on some
4861 targets (namely SH) we can also get too large displacements from
4862 big-endian corrections. */
4863 else if (GET_CODE (ad) == PLUS
| 4943 VOIDmode, 0,
4944 0, opnum, type);
4945 return ! removed_and;
4946 }
4947 else
4948 return 0;
4949 }
4950
4951 /* If we have address of a stack slot but it's not valid because the
4952 displacement is too large, compute the sum in a register.
4953 Handle all base registers here, not just fp/ap/sp, because on some
4954 targets (namely SH) we can also get too large displacements from
4955 big-endian corrections. */
4956 else if (GET_CODE (ad) == PLUS
|
4864 && GET_CODE (XEXP (ad, 0)) == REG
| 4957 && REG_P (XEXP (ad, 0))
|
4865 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
| 4958 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
|
4866 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4867 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
| 4959 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4960 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
4961 CONST_INT))
4962
|
4868 {
4869 /* Unshare the MEM rtx so we can safely alter it. */
4870 if (memrefloc)
4871 {
4872 *memrefloc = copy_rtx (*memrefloc);
4873 loc = &XEXP (*memrefloc, 0);
4874 if (removed_and)
4875 loc = &XEXP (*loc, 0);
4876 }
4877
4878 if (double_reg_address_ok)
4879 {
4880 /* Unshare the sum as well. */
4881 *loc = ad = copy_rtx (ad);
4882
4883 /* Reload the displacement into an index reg.
4884 We assume the frame pointer or arg pointer is a base reg. */
4885 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4886 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4887 type, ind_levels);
4888 return 0;
4889 }
4890 else
4891 {
4892 /* If the sum of two regs is not necessarily valid,
4893 reload the sum into a base reg.
4894 That will at least work. */
| 4963 {
4964 /* Unshare the MEM rtx so we can safely alter it. */
4965 if (memrefloc)
4966 {
4967 *memrefloc = copy_rtx (*memrefloc);
4968 loc = &XEXP (*memrefloc, 0);
4969 if (removed_and)
4970 loc = &XEXP (*loc, 0);
4971 }
4972
4973 if (double_reg_address_ok)
4974 {
4975 /* Unshare the sum as well. */
4976 *loc = ad = copy_rtx (ad);
4977
4978 /* Reload the displacement into an index reg.
4979 We assume the frame pointer or arg pointer is a base reg. */
4980 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4981 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4982 type, ind_levels);
4983 return 0;
4984 }
4985 else
4986 {
4987 /* If the sum of two regs is not necessarily valid,
4988 reload the sum into a base reg.
4989 That will at least work. */
|
4895 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
| 4990 find_reloads_address_part (ad, loc,
4991 base_reg_class (mode, MEM, SCRATCH),
|
4896 Pmode, opnum, type, ind_levels);
4897 }
4898 return ! removed_and;
4899 }
4900
4901 /* If we have an indexed stack slot, there are three possible reasons why
4902 it might be invalid: The index might need to be reloaded, the address
4903 might have been made by frame pointer elimination and hence have a
4904 constant out of range, or both reasons might apply.
4905
4906 We can easily check for an index needing reload, but even if that is the
4907 case, we might also have an invalid constant. To avoid making the
4908 conservative assumption and requiring two reloads, we see if this address
4909 is valid when not interpreted strictly. If it is, the only problem is
4910 that the index needs a reload and find_reloads_address_1 will take care
4911 of it.
4912
4913 Handle all base registers here, not just fp/ap/sp, because on some
4914 targets (namely SPARC) we can also get invalid addresses from preventive
| 4992 Pmode, opnum, type, ind_levels);
4993 }
4994 return ! removed_and;
4995 }
4996
4997 /* If we have an indexed stack slot, there are three possible reasons why
4998 it might be invalid: The index might need to be reloaded, the address
4999 might have been made by frame pointer elimination and hence have a
5000 constant out of range, or both reasons might apply.
5001
5002 We can easily check for an index needing reload, but even if that is the
5003 case, we might also have an invalid constant. To avoid making the
5004 conservative assumption and requiring two reloads, we see if this address
5005 is valid when not interpreted strictly. If it is, the only problem is
5006 that the index needs a reload and find_reloads_address_1 will take care
5007 of it.
5008
5009 Handle all base registers here, not just fp/ap/sp, because on some
5010 targets (namely SPARC) we can also get invalid addresses from preventive
|
4915 subreg big-endian corrections made by find_reloads_toplev.
| 5011 subreg big-endian corrections made by find_reloads_toplev. We
5012 can also get expressions involving LO_SUM (rather than PLUS) from
5013 find_reloads_subreg_address.
|
4916
4917 If we decide to do something, it must be that `double_reg_address_ok'
4918 is true. We generate a reload of the base register + constant and
4919 rework the sum so that the reload register will be added to the index.
4920 This is safe because we know the address isn't shared.
4921
4922 We check for the base register as both the first and second operand of
| 5014
5015 If we decide to do something, it must be that `double_reg_address_ok'
5016 is true. We generate a reload of the base register + constant and
5017 rework the sum so that the reload register will be added to the index.
5018 This is safe because we know the address isn't shared.
5019
5020 We check for the base register as both the first and second operand of
|
4923 the innermost PLUS. */
| 5021 the innermost PLUS and/or LO_SUM. */
|
4924
| 5022
|
4925 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4926 && GET_CODE (XEXP (ad, 0)) == PLUS
4927 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4928 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4929 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4930 || XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4931#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4932 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4933#endif
4934#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4935 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4936#endif
4937 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4938 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
| 5023 for (op_index = 0; op_index < 2; ++op_index)
|
4939 {
| 5024 {
|
4940 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4941 plus_constant (XEXP (XEXP (ad, 0), 0),
4942 INTVAL (XEXP (ad, 1))),
4943 XEXP (XEXP (ad, 0), 1));
4944 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4945 MODE_BASE_REG_CLASS (mode),
4946 GET_MODE (ad), opnum, type, ind_levels);
4947 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4948 type, 0, insn);
| 5025 rtx operand, addend;
5026 enum rtx_code inner_code;
|
4949
| 5027
|
4950 return 0;
4951 }
| 5028 if (GET_CODE (ad) != PLUS)
5029 continue;
|
4952
| 5030
|
4953 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4954 && GET_CODE (XEXP (ad, 0)) == PLUS
4955 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4956 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4957 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4958 || XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
| 5031 inner_code = GET_CODE (XEXP (ad, 0));
5032 if (!(GET_CODE (ad) == PLUS
5033 && GET_CODE (XEXP (ad, 1)) == CONST_INT
5034 && (inner_code == PLUS || inner_code == LO_SUM)))
5035 continue;
5036
5037 operand = XEXP (XEXP (ad, 0), op_index);
5038 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5039 continue;
5040
5041 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5042
5043 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5044 GET_CODE (addend))
5045 || operand == frame_pointer_rtx
|
4959#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
| 5046#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
|
4960 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
| 5047 || operand == hard_frame_pointer_rtx
|
4961#endif
4962#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
| 5048#endif
5049#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
|
4963 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
| 5050 || operand == arg_pointer_rtx
|
4964#endif
| 5051#endif
|
4965 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4966 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4967 {
4968 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4969 XEXP (XEXP (ad, 0), 0),
4970 plus_constant (XEXP (XEXP (ad, 0), 1),
4971 INTVAL (XEXP (ad, 1))));
4972 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4973 MODE_BASE_REG_CLASS (mode),
4974 GET_MODE (ad), opnum, type, ind_levels);
4975 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4976 type, 0, insn);
| 5052 || operand == stack_pointer_rtx)
5053 && ! maybe_memory_address_p (mode, ad,
5054 &XEXP (XEXP (ad, 0), 1 - op_index)))
5055 {
5056 rtx offset_reg;
5057 enum reg_class cls;
|
4977
| 5058
|
4978 return 0;
| 5059 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5060
5061 /* Form the adjusted address. */
5062 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5063 ad = gen_rtx_PLUS (GET_MODE (ad),
5064 op_index == 0 ? offset_reg : addend,
5065 op_index == 0 ? addend : offset_reg);
5066 else
5067 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5068 op_index == 0 ? offset_reg : addend,
5069 op_index == 0 ? addend : offset_reg);
5070 *loc = ad;
5071
5072 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5073 find_reloads_address_part (XEXP (ad, op_index),
5074 &XEXP (ad, op_index), cls,
5075 GET_MODE (ad), opnum, type, ind_levels);
5076 find_reloads_address_1 (mode,
5077 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5078 GET_CODE (XEXP (ad, op_index)),
5079 &XEXP (ad, 1 - op_index), opnum,
5080 type, 0, insn);
5081
5082 return 0;
5083 }
|
4979 }
4980
4981 /* See if address becomes valid when an eliminable register
4982 in a sum is replaced. */
4983
4984 tem = ad;
4985 if (GET_CODE (ad) == PLUS)
4986 tem = subst_indexed_address (ad);
4987 if (tem != ad && strict_memory_address_p (mode, tem))
4988 {
4989 /* Ok, we win that way. Replace any additional eliminable
4990 registers. */
4991
4992 subst_reg_equivs_changed = 0;
4993 tem = subst_reg_equivs (tem, insn);
4994
4995 /* Make sure that didn't make the address invalid again. */
4996
4997 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4998 {
4999 *loc = tem;
5000 return 0;
5001 }
5002 }
5003
5004 /* If constants aren't valid addresses, reload the constant address
5005 into a register. */
5006 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5007 {
5008 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5009 Unshare it so we can safely alter it. */
5010 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5011 && CONSTANT_POOL_ADDRESS_P (ad))
5012 {
5013 *memrefloc = copy_rtx (*memrefloc);
5014 loc = &XEXP (*memrefloc, 0);
5015 if (removed_and)
5016 loc = &XEXP (*loc, 0);
5017 }
5018
| 5084 }
5085
5086 /* See if address becomes valid when an eliminable register
5087 in a sum is replaced. */
5088
5089 tem = ad;
5090 if (GET_CODE (ad) == PLUS)
5091 tem = subst_indexed_address (ad);
5092 if (tem != ad && strict_memory_address_p (mode, tem))
5093 {
5094 /* Ok, we win that way. Replace any additional eliminable
5095 registers. */
5096
5097 subst_reg_equivs_changed = 0;
5098 tem = subst_reg_equivs (tem, insn);
5099
5100 /* Make sure that didn't make the address invalid again. */
5101
5102 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5103 {
5104 *loc = tem;
5105 return 0;
5106 }
5107 }
5108
5109 /* If constants aren't valid addresses, reload the constant address
5110 into a register. */
5111 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5112 {
5113 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5114 Unshare it so we can safely alter it. */
5115 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5116 && CONSTANT_POOL_ADDRESS_P (ad))
5117 {
5118 *memrefloc = copy_rtx (*memrefloc);
5119 loc = &XEXP (*memrefloc, 0);
5120 if (removed_and)
5121 loc = &XEXP (*loc, 0);
5122 }
5123
|
5019 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
| 5124 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
|
5020 Pmode, opnum, type, ind_levels);
5021 return ! removed_and;
5022 }
5023
| 5125 Pmode, opnum, type, ind_levels);
5126 return ! removed_and;
5127 }
5128
|
5024 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
5025 insn);
| 5129 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5130 ind_levels, insn);
|
5026}
5027
5028/* Find all pseudo regs appearing in AD
5029 that are eliminable in favor of equivalent values
5030 and do not have hard regs; replace them by their equivalents.
5031 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5032 front of it for pseudos that we have to replace with stack slots. */
5033
5034static rtx
5035subst_reg_equivs (rtx ad, rtx insn)
5036{
5037 RTX_CODE code = GET_CODE (ad);
5038 int i;
5039 const char *fmt;
5040
5041 switch (code)
5042 {
5043 case HIGH:
5044 case CONST_INT:
5045 case CONST:
5046 case CONST_DOUBLE:
5047 case CONST_VECTOR:
5048 case SYMBOL_REF:
5049 case LABEL_REF:
5050 case PC:
5051 case CC0:
5052 return ad;
5053
5054 case REG:
5055 {
5056 int regno = REGNO (ad);
5057
5058 if (reg_equiv_constant[regno] != 0)
5059 {
5060 subst_reg_equivs_changed = 1;
5061 return reg_equiv_constant[regno];
5062 }
5063 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5064 {
5065 rtx mem = make_memloc (ad, regno);
5066 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5067 {
5068 subst_reg_equivs_changed = 1;
5069 /* We mark the USE with QImode so that we recognize it
5070 as one that can be safely deleted at the end of
5071 reload. */
5072 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5073 QImode);
5074 return mem;
5075 }
5076 }
5077 }
5078 return ad;
5079
5080 case PLUS:
5081 /* Quickly dispose of a common case. */
5082 if (XEXP (ad, 0) == frame_pointer_rtx
5083 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5084 return ad;
5085 break;
5086
5087 default:
5088 break;
5089 }
5090
5091 fmt = GET_RTX_FORMAT (code);
5092 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5093 if (fmt[i] == 'e')
5094 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5095 return ad;
5096}
5097
5098/* Compute the sum of X and Y, making canonicalizations assumed in an
5099 address, namely: sum constant integers, surround the sum of two
5100 constants with a CONST, put the constant as the second operand, and
5101 group the constant on the outermost sum.
5102
5103 This routine assumes both inputs are already in canonical form. */
5104
5105rtx
5106form_sum (rtx x, rtx y)
5107{
5108 rtx tem;
5109 enum machine_mode mode = GET_MODE (x);
5110
5111 if (mode == VOIDmode)
5112 mode = GET_MODE (y);
5113
5114 if (mode == VOIDmode)
5115 mode = Pmode;
5116
5117 if (GET_CODE (x) == CONST_INT)
5118 return plus_constant (y, INTVAL (x));
5119 else if (GET_CODE (y) == CONST_INT)
5120 return plus_constant (x, INTVAL (y));
5121 else if (CONSTANT_P (x))
5122 tem = x, x = y, y = tem;
5123
5124 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5125 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5126
5127 /* Note that if the operands of Y are specified in the opposite
5128 order in the recursive calls below, infinite recursion will occur. */
5129 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5130 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5131
5132 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5133 constant will have been placed second. */
5134 if (CONSTANT_P (x) && CONSTANT_P (y))
5135 {
5136 if (GET_CODE (x) == CONST)
5137 x = XEXP (x, 0);
5138 if (GET_CODE (y) == CONST)
5139 y = XEXP (y, 0);
5140
5141 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5142 }
5143
5144 return gen_rtx_PLUS (mode, x, y);
5145}
5146
5147/* If ADDR is a sum containing a pseudo register that should be
5148 replaced with a constant (from reg_equiv_constant),
5149 return the result of doing so, and also apply the associative
5150 law so that the result is more likely to be a valid address.
5151 (But it is not guaranteed to be one.)
5152
5153 Note that at most one register is replaced, even if more are
5154 replaceable. Also, we try to put the result into a canonical form
5155 so it is more likely to be a valid address.
5156
5157 In all other cases, return ADDR. */
5158
5159static rtx
5160subst_indexed_address (rtx addr)
5161{
5162 rtx op0 = 0, op1 = 0, op2 = 0;
5163 rtx tem;
5164 int regno;
5165
5166 if (GET_CODE (addr) == PLUS)
5167 {
5168 /* Try to find a register to replace. */
5169 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
| 5131}
5132
5133/* Find all pseudo regs appearing in AD
5134 that are eliminable in favor of equivalent values
5135 and do not have hard regs; replace them by their equivalents.
5136 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5137 front of it for pseudos that we have to replace with stack slots. */
5138
5139static rtx
5140subst_reg_equivs (rtx ad, rtx insn)
5141{
5142 RTX_CODE code = GET_CODE (ad);
5143 int i;
5144 const char *fmt;
5145
5146 switch (code)
5147 {
5148 case HIGH:
5149 case CONST_INT:
5150 case CONST:
5151 case CONST_DOUBLE:
5152 case CONST_VECTOR:
5153 case SYMBOL_REF:
5154 case LABEL_REF:
5155 case PC:
5156 case CC0:
5157 return ad;
5158
5159 case REG:
5160 {
5161 int regno = REGNO (ad);
5162
5163 if (reg_equiv_constant[regno] != 0)
5164 {
5165 subst_reg_equivs_changed = 1;
5166 return reg_equiv_constant[regno];
5167 }
5168 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5169 {
5170 rtx mem = make_memloc (ad, regno);
5171 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5172 {
5173 subst_reg_equivs_changed = 1;
5174 /* We mark the USE with QImode so that we recognize it
5175 as one that can be safely deleted at the end of
5176 reload. */
5177 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5178 QImode);
5179 return mem;
5180 }
5181 }
5182 }
5183 return ad;
5184
5185 case PLUS:
5186 /* Quickly dispose of a common case. */
5187 if (XEXP (ad, 0) == frame_pointer_rtx
5188 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5189 return ad;
5190 break;
5191
5192 default:
5193 break;
5194 }
5195
5196 fmt = GET_RTX_FORMAT (code);
5197 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5198 if (fmt[i] == 'e')
5199 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5200 return ad;
5201}
5202
5203/* Compute the sum of X and Y, making canonicalizations assumed in an
5204 address, namely: sum constant integers, surround the sum of two
5205 constants with a CONST, put the constant as the second operand, and
5206 group the constant on the outermost sum.
5207
5208 This routine assumes both inputs are already in canonical form. */
5209
5210rtx
5211form_sum (rtx x, rtx y)
5212{
5213 rtx tem;
5214 enum machine_mode mode = GET_MODE (x);
5215
5216 if (mode == VOIDmode)
5217 mode = GET_MODE (y);
5218
5219 if (mode == VOIDmode)
5220 mode = Pmode;
5221
5222 if (GET_CODE (x) == CONST_INT)
5223 return plus_constant (y, INTVAL (x));
5224 else if (GET_CODE (y) == CONST_INT)
5225 return plus_constant (x, INTVAL (y));
5226 else if (CONSTANT_P (x))
5227 tem = x, x = y, y = tem;
5228
5229 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5230 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5231
5232 /* Note that if the operands of Y are specified in the opposite
5233 order in the recursive calls below, infinite recursion will occur. */
5234 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5235 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5236
5237 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5238 constant will have been placed second. */
5239 if (CONSTANT_P (x) && CONSTANT_P (y))
5240 {
5241 if (GET_CODE (x) == CONST)
5242 x = XEXP (x, 0);
5243 if (GET_CODE (y) == CONST)
5244 y = XEXP (y, 0);
5245
5246 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5247 }
5248
5249 return gen_rtx_PLUS (mode, x, y);
5250}
5251
5252/* If ADDR is a sum containing a pseudo register that should be
5253 replaced with a constant (from reg_equiv_constant),
5254 return the result of doing so, and also apply the associative
5255 law so that the result is more likely to be a valid address.
5256 (But it is not guaranteed to be one.)
5257
5258 Note that at most one register is replaced, even if more are
5259 replaceable. Also, we try to put the result into a canonical form
5260 so it is more likely to be a valid address.
5261
5262 In all other cases, return ADDR. */
5263
5264static rtx
5265subst_indexed_address (rtx addr)
5266{
5267 rtx op0 = 0, op1 = 0, op2 = 0;
5268 rtx tem;
5269 int regno;
5270
5271 if (GET_CODE (addr) == PLUS)
5272 {
5273 /* Try to find a register to replace. */
5274 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
|
5170 if (GET_CODE (op0) == REG
| 5275 if (REG_P (op0)
|
5171 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5172 && reg_renumber[regno] < 0
5173 && reg_equiv_constant[regno] != 0)
5174 op0 = reg_equiv_constant[regno];
| 5276 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5277 && reg_renumber[regno] < 0
5278 && reg_equiv_constant[regno] != 0)
5279 op0 = reg_equiv_constant[regno];
|
5175 else if (GET_CODE (op1) == REG
| 5280 else if (REG_P (op1)
|
5176 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5177 && reg_renumber[regno] < 0
5178 && reg_equiv_constant[regno] != 0)
5179 op1 = reg_equiv_constant[regno];
5180 else if (GET_CODE (op0) == PLUS
5181 && (tem = subst_indexed_address (op0)) != op0)
5182 op0 = tem;
5183 else if (GET_CODE (op1) == PLUS
5184 && (tem = subst_indexed_address (op1)) != op1)
5185 op1 = tem;
5186 else
5187 return addr;
5188
5189 /* Pick out up to three things to add. */
5190 if (GET_CODE (op1) == PLUS)
5191 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5192 else if (GET_CODE (op0) == PLUS)
5193 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5194
5195 /* Compute the sum. */
5196 if (op2 != 0)
5197 op1 = form_sum (op1, op2);
5198 if (op1 != 0)
5199 op0 = form_sum (op0, op1);
5200
5201 return op0;
5202 }
5203 return addr;
5204}
5205
5206/* Update the REG_INC notes for an insn. It updates all REG_INC
5207 notes for the instruction which refer to REGNO the to refer
5208 to the reload number.
5209
5210 INSN is the insn for which any REG_INC notes need updating.
5211
5212 REGNO is the register number which has been reloaded.
5213
5214 RELOADNUM is the reload number. */
5215
5216static void
5217update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5218 int reloadnum ATTRIBUTE_UNUSED)
5219{
5220#ifdef AUTO_INC_DEC
5221 rtx link;
5222
5223 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5224 if (REG_NOTE_KIND (link) == REG_INC
5225 && (int) REGNO (XEXP (link, 0)) == regno)
5226 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5227#endif
5228}
5229
5230/* Record the pseudo registers we must reload into hard registers in a
5231 subexpression of a would-be memory address, X referring to a value
5232 in mode MODE. (This function is not called if the address we find
5233 is strictly valid.)
5234
5235 CONTEXT = 1 means we are considering regs as index regs,
5236 = 0 means we are considering them as base regs.
| 5281 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5282 && reg_renumber[regno] < 0
5283 && reg_equiv_constant[regno] != 0)
5284 op1 = reg_equiv_constant[regno];
5285 else if (GET_CODE (op0) == PLUS
5286 && (tem = subst_indexed_address (op0)) != op0)
5287 op0 = tem;
5288 else if (GET_CODE (op1) == PLUS
5289 && (tem = subst_indexed_address (op1)) != op1)
5290 op1 = tem;
5291 else
5292 return addr;
5293
5294 /* Pick out up to three things to add. */
5295 if (GET_CODE (op1) == PLUS)
5296 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5297 else if (GET_CODE (op0) == PLUS)
5298 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5299
5300 /* Compute the sum. */
5301 if (op2 != 0)
5302 op1 = form_sum (op1, op2);
5303 if (op1 != 0)
5304 op0 = form_sum (op0, op1);
5305
5306 return op0;
5307 }
5308 return addr;
5309}
5310
5311/* Update the REG_INC notes for an insn. It updates all REG_INC
5312 notes for the instruction which refer to REGNO the to refer
5313 to the reload number.
5314
5315 INSN is the insn for which any REG_INC notes need updating.
5316
5317 REGNO is the register number which has been reloaded.
5318
5319 RELOADNUM is the reload number. */
5320
5321static void
5322update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5323 int reloadnum ATTRIBUTE_UNUSED)
5324{
5325#ifdef AUTO_INC_DEC
5326 rtx link;
5327
5328 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5329 if (REG_NOTE_KIND (link) == REG_INC
5330 && (int) REGNO (XEXP (link, 0)) == regno)
5331 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5332#endif
5333}
5334
5335/* Record the pseudo registers we must reload into hard registers in a
5336 subexpression of a would-be memory address, X referring to a value
5337 in mode MODE. (This function is not called if the address we find
5338 is strictly valid.)
5339
5340 CONTEXT = 1 means we are considering regs as index regs,
5341 = 0 means we are considering them as base regs.
|
5237
| 5342 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5343 or an autoinc code.
5344 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5345 is the code of the index part of the address. Otherwise, pass SCRATCH
5346 for this argument.
|
5238 OPNUM and TYPE specify the purpose of any reloads made.
5239
5240 IND_LEVELS says how many levels of indirect addressing are
5241 supported at this point in the address.
5242
5243 INSN, if nonzero, is the insn in which we do the reload. It is used
5244 to determine if we may generate output reloads.
5245
5246 We return nonzero if X, as a whole, is reloaded or replaced. */
5247
5248/* Note that we take shortcuts assuming that no multi-reg machine mode
5249 occurs as part of an address.
5250 Also, this is not fully machine-customizable; it works for machines
5251 such as VAXen and 68000's and 32000's, but other possible machines
| 5347 OPNUM and TYPE specify the purpose of any reloads made.
5348
5349 IND_LEVELS says how many levels of indirect addressing are
5350 supported at this point in the address.
5351
5352 INSN, if nonzero, is the insn in which we do the reload. It is used
5353 to determine if we may generate output reloads.
5354
5355 We return nonzero if X, as a whole, is reloaded or replaced. */
5356
5357/* Note that we take shortcuts assuming that no multi-reg machine mode
5358 occurs as part of an address.
5359 Also, this is not fully machine-customizable; it works for machines
5360 such as VAXen and 68000's and 32000's, but other possible machines
|
5252 could have addressing modes that this does not handle right. */
| 5361 could have addressing modes that this does not handle right.
5362 If you add push_reload calls here, you need to make sure gen_reload
5363 handles those cases gracefully. */
|
5253
5254static int
5255find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
| 5364
5365static int
5366find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
|
| 5367 enum rtx_code outer_code, enum rtx_code index_code,
|
5256 rtx *loc, int opnum, enum reload_type type,
5257 int ind_levels, rtx insn)
5258{
| 5368 rtx *loc, int opnum, enum reload_type type,
5369 int ind_levels, rtx insn)
5370{
|
| 5371#define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5372 ((CONTEXT) == 0 \
5373 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5374 : REGNO_OK_FOR_INDEX_P (REGNO))
5375
5376 enum reg_class context_reg_class;
|
5259 RTX_CODE code = GET_CODE (x);
5260
| 5377 RTX_CODE code = GET_CODE (x);
5378
|
| 5379 if (context == 1)
5380 context_reg_class = INDEX_REG_CLASS;
5381 else
5382 context_reg_class = base_reg_class (mode, outer_code, index_code);
5383
|
5261 switch (code)
5262 {
5263 case PLUS:
5264 {
5265 rtx orig_op0 = XEXP (x, 0);
5266 rtx orig_op1 = XEXP (x, 1);
5267 RTX_CODE code0 = GET_CODE (orig_op0);
5268 RTX_CODE code1 = GET_CODE (orig_op1);
5269 rtx op0 = orig_op0;
5270 rtx op1 = orig_op1;
5271
5272 if (GET_CODE (op0) == SUBREG)
5273 {
5274 op0 = SUBREG_REG (op0);
5275 code0 = GET_CODE (op0);
5276 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5277 op0 = gen_rtx_REG (word_mode,
5278 (REGNO (op0) +
5279 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5280 GET_MODE (SUBREG_REG (orig_op0)),
5281 SUBREG_BYTE (orig_op0),
5282 GET_MODE (orig_op0))));
5283 }
5284
5285 if (GET_CODE (op1) == SUBREG)
5286 {
5287 op1 = SUBREG_REG (op1);
5288 code1 = GET_CODE (op1);
5289 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5290 /* ??? Why is this given op1's mode and above for
5291 ??? op0 SUBREGs we use word_mode? */
5292 op1 = gen_rtx_REG (GET_MODE (op1),
5293 (REGNO (op1) +
5294 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5295 GET_MODE (SUBREG_REG (orig_op1)),
5296 SUBREG_BYTE (orig_op1),
5297 GET_MODE (orig_op1))));
5298 }
5299 /* Plus in the index register may be created only as a result of
| 5384 switch (code)
5385 {
5386 case PLUS:
5387 {
5388 rtx orig_op0 = XEXP (x, 0);
5389 rtx orig_op1 = XEXP (x, 1);
5390 RTX_CODE code0 = GET_CODE (orig_op0);
5391 RTX_CODE code1 = GET_CODE (orig_op1);
5392 rtx op0 = orig_op0;
5393 rtx op1 = orig_op1;
5394
5395 if (GET_CODE (op0) == SUBREG)
5396 {
5397 op0 = SUBREG_REG (op0);
5398 code0 = GET_CODE (op0);
5399 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5400 op0 = gen_rtx_REG (word_mode,
5401 (REGNO (op0) +
5402 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5403 GET_MODE (SUBREG_REG (orig_op0)),
5404 SUBREG_BYTE (orig_op0),
5405 GET_MODE (orig_op0))));
5406 }
5407
5408 if (GET_CODE (op1) == SUBREG)
5409 {
5410 op1 = SUBREG_REG (op1);
5411 code1 = GET_CODE (op1);
5412 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5413 /* ??? Why is this given op1's mode and above for
5414 ??? op0 SUBREGs we use word_mode? */
5415 op1 = gen_rtx_REG (GET_MODE (op1),
5416 (REGNO (op1) +
5417 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5418 GET_MODE (SUBREG_REG (orig_op1)),
5419 SUBREG_BYTE (orig_op1),
5420 GET_MODE (orig_op1))));
5421 }
5422 /* Plus in the index register may be created only as a result of
|
5300 register remateralization for expression like &localvar*4. Reload it.
| 5423 register rematerialization for expression like &localvar*4. Reload it.
|
5301 It may be possible to combine the displacement on the outer level,
5302 but it is probably not worthwhile to do so. */
| 5424 It may be possible to combine the displacement on the outer level,
5425 but it is probably not worthwhile to do so. */
|
5303 if (context)
| 5426 if (context == 1)
|
5304 {
5305 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5306 opnum, ADDR_TYPE (type), ind_levels, insn);
5307 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
| 5427 {
5428 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5429 opnum, ADDR_TYPE (type), ind_levels, insn);
5430 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
|
5308 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
| 5431 context_reg_class,
|
5309 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5310 return 1;
5311 }
5312
5313 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5314 || code0 == ZERO_EXTEND || code1 == MEM)
5315 {
| 5432 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5433 return 1;
5434 }
5435
5436 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5437 || code0 == ZERO_EXTEND || code1 == MEM)
5438 {
|
5316 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5317 type, ind_levels, insn);
5318 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5319 type, ind_levels, insn);
| 5439 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5440 &XEXP (x, 0), opnum, type, ind_levels,
5441 insn);
5442 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5443 &XEXP (x, 1), opnum, type, ind_levels,
5444 insn);
|
5320 }
5321
5322 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5323 || code1 == ZERO_EXTEND || code0 == MEM)
5324 {
| 5445 }
5446
5447 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5448 || code1 == ZERO_EXTEND || code0 == MEM)
5449 {
|
5325 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5326 type, ind_levels, insn);
5327 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5328 type, ind_levels, insn);
| 5450 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5451 &XEXP (x, 0), opnum, type, ind_levels,
5452 insn);
5453 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5454 &XEXP (x, 1), opnum, type, ind_levels,
5455 insn);
|
5329 }
5330
5331 else if (code0 == CONST_INT || code0 == CONST
5332 || code0 == SYMBOL_REF || code0 == LABEL_REF)
| 5456 }
5457
5458 else if (code0 == CONST_INT || code0 == CONST
5459 || code0 == SYMBOL_REF || code0 == LABEL_REF)
|
5333 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5334 type, ind_levels, insn);
| 5460 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5461 &XEXP (x, 1), opnum, type, ind_levels,
5462 insn);
|
5335
5336 else if (code1 == CONST_INT || code1 == CONST
5337 || code1 == SYMBOL_REF || code1 == LABEL_REF)
| 5463
5464 else if (code1 == CONST_INT || code1 == CONST
5465 || code1 == SYMBOL_REF || code1 == LABEL_REF)
|
5338 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5339 type, ind_levels, insn);
| 5466 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5467 &XEXP (x, 0), opnum, type, ind_levels,
5468 insn);
|
5340
5341 else if (code0 == REG && code1 == REG)
5342 {
| 5469
5470 else if (code0 == REG && code1 == REG)
5471 {
|
5343 if (REG_OK_FOR_INDEX_P (op0)
5344 && REG_MODE_OK_FOR_BASE_P (op1, mode))
| 5472 if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5473 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
|
5345 return 0;
| 5474 return 0;
|
5346 else if (REG_OK_FOR_INDEX_P (op1)
5347 && REG_MODE_OK_FOR_BASE_P (op0, mode))
| 5475 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5476 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
|
5348 return 0;
| 5477 return 0;
|
5349 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5350 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5351 type, ind_levels, insn);
5352 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5353 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5354 type, ind_levels, insn);
5355 else if (REG_OK_FOR_INDEX_P (op1))
5356 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5357 type, ind_levels, insn);
5358 else if (REG_OK_FOR_INDEX_P (op0))
5359 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5360 type, ind_levels, insn);
| 5478 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5479 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5480 &XEXP (x, 0), opnum, type, ind_levels,
5481 insn);
5482 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5483 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5484 &XEXP (x, 1), opnum, type, ind_levels,
5485 insn);
5486 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5487 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5488 &XEXP (x, 0), opnum, type, ind_levels,
5489 insn);
5490 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5491 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5492 &XEXP (x, 1), opnum, type, ind_levels,
5493 insn);
|
5361 else
5362 {
| 5494 else
5495 {
|
5363 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5364 type, ind_levels, insn);
5365 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5366 type, ind_levels, insn);
| 5496 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5497 &XEXP (x, 0), opnum, type, ind_levels,
5498 insn);
5499 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5500 &XEXP (x, 1), opnum, type, ind_levels,
5501 insn);
|
5367 }
5368 }
5369
5370 else if (code0 == REG)
5371 {
| 5502 }
5503 }
5504
5505 else if (code0 == REG)
5506 {
|
5372 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5373 type, ind_levels, insn);
5374 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5375 type, ind_levels, insn);
| 5507 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5508 &XEXP (x, 0), opnum, type, ind_levels,
5509 insn);
5510 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5511 &XEXP (x, 1), opnum, type, ind_levels,
5512 insn);
|
5376 }
5377
5378 else if (code1 == REG)
5379 {
| 5513 }
5514
5515 else if (code1 == REG)
5516 {
|
5380 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5381 type, ind_levels, insn);
5382 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5383 type, ind_levels, insn);
| 5517 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5518 &XEXP (x, 1), opnum, type, ind_levels,
5519 insn);
5520 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5521 &XEXP (x, 0), opnum, type, ind_levels,
5522 insn);
|
5384 }
5385 }
5386
5387 return 0;
5388
5389 case POST_MODIFY:
5390 case PRE_MODIFY:
5391 {
5392 rtx op0 = XEXP (x, 0);
5393 rtx op1 = XEXP (x, 1);
| 5523 }
5524 }
5525
5526 return 0;
5527
5528 case POST_MODIFY:
5529 case PRE_MODIFY:
5530 {
5531 rtx op0 = XEXP (x, 0);
5532 rtx op1 = XEXP (x, 1);
|
| 5533 enum rtx_code index_code;
5534 int regno;
5535 int reloadnum;
|
5394
5395 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5396 return 0;
5397
5398 /* Currently, we only support {PRE,POST}_MODIFY constructs
5399 where a base register is {inc,dec}remented by the contents
5400 of another register or by a constant value. Thus, these
5401 operands must match. */
| 5536
5537 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5538 return 0;
5539
5540 /* Currently, we only support {PRE,POST}_MODIFY constructs
5541 where a base register is {inc,dec}remented by the contents
5542 of another register or by a constant value. Thus, these
5543 operands must match. */
|
5402 if (op0 != XEXP (op1, 0))
5403 abort ();
| 5544 gcc_assert (op0 == XEXP (op1, 0));
|
5404
5405 /* Require index register (or constant). Let's just handle the
5406 register case in the meantime... If the target allows
5407 auto-modify by a constant then we could try replacing a pseudo
| 5545
5546 /* Require index register (or constant). Let's just handle the
5547 register case in the meantime... If the target allows
5548 auto-modify by a constant then we could try replacing a pseudo
|
5408 register with its equivalent constant where applicable. */
| 5549 register with its equivalent constant where applicable.
5550
5551 If we later decide to reload the whole PRE_MODIFY or
5552 POST_MODIFY, inc_for_reload might clobber the reload register
5553 before reading the index. The index register might therefore
5554 need to live longer than a TYPE reload normally would, so be
5555 conservative and class it as RELOAD_OTHER. */
|
5409 if (REG_P (XEXP (op1, 1)))
5410 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
| 5556 if (REG_P (XEXP (op1, 1)))
5557 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
|
5411 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5412 opnum, type, ind_levels, insn);
| 5558 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5559 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5560 ind_levels, insn);
|
5413
| 5561
|
5414 if (REG_P (XEXP (op1, 0)))
5415 {
5416 int regno = REGNO (XEXP (op1, 0));
5417 int reloadnum;
| 5562 gcc_assert (REG_P (XEXP (op1, 0)));
|
5418
| 5563
|
5419 /* A register that is incremented cannot be constant! */
5420 if (regno >= FIRST_PSEUDO_REGISTER
5421 && reg_equiv_constant[regno] != 0)
5422 abort ();
| 5564 regno = REGNO (XEXP (op1, 0));
5565 index_code = GET_CODE (XEXP (op1, 1));
|
5423
| 5566
|
5424 /* Handle a register that is equivalent to a memory location
5425 which cannot be addressed directly. */
5426 if (reg_equiv_memory_loc[regno] != 0
5427 && (reg_equiv_address[regno] != 0
5428 || num_not_at_initial_offset))
5429 {
5430 rtx tem = make_memloc (XEXP (x, 0), regno);
| 5567 /* A register that is incremented cannot be constant! */
5568 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5569 || reg_equiv_constant[regno] == 0);
|
5431
| 5570
|
5432 if (reg_equiv_address[regno]
5433 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5434 {
5435 /* First reload the memory location's address.
5436 We can't use ADDR_TYPE (type) here, because we need to
5437 write back the value after reading it, hence we actually
5438 need two registers. */
5439 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5440 &XEXP (tem, 0), opnum,
5441 RELOAD_OTHER,
5442 ind_levels, insn);
| 5571 /* Handle a register that is equivalent to a memory location
5572 which cannot be addressed directly. */
5573 if (reg_equiv_memory_loc[regno] != 0
5574 && (reg_equiv_address[regno] != 0
5575 || num_not_at_initial_offset))
5576 {
5577 rtx tem = make_memloc (XEXP (x, 0), regno);
|
5443
| 5578
|
5444 /* Then reload the memory location into a base
5445 register. */
5446 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5447 &XEXP (op1, 0),
5448 MODE_BASE_REG_CLASS (mode),
5449 GET_MODE (x), GET_MODE (x), 0,
5450 0, opnum, RELOAD_OTHER);
| 5579 if (reg_equiv_address[regno]
5580 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5581 {
5582 rtx orig = tem;
|
5451
| 5583
|
5452 update_auto_inc_notes (this_insn, regno, reloadnum);
5453 return 0;
5454 }
5455 }
| 5584 /* First reload the memory location's address.
5585 We can't use ADDR_TYPE (type) here, because we need to
5586 write back the value after reading it, hence we actually
5587 need two registers. */
5588 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5589 &XEXP (tem, 0), opnum,
5590 RELOAD_OTHER,
5591 ind_levels, insn);
|
5456
| 5592
|
5457 if (reg_renumber[regno] >= 0)
5458 regno = reg_renumber[regno];
| 5593 if (tem != orig)
5594 push_reg_equiv_alt_mem (regno, tem);
|
5459
| 5595
|
5460 /* We require a base register here... */
5461 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5462 {
5463 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5464 &XEXP (op1, 0), &XEXP (x, 0),
5465 MODE_BASE_REG_CLASS (mode),
5466 GET_MODE (x), GET_MODE (x), 0, 0,
5467 opnum, RELOAD_OTHER);
| 5596 /* Then reload the memory location into a base
5597 register. */
5598 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5599 &XEXP (op1, 0),
5600 base_reg_class (mode, code,
5601 index_code),
5602 GET_MODE (x), GET_MODE (x), 0,
5603 0, opnum, RELOAD_OTHER);
|
5468
5469 update_auto_inc_notes (this_insn, regno, reloadnum);
5470 return 0;
5471 }
5472 }
| 5604
5605 update_auto_inc_notes (this_insn, regno, reloadnum);
5606 return 0;
5607 }
5608 }
|
5473 else
5474 abort ();
| 5609
5610 if (reg_renumber[regno] >= 0)
5611 regno = reg_renumber[regno];
5612
5613 /* We require a base register here... */
5614 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5615 {
5616 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5617 &XEXP (op1, 0), &XEXP (x, 0),
5618 base_reg_class (mode, code, index_code),
5619 GET_MODE (x), GET_MODE (x), 0, 0,
5620 opnum, RELOAD_OTHER);
5621
5622 update_auto_inc_notes (this_insn, regno, reloadnum);
5623 return 0;
5624 }
|
5475 }
5476 return 0;
5477
5478 case POST_INC:
5479 case POST_DEC:
5480 case PRE_INC:
5481 case PRE_DEC:
| 5625 }
5626 return 0;
5627
5628 case POST_INC:
5629 case POST_DEC:
5630 case PRE_INC:
5631 case PRE_DEC:
|
5482 if (GET_CODE (XEXP (x, 0)) == REG)
| 5632 if (REG_P (XEXP (x, 0)))
|
5483 {
5484 int regno = REGNO (XEXP (x, 0));
5485 int value = 0;
5486 rtx x_orig = x;
5487
5488 /* A register that is incremented cannot be constant! */
| 5633 {
5634 int regno = REGNO (XEXP (x, 0));
5635 int value = 0;
5636 rtx x_orig = x;
5637
5638 /* A register that is incremented cannot be constant! */
|
5489 if (regno >= FIRST_PSEUDO_REGISTER
5490 && reg_equiv_constant[regno] != 0)
5491 abort ();
| 5639 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5640 || reg_equiv_constant[regno] == 0);
|
5492
5493 /* Handle a register that is equivalent to a memory location
5494 which cannot be addressed directly. */
5495 if (reg_equiv_memory_loc[regno] != 0
5496 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5497 {
5498 rtx tem = make_memloc (XEXP (x, 0), regno);
5499 if (reg_equiv_address[regno]
5500 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5501 {
| 5641
5642 /* Handle a register that is equivalent to a memory location
5643 which cannot be addressed directly. */
5644 if (reg_equiv_memory_loc[regno] != 0
5645 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5646 {
5647 rtx tem = make_memloc (XEXP (x, 0), regno);
5648 if (reg_equiv_address[regno]
5649 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5650 {
|
| 5651 rtx orig = tem;
5652
|
5502 /* First reload the memory location's address.
5503 We can't use ADDR_TYPE (type) here, because we need to
5504 write back the value after reading it, hence we actually
5505 need two registers. */
5506 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5507 &XEXP (tem, 0), opnum, type,
5508 ind_levels, insn);
| 5653 /* First reload the memory location's address.
5654 We can't use ADDR_TYPE (type) here, because we need to
5655 write back the value after reading it, hence we actually
5656 need two registers. */
5657 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5658 &XEXP (tem, 0), opnum, type,
5659 ind_levels, insn);
|
| 5660 if (tem != orig)
5661 push_reg_equiv_alt_mem (regno, tem);
|
5509 /* Put this inside a new increment-expression. */
5510 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5511 /* Proceed to reload that, as if it contained a register. */
5512 }
5513 }
5514
5515 /* If we have a hard register that is ok as an index,
5516 don't make a reload. If an autoincrement of a nice register
5517 isn't "valid", it must be that no autoincrement is "valid".
5518 If that is true and something made an autoincrement anyway,
5519 this must be a special context where one is allowed.
5520 (For example, a "push" instruction.)
5521 We can't improve this address, so leave it alone. */
5522
5523 /* Otherwise, reload the autoincrement into a suitable hard reg
5524 and record how much to increment by. */
5525
5526 if (reg_renumber[regno] >= 0)
5527 regno = reg_renumber[regno];
| 5662 /* Put this inside a new increment-expression. */
5663 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5664 /* Proceed to reload that, as if it contained a register. */
5665 }
5666 }
5667
5668 /* If we have a hard register that is ok as an index,
5669 don't make a reload. If an autoincrement of a nice register
5670 isn't "valid", it must be that no autoincrement is "valid".
5671 If that is true and something made an autoincrement anyway,
5672 this must be a special context where one is allowed.
5673 (For example, a "push" instruction.)
5674 We can't improve this address, so leave it alone. */
5675
5676 /* Otherwise, reload the autoincrement into a suitable hard reg
5677 and record how much to increment by. */
5678
5679 if (reg_renumber[regno] >= 0)
5680 regno = reg_renumber[regno];
|
5528 if ((regno >= FIRST_PSEUDO_REGISTER
5529 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5530 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
| 5681 if (regno >= FIRST_PSEUDO_REGISTER
5682 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5683 index_code))
|
5531 {
5532 int reloadnum;
5533
5534 /* If we can output the register afterwards, do so, this
5535 saves the extra update.
5536 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5537 CALL_INSN - and it does not set CC0.
5538 But don't do this if we cannot directly address the
5539 memory location, since this will make it harder to
5540 reuse address reloads, and increases register pressure.
5541 Also don't do this if we can probably update x directly. */
| 5684 {
5685 int reloadnum;
5686
5687 /* If we can output the register afterwards, do so, this
5688 saves the extra update.
5689 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5690 CALL_INSN - and it does not set CC0.
5691 But don't do this if we cannot directly address the
5692 memory location, since this will make it harder to
5693 reuse address reloads, and increases register pressure.
5694 Also don't do this if we can probably update x directly. */
|
5542 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
| 5695 rtx equiv = (MEM_P (XEXP (x, 0))
|
5543 ? XEXP (x, 0)
5544 : reg_equiv_mem[regno]);
5545 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
| 5696 ? XEXP (x, 0)
5697 : reg_equiv_mem[regno]);
5698 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
|
5546 if (insn && GET_CODE (insn) == INSN && equiv
| 5699 if (insn && NONJUMP_INSN_P (insn) && equiv
|
5547 && memory_operand (equiv, GET_MODE (equiv))
5548#ifdef HAVE_cc0
5549 && ! sets_cc0_p (PATTERN (insn))
5550#endif
5551 && ! (icode != CODE_FOR_nothing
5552 && ((*insn_data[icode].operand[0].predicate)
5553 (equiv, Pmode))
5554 && ((*insn_data[icode].operand[1].predicate)
5555 (equiv, Pmode))))
5556 {
5557 /* We use the original pseudo for loc, so that
5558 emit_reload_insns() knows which pseudo this
5559 reload refers to and updates the pseudo rtx, not
5560 its equivalent memory location, as well as the
5561 corresponding entry in reg_last_reload_reg. */
5562 loc = &XEXP (x_orig, 0);
5563 x = XEXP (x, 0);
5564 reloadnum
5565 = push_reload (x, x, loc, loc,
| 5700 && memory_operand (equiv, GET_MODE (equiv))
5701#ifdef HAVE_cc0
5702 && ! sets_cc0_p (PATTERN (insn))
5703#endif
5704 && ! (icode != CODE_FOR_nothing
5705 && ((*insn_data[icode].operand[0].predicate)
5706 (equiv, Pmode))
5707 && ((*insn_data[icode].operand[1].predicate)
5708 (equiv, Pmode))))
5709 {
5710 /* We use the original pseudo for loc, so that
5711 emit_reload_insns() knows which pseudo this
5712 reload refers to and updates the pseudo rtx, not
5713 its equivalent memory location, as well as the
5714 corresponding entry in reg_last_reload_reg. */
5715 loc = &XEXP (x_orig, 0);
5716 x = XEXP (x, 0);
5717 reloadnum
5718 = push_reload (x, x, loc, loc,
|
5566 (context ? INDEX_REG_CLASS :
5567 MODE_BASE_REG_CLASS (mode)),
| 5719 context_reg_class,
|
5568 GET_MODE (x), GET_MODE (x), 0, 0,
5569 opnum, RELOAD_OTHER);
5570 }
5571 else
5572 {
5573 reloadnum
5574 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
| 5720 GET_MODE (x), GET_MODE (x), 0, 0,
5721 opnum, RELOAD_OTHER);
5722 }
5723 else
5724 {
5725 reloadnum
5726 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
|
5575 (context ? INDEX_REG_CLASS :
5576 MODE_BASE_REG_CLASS (mode)),
| 5727 context_reg_class,
|
5577 GET_MODE (x), GET_MODE (x), 0, 0,
5578 opnum, type);
5579 rld[reloadnum].inc
5580 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5581
5582 value = 1;
5583 }
5584
5585 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5586 reloadnum);
5587 }
5588 return value;
5589 }
5590
| 5728 GET_MODE (x), GET_MODE (x), 0, 0,
5729 opnum, type);
5730 rld[reloadnum].inc
5731 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5732
5733 value = 1;
5734 }
5735
5736 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5737 reloadnum);
5738 }
5739 return value;
5740 }
5741
|
5591 else if (GET_CODE (XEXP (x, 0)) == MEM)
| 5742 else if (MEM_P (XEXP (x, 0)))
|
5592 {
5593 /* This is probably the result of a substitution, by eliminate_regs,
5594 of an equivalent address for a pseudo that was not allocated to a
5595 hard register. Verify that the specified address is valid and
5596 reload it into a register. */
5597 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5598 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5599 rtx link;
5600 int reloadnum;
5601
5602 /* Since we know we are going to reload this item, don't decrement
5603 for the indirection level.
5604
5605 Note that this is actually conservative: it would be slightly
5606 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5607 reload1.c here. */
5608 /* We can't use ADDR_TYPE (type) here, because we need to
5609 write back the value after reading it, hence we actually
5610 need two registers. */
5611 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5612 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5613 opnum, type, ind_levels, insn);
5614
5615 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
| 5743 {
5744 /* This is probably the result of a substitution, by eliminate_regs,
5745 of an equivalent address for a pseudo that was not allocated to a
5746 hard register. Verify that the specified address is valid and
5747 reload it into a register. */
5748 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5749 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5750 rtx link;
5751 int reloadnum;
5752
5753 /* Since we know we are going to reload this item, don't decrement
5754 for the indirection level.
5755
5756 Note that this is actually conservative: it would be slightly
5757 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5758 reload1.c here. */
5759 /* We can't use ADDR_TYPE (type) here, because we need to
5760 write back the value after reading it, hence we actually
5761 need two registers. */
5762 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5763 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5764 opnum, type, ind_levels, insn);
5765
5766 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
|
5616 (context ? INDEX_REG_CLASS :
5617 MODE_BASE_REG_CLASS (mode)),
| 5767 context_reg_class,
|
5618 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5619 rld[reloadnum].inc
5620 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5621
5622 link = FIND_REG_INC_NOTE (this_insn, tem);
5623 if (link != 0)
5624 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5625
5626 return 1;
5627 }
5628 return 0;
5629
| 5768 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5769 rld[reloadnum].inc
5770 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5771
5772 link = FIND_REG_INC_NOTE (this_insn, tem);
5773 if (link != 0)
5774 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5775
5776 return 1;
5777 }
5778 return 0;
5779
|
| 5780 case TRUNCATE:
5781 case SIGN_EXTEND:
5782 case ZERO_EXTEND:
5783 /* Look for parts to reload in the inner expression and reload them
5784 too, in addition to this operation. Reloading all inner parts in
5785 addition to this one shouldn't be necessary, but at this point,
5786 we don't know if we can possibly omit any part that *can* be
5787 reloaded. Targets that are better off reloading just either part
5788 (or perhaps even a different part of an outer expression), should
5789 define LEGITIMIZE_RELOAD_ADDRESS. */
5790 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5791 context, code, SCRATCH, &XEXP (x, 0), opnum,
5792 type, ind_levels, insn);
5793 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5794 context_reg_class,
5795 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5796 return 1;
5797
|
5630 case MEM:
5631 /* This is probably the result of a substitution, by eliminate_regs, of
5632 an equivalent address for a pseudo that was not allocated to a hard
5633 register. Verify that the specified address is valid and reload it
5634 into a register.
5635
5636 Since we know we are going to reload this item, don't decrement for
5637 the indirection level.
5638
5639 Note that this is actually conservative: it would be slightly more
5640 efficient to use the value of SPILL_INDIRECT_LEVELS from
5641 reload1.c here. */
5642
5643 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5644 opnum, ADDR_TYPE (type), ind_levels, insn);
5645 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
| 5798 case MEM:
5799 /* This is probably the result of a substitution, by eliminate_regs, of
5800 an equivalent address for a pseudo that was not allocated to a hard
5801 register. Verify that the specified address is valid and reload it
5802 into a register.
5803
5804 Since we know we are going to reload this item, don't decrement for
5805 the indirection level.
5806
5807 Note that this is actually conservative: it would be slightly more
5808 efficient to use the value of SPILL_INDIRECT_LEVELS from
5809 reload1.c here. */
5810
5811 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5812 opnum, ADDR_TYPE (type), ind_levels, insn);
5813 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
|
5646 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
| 5814 context_reg_class,
|
5647 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5648 return 1;
5649
5650 case REG:
5651 {
5652 int regno = REGNO (x);
5653
5654 if (reg_equiv_constant[regno] != 0)
5655 {
5656 find_reloads_address_part (reg_equiv_constant[regno], loc,
| 5815 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5816 return 1;
5817
5818 case REG:
5819 {
5820 int regno = REGNO (x);
5821
5822 if (reg_equiv_constant[regno] != 0)
5823 {
5824 find_reloads_address_part (reg_equiv_constant[regno], loc,
|
5657 (context ? INDEX_REG_CLASS :
5658 MODE_BASE_REG_CLASS (mode)),
| 5825 context_reg_class,
|
5659 GET_MODE (x), opnum, type, ind_levels);
5660 return 1;
5661 }
5662
5663#if 0 /* This might screw code in reload1.c to delete prior output-reload
5664 that feeds this insn. */
5665 if (reg_equiv_mem[regno] != 0)
5666 {
5667 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
| 5826 GET_MODE (x), opnum, type, ind_levels);
5827 return 1;
5828 }
5829
5830#if 0 /* This might screw code in reload1.c to delete prior output-reload
5831 that feeds this insn. */
5832 if (reg_equiv_mem[regno] != 0)
5833 {
5834 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
|
5668 (context ? INDEX_REG_CLASS :
5669 MODE_BASE_REG_CLASS (mode)),
| 5835 context_reg_class,
|
5670 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5671 return 1;
5672 }
5673#endif
5674
5675 if (reg_equiv_memory_loc[regno]
5676 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5677 {
5678 rtx tem = make_memloc (x, regno);
5679 if (reg_equiv_address[regno] != 0
5680 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5681 {
5682 x = tem;
5683 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5684 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5685 ind_levels, insn);
| 5836 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5837 return 1;
5838 }
5839#endif
5840
5841 if (reg_equiv_memory_loc[regno]
5842 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5843 {
5844 rtx tem = make_memloc (x, regno);
5845 if (reg_equiv_address[regno] != 0
5846 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5847 {
5848 x = tem;
5849 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5850 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5851 ind_levels, insn);
|
| 5852 if (x != tem)
5853 push_reg_equiv_alt_mem (regno, x);
|
5686 }
5687 }
5688
5689 if (reg_renumber[regno] >= 0)
5690 regno = reg_renumber[regno];
5691
| 5854 }
5855 }
5856
5857 if (reg_renumber[regno] >= 0)
5858 regno = reg_renumber[regno];
5859
|
5692 if ((regno >= FIRST_PSEUDO_REGISTER
5693 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5694 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
| 5860 if (regno >= FIRST_PSEUDO_REGISTER
5861 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5862 index_code))
|
5695 {
5696 push_reload (x, NULL_RTX, loc, (rtx*) 0,
| 5863 {
5864 push_reload (x, NULL_RTX, loc, (rtx*) 0,
|
5697 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
| 5865 context_reg_class,
|
5698 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5699 return 1;
5700 }
5701
5702 /* If a register appearing in an address is the subject of a CLOBBER
5703 in this insn, reload it into some other register to be safe.
5704 The CLOBBER is supposed to make the register unavailable
5705 from before this insn to after it. */
5706 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5707 {
5708 push_reload (x, NULL_RTX, loc, (rtx*) 0,
| 5866 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5867 return 1;
5868 }
5869
5870 /* If a register appearing in an address is the subject of a CLOBBER
5871 in this insn, reload it into some other register to be safe.
5872 The CLOBBER is supposed to make the register unavailable
5873 from before this insn to after it. */
5874 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5875 {
5876 push_reload (x, NULL_RTX, loc, (rtx*) 0,
|
5709 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
| 5877 context_reg_class,
|
5710 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5711 return 1;
5712 }
5713 }
5714 return 0;
5715
5716 case SUBREG:
| 5878 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5879 return 1;
5880 }
5881 }
5882 return 0;
5883
5884 case SUBREG:
|
5717 if (GET_CODE (SUBREG_REG (x)) == REG)
| 5885 if (REG_P (SUBREG_REG (x)))
|
5718 {
5719 /* If this is a SUBREG of a hard register and the resulting register
5720 is of the wrong class, reload the whole SUBREG. This avoids
5721 needless copies if SUBREG_REG is multi-word. */
5722 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5723 {
5724 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5725
| 5886 {
5887 /* If this is a SUBREG of a hard register and the resulting register
5888 is of the wrong class, reload the whole SUBREG. This avoids
5889 needless copies if SUBREG_REG is multi-word. */
5890 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5891 {
5892 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5893
|
5726 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5727 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
| 5894 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5895 index_code))
|
5728 {
5729 push_reload (x, NULL_RTX, loc, (rtx*) 0,
| 5896 {
5897 push_reload (x, NULL_RTX, loc, (rtx*) 0,
|
5730 (context ? INDEX_REG_CLASS :
5731 MODE_BASE_REG_CLASS (mode)),
| 5898 context_reg_class,
|
5732 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5733 return 1;
5734 }
5735 }
5736 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5737 is larger than the class size, then reload the whole SUBREG. */
5738 else
5739 {
| 5899 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5900 return 1;
5901 }
5902 }
5903 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5904 is larger than the class size, then reload the whole SUBREG. */
5905 else
5906 {
|
5740 enum reg_class class = (context ? INDEX_REG_CLASS
5741 : MODE_BASE_REG_CLASS (mode));
| 5907 enum reg_class class = context_reg_class;
|
5742 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5743 > reg_class_size[class])
5744 {
| 5908 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5909 > reg_class_size[class])
5910 {
|
5745 x = find_reloads_subreg_address (x, 0, opnum, type,
| 5911 x = find_reloads_subreg_address (x, 0, opnum,
5912 ADDR_TYPE (type),
|
5746 ind_levels, insn);
5747 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5748 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5749 return 1;
5750 }
5751 }
5752 }
5753 break;
5754
5755 default:
5756 break;
5757 }
5758
5759 {
5760 const char *fmt = GET_RTX_FORMAT (code);
5761 int i;
5762
5763 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5764 {
5765 if (fmt[i] == 'e')
| 5913 ind_levels, insn);
5914 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5915 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5916 return 1;
5917 }
5918 }
5919 }
5920 break;
5921
5922 default:
5923 break;
5924 }
5925
5926 {
5927 const char *fmt = GET_RTX_FORMAT (code);
5928 int i;
5929
5930 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5931 {
5932 if (fmt[i] == 'e')
|
5766 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5767 opnum, type, ind_levels, insn);
| 5933 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5934 we get here. */
5935 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
5936 &XEXP (x, i), opnum, type, ind_levels, insn);
|
5768 }
5769 }
5770
| 5937 }
5938 }
5939
|
| 5940#undef REG_OK_FOR_CONTEXT
|
5771 return 0;
5772}
5773
5774/* X, which is found at *LOC, is a part of an address that needs to be
5775 reloaded into a register of class CLASS. If X is a constant, or if
5776 X is a PLUS that contains a constant, check that the constant is a
5777 legitimate operand and that we are supposed to be able to load
5778 it into the register.
5779
5780 If not, force the constant into memory and reload the MEM instead.
5781
5782 MODE is the mode to use, in case X is an integer constant.
5783
5784 OPNUM and TYPE describe the purpose of any reloads made.
5785
5786 IND_LEVELS says how many levels of indirect addressing this machine
5787 supports. */
5788
5789static void
5790find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5791 enum machine_mode mode, int opnum,
5792 enum reload_type type, int ind_levels)
5793{
5794 if (CONSTANT_P (x)
5795 && (! LEGITIMATE_CONSTANT_P (x)
5796 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5797 {
5798 rtx tem;
5799
5800 tem = x = force_const_mem (mode, x);
5801 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5802 opnum, type, ind_levels, 0);
5803 }
5804
5805 else if (GET_CODE (x) == PLUS
5806 && CONSTANT_P (XEXP (x, 1))
5807 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5808 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5809 {
5810 rtx tem;
5811
5812 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5813 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5814 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5815 opnum, type, ind_levels, 0);
5816 }
5817
5818 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5819 mode, VOIDmode, 0, 0, opnum, type);
5820}
5821
5822/* X, a subreg of a pseudo, is a part of an address that needs to be
5823 reloaded.
5824
5825 If the pseudo is equivalent to a memory location that cannot be directly
5826 addressed, make the necessary address reloads.
5827
5828 If address reloads have been necessary, or if the address is changed
5829 by register elimination, return the rtx of the memory location;
5830 otherwise, return X.
5831
5832 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5833 memory location.
5834
5835 OPNUM and TYPE identify the purpose of the reload.
5836
5837 IND_LEVELS says how many levels of indirect addressing are
5838 supported at this point in the address.
5839
5840 INSN, if nonzero, is the insn in which we do the reload. It is used
5841 to determine where to put USEs for pseudos that we have to replace with
5842 stack slots. */
5843
5844static rtx
5845find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5846 enum reload_type type, int ind_levels, rtx insn)
5847{
5848 int regno = REGNO (SUBREG_REG (x));
5849
5850 if (reg_equiv_memory_loc[regno])
5851 {
5852 /* If the address is not directly addressable, or if the address is not
5853 offsettable, then it must be replaced. */
5854 if (! force_replace
5855 && (reg_equiv_address[regno]
5856 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5857 force_replace = 1;
5858
5859 if (force_replace || num_not_at_initial_offset)
5860 {
5861 rtx tem = make_memloc (SUBREG_REG (x), regno);
5862
5863 /* If the address changes because of register elimination, then
5864 it must be replaced. */
5865 if (force_replace
5866 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5867 {
5868 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5869 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5870 int offset;
| 5941 return 0;
5942}
5943
5944/* X, which is found at *LOC, is a part of an address that needs to be
5945 reloaded into a register of class CLASS. If X is a constant, or if
5946 X is a PLUS that contains a constant, check that the constant is a
5947 legitimate operand and that we are supposed to be able to load
5948 it into the register.
5949
5950 If not, force the constant into memory and reload the MEM instead.
5951
5952 MODE is the mode to use, in case X is an integer constant.
5953
5954 OPNUM and TYPE describe the purpose of any reloads made.
5955
5956 IND_LEVELS says how many levels of indirect addressing this machine
5957 supports. */
5958
5959static void
5960find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5961 enum machine_mode mode, int opnum,
5962 enum reload_type type, int ind_levels)
5963{
5964 if (CONSTANT_P (x)
5965 && (! LEGITIMATE_CONSTANT_P (x)
5966 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5967 {
5968 rtx tem;
5969
5970 tem = x = force_const_mem (mode, x);
5971 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5972 opnum, type, ind_levels, 0);
5973 }
5974
5975 else if (GET_CODE (x) == PLUS
5976 && CONSTANT_P (XEXP (x, 1))
5977 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5978 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5979 {
5980 rtx tem;
5981
5982 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5983 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5984 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5985 opnum, type, ind_levels, 0);
5986 }
5987
5988 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5989 mode, VOIDmode, 0, 0, opnum, type);
5990}
5991
5992/* X, a subreg of a pseudo, is a part of an address that needs to be
5993 reloaded.
5994
5995 If the pseudo is equivalent to a memory location that cannot be directly
5996 addressed, make the necessary address reloads.
5997
5998 If address reloads have been necessary, or if the address is changed
5999 by register elimination, return the rtx of the memory location;
6000 otherwise, return X.
6001
6002 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6003 memory location.
6004
6005 OPNUM and TYPE identify the purpose of the reload.
6006
6007 IND_LEVELS says how many levels of indirect addressing are
6008 supported at this point in the address.
6009
6010 INSN, if nonzero, is the insn in which we do the reload. It is used
6011 to determine where to put USEs for pseudos that we have to replace with
6012 stack slots. */
6013
6014static rtx
6015find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6016 enum reload_type type, int ind_levels, rtx insn)
6017{
6018 int regno = REGNO (SUBREG_REG (x));
6019
6020 if (reg_equiv_memory_loc[regno])
6021 {
6022 /* If the address is not directly addressable, or if the address is not
6023 offsettable, then it must be replaced. */
6024 if (! force_replace
6025 && (reg_equiv_address[regno]
6026 || ! offsettable_memref_p (reg_equiv_mem[regno])))
6027 force_replace = 1;
6028
6029 if (force_replace || num_not_at_initial_offset)
6030 {
6031 rtx tem = make_memloc (SUBREG_REG (x), regno);
6032
6033 /* If the address changes because of register elimination, then
6034 it must be replaced. */
6035 if (force_replace
6036 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
6037 {
6038 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6039 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6040 int offset;
|
| 6041 rtx orig = tem;
6042 enum machine_mode orig_mode = GET_MODE (orig);
6043 int reloaded;
|
5871
5872 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5873 hold the correct (negative) byte offset. */
5874 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5875 offset = inner_size - outer_size;
5876 else
5877 offset = SUBREG_BYTE (x);
5878
5879 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5880 PUT_MODE (tem, GET_MODE (x));
5881
5882 /* If this was a paradoxical subreg that we replaced, the
5883 resulting memory must be sufficiently aligned to allow
5884 us to widen the mode of the memory. */
| 6044
6045 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6046 hold the correct (negative) byte offset. */
6047 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6048 offset = inner_size - outer_size;
6049 else
6050 offset = SUBREG_BYTE (x);
6051
6052 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6053 PUT_MODE (tem, GET_MODE (x));
6054
6055 /* If this was a paradoxical subreg that we replaced, the
6056 resulting memory must be sufficiently aligned to allow
6057 us to widen the mode of the memory. */
|
5885 if (outer_size > inner_size && STRICT_ALIGNMENT)
| 6058 if (outer_size > inner_size)
|
5886 {
5887 rtx base;
5888
5889 base = XEXP (tem, 0);
5890 if (GET_CODE (base) == PLUS)
5891 {
5892 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5893 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5894 return x;
5895 base = XEXP (base, 0);
5896 }
| 6059 {
6060 rtx base;
6061
6062 base = XEXP (tem, 0);
6063 if (GET_CODE (base) == PLUS)
6064 {
6065 if (GET_CODE (XEXP (base, 1)) == CONST_INT
6066 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6067 return x;
6068 base = XEXP (base, 0);
6069 }
|
5897 if (GET_CODE (base) != REG
| 6070 if (!REG_P (base)
|
5898 || (REGNO_POINTER_ALIGN (REGNO (base))
5899 < outer_size * BITS_PER_UNIT))
5900 return x;
5901 }
5902
| 6071 || (REGNO_POINTER_ALIGN (REGNO (base))
6072 < outer_size * BITS_PER_UNIT))
6073 return x;
6074 }
6075
|
5903 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5904 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5905 ind_levels, insn);
| 6076 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6077 XEXP (tem, 0), &XEXP (tem, 0),
6078 opnum, type, ind_levels, insn);
6079 /* ??? Do we need to handle nonzero offsets somehow? */
6080 if (!offset && tem != orig)
6081 push_reg_equiv_alt_mem (regno, tem);
|
5906
| 6082
|
| 6083 /* For some processors an address may be valid in the
6084 original mode but not in a smaller mode. For
6085 example, ARM accepts a scaled index register in
6086 SImode but not in HImode. find_reloads_address
6087 assumes that we pass it a valid address, and doesn't
6088 force a reload. This will probably be fine if
6089 find_reloads_address finds some reloads. But if it
6090 doesn't find any, then we may have just converted a
6091 valid address into an invalid one. Check for that
6092 here. */
6093 if (reloaded != 1
6094 && strict_memory_address_p (orig_mode, XEXP (tem, 0))
6095 && !strict_memory_address_p (GET_MODE (tem),
6096 XEXP (tem, 0)))
6097 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6098 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6099 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6100 opnum, type);
6101
|
5907 /* If this is not a toplevel operand, find_reloads doesn't see
5908 this substitution. We have to emit a USE of the pseudo so
5909 that delete_output_reload can see it. */
5910 if (replace_reloads && recog_data.operand[opnum] != x)
5911 /* We mark the USE with QImode so that we recognize it
5912 as one that can be safely deleted at the end of
5913 reload. */
5914 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5915 SUBREG_REG (x)),
5916 insn), QImode);
5917 x = tem;
5918 }
5919 }
5920 }
5921 return x;
5922}
5923
5924/* Substitute into the current INSN the registers into which we have reloaded
5925 the things that need reloading. The array `replacements'
5926 contains the locations of all pointers that must be changed
5927 and says what to replace them with.
5928
5929 Return the rtx that X translates into; usually X, but modified. */
5930
5931void
5932subst_reloads (rtx insn)
5933{
5934 int i;
5935
5936 for (i = 0; i < n_replacements; i++)
5937 {
5938 struct replacement *r = &replacements[i];
5939 rtx reloadreg = rld[r->what].reg_rtx;
5940 if (reloadreg)
5941 {
5942#ifdef ENABLE_CHECKING
5943 /* Internal consistency test. Check that we don't modify
5944 anything in the equivalence arrays. Whenever something from
5945 those arrays needs to be reloaded, it must be unshared before
5946 being substituted into; the equivalence must not be modified.
5947 Otherwise, if the equivalence is used after that, it will
5948 have been modified, and the thing substituted (probably a
5949 register) is likely overwritten and not a usable equivalence. */
5950 int check_regno;
5951
5952 for (check_regno = 0; check_regno < max_regno; check_regno++)
5953 {
5954#define CHECK_MODF(ARRAY) \
| 6102 /* If this is not a toplevel operand, find_reloads doesn't see
6103 this substitution. We have to emit a USE of the pseudo so
6104 that delete_output_reload can see it. */
6105 if (replace_reloads && recog_data.operand[opnum] != x)
6106 /* We mark the USE with QImode so that we recognize it
6107 as one that can be safely deleted at the end of
6108 reload. */
6109 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6110 SUBREG_REG (x)),
6111 insn), QImode);
6112 x = tem;
6113 }
6114 }
6115 }
6116 return x;
6117}
6118
6119/* Substitute into the current INSN the registers into which we have reloaded
6120 the things that need reloading. The array `replacements'
6121 contains the locations of all pointers that must be changed
6122 and says what to replace them with.
6123
6124 Return the rtx that X translates into; usually X, but modified. */
6125
6126void
6127subst_reloads (rtx insn)
6128{
6129 int i;
6130
6131 for (i = 0; i < n_replacements; i++)
6132 {
6133 struct replacement *r = &replacements[i];
6134 rtx reloadreg = rld[r->what].reg_rtx;
6135 if (reloadreg)
6136 {
6137#ifdef ENABLE_CHECKING
6138 /* Internal consistency test. Check that we don't modify
6139 anything in the equivalence arrays. Whenever something from
6140 those arrays needs to be reloaded, it must be unshared before
6141 being substituted into; the equivalence must not be modified.
6142 Otherwise, if the equivalence is used after that, it will
6143 have been modified, and the thing substituted (probably a
6144 register) is likely overwritten and not a usable equivalence. */
6145 int check_regno;
6146
6147 for (check_regno = 0; check_regno < max_regno; check_regno++)
6148 {
6149#define CHECK_MODF(ARRAY) \
|
5955 if (ARRAY[check_regno] \
5956 && loc_mentioned_in_p (r->where, \
5957 ARRAY[check_regno])) \
5958 abort ()
| 6150 gcc_assert (!ARRAY[check_regno] \
6151 || !loc_mentioned_in_p (r->where, \
6152 ARRAY[check_regno]))
|
5959
5960 CHECK_MODF (reg_equiv_constant);
5961 CHECK_MODF (reg_equiv_memory_loc);
5962 CHECK_MODF (reg_equiv_address);
5963 CHECK_MODF (reg_equiv_mem);
5964#undef CHECK_MODF
5965 }
5966#endif /* ENABLE_CHECKING */
5967
5968 /* If we're replacing a LABEL_REF with a register, add a
5969 REG_LABEL note to indicate to flow which label this
5970 register refers to. */
5971 if (GET_CODE (*r->where) == LABEL_REF
| 6153
6154 CHECK_MODF (reg_equiv_constant);
6155 CHECK_MODF (reg_equiv_memory_loc);
6156 CHECK_MODF (reg_equiv_address);
6157 CHECK_MODF (reg_equiv_mem);
6158#undef CHECK_MODF
6159 }
6160#endif /* ENABLE_CHECKING */
6161
6162 /* If we're replacing a LABEL_REF with a register, add a
6163 REG_LABEL note to indicate to flow which label this
6164 register refers to. */
6165 if (GET_CODE (*r->where) == LABEL_REF
|
5972 && GET_CODE (insn) == JUMP_INSN)
5973 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5974 XEXP (*r->where, 0),
5975 REG_NOTES (insn));
| 6166 && JUMP_P (insn))
6167 {
6168 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
6169 XEXP (*r->where, 0),
6170 REG_NOTES (insn));
6171 JUMP_LABEL (insn) = XEXP (*r->where, 0);
6172 }
|
5976
5977 /* Encapsulate RELOADREG so its machine mode matches what
5978 used to be there. Note that gen_lowpart_common will
5979 do the wrong thing if RELOADREG is multi-word. RELOADREG
5980 will always be a REG here. */
5981 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5982 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
5983
5984 /* If we are putting this into a SUBREG and RELOADREG is a
5985 SUBREG, we would be making nested SUBREGs, so we have to fix
5986 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5987
5988 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5989 {
5990 if (GET_MODE (*r->subreg_loc)
5991 == GET_MODE (SUBREG_REG (reloadreg)))
5992 *r->subreg_loc = SUBREG_REG (reloadreg);
5993 else
5994 {
5995 int final_offset =
5996 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5997
5998 /* When working with SUBREGs the rule is that the byte
5999 offset must be a multiple of the SUBREG's mode. */
6000 final_offset = (final_offset /
6001 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6002 final_offset = (final_offset *
6003 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6004
6005 *r->where = SUBREG_REG (reloadreg);
6006 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6007 }
6008 }
6009 else
6010 *r->where = reloadreg;
6011 }
6012 /* If reload got no reg and isn't optional, something's wrong. */
| 6173
6174 /* Encapsulate RELOADREG so its machine mode matches what
6175 used to be there. Note that gen_lowpart_common will
6176 do the wrong thing if RELOADREG is multi-word. RELOADREG
6177 will always be a REG here. */
6178 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6179 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6180
6181 /* If we are putting this into a SUBREG and RELOADREG is a
6182 SUBREG, we would be making nested SUBREGs, so we have to fix
6183 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6184
6185 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6186 {
6187 if (GET_MODE (*r->subreg_loc)
6188 == GET_MODE (SUBREG_REG (reloadreg)))
6189 *r->subreg_loc = SUBREG_REG (reloadreg);
6190 else
6191 {
6192 int final_offset =
6193 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6194
6195 /* When working with SUBREGs the rule is that the byte
6196 offset must be a multiple of the SUBREG's mode. */
6197 final_offset = (final_offset /
6198 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6199 final_offset = (final_offset *
6200 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6201
6202 *r->where = SUBREG_REG (reloadreg);
6203 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6204 }
6205 }
6206 else
6207 *r->where = reloadreg;
6208 }
6209 /* If reload got no reg and isn't optional, something's wrong. */
|
6013 else if (! rld[r->what].optional)
6014 abort ();
| 6210 else
6211 gcc_assert (rld[r->what].optional);
|
6015 }
6016}
6017
6018/* Make a copy of any replacements being done into X and move those
6019 copies to locations in Y, a copy of X. */
6020
6021void
6022copy_replacements (rtx x, rtx y)
6023{
6024 /* We can't support X being a SUBREG because we might then need to know its
6025 location if something inside it was replaced. */
| 6212 }
6213}
6214
6215/* Make a copy of any replacements being done into X and move those
6216 copies to locations in Y, a copy of X. */
6217
6218void
6219copy_replacements (rtx x, rtx y)
6220{
6221 /* We can't support X being a SUBREG because we might then need to know its
6222 location if something inside it was replaced. */
|
6026 if (GET_CODE (x) == SUBREG)
6027 abort ();
| 6223 gcc_assert (GET_CODE (x) != SUBREG);
|
6028
6029 copy_replacements_1 (&x, &y, n_replacements);
6030}
6031
6032static void
6033copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6034{
6035 int i, j;
6036 rtx x, y;
6037 struct replacement *r;
6038 enum rtx_code code;
6039 const char *fmt;
6040
6041 for (j = 0; j < orig_replacements; j++)
6042 {
6043 if (replacements[j].subreg_loc == px)
6044 {
6045 r = &replacements[n_replacements++];
6046 r->where = replacements[j].where;
6047 r->subreg_loc = py;
6048 r->what = replacements[j].what;
6049 r->mode = replacements[j].mode;
6050 }
6051 else if (replacements[j].where == px)
6052 {
6053 r = &replacements[n_replacements++];
6054 r->where = py;
6055 r->subreg_loc = 0;
6056 r->what = replacements[j].what;
6057 r->mode = replacements[j].mode;
6058 }
6059 }
6060
6061 x = *px;
6062 y = *py;
6063 code = GET_CODE (x);
6064 fmt = GET_RTX_FORMAT (code);
6065
6066 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6067 {
6068 if (fmt[i] == 'e')
6069 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6070 else if (fmt[i] == 'E')
6071 for (j = XVECLEN (x, i); --j >= 0; )
6072 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6073 orig_replacements);
6074 }
6075}
6076
6077/* Change any replacements being done to *X to be done to *Y. */
6078
6079void
6080move_replacements (rtx *x, rtx *y)
6081{
6082 int i;
6083
6084 for (i = 0; i < n_replacements; i++)
6085 if (replacements[i].subreg_loc == x)
6086 replacements[i].subreg_loc = y;
6087 else if (replacements[i].where == x)
6088 {
6089 replacements[i].where = y;
6090 replacements[i].subreg_loc = 0;
6091 }
6092}
6093
6094/* If LOC was scheduled to be replaced by something, return the replacement.
6095 Otherwise, return *LOC. */
6096
6097rtx
6098find_replacement (rtx *loc)
6099{
6100 struct replacement *r;
6101
6102 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6103 {
6104 rtx reloadreg = rld[r->what].reg_rtx;
6105
6106 if (reloadreg && r->where == loc)
6107 {
6108 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6109 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6110
6111 return reloadreg;
6112 }
6113 else if (reloadreg && r->subreg_loc == loc)
6114 {
6115 /* RELOADREG must be either a REG or a SUBREG.
6116
6117 ??? Is it actually still ever a SUBREG? If so, why? */
6118
| 6224
6225 copy_replacements_1 (&x, &y, n_replacements);
6226}
6227
6228static void
6229copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6230{
6231 int i, j;
6232 rtx x, y;
6233 struct replacement *r;
6234 enum rtx_code code;
6235 const char *fmt;
6236
6237 for (j = 0; j < orig_replacements; j++)
6238 {
6239 if (replacements[j].subreg_loc == px)
6240 {
6241 r = &replacements[n_replacements++];
6242 r->where = replacements[j].where;
6243 r->subreg_loc = py;
6244 r->what = replacements[j].what;
6245 r->mode = replacements[j].mode;
6246 }
6247 else if (replacements[j].where == px)
6248 {
6249 r = &replacements[n_replacements++];
6250 r->where = py;
6251 r->subreg_loc = 0;
6252 r->what = replacements[j].what;
6253 r->mode = replacements[j].mode;
6254 }
6255 }
6256
6257 x = *px;
6258 y = *py;
6259 code = GET_CODE (x);
6260 fmt = GET_RTX_FORMAT (code);
6261
6262 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6263 {
6264 if (fmt[i] == 'e')
6265 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6266 else if (fmt[i] == 'E')
6267 for (j = XVECLEN (x, i); --j >= 0; )
6268 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6269 orig_replacements);
6270 }
6271}
6272
6273/* Change any replacements being done to *X to be done to *Y. */
6274
6275void
6276move_replacements (rtx *x, rtx *y)
6277{
6278 int i;
6279
6280 for (i = 0; i < n_replacements; i++)
6281 if (replacements[i].subreg_loc == x)
6282 replacements[i].subreg_loc = y;
6283 else if (replacements[i].where == x)
6284 {
6285 replacements[i].where = y;
6286 replacements[i].subreg_loc = 0;
6287 }
6288}
6289
6290/* If LOC was scheduled to be replaced by something, return the replacement.
6291 Otherwise, return *LOC. */
6292
6293rtx
6294find_replacement (rtx *loc)
6295{
6296 struct replacement *r;
6297
6298 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6299 {
6300 rtx reloadreg = rld[r->what].reg_rtx;
6301
6302 if (reloadreg && r->where == loc)
6303 {
6304 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6305 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6306
6307 return reloadreg;
6308 }
6309 else if (reloadreg && r->subreg_loc == loc)
6310 {
6311 /* RELOADREG must be either a REG or a SUBREG.
6312
6313 ??? Is it actually still ever a SUBREG? If so, why? */
6314
|
6119 if (GET_CODE (reloadreg) == REG)
| 6315 if (REG_P (reloadreg))
|
6120 return gen_rtx_REG (GET_MODE (*loc),
6121 (REGNO (reloadreg) +
6122 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6123 GET_MODE (SUBREG_REG (*loc)),
6124 SUBREG_BYTE (*loc),
6125 GET_MODE (*loc))));
6126 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6127 return reloadreg;
6128 else
6129 {
6130 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6131
6132 /* When working with SUBREGs the rule is that the byte
6133 offset must be a multiple of the SUBREG's mode. */
6134 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6135 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6136 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6137 final_offset);
6138 }
6139 }
6140 }
6141
6142 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6143 what's inside and make a new rtl if so. */
6144 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6145 || GET_CODE (*loc) == MULT)
6146 {
6147 rtx x = find_replacement (&XEXP (*loc, 0));
6148 rtx y = find_replacement (&XEXP (*loc, 1));
6149
6150 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6151 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6152 }
6153
6154 return *loc;
6155}
6156
6157/* Return nonzero if register in range [REGNO, ENDREGNO)
6158 appears either explicitly or implicitly in X
6159 other than being stored into (except for earlyclobber operands).
6160
6161 References contained within the substructure at LOC do not count.
6162 LOC may be zero, meaning don't ignore anything.
6163
6164 This is similar to refers_to_regno_p in rtlanal.c except that we
6165 look at equivalences for pseudos that didn't get hard registers. */
6166
| 6316 return gen_rtx_REG (GET_MODE (*loc),
6317 (REGNO (reloadreg) +
6318 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6319 GET_MODE (SUBREG_REG (*loc)),
6320 SUBREG_BYTE (*loc),
6321 GET_MODE (*loc))));
6322 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6323 return reloadreg;
6324 else
6325 {
6326 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6327
6328 /* When working with SUBREGs the rule is that the byte
6329 offset must be a multiple of the SUBREG's mode. */
6330 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6331 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6332 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6333 final_offset);
6334 }
6335 }
6336 }
6337
6338 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6339 what's inside and make a new rtl if so. */
6340 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6341 || GET_CODE (*loc) == MULT)
6342 {
6343 rtx x = find_replacement (&XEXP (*loc, 0));
6344 rtx y = find_replacement (&XEXP (*loc, 1));
6345
6346 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6347 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6348 }
6349
6350 return *loc;
6351}
6352
6353/* Return nonzero if register in range [REGNO, ENDREGNO)
6354 appears either explicitly or implicitly in X
6355 other than being stored into (except for earlyclobber operands).
6356
6357 References contained within the substructure at LOC do not count.
6358 LOC may be zero, meaning don't ignore anything.
6359
6360 This is similar to refers_to_regno_p in rtlanal.c except that we
6361 look at equivalences for pseudos that didn't get hard registers. */
6362
|
6167int
| 6363static int
|
6168refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6169 rtx x, rtx *loc)
6170{
6171 int i;
6172 unsigned int r;
6173 RTX_CODE code;
6174 const char *fmt;
6175
6176 if (x == 0)
6177 return 0;
6178
6179 repeat:
6180 code = GET_CODE (x);
6181
6182 switch (code)
6183 {
6184 case REG:
6185 r = REGNO (x);
6186
6187 /* If this is a pseudo, a hard register must not have been allocated.
6188 X must therefore either be a constant or be in memory. */
6189 if (r >= FIRST_PSEUDO_REGISTER)
6190 {
6191 if (reg_equiv_memory_loc[r])
6192 return refers_to_regno_for_reload_p (regno, endregno,
6193 reg_equiv_memory_loc[r],
6194 (rtx*) 0);
6195
| 6364refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6365 rtx x, rtx *loc)
6366{
6367 int i;
6368 unsigned int r;
6369 RTX_CODE code;
6370 const char *fmt;
6371
6372 if (x == 0)
6373 return 0;
6374
6375 repeat:
6376 code = GET_CODE (x);
6377
6378 switch (code)
6379 {
6380 case REG:
6381 r = REGNO (x);
6382
6383 /* If this is a pseudo, a hard register must not have been allocated.
6384 X must therefore either be a constant or be in memory. */
6385 if (r >= FIRST_PSEUDO_REGISTER)
6386 {
6387 if (reg_equiv_memory_loc[r])
6388 return refers_to_regno_for_reload_p (regno, endregno,
6389 reg_equiv_memory_loc[r],
6390 (rtx*) 0);
6391
|
6196 if (reg_equiv_constant[r])
6197 return 0;
6198
6199 abort ();
| 6392 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6393 return 0;
|
6200 }
6201
6202 return (endregno > r
6203 && regno < r + (r < FIRST_PSEUDO_REGISTER
| 6394 }
6395
6396 return (endregno > r
6397 && regno < r + (r < FIRST_PSEUDO_REGISTER
|
6204 ? HARD_REGNO_NREGS (r, GET_MODE (x))
| 6398 ? hard_regno_nregs[r][GET_MODE (x)]
|
6205 : 1));
6206
6207 case SUBREG:
6208 /* If this is a SUBREG of a hard reg, we can see exactly which
6209 registers are being modified. Otherwise, handle normally. */
| 6399 : 1));
6400
6401 case SUBREG:
6402 /* If this is a SUBREG of a hard reg, we can see exactly which
6403 registers are being modified. Otherwise, handle normally. */
|
6210 if (GET_CODE (SUBREG_REG (x)) == REG
| 6404 if (REG_P (SUBREG_REG (x))
|
6211 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6212 {
6213 unsigned int inner_regno = subreg_regno (x);
6214 unsigned int inner_endregno
6215 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
| 6405 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6406 {
6407 unsigned int inner_regno = subreg_regno (x);
6408 unsigned int inner_endregno
6409 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
|
6216 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
| 6410 ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
|
6217
6218 return endregno > inner_regno && regno < inner_endregno;
6219 }
6220 break;
6221
6222 case CLOBBER:
6223 case SET:
6224 if (&SET_DEST (x) != loc
6225 /* Note setting a SUBREG counts as referring to the REG it is in for
6226 a pseudo but not for hard registers since we can
6227 treat each word individually. */
6228 && ((GET_CODE (SET_DEST (x)) == SUBREG
6229 && loc != &SUBREG_REG (SET_DEST (x))
| 6411
6412 return endregno > inner_regno && regno < inner_endregno;
6413 }
6414 break;
6415
6416 case CLOBBER:
6417 case SET:
6418 if (&SET_DEST (x) != loc
6419 /* Note setting a SUBREG counts as referring to the REG it is in for
6420 a pseudo but not for hard registers since we can
6421 treat each word individually. */
6422 && ((GET_CODE (SET_DEST (x)) == SUBREG
6423 && loc != &SUBREG_REG (SET_DEST (x))
|
6230 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
| 6424 && REG_P (SUBREG_REG (SET_DEST (x)))
|
6231 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6232 && refers_to_regno_for_reload_p (regno, endregno,
6233 SUBREG_REG (SET_DEST (x)),
6234 loc))
6235 /* If the output is an earlyclobber operand, this is
6236 a conflict. */
| 6425 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6426 && refers_to_regno_for_reload_p (regno, endregno,
6427 SUBREG_REG (SET_DEST (x)),
6428 loc))
6429 /* If the output is an earlyclobber operand, this is
6430 a conflict. */
|
6237 || ((GET_CODE (SET_DEST (x)) != REG
| 6431 || ((!REG_P (SET_DEST (x))
|
6238 || earlyclobber_operand_p (SET_DEST (x)))
6239 && refers_to_regno_for_reload_p (regno, endregno,
6240 SET_DEST (x), loc))))
6241 return 1;
6242
6243 if (code == CLOBBER || loc == &SET_SRC (x))
6244 return 0;
6245 x = SET_SRC (x);
6246 goto repeat;
6247
6248 default:
6249 break;
6250 }
6251
6252 /* X does not match, so try its subexpressions. */
6253
6254 fmt = GET_RTX_FORMAT (code);
6255 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6256 {
6257 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6258 {
6259 if (i == 0)
6260 {
6261 x = XEXP (x, 0);
6262 goto repeat;
6263 }
6264 else
6265 if (refers_to_regno_for_reload_p (regno, endregno,
6266 XEXP (x, i), loc))
6267 return 1;
6268 }
6269 else if (fmt[i] == 'E')
6270 {
6271 int j;
6272 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6273 if (loc != &XVECEXP (x, i, j)
6274 && refers_to_regno_for_reload_p (regno, endregno,
6275 XVECEXP (x, i, j), loc))
6276 return 1;
6277 }
6278 }
6279 return 0;
6280}
6281
6282/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6283 we check if any register number in X conflicts with the relevant register
6284 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6285 contains a MEM (we don't bother checking for memory addresses that can't
6286 conflict because we expect this to be a rare case.
6287
6288 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6289 that we look at equivalences for pseudos that didn't get hard registers. */
6290
6291int
6292reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6293{
6294 int regno, endregno;
6295
6296 /* Overly conservative. */
6297 if (GET_CODE (x) == STRICT_LOW_PART
| 6432 || earlyclobber_operand_p (SET_DEST (x)))
6433 && refers_to_regno_for_reload_p (regno, endregno,
6434 SET_DEST (x), loc))))
6435 return 1;
6436
6437 if (code == CLOBBER || loc == &SET_SRC (x))
6438 return 0;
6439 x = SET_SRC (x);
6440 goto repeat;
6441
6442 default:
6443 break;
6444 }
6445
6446 /* X does not match, so try its subexpressions. */
6447
6448 fmt = GET_RTX_FORMAT (code);
6449 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6450 {
6451 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6452 {
6453 if (i == 0)
6454 {
6455 x = XEXP (x, 0);
6456 goto repeat;
6457 }
6458 else
6459 if (refers_to_regno_for_reload_p (regno, endregno,
6460 XEXP (x, i), loc))
6461 return 1;
6462 }
6463 else if (fmt[i] == 'E')
6464 {
6465 int j;
6466 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6467 if (loc != &XVECEXP (x, i, j)
6468 && refers_to_regno_for_reload_p (regno, endregno,
6469 XVECEXP (x, i, j), loc))
6470 return 1;
6471 }
6472 }
6473 return 0;
6474}
6475
6476/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6477 we check if any register number in X conflicts with the relevant register
6478 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6479 contains a MEM (we don't bother checking for memory addresses that can't
6480 conflict because we expect this to be a rare case.
6481
6482 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6483 that we look at equivalences for pseudos that didn't get hard registers. */
6484
6485int
6486reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6487{
6488 int regno, endregno;
6489
6490 /* Overly conservative. */
6491 if (GET_CODE (x) == STRICT_LOW_PART
|
6298 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
| 6492 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
|
6299 x = XEXP (x, 0);
6300
6301 /* If either argument is a constant, then modifying X can not affect IN. */
6302 if (CONSTANT_P (x) || CONSTANT_P (in))
6303 return 0;
| 6493 x = XEXP (x, 0);
6494
6495 /* If either argument is a constant, then modifying X can not affect IN. */
6496 if (CONSTANT_P (x) || CONSTANT_P (in))
6497 return 0;
|
| 6498 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
6499 return refers_to_mem_for_reload_p (in);
|
6304 else if (GET_CODE (x) == SUBREG)
6305 {
6306 regno = REGNO (SUBREG_REG (x));
6307 if (regno < FIRST_PSEUDO_REGISTER)
6308 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6309 GET_MODE (SUBREG_REG (x)),
6310 SUBREG_BYTE (x),
6311 GET_MODE (x));
6312 }
| 6500 else if (GET_CODE (x) == SUBREG)
6501 {
6502 regno = REGNO (SUBREG_REG (x));
6503 if (regno < FIRST_PSEUDO_REGISTER)
6504 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6505 GET_MODE (SUBREG_REG (x)),
6506 SUBREG_BYTE (x),
6507 GET_MODE (x));
6508 }
|
6313 else if (GET_CODE (x) == REG)
| 6509 else if (REG_P (x))
|
6314 {
6315 regno = REGNO (x);
6316
6317 /* If this is a pseudo, it must not have been assigned a hard register.
6318 Therefore, it must either be in memory or be a constant. */
6319
6320 if (regno >= FIRST_PSEUDO_REGISTER)
6321 {
6322 if (reg_equiv_memory_loc[regno])
6323 return refers_to_mem_for_reload_p (in);
| 6510 {
6511 regno = REGNO (x);
6512
6513 /* If this is a pseudo, it must not have been assigned a hard register.
6514 Therefore, it must either be in memory or be a constant. */
6515
6516 if (regno >= FIRST_PSEUDO_REGISTER)
6517 {
6518 if (reg_equiv_memory_loc[regno])
6519 return refers_to_mem_for_reload_p (in);
|
6324 else if (reg_equiv_constant[regno])
6325 return 0;
6326 abort ();
| 6520 gcc_assert (reg_equiv_constant[regno]);
6521 return 0;
|
6327 }
6328 }
| 6522 }
6523 }
|
6329 else if (GET_CODE (x) == MEM)
| 6524 else if (MEM_P (x))
|
6330 return refers_to_mem_for_reload_p (in);
6331 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6332 || GET_CODE (x) == CC0)
6333 return reg_mentioned_p (x, in);
| 6525 return refers_to_mem_for_reload_p (in);
6526 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6527 || GET_CODE (x) == CC0)
6528 return reg_mentioned_p (x, in);
|
6334 else if (GET_CODE (x) == PLUS)
| 6529 else
|
6335 {
| 6530 {
|
| 6531 gcc_assert (GET_CODE (x) == PLUS);
6532
|
6336 /* We actually want to know if X is mentioned somewhere inside IN.
6337 We must not say that (plus (sp) (const_int 124)) is in
6338 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6339 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6340 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
| 6533 /* We actually want to know if X is mentioned somewhere inside IN.
6534 We must not say that (plus (sp) (const_int 124)) is in
6535 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6536 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6537 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
|
6341 while (GET_CODE (in) == MEM)
| 6538 while (MEM_P (in))
|
6342 in = XEXP (in, 0);
| 6539 in = XEXP (in, 0);
|
6343 if (GET_CODE (in) == REG)
| 6540 if (REG_P (in))
|
6344 return 0;
6345 else if (GET_CODE (in) == PLUS)
6346 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6347 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6348 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6349 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6350 }
| 6541 return 0;
6542 else if (GET_CODE (in) == PLUS)
6543 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6544 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6545 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6546 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6547 }
|
6351 else
6352 abort ();
| |
6353
6354 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
| 6548
6549 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
|
6355 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
| 6550 ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
|
6356
6357 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6358}
6359
6360/* Return nonzero if anything in X contains a MEM. Look also for pseudo
6361 registers. */
6362
| 6551
6552 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6553}
6554
6555/* Return nonzero if anything in X contains a MEM. Look also for pseudo
6556 registers. */
6557
|
6363int
| 6558static int
|
6364refers_to_mem_for_reload_p (rtx x)
6365{
6366 const char *fmt;
6367 int i;
6368
| 6559refers_to_mem_for_reload_p (rtx x)
6560{
6561 const char *fmt;
6562 int i;
6563
|
6369 if (GET_CODE (x) == MEM)
| 6564 if (MEM_P (x))
|
6370 return 1;
6371
| 6565 return 1;
6566
|
6372 if (GET_CODE (x) == REG)
| 6567 if (REG_P (x))
|
6373 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6374 && reg_equiv_memory_loc[REGNO (x)]);
6375
6376 fmt = GET_RTX_FORMAT (GET_CODE (x));
6377 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6378 if (fmt[i] == 'e'
| 6568 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6569 && reg_equiv_memory_loc[REGNO (x)]);
6570
6571 fmt = GET_RTX_FORMAT (GET_CODE (x));
6572 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6573 if (fmt[i] == 'e'
|
6379 && (GET_CODE (XEXP (x, i)) == MEM
| 6574 && (MEM_P (XEXP (x, i))
|
6380 || refers_to_mem_for_reload_p (XEXP (x, i))))
6381 return 1;
6382
6383 return 0;
6384}
6385
6386/* Check the insns before INSN to see if there is a suitable register
6387 containing the same value as GOAL.
6388 If OTHER is -1, look for a register in class CLASS.
6389 Otherwise, just see if register number OTHER shares GOAL's value.
6390
6391 Return an rtx for the register found, or zero if none is found.
6392
6393 If RELOAD_REG_P is (short *)1,
6394 we reject any hard reg that appears in reload_reg_rtx
6395 because such a hard reg is also needed coming into this insn.
6396
6397 If RELOAD_REG_P is any other nonzero value,
6398 it is a vector indexed by hard reg number
6399 and we reject any hard reg whose element in the vector is nonnegative
6400 as well as any that appears in reload_reg_rtx.
6401
6402 If GOAL is zero, then GOALREG is a register number; we look
6403 for an equivalent for that register.
6404
6405 MODE is the machine mode of the value we want an equivalence for.
6406 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6407
6408 This function is used by jump.c as well as in the reload pass.
6409
6410 If GOAL is the sum of the stack pointer and a constant, we treat it
6411 as if it were a constant except that sp is required to be unchanging. */
6412
6413rtx
6414find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6415 short *reload_reg_p, int goalreg, enum machine_mode mode)
6416{
6417 rtx p = insn;
6418 rtx goaltry, valtry, value, where;
6419 rtx pat;
6420 int regno = -1;
6421 int valueno;
6422 int goal_mem = 0;
6423 int goal_const = 0;
6424 int goal_mem_addr_varies = 0;
6425 int need_stable_sp = 0;
6426 int nregs;
6427 int valuenregs;
6428 int num = 0;
6429
6430 if (goal == 0)
6431 regno = goalreg;
| 6575 || refers_to_mem_for_reload_p (XEXP (x, i))))
6576 return 1;
6577
6578 return 0;
6579}
6580
6581/* Check the insns before INSN to see if there is a suitable register
6582 containing the same value as GOAL.
6583 If OTHER is -1, look for a register in class CLASS.
6584 Otherwise, just see if register number OTHER shares GOAL's value.
6585
6586 Return an rtx for the register found, or zero if none is found.
6587
6588 If RELOAD_REG_P is (short *)1,
6589 we reject any hard reg that appears in reload_reg_rtx
6590 because such a hard reg is also needed coming into this insn.
6591
6592 If RELOAD_REG_P is any other nonzero value,
6593 it is a vector indexed by hard reg number
6594 and we reject any hard reg whose element in the vector is nonnegative
6595 as well as any that appears in reload_reg_rtx.
6596
6597 If GOAL is zero, then GOALREG is a register number; we look
6598 for an equivalent for that register.
6599
6600 MODE is the machine mode of the value we want an equivalence for.
6601 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6602
6603 This function is used by jump.c as well as in the reload pass.
6604
6605 If GOAL is the sum of the stack pointer and a constant, we treat it
6606 as if it were a constant except that sp is required to be unchanging. */
6607
6608rtx
6609find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6610 short *reload_reg_p, int goalreg, enum machine_mode mode)
6611{
6612 rtx p = insn;
6613 rtx goaltry, valtry, value, where;
6614 rtx pat;
6615 int regno = -1;
6616 int valueno;
6617 int goal_mem = 0;
6618 int goal_const = 0;
6619 int goal_mem_addr_varies = 0;
6620 int need_stable_sp = 0;
6621 int nregs;
6622 int valuenregs;
6623 int num = 0;
6624
6625 if (goal == 0)
6626 regno = goalreg;
|
6432 else if (GET_CODE (goal) == REG)
| 6627 else if (REG_P (goal))
|
6433 regno = REGNO (goal);
| 6628 regno = REGNO (goal);
|
6434 else if (GET_CODE (goal) == MEM)
| 6629 else if (MEM_P (goal))
|
6435 {
6436 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6437 if (MEM_VOLATILE_P (goal))
6438 return 0;
| 6630 {
6631 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6632 if (MEM_VOLATILE_P (goal))
6633 return 0;
|
6439 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
| 6634 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
|
6440 return 0;
6441 /* An address with side effects must be reexecuted. */
6442 switch (code)
6443 {
6444 case POST_INC:
6445 case PRE_INC:
6446 case POST_DEC:
6447 case PRE_DEC:
6448 case POST_MODIFY:
6449 case PRE_MODIFY:
6450 return 0;
6451 default:
6452 break;
6453 }
6454 goal_mem = 1;
6455 }
6456 else if (CONSTANT_P (goal))
6457 goal_const = 1;
6458 else if (GET_CODE (goal) == PLUS
6459 && XEXP (goal, 0) == stack_pointer_rtx
6460 && CONSTANT_P (XEXP (goal, 1)))
6461 goal_const = need_stable_sp = 1;
6462 else if (GET_CODE (goal) == PLUS
6463 && XEXP (goal, 0) == frame_pointer_rtx
6464 && CONSTANT_P (XEXP (goal, 1)))
6465 goal_const = 1;
6466 else
6467 return 0;
6468
6469 num = 0;
6470 /* Scan insns back from INSN, looking for one that copies
6471 a value into or out of GOAL.
6472 Stop and give up if we reach a label. */
6473
6474 while (1)
6475 {
6476 p = PREV_INSN (p);
6477 num++;
| 6635 return 0;
6636 /* An address with side effects must be reexecuted. */
6637 switch (code)
6638 {
6639 case POST_INC:
6640 case PRE_INC:
6641 case POST_DEC:
6642 case PRE_DEC:
6643 case POST_MODIFY:
6644 case PRE_MODIFY:
6645 return 0;
6646 default:
6647 break;
6648 }
6649 goal_mem = 1;
6650 }
6651 else if (CONSTANT_P (goal))
6652 goal_const = 1;
6653 else if (GET_CODE (goal) == PLUS
6654 && XEXP (goal, 0) == stack_pointer_rtx
6655 && CONSTANT_P (XEXP (goal, 1)))
6656 goal_const = need_stable_sp = 1;
6657 else if (GET_CODE (goal) == PLUS
6658 && XEXP (goal, 0) == frame_pointer_rtx
6659 && CONSTANT_P (XEXP (goal, 1)))
6660 goal_const = 1;
6661 else
6662 return 0;
6663
6664 num = 0;
6665 /* Scan insns back from INSN, looking for one that copies
6666 a value into or out of GOAL.
6667 Stop and give up if we reach a label. */
6668
6669 while (1)
6670 {
6671 p = PREV_INSN (p);
6672 num++;
|
6478 if (p == 0 || GET_CODE (p) == CODE_LABEL
| 6673 if (p == 0 || LABEL_P (p)
|
6479 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6480 return 0;
6481
| 6674 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6675 return 0;
6676
|
6482 if (GET_CODE (p) == INSN
| 6677 if (NONJUMP_INSN_P (p)
|
6483 /* If we don't want spill regs ... */
6484 && (! (reload_reg_p != 0
6485 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6486 /* ... then ignore insns introduced by reload; they aren't
6487 useful and can cause results in reload_as_needed to be
6488 different from what they were when calculating the need for
6489 spills. If we notice an input-reload insn here, we will
6490 reject it below, but it might hide a usable equivalent.
| 6678 /* If we don't want spill regs ... */
6679 && (! (reload_reg_p != 0
6680 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6681 /* ... then ignore insns introduced by reload; they aren't
6682 useful and can cause results in reload_as_needed to be
6683 different from what they were when calculating the need for
6684 spills. If we notice an input-reload insn here, we will
6685 reject it below, but it might hide a usable equivalent.
|
6491 That makes bad code. It may even abort: perhaps no reg was
| 6686 That makes bad code. It may even fail: perhaps no reg was
|
6492 spilled for this insn because it was assumed we would find
6493 that equivalent. */
6494 || INSN_UID (p) < reload_first_uid))
6495 {
6496 rtx tem;
6497 pat = single_set (p);
6498
6499 /* First check for something that sets some reg equal to GOAL. */
6500 if (pat != 0
6501 && ((regno >= 0
6502 && true_regnum (SET_SRC (pat)) == regno
6503 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6504 ||
6505 (regno >= 0
6506 && true_regnum (SET_DEST (pat)) == regno
6507 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6508 ||
6509 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6510 /* When looking for stack pointer + const,
6511 make sure we don't use a stack adjust. */
6512 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6513 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6514 || (goal_mem
6515 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6516 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6517 || (goal_mem
6518 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6519 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6520 /* If we are looking for a constant,
6521 and something equivalent to that constant was copied
6522 into a reg, we can use that reg. */
6523 || (goal_const && REG_NOTES (p) != 0
6524 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6525 && ((rtx_equal_p (XEXP (tem, 0), goal)
6526 && (valueno
6527 = true_regnum (valtry = SET_DEST (pat))) >= 0)
| 6687 spilled for this insn because it was assumed we would find
6688 that equivalent. */
6689 || INSN_UID (p) < reload_first_uid))
6690 {
6691 rtx tem;
6692 pat = single_set (p);
6693
6694 /* First check for something that sets some reg equal to GOAL. */
6695 if (pat != 0
6696 && ((regno >= 0
6697 && true_regnum (SET_SRC (pat)) == regno
6698 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6699 ||
6700 (regno >= 0
6701 && true_regnum (SET_DEST (pat)) == regno
6702 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6703 ||
6704 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6705 /* When looking for stack pointer + const,
6706 make sure we don't use a stack adjust. */
6707 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6708 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6709 || (goal_mem
6710 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6711 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6712 || (goal_mem
6713 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6714 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6715 /* If we are looking for a constant,
6716 and something equivalent to that constant was copied
6717 into a reg, we can use that reg. */
6718 || (goal_const && REG_NOTES (p) != 0
6719 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6720 && ((rtx_equal_p (XEXP (tem, 0), goal)
6721 && (valueno
6722 = true_regnum (valtry = SET_DEST (pat))) >= 0)
|
6528 || (GET_CODE (SET_DEST (pat)) == REG
| 6723 || (REG_P (SET_DEST (pat))
|
6529 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
| 6724 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
|
6530 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6531 == MODE_FLOAT)
| 6725 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
|
6532 && GET_CODE (goal) == CONST_INT
6533 && 0 != (goaltry
6534 = operand_subword (XEXP (tem, 0), 0, 0,
6535 VOIDmode))
6536 && rtx_equal_p (goal, goaltry)
6537 && (valtry
6538 = operand_subword (SET_DEST (pat), 0, 0,
6539 VOIDmode))
6540 && (valueno = true_regnum (valtry)) >= 0)))
6541 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6542 NULL_RTX))
| 6726 && GET_CODE (goal) == CONST_INT
6727 && 0 != (goaltry
6728 = operand_subword (XEXP (tem, 0), 0, 0,
6729 VOIDmode))
6730 && rtx_equal_p (goal, goaltry)
6731 && (valtry
6732 = operand_subword (SET_DEST (pat), 0, 0,
6733 VOIDmode))
6734 && (valueno = true_regnum (valtry)) >= 0)))
6735 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6736 NULL_RTX))
|
6543 && GET_CODE (SET_DEST (pat)) == REG
| 6737 && REG_P (SET_DEST (pat))
|
6544 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
| 6738 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
|
6545 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6546 == MODE_FLOAT)
| 6739 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
|
6547 && GET_CODE (goal) == CONST_INT
6548 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6549 VOIDmode))
6550 && rtx_equal_p (goal, goaltry)
6551 && (valtry
6552 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6553 && (valueno = true_regnum (valtry)) >= 0)))
6554 {
6555 if (other >= 0)
6556 {
6557 if (valueno != other)
6558 continue;
6559 }
6560 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6561 continue;
6562 else
6563 {
6564 int i;
6565
| 6740 && GET_CODE (goal) == CONST_INT
6741 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6742 VOIDmode))
6743 && rtx_equal_p (goal, goaltry)
6744 && (valtry
6745 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6746 && (valueno = true_regnum (valtry)) >= 0)))
6747 {
6748 if (other >= 0)
6749 {
6750 if (valueno != other)
6751 continue;
6752 }
6753 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6754 continue;
6755 else
6756 {
6757 int i;
6758
|
6566 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
| 6759 for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
|
6567 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6568 valueno + i))
6569 break;
6570 if (i >= 0)
6571 continue;
6572 }
6573 value = valtry;
6574 where = p;
6575 break;
6576 }
6577 }
6578 }
6579
6580 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6581 (or copying VALUE into GOAL, if GOAL is also a register).
6582 Now verify that VALUE is really valid. */
6583
6584 /* VALUENO is the register number of VALUE; a hard register. */
6585
6586 /* Don't try to re-use something that is killed in this insn. We want
6587 to be able to trust REG_UNUSED notes. */
6588 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6589 return 0;
6590
6591 /* If we propose to get the value from the stack pointer or if GOAL is
6592 a MEM based on the stack pointer, we need a stable SP. */
6593 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6594 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6595 goal)))
6596 need_stable_sp = 1;
6597
6598 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6599 if (GET_MODE (value) != mode)
6600 return 0;
6601
6602 /* Reject VALUE if it was loaded from GOAL
6603 and is also a register that appears in the address of GOAL. */
6604
6605 if (goal_mem && value == SET_DEST (single_set (where))
6606 && refers_to_regno_for_reload_p (valueno,
6607 (valueno
| 6760 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6761 valueno + i))
6762 break;
6763 if (i >= 0)
6764 continue;
6765 }
6766 value = valtry;
6767 where = p;
6768 break;
6769 }
6770 }
6771 }
6772
6773 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6774 (or copying VALUE into GOAL, if GOAL is also a register).
6775 Now verify that VALUE is really valid. */
6776
6777 /* VALUENO is the register number of VALUE; a hard register. */
6778
6779 /* Don't try to re-use something that is killed in this insn. We want
6780 to be able to trust REG_UNUSED notes. */
6781 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6782 return 0;
6783
6784 /* If we propose to get the value from the stack pointer or if GOAL is
6785 a MEM based on the stack pointer, we need a stable SP. */
6786 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6787 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6788 goal)))
6789 need_stable_sp = 1;
6790
6791 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6792 if (GET_MODE (value) != mode)
6793 return 0;
6794
6795 /* Reject VALUE if it was loaded from GOAL
6796 and is also a register that appears in the address of GOAL. */
6797
6798 if (goal_mem && value == SET_DEST (single_set (where))
6799 && refers_to_regno_for_reload_p (valueno,
6800 (valueno
|
6608 + HARD_REGNO_NREGS (valueno, mode)),
| 6801 + hard_regno_nregs[valueno][mode]),
|
6609 goal, (rtx*) 0))
6610 return 0;
6611
6612 /* Reject registers that overlap GOAL. */
6613
| 6802 goal, (rtx*) 0))
6803 return 0;
6804
6805 /* Reject registers that overlap GOAL. */
6806
|
| 6807 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6808 nregs = hard_regno_nregs[regno][mode];
6809 else
6810 nregs = 1;
6811 valuenregs = hard_regno_nregs[valueno][mode];
6812
|
6614 if (!goal_mem && !goal_const
| 6813 if (!goal_mem && !goal_const
|
6615 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6616 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
| 6814 && regno + nregs > valueno && regno < valueno + valuenregs)
|
6617 return 0;
6618
| 6815 return 0;
6816
|
6619 nregs = HARD_REGNO_NREGS (regno, mode);
6620 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6621
| |
6622 /* Reject VALUE if it is one of the regs reserved for reloads.
6623 Reload1 knows how to reuse them anyway, and it would get
6624 confused if we allocated one without its knowledge.
6625 (Now that insns introduced by reload are ignored above,
6626 this case shouldn't happen, but I'm not positive.) */
6627
6628 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6629 {
6630 int i;
6631 for (i = 0; i < valuenregs; ++i)
6632 if (reload_reg_p[valueno + i] >= 0)
6633 return 0;
6634 }
6635
6636 /* Reject VALUE if it is a register being used for an input reload
6637 even if it is not one of those reserved. */
6638
6639 if (reload_reg_p != 0)
6640 {
6641 int i;
6642 for (i = 0; i < n_reloads; i++)
6643 if (rld[i].reg_rtx != 0 && rld[i].in)
6644 {
6645 int regno1 = REGNO (rld[i].reg_rtx);
| 6817 /* Reject VALUE if it is one of the regs reserved for reloads.
6818 Reload1 knows how to reuse them anyway, and it would get
6819 confused if we allocated one without its knowledge.
6820 (Now that insns introduced by reload are ignored above,
6821 this case shouldn't happen, but I'm not positive.) */
6822
6823 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6824 {
6825 int i;
6826 for (i = 0; i < valuenregs; ++i)
6827 if (reload_reg_p[valueno + i] >= 0)
6828 return 0;
6829 }
6830
6831 /* Reject VALUE if it is a register being used for an input reload
6832 even if it is not one of those reserved. */
6833
6834 if (reload_reg_p != 0)
6835 {
6836 int i;
6837 for (i = 0; i < n_reloads; i++)
6838 if (rld[i].reg_rtx != 0 && rld[i].in)
6839 {
6840 int regno1 = REGNO (rld[i].reg_rtx);
|
6646 int nregs1 = HARD_REGNO_NREGS (regno1,
6647 GET_MODE (rld[i].reg_rtx));
| 6841 int nregs1 = hard_regno_nregs[regno1]
6842 [GET_MODE (rld[i].reg_rtx)];
|
6648 if (regno1 < valueno + valuenregs
6649 && regno1 + nregs1 > valueno)
6650 return 0;
6651 }
6652 }
6653
6654 if (goal_mem)
6655 /* We must treat frame pointer as varying here,
6656 since it can vary--in a nonlocal goto as generated by expand_goto. */
6657 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6658
6659 /* Now verify that the values of GOAL and VALUE remain unaltered
6660 until INSN is reached. */
6661
6662 p = insn;
6663 while (1)
6664 {
6665 p = PREV_INSN (p);
6666 if (p == where)
6667 return value;
6668
6669 /* Don't trust the conversion past a function call
6670 if either of the two is in a call-clobbered register, or memory. */
| 6843 if (regno1 < valueno + valuenregs
6844 && regno1 + nregs1 > valueno)
6845 return 0;
6846 }
6847 }
6848
6849 if (goal_mem)
6850 /* We must treat frame pointer as varying here,
6851 since it can vary--in a nonlocal goto as generated by expand_goto. */
6852 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6853
6854 /* Now verify that the values of GOAL and VALUE remain unaltered
6855 until INSN is reached. */
6856
6857 p = insn;
6858 while (1)
6859 {
6860 p = PREV_INSN (p);
6861 if (p == where)
6862 return value;
6863
6864 /* Don't trust the conversion past a function call
6865 if either of the two is in a call-clobbered register, or memory. */
|
6671 if (GET_CODE (p) == CALL_INSN)
| 6866 if (CALL_P (p))
|
6672 {
6673 int i;
6674
6675 if (goal_mem || need_stable_sp)
6676 return 0;
6677
6678 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6679 for (i = 0; i < nregs; ++i)
| 6867 {
6868 int i;
6869
6870 if (goal_mem || need_stable_sp)
6871 return 0;
6872
6873 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6874 for (i = 0; i < nregs; ++i)
|
6680 if (call_used_regs[regno + i])
| 6875 if (call_used_regs[regno + i]
6876 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
|
6681 return 0;
6682
6683 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6684 for (i = 0; i < valuenregs; ++i)
| 6877 return 0;
6878
6879 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6880 for (i = 0; i < valuenregs; ++i)
|
6685 if (call_used_regs[valueno + i])
| 6881 if (call_used_regs[valueno + i]
6882 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
|
6686 return 0;
| 6883 return 0;
|
6687#ifdef NON_SAVING_SETJMP
6688 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6689 return 0;
6690#endif
| |
6691 }
6692
6693 if (INSN_P (p))
6694 {
6695 pat = PATTERN (p);
6696
6697 /* Watch out for unspec_volatile, and volatile asms. */
6698 if (volatile_insn_p (pat))
6699 return 0;
6700
6701 /* If this insn P stores in either GOAL or VALUE, return 0.
6702 If GOAL is a memory ref and this insn writes memory, return 0.
6703 If GOAL is a memory ref and its address is not constant,
6704 and this insn P changes a register used in GOAL, return 0. */
6705
6706 if (GET_CODE (pat) == COND_EXEC)
6707 pat = COND_EXEC_CODE (pat);
6708 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6709 {
6710 rtx dest = SET_DEST (pat);
6711 while (GET_CODE (dest) == SUBREG
6712 || GET_CODE (dest) == ZERO_EXTRACT
| 6884 }
6885
6886 if (INSN_P (p))
6887 {
6888 pat = PATTERN (p);
6889
6890 /* Watch out for unspec_volatile, and volatile asms. */
6891 if (volatile_insn_p (pat))
6892 return 0;
6893
6894 /* If this insn P stores in either GOAL or VALUE, return 0.
6895 If GOAL is a memory ref and this insn writes memory, return 0.
6896 If GOAL is a memory ref and its address is not constant,
6897 and this insn P changes a register used in GOAL, return 0. */
6898
6899 if (GET_CODE (pat) == COND_EXEC)
6900 pat = COND_EXEC_CODE (pat);
6901 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6902 {
6903 rtx dest = SET_DEST (pat);
6904 while (GET_CODE (dest) == SUBREG
6905 || GET_CODE (dest) == ZERO_EXTRACT
|
6713 || GET_CODE (dest) == SIGN_EXTRACT
| |
6714 || GET_CODE (dest) == STRICT_LOW_PART)
6715 dest = XEXP (dest, 0);
| 6906 || GET_CODE (dest) == STRICT_LOW_PART)
6907 dest = XEXP (dest, 0);
|
6716 if (GET_CODE (dest) == REG)
| 6908 if (REG_P (dest))
|
6717 {
6718 int xregno = REGNO (dest);
6719 int xnregs;
6720 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
| 6909 {
6910 int xregno = REGNO (dest);
6911 int xnregs;
6912 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
|
6721 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
| 6913 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
|
6722 else
6723 xnregs = 1;
6724 if (xregno < regno + nregs && xregno + xnregs > regno)
6725 return 0;
6726 if (xregno < valueno + valuenregs
6727 && xregno + xnregs > valueno)
6728 return 0;
6729 if (goal_mem_addr_varies
6730 && reg_overlap_mentioned_for_reload_p (dest, goal))
6731 return 0;
6732 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6733 return 0;
6734 }
| 6914 else
6915 xnregs = 1;
6916 if (xregno < regno + nregs && xregno + xnregs > regno)
6917 return 0;
6918 if (xregno < valueno + valuenregs
6919 && xregno + xnregs > valueno)
6920 return 0;
6921 if (goal_mem_addr_varies
6922 && reg_overlap_mentioned_for_reload_p (dest, goal))
6923 return 0;
6924 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6925 return 0;
6926 }
|
6735 else if (goal_mem && GET_CODE (dest) == MEM
| 6927 else if (goal_mem && MEM_P (dest)
|
6736 && ! push_operand (dest, GET_MODE (dest)))
6737 return 0;
| 6928 && ! push_operand (dest, GET_MODE (dest)))
6929 return 0;
|
6738 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
| 6930 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
|
6739 && reg_equiv_memory_loc[regno] != 0)
6740 return 0;
6741 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6742 return 0;
6743 }
6744 else if (GET_CODE (pat) == PARALLEL)
6745 {
6746 int i;
6747 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6748 {
6749 rtx v1 = XVECEXP (pat, 0, i);
6750 if (GET_CODE (v1) == COND_EXEC)
6751 v1 = COND_EXEC_CODE (v1);
6752 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6753 {
6754 rtx dest = SET_DEST (v1);
6755 while (GET_CODE (dest) == SUBREG
6756 || GET_CODE (dest) == ZERO_EXTRACT
| 6931 && reg_equiv_memory_loc[regno] != 0)
6932 return 0;
6933 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6934 return 0;
6935 }
6936 else if (GET_CODE (pat) == PARALLEL)
6937 {
6938 int i;
6939 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6940 {
6941 rtx v1 = XVECEXP (pat, 0, i);
6942 if (GET_CODE (v1) == COND_EXEC)
6943 v1 = COND_EXEC_CODE (v1);
6944 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6945 {
6946 rtx dest = SET_DEST (v1);
6947 while (GET_CODE (dest) == SUBREG
6948 || GET_CODE (dest) == ZERO_EXTRACT
|
6757 || GET_CODE (dest) == SIGN_EXTRACT
| |
6758 || GET_CODE (dest) == STRICT_LOW_PART)
6759 dest = XEXP (dest, 0);
| 6949 || GET_CODE (dest) == STRICT_LOW_PART)
6950 dest = XEXP (dest, 0);
|
6760 if (GET_CODE (dest) == REG)
| 6951 if (REG_P (dest))
|
6761 {
6762 int xregno = REGNO (dest);
6763 int xnregs;
6764 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
| 6952 {
6953 int xregno = REGNO (dest);
6954 int xnregs;
6955 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
|
6765 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
| 6956 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
|
6766 else
6767 xnregs = 1;
6768 if (xregno < regno + nregs
6769 && xregno + xnregs > regno)
6770 return 0;
6771 if (xregno < valueno + valuenregs
6772 && xregno + xnregs > valueno)
6773 return 0;
6774 if (goal_mem_addr_varies
6775 && reg_overlap_mentioned_for_reload_p (dest,
6776 goal))
6777 return 0;
6778 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6779 return 0;
6780 }
| 6957 else
6958 xnregs = 1;
6959 if (xregno < regno + nregs
6960 && xregno + xnregs > regno)
6961 return 0;
6962 if (xregno < valueno + valuenregs
6963 && xregno + xnregs > valueno)
6964 return 0;
6965 if (goal_mem_addr_varies
6966 && reg_overlap_mentioned_for_reload_p (dest,
6967 goal))
6968 return 0;
6969 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6970 return 0;
6971 }
|
6781 else if (goal_mem && GET_CODE (dest) == MEM
| 6972 else if (goal_mem && MEM_P (dest)
|
6782 && ! push_operand (dest, GET_MODE (dest)))
6783 return 0;
| 6973 && ! push_operand (dest, GET_MODE (dest)))
6974 return 0;
|
6784 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
| 6975 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
|
6785 && reg_equiv_memory_loc[regno] != 0)
6786 return 0;
6787 else if (need_stable_sp
6788 && push_operand (dest, GET_MODE (dest)))
6789 return 0;
6790 }
6791 }
6792 }
6793
| 6976 && reg_equiv_memory_loc[regno] != 0)
6977 return 0;
6978 else if (need_stable_sp
6979 && push_operand (dest, GET_MODE (dest)))
6980 return 0;
6981 }
6982 }
6983 }
6984
|
6794 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
| 6985 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
|
6795 {
6796 rtx link;
6797
6798 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6799 link = XEXP (link, 1))
6800 {
6801 pat = XEXP (link, 0);
6802 if (GET_CODE (pat) == CLOBBER)
6803 {
6804 rtx dest = SET_DEST (pat);
6805
| 6986 {
6987 rtx link;
6988
6989 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6990 link = XEXP (link, 1))
6991 {
6992 pat = XEXP (link, 0);
6993 if (GET_CODE (pat) == CLOBBER)
6994 {
6995 rtx dest = SET_DEST (pat);
6996
|
6806 if (GET_CODE (dest) == REG)
| 6997 if (REG_P (dest))
|
6807 {
6808 int xregno = REGNO (dest);
6809 int xnregs
| 6998 {
6999 int xregno = REGNO (dest);
7000 int xnregs
|
6810 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
| 7001 = hard_regno_nregs[xregno][GET_MODE (dest)];
|
6811
6812 if (xregno < regno + nregs
6813 && xregno + xnregs > regno)
6814 return 0;
6815 else if (xregno < valueno + valuenregs
6816 && xregno + xnregs > valueno)
6817 return 0;
6818 else if (goal_mem_addr_varies
6819 && reg_overlap_mentioned_for_reload_p (dest,
6820 goal))
6821 return 0;
6822 }
6823
| 7002
7003 if (xregno < regno + nregs
7004 && xregno + xnregs > regno)
7005 return 0;
7006 else if (xregno < valueno + valuenregs
7007 && xregno + xnregs > valueno)
7008 return 0;
7009 else if (goal_mem_addr_varies
7010 && reg_overlap_mentioned_for_reload_p (dest,
7011 goal))
7012 return 0;
7013 }
7014
|
6824 else if (goal_mem && GET_CODE (dest) == MEM
| 7015 else if (goal_mem && MEM_P (dest)
|
6825 && ! push_operand (dest, GET_MODE (dest)))
6826 return 0;
6827 else if (need_stable_sp
6828 && push_operand (dest, GET_MODE (dest)))
6829 return 0;
6830 }
6831 }
6832 }
6833
6834#ifdef AUTO_INC_DEC
6835 /* If this insn auto-increments or auto-decrements
6836 either regno or valueno, return 0 now.
6837 If GOAL is a memory ref and its address is not constant,
6838 and this insn P increments a register used in GOAL, return 0. */
6839 {
6840 rtx link;
6841
6842 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6843 if (REG_NOTE_KIND (link) == REG_INC
| 7016 && ! push_operand (dest, GET_MODE (dest)))
7017 return 0;
7018 else if (need_stable_sp
7019 && push_operand (dest, GET_MODE (dest)))
7020 return 0;
7021 }
7022 }
7023 }
7024
7025#ifdef AUTO_INC_DEC
7026 /* If this insn auto-increments or auto-decrements
7027 either regno or valueno, return 0 now.
7028 If GOAL is a memory ref and its address is not constant,
7029 and this insn P increments a register used in GOAL, return 0. */
7030 {
7031 rtx link;
7032
7033 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7034 if (REG_NOTE_KIND (link) == REG_INC
|
6844 && GET_CODE (XEXP (link, 0)) == REG)
| 7035 && REG_P (XEXP (link, 0)))
|
6845 {
6846 int incno = REGNO (XEXP (link, 0));
6847 if (incno < regno + nregs && incno >= regno)
6848 return 0;
6849 if (incno < valueno + valuenregs && incno >= valueno)
6850 return 0;
6851 if (goal_mem_addr_varies
6852 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6853 goal))
6854 return 0;
6855 }
6856 }
6857#endif
6858 }
6859 }
6860}
6861
6862/* Find a place where INCED appears in an increment or decrement operator
6863 within X, and return the amount INCED is incremented or decremented by.
6864 The value is always positive. */
6865
6866static int
6867find_inc_amount (rtx x, rtx inced)
6868{
6869 enum rtx_code code = GET_CODE (x);
6870 const char *fmt;
6871 int i;
6872
6873 if (code == MEM)
6874 {
6875 rtx addr = XEXP (x, 0);
6876 if ((GET_CODE (addr) == PRE_DEC
6877 || GET_CODE (addr) == POST_DEC
6878 || GET_CODE (addr) == PRE_INC
6879 || GET_CODE (addr) == POST_INC)
6880 && XEXP (addr, 0) == inced)
6881 return GET_MODE_SIZE (GET_MODE (x));
6882 else if ((GET_CODE (addr) == PRE_MODIFY
6883 || GET_CODE (addr) == POST_MODIFY)
6884 && GET_CODE (XEXP (addr, 1)) == PLUS
6885 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6886 && XEXP (addr, 0) == inced
6887 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6888 {
6889 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6890 return i < 0 ? -i : i;
6891 }
6892 }
6893
6894 fmt = GET_RTX_FORMAT (code);
6895 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6896 {
6897 if (fmt[i] == 'e')
6898 {
6899 int tem = find_inc_amount (XEXP (x, i), inced);
6900 if (tem != 0)
6901 return tem;
6902 }
6903 if (fmt[i] == 'E')
6904 {
6905 int j;
6906 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6907 {
6908 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6909 if (tem != 0)
6910 return tem;
6911 }
6912 }
6913 }
6914
6915 return 0;
6916}
6917
| 7036 {
7037 int incno = REGNO (XEXP (link, 0));
7038 if (incno < regno + nregs && incno >= regno)
7039 return 0;
7040 if (incno < valueno + valuenregs && incno >= valueno)
7041 return 0;
7042 if (goal_mem_addr_varies
7043 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7044 goal))
7045 return 0;
7046 }
7047 }
7048#endif
7049 }
7050 }
7051}
7052
7053/* Find a place where INCED appears in an increment or decrement operator
7054 within X, and return the amount INCED is incremented or decremented by.
7055 The value is always positive. */
7056
7057static int
7058find_inc_amount (rtx x, rtx inced)
7059{
7060 enum rtx_code code = GET_CODE (x);
7061 const char *fmt;
7062 int i;
7063
7064 if (code == MEM)
7065 {
7066 rtx addr = XEXP (x, 0);
7067 if ((GET_CODE (addr) == PRE_DEC
7068 || GET_CODE (addr) == POST_DEC
7069 || GET_CODE (addr) == PRE_INC
7070 || GET_CODE (addr) == POST_INC)
7071 && XEXP (addr, 0) == inced)
7072 return GET_MODE_SIZE (GET_MODE (x));
7073 else if ((GET_CODE (addr) == PRE_MODIFY
7074 || GET_CODE (addr) == POST_MODIFY)
7075 && GET_CODE (XEXP (addr, 1)) == PLUS
7076 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7077 && XEXP (addr, 0) == inced
7078 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
7079 {
7080 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7081 return i < 0 ? -i : i;
7082 }
7083 }
7084
7085 fmt = GET_RTX_FORMAT (code);
7086 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7087 {
7088 if (fmt[i] == 'e')
7089 {
7090 int tem = find_inc_amount (XEXP (x, i), inced);
7091 if (tem != 0)
7092 return tem;
7093 }
7094 if (fmt[i] == 'E')
7095 {
7096 int j;
7097 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7098 {
7099 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7100 if (tem != 0)
7101 return tem;
7102 }
7103 }
7104 }
7105
7106 return 0;
7107}
7108
|
| 7109/* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7110 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7111
7112#ifdef AUTO_INC_DEC
7113static int
7114reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7115 rtx insn)
7116{
7117 rtx link;
7118
7119 gcc_assert (insn);
7120
7121 if (! INSN_P (insn))
7122 return 0;
7123
7124 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7125 if (REG_NOTE_KIND (link) == REG_INC)
7126 {
7127 unsigned int test = (int) REGNO (XEXP (link, 0));
7128 if (test >= regno && test < endregno)
7129 return 1;
7130 }
7131 return 0;
7132}
7133#else
7134
7135#define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7136
7137#endif
7138
|
6918/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
| 7139/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
|
6919 If SETS is nonzero, also consider SETs. */
| 7140 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7141 REG_INC. REGNO must refer to a hard register. */
|
6920
6921int
6922regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
6923 int sets)
6924{
| 7142
7143int
7144regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7145 int sets)
7146{
|
6925 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6926 unsigned int endregno = regno + nregs;
| 7147 unsigned int nregs, endregno;
|
6927
| 7148
|
| 7149 /* regno must be a hard register. */
7150 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7151
7152 nregs = hard_regno_nregs[regno][mode];
7153 endregno = regno + nregs;
7154
|
6928 if ((GET_CODE (PATTERN (insn)) == CLOBBER
| 7155 if ((GET_CODE (PATTERN (insn)) == CLOBBER
|
6929 || (sets && GET_CODE (PATTERN (insn)) == SET))
6930 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
| 7156 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7157 && REG_P (XEXP (PATTERN (insn), 0)))
|
6931 {
6932 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6933
6934 return test >= regno && test < endregno;
6935 }
6936
| 7158 {
7159 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7160
7161 return test >= regno && test < endregno;
7162 }
7163
|
| 7164 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7165 return 1;
7166
|
6937 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6938 {
6939 int i = XVECLEN (PATTERN (insn), 0) - 1;
6940
6941 for (; i >= 0; i--)
6942 {
6943 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6944 if ((GET_CODE (elt) == CLOBBER
| 7167 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7168 {
7169 int i = XVECLEN (PATTERN (insn), 0) - 1;
7170
7171 for (; i >= 0; i--)
7172 {
7173 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7174 if ((GET_CODE (elt) == CLOBBER
|
6945 || (sets && GET_CODE (PATTERN (insn)) == SET))
6946 && GET_CODE (XEXP (elt, 0)) == REG)
| 7175 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7176 && REG_P (XEXP (elt, 0)))
|
6947 {
6948 unsigned int test = REGNO (XEXP (elt, 0));
6949
6950 if (test >= regno && test < endregno)
6951 return 1;
6952 }
| 7177 {
7178 unsigned int test = REGNO (XEXP (elt, 0));
7179
7180 if (test >= regno && test < endregno)
7181 return 1;
7182 }
|
| 7183 if (sets == 2
7184 && reg_inc_found_and_valid_p (regno, endregno, elt))
7185 return 1;
|
6953 }
6954 }
6955
6956 return 0;
6957}
6958
6959/* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6960rtx
6961reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
6962{
6963 int regno;
6964
6965 if (GET_MODE (reloadreg) == mode)
6966 return reloadreg;
6967
6968 regno = REGNO (reloadreg);
6969
6970 if (WORDS_BIG_ENDIAN)
| 7186 }
7187 }
7188
7189 return 0;
7190}
7191
7192/* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7193rtx
7194reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7195{
7196 int regno;
7197
7198 if (GET_MODE (reloadreg) == mode)
7199 return reloadreg;
7200
7201 regno = REGNO (reloadreg);
7202
7203 if (WORDS_BIG_ENDIAN)
|
6971 regno += HARD_REGNO_NREGS (regno, GET_MODE (reloadreg))
6972 - HARD_REGNO_NREGS (regno, mode);
| 7204 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7205 - (int) hard_regno_nregs[regno][mode];
|
6973
6974 return gen_rtx_REG (mode, regno);
6975}
6976
6977static const char *const reload_when_needed_name[] =
6978{
6979 "RELOAD_FOR_INPUT",
6980 "RELOAD_FOR_OUTPUT",
6981 "RELOAD_FOR_INSN",
6982 "RELOAD_FOR_INPUT_ADDRESS",
6983 "RELOAD_FOR_INPADDR_ADDRESS",
6984 "RELOAD_FOR_OUTPUT_ADDRESS",
6985 "RELOAD_FOR_OUTADDR_ADDRESS",
6986 "RELOAD_FOR_OPERAND_ADDRESS",
6987 "RELOAD_FOR_OPADDR_ADDR",
6988 "RELOAD_OTHER",
6989 "RELOAD_FOR_OTHER_ADDRESS"
6990};
6991
| 7206
7207 return gen_rtx_REG (mode, regno);
7208}
7209
7210static const char *const reload_when_needed_name[] =
7211{
7212 "RELOAD_FOR_INPUT",
7213 "RELOAD_FOR_OUTPUT",
7214 "RELOAD_FOR_INSN",
7215 "RELOAD_FOR_INPUT_ADDRESS",
7216 "RELOAD_FOR_INPADDR_ADDRESS",
7217 "RELOAD_FOR_OUTPUT_ADDRESS",
7218 "RELOAD_FOR_OUTADDR_ADDRESS",
7219 "RELOAD_FOR_OPERAND_ADDRESS",
7220 "RELOAD_FOR_OPADDR_ADDR",
7221 "RELOAD_OTHER",
7222 "RELOAD_FOR_OTHER_ADDRESS"
7223};
7224
|
6992static const char * const reg_class_names[] = REG_CLASS_NAMES;
6993
| |
6994/* These functions are used to print the variables set by 'find_reloads' */
6995
6996void
6997debug_reload_to_stream (FILE *f)
6998{
6999 int r;
7000 const char *prefix;
7001
7002 if (! f)
7003 f = stderr;
7004 for (r = 0; r < n_reloads; r++)
7005 {
7006 fprintf (f, "Reload %d: ", r);
7007
7008 if (rld[r].in != 0)
7009 {
7010 fprintf (f, "reload_in (%s) = ",
7011 GET_MODE_NAME (rld[r].inmode));
7012 print_inline_rtx (f, rld[r].in, 24);
7013 fprintf (f, "\n\t");
7014 }
7015
7016 if (rld[r].out != 0)
7017 {
7018 fprintf (f, "reload_out (%s) = ",
7019 GET_MODE_NAME (rld[r].outmode));
7020 print_inline_rtx (f, rld[r].out, 24);
7021 fprintf (f, "\n\t");
7022 }
7023
7024 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7025
7026 fprintf (f, "%s (opnum = %d)",
7027 reload_when_needed_name[(int) rld[r].when_needed],
7028 rld[r].opnum);
7029
7030 if (rld[r].optional)
7031 fprintf (f, ", optional");
7032
7033 if (rld[r].nongroup)
7034 fprintf (f, ", nongroup");
7035
7036 if (rld[r].inc != 0)
7037 fprintf (f, ", inc by %d", rld[r].inc);
7038
7039 if (rld[r].nocombine)
7040 fprintf (f, ", can't combine");
7041
7042 if (rld[r].secondary_p)
7043 fprintf (f, ", secondary_reload_p");
7044
7045 if (rld[r].in_reg != 0)
7046 {
7047 fprintf (f, "\n\treload_in_reg: ");
7048 print_inline_rtx (f, rld[r].in_reg, 24);
7049 }
7050
7051 if (rld[r].out_reg != 0)
7052 {
7053 fprintf (f, "\n\treload_out_reg: ");
7054 print_inline_rtx (f, rld[r].out_reg, 24);
7055 }
7056
7057 if (rld[r].reg_rtx != 0)
7058 {
7059 fprintf (f, "\n\treload_reg_rtx: ");
7060 print_inline_rtx (f, rld[r].reg_rtx, 24);
7061 }
7062
7063 prefix = "\n\t";
7064 if (rld[r].secondary_in_reload != -1)
7065 {
7066 fprintf (f, "%ssecondary_in_reload = %d",
7067 prefix, rld[r].secondary_in_reload);
7068 prefix = ", ";
7069 }
7070
7071 if (rld[r].secondary_out_reload != -1)
7072 fprintf (f, "%ssecondary_out_reload = %d\n",
7073 prefix, rld[r].secondary_out_reload);
7074
7075 prefix = "\n\t";
7076 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7077 {
7078 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7079 insn_data[rld[r].secondary_in_icode].name);
7080 prefix = ", ";
7081 }
7082
7083 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7084 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7085 insn_data[rld[r].secondary_out_icode].name);
7086
7087 fprintf (f, "\n");
7088 }
7089}
7090
7091void
7092debug_reload (void)
7093{
7094 debug_reload_to_stream (stderr);
7095}
| 7225/* These functions are used to print the variables set by 'find_reloads' */
7226
7227void
7228debug_reload_to_stream (FILE *f)
7229{
7230 int r;
7231 const char *prefix;
7232
7233 if (! f)
7234 f = stderr;
7235 for (r = 0; r < n_reloads; r++)
7236 {
7237 fprintf (f, "Reload %d: ", r);
7238
7239 if (rld[r].in != 0)
7240 {
7241 fprintf (f, "reload_in (%s) = ",
7242 GET_MODE_NAME (rld[r].inmode));
7243 print_inline_rtx (f, rld[r].in, 24);
7244 fprintf (f, "\n\t");
7245 }
7246
7247 if (rld[r].out != 0)
7248 {
7249 fprintf (f, "reload_out (%s) = ",
7250 GET_MODE_NAME (rld[r].outmode));
7251 print_inline_rtx (f, rld[r].out, 24);
7252 fprintf (f, "\n\t");
7253 }
7254
7255 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7256
7257 fprintf (f, "%s (opnum = %d)",
7258 reload_when_needed_name[(int) rld[r].when_needed],
7259 rld[r].opnum);
7260
7261 if (rld[r].optional)
7262 fprintf (f, ", optional");
7263
7264 if (rld[r].nongroup)
7265 fprintf (f, ", nongroup");
7266
7267 if (rld[r].inc != 0)
7268 fprintf (f, ", inc by %d", rld[r].inc);
7269
7270 if (rld[r].nocombine)
7271 fprintf (f, ", can't combine");
7272
7273 if (rld[r].secondary_p)
7274 fprintf (f, ", secondary_reload_p");
7275
7276 if (rld[r].in_reg != 0)
7277 {
7278 fprintf (f, "\n\treload_in_reg: ");
7279 print_inline_rtx (f, rld[r].in_reg, 24);
7280 }
7281
7282 if (rld[r].out_reg != 0)
7283 {
7284 fprintf (f, "\n\treload_out_reg: ");
7285 print_inline_rtx (f, rld[r].out_reg, 24);
7286 }
7287
7288 if (rld[r].reg_rtx != 0)
7289 {
7290 fprintf (f, "\n\treload_reg_rtx: ");
7291 print_inline_rtx (f, rld[r].reg_rtx, 24);
7292 }
7293
7294 prefix = "\n\t";
7295 if (rld[r].secondary_in_reload != -1)
7296 {
7297 fprintf (f, "%ssecondary_in_reload = %d",
7298 prefix, rld[r].secondary_in_reload);
7299 prefix = ", ";
7300 }
7301
7302 if (rld[r].secondary_out_reload != -1)
7303 fprintf (f, "%ssecondary_out_reload = %d\n",
7304 prefix, rld[r].secondary_out_reload);
7305
7306 prefix = "\n\t";
7307 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7308 {
7309 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7310 insn_data[rld[r].secondary_in_icode].name);
7311 prefix = ", ";
7312 }
7313
7314 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7315 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7316 insn_data[rld[r].secondary_out_icode].name);
7317
7318 fprintf (f, "\n");
7319 }
7320}
7321
7322void
7323debug_reload (void)
7324{
7325 debug_reload_to_stream (stderr);
7326}
|