1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
21
22/* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
28
29 Before processing the first insn of the function, call `init_reload'.
30
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
37
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
44
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
53
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
56
57NOTE SIDE EFFECTS:
58
59 find_reloads can alter the operands of the instruction it is called on.
60
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
64 better that way.
65
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
68
691 happens every time find_reloads is called.
702 happens only when REPLACE is 1, which is only when
71actually doing the reloads, not when just counting them.
72
73Using a reload register for several reloads in one insn:
74
75When an insn has reloads, it is considered as having three parts:
76the input reloads, the insn itself after reloading, and the output reloads.
77Reloads of values used in memory addresses are often needed for only one part.
78
79When this is so, reload_when_needed records which part needs the reload.
80Two reloads for different parts of the insn can share the same reload
81register.
82
83When a reload is used for addresses in multiple parts, or when it is
84an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85a register with any other reload. */
86
87#define REG_OK_STRICT
88
89#include "config.h"
90#include "system.h"
91#include "rtl.h"
92#include "tm_p.h"
93#include "insn-config.h"
94#include "expr.h"
95#include "optabs.h"
96#include "recog.h"
97#include "reload.h"
98#include "regs.h"
99#include "hard-reg-set.h"
100#include "flags.h"
101#include "real.h"
102#include "output.h"
103#include "function.h"
104#include "toplev.h"
105
106#ifndef REGISTER_MOVE_COST
107#define REGISTER_MOVE_COST(m, x, y) 2
108#endif
109
110#ifndef REGNO_MODE_OK_FOR_BASE_P
111#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
112#endif
113
114#ifndef REG_MODE_OK_FOR_BASE_P
115#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
116#endif
117
118/* All reloads of the current insn are recorded here. See reload.h for
119 comments. */
120int n_reloads;
121struct reload rld[MAX_RELOADS];
122
123/* All the "earlyclobber" operands of the current insn
124 are recorded here. */
125int n_earlyclobbers;
126rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
127
128int reload_n_operands;
129
130/* Replacing reloads.
131
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
136
137/* Nonzero means record the places to replace. */
138static int replace_reloads;
139
140/* Each replacement is recorded with a structure like this. */
141struct replacement
142{
143 rtx *where; /* Location to store in */
144 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what; /* which reload this is for */
147 enum machine_mode mode; /* mode it must have */
148};
149
150static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
151
152/* Number of replacements currently recorded. */
153static int n_replacements;
154
155/* Used to track what is modified by an operand. */
156struct decomposition
157{
158 int reg_flag; /* Nonzero if referencing a register. */
159 int safe; /* Nonzero if this can't conflict with anything. */
160 rtx base; /* Base address for MEM. */
161 HOST_WIDE_INT start; /* Starting offset or register number. */
162 HOST_WIDE_INT end; /* Ending offset or register number. */
163};
164
165#ifdef SECONDARY_MEMORY_NEEDED
166
167/* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
169
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
173 reload each. */
174
175static rtx secondary_memlocs[NUM_MACHINE_MODES];
176static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
177#endif
178
179/* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181static rtx this_insn;
182
183/* Nonzero if this instruction is a user-specified asm with operands. */
184static int this_insn_is_asm;
185
186/* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189static int hard_regs_live_known;
190
191/* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195static short *static_reload_reg_p;
196
197/* Set to 1 in subst_reg_equivs if it changes anything. */
198static int subst_reg_equivs_changed;
199
200/* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202static int output_reloadnum;
203
204 /* Compare two RTX's. */
205#define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212#define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222#define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228
229 /* If we are going to reload an address, compute the reload type to
230 use. */
231#define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
236 : (type)))
237
238#ifdef HAVE_SECONDARY_RELOADS
239static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
241 enum insn_code *));
242#endif
243static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
244 unsigned int));
245static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
246static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
| 1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
21
22/* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
28
29 Before processing the first insn of the function, call `init_reload'.
30
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
37
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
44
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
53
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
56
57NOTE SIDE EFFECTS:
58
59 find_reloads can alter the operands of the instruction it is called on.
60
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
64 better that way.
65
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
68
691 happens every time find_reloads is called.
702 happens only when REPLACE is 1, which is only when
71actually doing the reloads, not when just counting them.
72
73Using a reload register for several reloads in one insn:
74
75When an insn has reloads, it is considered as having three parts:
76the input reloads, the insn itself after reloading, and the output reloads.
77Reloads of values used in memory addresses are often needed for only one part.
78
79When this is so, reload_when_needed records which part needs the reload.
80Two reloads for different parts of the insn can share the same reload
81register.
82
83When a reload is used for addresses in multiple parts, or when it is
84an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85a register with any other reload. */
86
87#define REG_OK_STRICT
88
89#include "config.h"
90#include "system.h"
91#include "rtl.h"
92#include "tm_p.h"
93#include "insn-config.h"
94#include "expr.h"
95#include "optabs.h"
96#include "recog.h"
97#include "reload.h"
98#include "regs.h"
99#include "hard-reg-set.h"
100#include "flags.h"
101#include "real.h"
102#include "output.h"
103#include "function.h"
104#include "toplev.h"
105
106#ifndef REGISTER_MOVE_COST
107#define REGISTER_MOVE_COST(m, x, y) 2
108#endif
109
110#ifndef REGNO_MODE_OK_FOR_BASE_P
111#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
112#endif
113
114#ifndef REG_MODE_OK_FOR_BASE_P
115#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
116#endif
117
118/* All reloads of the current insn are recorded here. See reload.h for
119 comments. */
120int n_reloads;
121struct reload rld[MAX_RELOADS];
122
123/* All the "earlyclobber" operands of the current insn
124 are recorded here. */
125int n_earlyclobbers;
126rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
127
128int reload_n_operands;
129
130/* Replacing reloads.
131
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
136
137/* Nonzero means record the places to replace. */
138static int replace_reloads;
139
140/* Each replacement is recorded with a structure like this. */
141struct replacement
142{
143 rtx *where; /* Location to store in */
144 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what; /* which reload this is for */
147 enum machine_mode mode; /* mode it must have */
148};
149
150static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
151
152/* Number of replacements currently recorded. */
153static int n_replacements;
154
155/* Used to track what is modified by an operand. */
156struct decomposition
157{
158 int reg_flag; /* Nonzero if referencing a register. */
159 int safe; /* Nonzero if this can't conflict with anything. */
160 rtx base; /* Base address for MEM. */
161 HOST_WIDE_INT start; /* Starting offset or register number. */
162 HOST_WIDE_INT end; /* Ending offset or register number. */
163};
164
165#ifdef SECONDARY_MEMORY_NEEDED
166
167/* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
169
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
173 reload each. */
174
175static rtx secondary_memlocs[NUM_MACHINE_MODES];
176static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
177#endif
178
179/* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181static rtx this_insn;
182
183/* Nonzero if this instruction is a user-specified asm with operands. */
184static int this_insn_is_asm;
185
186/* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189static int hard_regs_live_known;
190
191/* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195static short *static_reload_reg_p;
196
197/* Set to 1 in subst_reg_equivs if it changes anything. */
198static int subst_reg_equivs_changed;
199
200/* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202static int output_reloadnum;
203
204 /* Compare two RTX's. */
205#define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212#define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222#define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228
229 /* If we are going to reload an address, compute the reload type to
230 use. */
231#define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
236 : (type)))
237
238#ifdef HAVE_SECONDARY_RELOADS
239static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
241 enum insn_code *));
242#endif
243static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
244 unsigned int));
245static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
246static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
|
| 247static void dup_replacements PARAMS ((rtx *, rtx *));
|
247static void combine_reloads PARAMS ((void));
248static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
249 enum reload_type, int, int));
250static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
251 enum machine_mode, enum machine_mode,
252 enum reg_class, int, int));
253static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
254static struct decomposition decompose PARAMS ((rtx));
255static int immune_p PARAMS ((rtx, rtx, struct decomposition));
256static int alternative_allows_memconst PARAMS ((const char *, int));
257static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
258 int, rtx, int *));
259static rtx make_memloc PARAMS ((rtx, int));
| 248static void combine_reloads PARAMS ((void));
249static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
250 enum reload_type, int, int));
251static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
252 enum machine_mode, enum machine_mode,
253 enum reg_class, int, int));
254static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
255static struct decomposition decompose PARAMS ((rtx));
256static int immune_p PARAMS ((rtx, rtx, struct decomposition));
257static int alternative_allows_memconst PARAMS ((const char *, int));
258static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
259 int, rtx, int *));
260static rtx make_memloc PARAMS ((rtx, int));
|
| 261static int maybe_memory_address_p PARAMS ((enum machine_mode, rtx, rtx *));
|
260static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
261 int, enum reload_type, int, rtx));
262static rtx subst_reg_equivs PARAMS ((rtx, rtx));
263static rtx subst_indexed_address PARAMS ((rtx));
264static void update_auto_inc_notes PARAMS ((rtx, int, int));
265static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
266 int, enum reload_type,int, rtx));
267static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
268 enum machine_mode, int,
269 enum reload_type, int));
270static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
271 enum reload_type, int, rtx));
272static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
273static int find_inc_amount PARAMS ((rtx, rtx));
274
275#ifdef HAVE_SECONDARY_RELOADS
276
277/* Determine if any secondary reloads are needed for loading (if IN_P is
| 262static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
263 int, enum reload_type, int, rtx));
264static rtx subst_reg_equivs PARAMS ((rtx, rtx));
265static rtx subst_indexed_address PARAMS ((rtx));
266static void update_auto_inc_notes PARAMS ((rtx, int, int));
267static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
268 int, enum reload_type,int, rtx));
269static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
270 enum machine_mode, int,
271 enum reload_type, int));
272static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
273 enum reload_type, int, rtx));
274static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
275static int find_inc_amount PARAMS ((rtx, rtx));
276
277#ifdef HAVE_SECONDARY_RELOADS
278
279/* Determine if any secondary reloads are needed for loading (if IN_P is
|
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
| 280 nonzero) or storing (if IN_P is zero) X to or from a reload register of
|
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
281
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
285
286static int
287push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
288 type, picode)
289 int in_p;
290 rtx x;
291 int opnum;
292 int optional;
293 enum reg_class reload_class;
294 enum machine_mode reload_mode;
295 enum reload_type type;
296 enum insn_code *picode;
297{
298 enum reg_class class = NO_REGS;
299 enum machine_mode mode = reload_mode;
300 enum insn_code icode = CODE_FOR_nothing;
301 enum reg_class t_class = NO_REGS;
302 enum machine_mode t_mode = VOIDmode;
303 enum insn_code t_icode = CODE_FOR_nothing;
304 enum reload_type secondary_type;
305 int s_reload, t_reload = -1;
306
307 if (type == RELOAD_FOR_INPUT_ADDRESS
308 || type == RELOAD_FOR_OUTPUT_ADDRESS
309 || type == RELOAD_FOR_INPADDR_ADDRESS
310 || type == RELOAD_FOR_OUTADDR_ADDRESS)
311 secondary_type = type;
312 else
313 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
314
315 *picode = CODE_FOR_nothing;
316
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
322 {
323 x = SUBREG_REG (x);
324 reload_mode = GET_MODE (x);
325 }
326
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
332
333 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem[REGNO (x)] != 0)
335 x = reg_equiv_mem[REGNO (x)];
336
337#ifdef SECONDARY_INPUT_RELOAD_CLASS
338 if (in_p)
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
340#endif
341
342#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
343 if (! in_p)
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
345#endif
346
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS)
349 return -1;
350
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
352 use the insn. */
353
354 icode = (in_p ? reload_in_optab[(int) reload_mode]
355 : reload_out_optab[(int) reload_mode]);
356
357 if (icode != CODE_FOR_nothing
358 && insn_data[(int) icode].operand[in_p].predicate
359 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
360 icode = CODE_FOR_nothing;
361
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
366 register. */
367
368 if (icode != CODE_FOR_nothing)
369 {
| 281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
283
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
287
288static int
289push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
290 type, picode)
291 int in_p;
292 rtx x;
293 int opnum;
294 int optional;
295 enum reg_class reload_class;
296 enum machine_mode reload_mode;
297 enum reload_type type;
298 enum insn_code *picode;
299{
300 enum reg_class class = NO_REGS;
301 enum machine_mode mode = reload_mode;
302 enum insn_code icode = CODE_FOR_nothing;
303 enum reg_class t_class = NO_REGS;
304 enum machine_mode t_mode = VOIDmode;
305 enum insn_code t_icode = CODE_FOR_nothing;
306 enum reload_type secondary_type;
307 int s_reload, t_reload = -1;
308
309 if (type == RELOAD_FOR_INPUT_ADDRESS
310 || type == RELOAD_FOR_OUTPUT_ADDRESS
311 || type == RELOAD_FOR_INPADDR_ADDRESS
312 || type == RELOAD_FOR_OUTADDR_ADDRESS)
313 secondary_type = type;
314 else
315 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
316
317 *picode = CODE_FOR_nothing;
318
319 /* If X is a paradoxical SUBREG, use the inner value to determine both the
320 mode and object being reloaded. */
321 if (GET_CODE (x) == SUBREG
322 && (GET_MODE_SIZE (GET_MODE (x))
323 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
324 {
325 x = SUBREG_REG (x);
326 reload_mode = GET_MODE (x);
327 }
328
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
334
335 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem[REGNO (x)] != 0)
337 x = reg_equiv_mem[REGNO (x)];
338
339#ifdef SECONDARY_INPUT_RELOAD_CLASS
340 if (in_p)
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
342#endif
343
344#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
345 if (! in_p)
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
347#endif
348
349 /* If we don't need any secondary registers, done. */
350 if (class == NO_REGS)
351 return -1;
352
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 use the insn. */
355
356 icode = (in_p ? reload_in_optab[(int) reload_mode]
357 : reload_out_optab[(int) reload_mode]);
358
359 if (icode != CODE_FOR_nothing
360 && insn_data[(int) icode].operand[in_p].predicate
361 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
362 icode = CODE_FOR_nothing;
363
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
368 register. */
369
370 if (icode != CODE_FOR_nothing)
371 {
|
370 /* If IN_P is non-zero, the reload register will be the output in
| 372 /* If IN_P is nonzero, the reload register will be the output in
|
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
373 skip. */
374
375 enum reg_class insn_class;
376
377 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
378 insn_class = ALL_REGS;
379 else
380 {
381 char insn_letter
382 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
383 insn_class
384 = (insn_letter == 'r' ? GENERAL_REGS
385 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
386
387 if (insn_class == NO_REGS)
388 abort ();
389 if (in_p
390 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
391 abort ();
392 }
393
394 /* The scratch register's constraint must start with "=&". */
395 if (insn_data[(int) icode].operand[2].constraint[0] != '='
396 || insn_data[(int) icode].operand[2].constraint[1] != '&')
397 abort ();
398
399 if (reg_class_subset_p (reload_class, insn_class))
400 mode = insn_data[(int) icode].operand[2].mode;
401 else
402 {
403 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
404 class = insn_class;
405 t_mode = insn_data[(int) icode].operand[2].mode;
406 t_class = (t_letter == 'r' ? GENERAL_REGS
407 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
408 t_icode = icode;
409 icode = CODE_FOR_nothing;
410 }
411 }
412
413 /* This case isn't valid, so fail. Reload is allowed to use the same
414 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
415 in the case of a secondary register, we actually need two different
416 registers for correct code. We fail here to prevent the possibility of
417 silently generating incorrect code later.
418
419 The convention is that secondary input reloads are valid only if the
420 secondary_class is different from class. If you have such a case, you
421 can not use secondary reloads, you must work around the problem some
422 other way.
423
424 Allow this when a reload_in/out pattern is being used. I.e. assume
425 that the generated code handles this case. */
426
427 if (in_p && class == reload_class && icode == CODE_FOR_nothing
428 && t_icode == CODE_FOR_nothing)
429 abort ();
430
431 /* If we need a tertiary reload, see if we have one we can reuse or else
432 make a new one. */
433
434 if (t_class != NO_REGS)
435 {
436 for (t_reload = 0; t_reload < n_reloads; t_reload++)
437 if (rld[t_reload].secondary_p
438 && (reg_class_subset_p (t_class, rld[t_reload].class)
439 || reg_class_subset_p (rld[t_reload].class, t_class))
440 && ((in_p && rld[t_reload].inmode == t_mode)
441 || (! in_p && rld[t_reload].outmode == t_mode))
442 && ((in_p && (rld[t_reload].secondary_in_icode
443 == CODE_FOR_nothing))
444 || (! in_p &&(rld[t_reload].secondary_out_icode
445 == CODE_FOR_nothing)))
446 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
447 && MERGABLE_RELOADS (secondary_type,
448 rld[t_reload].when_needed,
449 opnum, rld[t_reload].opnum))
450 {
451 if (in_p)
452 rld[t_reload].inmode = t_mode;
453 if (! in_p)
454 rld[t_reload].outmode = t_mode;
455
456 if (reg_class_subset_p (t_class, rld[t_reload].class))
457 rld[t_reload].class = t_class;
458
459 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
460 rld[t_reload].optional &= optional;
461 rld[t_reload].secondary_p = 1;
462 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
463 opnum, rld[t_reload].opnum))
464 rld[t_reload].when_needed = RELOAD_OTHER;
465 }
466
467 if (t_reload == n_reloads)
468 {
469 /* We need to make a new tertiary reload for this register class. */
470 rld[t_reload].in = rld[t_reload].out = 0;
471 rld[t_reload].class = t_class;
472 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
473 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
474 rld[t_reload].reg_rtx = 0;
475 rld[t_reload].optional = optional;
476 rld[t_reload].inc = 0;
477 /* Maybe we could combine these, but it seems too tricky. */
478 rld[t_reload].nocombine = 1;
479 rld[t_reload].in_reg = 0;
480 rld[t_reload].out_reg = 0;
481 rld[t_reload].opnum = opnum;
482 rld[t_reload].when_needed = secondary_type;
483 rld[t_reload].secondary_in_reload = -1;
484 rld[t_reload].secondary_out_reload = -1;
485 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
486 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
487 rld[t_reload].secondary_p = 1;
488
489 n_reloads++;
490 }
491 }
492
493 /* See if we can reuse an existing secondary reload. */
494 for (s_reload = 0; s_reload < n_reloads; s_reload++)
495 if (rld[s_reload].secondary_p
496 && (reg_class_subset_p (class, rld[s_reload].class)
497 || reg_class_subset_p (rld[s_reload].class, class))
498 && ((in_p && rld[s_reload].inmode == mode)
499 || (! in_p && rld[s_reload].outmode == mode))
500 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
501 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
502 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
503 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
504 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
505 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
506 opnum, rld[s_reload].opnum))
507 {
508 if (in_p)
509 rld[s_reload].inmode = mode;
510 if (! in_p)
511 rld[s_reload].outmode = mode;
512
513 if (reg_class_subset_p (class, rld[s_reload].class))
514 rld[s_reload].class = class;
515
516 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
517 rld[s_reload].optional &= optional;
518 rld[s_reload].secondary_p = 1;
519 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
520 opnum, rld[s_reload].opnum))
521 rld[s_reload].when_needed = RELOAD_OTHER;
522 }
523
524 if (s_reload == n_reloads)
525 {
526#ifdef SECONDARY_MEMORY_NEEDED
527 /* If we need a memory location to copy between the two reload regs,
528 set it up now. Note that we do the input case before making
529 the reload and the output case after. This is due to the
530 way reloads are output. */
531
532 if (in_p && icode == CODE_FOR_nothing
533 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
534 {
535 get_secondary_mem (x, reload_mode, opnum, type);
536
537 /* We may have just added new reloads. Make sure we add
538 the new reload at the end. */
539 s_reload = n_reloads;
540 }
541#endif
542
543 /* We need to make a new secondary reload for this register class. */
544 rld[s_reload].in = rld[s_reload].out = 0;
545 rld[s_reload].class = class;
546
547 rld[s_reload].inmode = in_p ? mode : VOIDmode;
548 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
549 rld[s_reload].reg_rtx = 0;
550 rld[s_reload].optional = optional;
551 rld[s_reload].inc = 0;
552 /* Maybe we could combine these, but it seems too tricky. */
553 rld[s_reload].nocombine = 1;
554 rld[s_reload].in_reg = 0;
555 rld[s_reload].out_reg = 0;
556 rld[s_reload].opnum = opnum;
557 rld[s_reload].when_needed = secondary_type;
558 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
559 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
560 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
561 rld[s_reload].secondary_out_icode
562 = ! in_p ? t_icode : CODE_FOR_nothing;
563 rld[s_reload].secondary_p = 1;
564
565 n_reloads++;
566
567#ifdef SECONDARY_MEMORY_NEEDED
568 if (! in_p && icode == CODE_FOR_nothing
569 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
570 get_secondary_mem (x, mode, opnum, type);
571#endif
572 }
573
574 *picode = icode;
575 return s_reload;
576}
577#endif /* HAVE_SECONDARY_RELOADS */
578
579#ifdef SECONDARY_MEMORY_NEEDED
580
581/* Return a memory location that will be used to copy X in mode MODE.
582 If we haven't already made a location for this mode in this insn,
583 call find_reloads_address on the location being returned. */
584
585rtx
586get_secondary_mem (x, mode, opnum, type)
587 rtx x ATTRIBUTE_UNUSED;
588 enum machine_mode mode;
589 int opnum;
590 enum reload_type type;
591{
592 rtx loc;
593 int mem_valid;
594
595 /* By default, if MODE is narrower than a word, widen it to a word.
596 This is required because most machines that require these memory
597 locations do not support short load and stores from all registers
598 (e.g., FP registers). */
599
600#ifdef SECONDARY_MEMORY_NEEDED_MODE
601 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
602#else
603 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
604 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
605#endif
606
607 /* If we already have made a MEM for this operand in MODE, return it. */
608 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
609 return secondary_memlocs_elim[(int) mode][opnum];
610
611 /* If this is the first time we've tried to get a MEM for this mode,
612 allocate a new one. `something_changed' in reload will get set
613 by noticing that the frame size has changed. */
614
615 if (secondary_memlocs[(int) mode] == 0)
616 {
617#ifdef SECONDARY_MEMORY_NEEDED_RTX
618 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
619#else
620 secondary_memlocs[(int) mode]
621 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
622#endif
623 }
624
625 /* Get a version of the address doing any eliminations needed. If that
626 didn't give us a new MEM, make a new one if it isn't valid. */
627
628 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
629 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
630
631 if (! mem_valid && loc == secondary_memlocs[(int) mode])
632 loc = copy_rtx (loc);
633
634 /* The only time the call below will do anything is if the stack
635 offset is too large. In that case IND_LEVELS doesn't matter, so we
636 can just pass a zero. Adjust the type to be the address of the
637 corresponding object. If the address was valid, save the eliminated
638 address. If it wasn't valid, we need to make a reload each time, so
639 don't save it. */
640
641 if (! mem_valid)
642 {
643 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
644 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
645 : RELOAD_OTHER);
646
| 373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
375 skip. */
376
377 enum reg_class insn_class;
378
379 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
380 insn_class = ALL_REGS;
381 else
382 {
383 char insn_letter
384 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
385 insn_class
386 = (insn_letter == 'r' ? GENERAL_REGS
387 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
388
389 if (insn_class == NO_REGS)
390 abort ();
391 if (in_p
392 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
393 abort ();
394 }
395
396 /* The scratch register's constraint must start with "=&". */
397 if (insn_data[(int) icode].operand[2].constraint[0] != '='
398 || insn_data[(int) icode].operand[2].constraint[1] != '&')
399 abort ();
400
401 if (reg_class_subset_p (reload_class, insn_class))
402 mode = insn_data[(int) icode].operand[2].mode;
403 else
404 {
405 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
406 class = insn_class;
407 t_mode = insn_data[(int) icode].operand[2].mode;
408 t_class = (t_letter == 'r' ? GENERAL_REGS
409 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
410 t_icode = icode;
411 icode = CODE_FOR_nothing;
412 }
413 }
414
415 /* This case isn't valid, so fail. Reload is allowed to use the same
416 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
417 in the case of a secondary register, we actually need two different
418 registers for correct code. We fail here to prevent the possibility of
419 silently generating incorrect code later.
420
421 The convention is that secondary input reloads are valid only if the
422 secondary_class is different from class. If you have such a case, you
423 can not use secondary reloads, you must work around the problem some
424 other way.
425
426 Allow this when a reload_in/out pattern is being used. I.e. assume
427 that the generated code handles this case. */
428
429 if (in_p && class == reload_class && icode == CODE_FOR_nothing
430 && t_icode == CODE_FOR_nothing)
431 abort ();
432
433 /* If we need a tertiary reload, see if we have one we can reuse or else
434 make a new one. */
435
436 if (t_class != NO_REGS)
437 {
438 for (t_reload = 0; t_reload < n_reloads; t_reload++)
439 if (rld[t_reload].secondary_p
440 && (reg_class_subset_p (t_class, rld[t_reload].class)
441 || reg_class_subset_p (rld[t_reload].class, t_class))
442 && ((in_p && rld[t_reload].inmode == t_mode)
443 || (! in_p && rld[t_reload].outmode == t_mode))
444 && ((in_p && (rld[t_reload].secondary_in_icode
445 == CODE_FOR_nothing))
446 || (! in_p &&(rld[t_reload].secondary_out_icode
447 == CODE_FOR_nothing)))
448 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
449 && MERGABLE_RELOADS (secondary_type,
450 rld[t_reload].when_needed,
451 opnum, rld[t_reload].opnum))
452 {
453 if (in_p)
454 rld[t_reload].inmode = t_mode;
455 if (! in_p)
456 rld[t_reload].outmode = t_mode;
457
458 if (reg_class_subset_p (t_class, rld[t_reload].class))
459 rld[t_reload].class = t_class;
460
461 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
462 rld[t_reload].optional &= optional;
463 rld[t_reload].secondary_p = 1;
464 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
465 opnum, rld[t_reload].opnum))
466 rld[t_reload].when_needed = RELOAD_OTHER;
467 }
468
469 if (t_reload == n_reloads)
470 {
471 /* We need to make a new tertiary reload for this register class. */
472 rld[t_reload].in = rld[t_reload].out = 0;
473 rld[t_reload].class = t_class;
474 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
475 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
476 rld[t_reload].reg_rtx = 0;
477 rld[t_reload].optional = optional;
478 rld[t_reload].inc = 0;
479 /* Maybe we could combine these, but it seems too tricky. */
480 rld[t_reload].nocombine = 1;
481 rld[t_reload].in_reg = 0;
482 rld[t_reload].out_reg = 0;
483 rld[t_reload].opnum = opnum;
484 rld[t_reload].when_needed = secondary_type;
485 rld[t_reload].secondary_in_reload = -1;
486 rld[t_reload].secondary_out_reload = -1;
487 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
488 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
489 rld[t_reload].secondary_p = 1;
490
491 n_reloads++;
492 }
493 }
494
495 /* See if we can reuse an existing secondary reload. */
496 for (s_reload = 0; s_reload < n_reloads; s_reload++)
497 if (rld[s_reload].secondary_p
498 && (reg_class_subset_p (class, rld[s_reload].class)
499 || reg_class_subset_p (rld[s_reload].class, class))
500 && ((in_p && rld[s_reload].inmode == mode)
501 || (! in_p && rld[s_reload].outmode == mode))
502 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
503 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
504 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
505 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
506 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
507 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
508 opnum, rld[s_reload].opnum))
509 {
510 if (in_p)
511 rld[s_reload].inmode = mode;
512 if (! in_p)
513 rld[s_reload].outmode = mode;
514
515 if (reg_class_subset_p (class, rld[s_reload].class))
516 rld[s_reload].class = class;
517
518 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
519 rld[s_reload].optional &= optional;
520 rld[s_reload].secondary_p = 1;
521 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
522 opnum, rld[s_reload].opnum))
523 rld[s_reload].when_needed = RELOAD_OTHER;
524 }
525
526 if (s_reload == n_reloads)
527 {
528#ifdef SECONDARY_MEMORY_NEEDED
529 /* If we need a memory location to copy between the two reload regs,
530 set it up now. Note that we do the input case before making
531 the reload and the output case after. This is due to the
532 way reloads are output. */
533
534 if (in_p && icode == CODE_FOR_nothing
535 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
536 {
537 get_secondary_mem (x, reload_mode, opnum, type);
538
539 /* We may have just added new reloads. Make sure we add
540 the new reload at the end. */
541 s_reload = n_reloads;
542 }
543#endif
544
545 /* We need to make a new secondary reload for this register class. */
546 rld[s_reload].in = rld[s_reload].out = 0;
547 rld[s_reload].class = class;
548
549 rld[s_reload].inmode = in_p ? mode : VOIDmode;
550 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
551 rld[s_reload].reg_rtx = 0;
552 rld[s_reload].optional = optional;
553 rld[s_reload].inc = 0;
554 /* Maybe we could combine these, but it seems too tricky. */
555 rld[s_reload].nocombine = 1;
556 rld[s_reload].in_reg = 0;
557 rld[s_reload].out_reg = 0;
558 rld[s_reload].opnum = opnum;
559 rld[s_reload].when_needed = secondary_type;
560 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
561 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
562 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
563 rld[s_reload].secondary_out_icode
564 = ! in_p ? t_icode : CODE_FOR_nothing;
565 rld[s_reload].secondary_p = 1;
566
567 n_reloads++;
568
569#ifdef SECONDARY_MEMORY_NEEDED
570 if (! in_p && icode == CODE_FOR_nothing
571 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
572 get_secondary_mem (x, mode, opnum, type);
573#endif
574 }
575
576 *picode = icode;
577 return s_reload;
578}
579#endif /* HAVE_SECONDARY_RELOADS */
580
581#ifdef SECONDARY_MEMORY_NEEDED
582
583/* Return a memory location that will be used to copy X in mode MODE.
584 If we haven't already made a location for this mode in this insn,
585 call find_reloads_address on the location being returned. */
586
587rtx
588get_secondary_mem (x, mode, opnum, type)
589 rtx x ATTRIBUTE_UNUSED;
590 enum machine_mode mode;
591 int opnum;
592 enum reload_type type;
593{
594 rtx loc;
595 int mem_valid;
596
597 /* By default, if MODE is narrower than a word, widen it to a word.
598 This is required because most machines that require these memory
599 locations do not support short load and stores from all registers
600 (e.g., FP registers). */
601
602#ifdef SECONDARY_MEMORY_NEEDED_MODE
603 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
604#else
605 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
606 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
607#endif
608
609 /* If we already have made a MEM for this operand in MODE, return it. */
610 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
611 return secondary_memlocs_elim[(int) mode][opnum];
612
613 /* If this is the first time we've tried to get a MEM for this mode,
614 allocate a new one. `something_changed' in reload will get set
615 by noticing that the frame size has changed. */
616
617 if (secondary_memlocs[(int) mode] == 0)
618 {
619#ifdef SECONDARY_MEMORY_NEEDED_RTX
620 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
621#else
622 secondary_memlocs[(int) mode]
623 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
624#endif
625 }
626
627 /* Get a version of the address doing any eliminations needed. If that
628 didn't give us a new MEM, make a new one if it isn't valid. */
629
630 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
631 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
632
633 if (! mem_valid && loc == secondary_memlocs[(int) mode])
634 loc = copy_rtx (loc);
635
636 /* The only time the call below will do anything is if the stack
637 offset is too large. In that case IND_LEVELS doesn't matter, so we
638 can just pass a zero. Adjust the type to be the address of the
639 corresponding object. If the address was valid, save the eliminated
640 address. If it wasn't valid, we need to make a reload each time, so
641 don't save it. */
642
643 if (! mem_valid)
644 {
645 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
646 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
647 : RELOAD_OTHER);
648
|
647 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0),
| 649 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
|
648 opnum, type, 0, 0);
649 }
650
651 secondary_memlocs_elim[(int) mode][opnum] = loc;
652 return loc;
653}
654
655/* Clear any secondary memory locations we've made. */
656
657void
658clear_secondary_mem ()
659{
660 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
661}
662#endif /* SECONDARY_MEMORY_NEEDED */
663
664/* Find the largest class for which every register number plus N is valid in
665 M1 (if in range) and is cheap to move into REGNO.
666 Abort if no such class exists. */
667
668static enum reg_class
669find_valid_class (m1, n, dest_regno)
670 enum machine_mode m1 ATTRIBUTE_UNUSED;
671 int n;
672 unsigned int dest_regno;
673{
674 int best_cost = -1;
675 int class;
676 int regno;
677 enum reg_class best_class = NO_REGS;
678 enum reg_class dest_class = REGNO_REG_CLASS (dest_regno);
679 unsigned int best_size = 0;
680 int cost;
681
682 for (class = 1; class < N_REG_CLASSES; class++)
683 {
684 int bad = 0;
685 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
686 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
687 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
688 && ! HARD_REGNO_MODE_OK (regno + n, m1))
689 bad = 1;
690
691 if (bad)
692 continue;
693 cost = REGISTER_MOVE_COST (m1, class, dest_class);
694
695 if ((reg_class_size[class] > best_size
696 && (best_cost < 0 || best_cost >= cost))
697 || best_cost > cost)
698 {
699 best_class = class;
700 best_size = reg_class_size[class];
701 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
702 }
703 }
704
705 if (best_size == 0)
706 abort ();
707
708 return best_class;
709}
710
711/* Return the number of a previously made reload that can be combined with
712 a new one, or n_reloads if none of the existing reloads can be used.
713 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
714 push_reload, they determine the kind of the new reload that we try to
715 combine. P_IN points to the corresponding value of IN, which can be
716 modified by this function.
717 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
718
719static int
720find_reusable_reload (p_in, out, class, type, opnum, dont_share)
721 rtx *p_in, out;
722 enum reg_class class;
723 enum reload_type type;
724 int opnum, dont_share;
725{
726 rtx in = *p_in;
727 int i;
728 /* We can't merge two reloads if the output of either one is
729 earlyclobbered. */
730
731 if (earlyclobber_operand_p (out))
732 return n_reloads;
733
734 /* We can use an existing reload if the class is right
735 and at least one of IN and OUT is a match
736 and the other is at worst neutral.
737 (A zero compared against anything is neutral.)
738
739 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
740 for the same thing since that can cause us to need more reload registers
741 than we otherwise would. */
742
743 for (i = 0; i < n_reloads; i++)
744 if ((reg_class_subset_p (class, rld[i].class)
745 || reg_class_subset_p (rld[i].class, class))
746 /* If the existing reload has a register, it must fit our class. */
747 && (rld[i].reg_rtx == 0
748 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
749 true_regnum (rld[i].reg_rtx)))
750 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
751 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
752 || (out != 0 && MATCHES (rld[i].out, out)
753 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
754 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
755 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
756 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
757 return i;
758
759 /* Reloading a plain reg for input can match a reload to postincrement
760 that reg, since the postincrement's value is the right value.
761 Likewise, it can match a preincrement reload, since we regard
762 the preincrementation as happening before any ref in this insn
763 to that register. */
764 for (i = 0; i < n_reloads; i++)
765 if ((reg_class_subset_p (class, rld[i].class)
766 || reg_class_subset_p (rld[i].class, class))
767 /* If the existing reload has a register, it must fit our
768 class. */
769 && (rld[i].reg_rtx == 0
770 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
771 true_regnum (rld[i].reg_rtx)))
772 && out == 0 && rld[i].out == 0 && rld[i].in != 0
773 && ((GET_CODE (in) == REG
774 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
775 && MATCHES (XEXP (rld[i].in, 0), in))
776 || (GET_CODE (rld[i].in) == REG
777 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
778 && MATCHES (XEXP (in, 0), rld[i].in)))
779 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
780 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
781 && MERGABLE_RELOADS (type, rld[i].when_needed,
782 opnum, rld[i].opnum))
783 {
784 /* Make sure reload_in ultimately has the increment,
785 not the plain register. */
786 if (GET_CODE (in) == REG)
787 *p_in = rld[i].in;
788 return i;
789 }
790 return n_reloads;
791}
792
793/* Return nonzero if X is a SUBREG which will require reloading of its
794 SUBREG_REG expression. */
795
796static int
797reload_inner_reg_of_subreg (x, mode, output)
798 rtx x;
799 enum machine_mode mode;
800 int output;
801{
802 rtx inner;
803
804 /* Only SUBREGs are problematical. */
805 if (GET_CODE (x) != SUBREG)
806 return 0;
807
808 inner = SUBREG_REG (x);
809
810 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
811 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
812 return 1;
813
814 /* If INNER is not a hard register, then INNER will not need to
815 be reloaded. */
816 if (GET_CODE (inner) != REG
817 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
818 return 0;
819
| 650 opnum, type, 0, 0);
651 }
652
653 secondary_memlocs_elim[(int) mode][opnum] = loc;
654 return loc;
655}
656
657/* Clear any secondary memory locations we've made. */
658
659void
660clear_secondary_mem ()
661{
662 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
663}
664#endif /* SECONDARY_MEMORY_NEEDED */
665
666/* Find the largest class for which every register number plus N is valid in
667 M1 (if in range) and is cheap to move into REGNO.
668 Abort if no such class exists. */
669
670static enum reg_class
671find_valid_class (m1, n, dest_regno)
672 enum machine_mode m1 ATTRIBUTE_UNUSED;
673 int n;
674 unsigned int dest_regno;
675{
676 int best_cost = -1;
677 int class;
678 int regno;
679 enum reg_class best_class = NO_REGS;
680 enum reg_class dest_class = REGNO_REG_CLASS (dest_regno);
681 unsigned int best_size = 0;
682 int cost;
683
684 for (class = 1; class < N_REG_CLASSES; class++)
685 {
686 int bad = 0;
687 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
688 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
689 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
690 && ! HARD_REGNO_MODE_OK (regno + n, m1))
691 bad = 1;
692
693 if (bad)
694 continue;
695 cost = REGISTER_MOVE_COST (m1, class, dest_class);
696
697 if ((reg_class_size[class] > best_size
698 && (best_cost < 0 || best_cost >= cost))
699 || best_cost > cost)
700 {
701 best_class = class;
702 best_size = reg_class_size[class];
703 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
704 }
705 }
706
707 if (best_size == 0)
708 abort ();
709
710 return best_class;
711}
712
713/* Return the number of a previously made reload that can be combined with
714 a new one, or n_reloads if none of the existing reloads can be used.
715 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
716 push_reload, they determine the kind of the new reload that we try to
717 combine. P_IN points to the corresponding value of IN, which can be
718 modified by this function.
719 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
720
721static int
722find_reusable_reload (p_in, out, class, type, opnum, dont_share)
723 rtx *p_in, out;
724 enum reg_class class;
725 enum reload_type type;
726 int opnum, dont_share;
727{
728 rtx in = *p_in;
729 int i;
730 /* We can't merge two reloads if the output of either one is
731 earlyclobbered. */
732
733 if (earlyclobber_operand_p (out))
734 return n_reloads;
735
736 /* We can use an existing reload if the class is right
737 and at least one of IN and OUT is a match
738 and the other is at worst neutral.
739 (A zero compared against anything is neutral.)
740
741 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
742 for the same thing since that can cause us to need more reload registers
743 than we otherwise would. */
744
745 for (i = 0; i < n_reloads; i++)
746 if ((reg_class_subset_p (class, rld[i].class)
747 || reg_class_subset_p (rld[i].class, class))
748 /* If the existing reload has a register, it must fit our class. */
749 && (rld[i].reg_rtx == 0
750 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
751 true_regnum (rld[i].reg_rtx)))
752 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
753 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
754 || (out != 0 && MATCHES (rld[i].out, out)
755 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
756 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
757 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
758 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
759 return i;
760
761 /* Reloading a plain reg for input can match a reload to postincrement
762 that reg, since the postincrement's value is the right value.
763 Likewise, it can match a preincrement reload, since we regard
764 the preincrementation as happening before any ref in this insn
765 to that register. */
766 for (i = 0; i < n_reloads; i++)
767 if ((reg_class_subset_p (class, rld[i].class)
768 || reg_class_subset_p (rld[i].class, class))
769 /* If the existing reload has a register, it must fit our
770 class. */
771 && (rld[i].reg_rtx == 0
772 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
773 true_regnum (rld[i].reg_rtx)))
774 && out == 0 && rld[i].out == 0 && rld[i].in != 0
775 && ((GET_CODE (in) == REG
776 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
777 && MATCHES (XEXP (rld[i].in, 0), in))
778 || (GET_CODE (rld[i].in) == REG
779 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
780 && MATCHES (XEXP (in, 0), rld[i].in)))
781 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
782 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
783 && MERGABLE_RELOADS (type, rld[i].when_needed,
784 opnum, rld[i].opnum))
785 {
786 /* Make sure reload_in ultimately has the increment,
787 not the plain register. */
788 if (GET_CODE (in) == REG)
789 *p_in = rld[i].in;
790 return i;
791 }
792 return n_reloads;
793}
794
795/* Return nonzero if X is a SUBREG which will require reloading of its
796 SUBREG_REG expression. */
797
798static int
799reload_inner_reg_of_subreg (x, mode, output)
800 rtx x;
801 enum machine_mode mode;
802 int output;
803{
804 rtx inner;
805
806 /* Only SUBREGs are problematical. */
807 if (GET_CODE (x) != SUBREG)
808 return 0;
809
810 inner = SUBREG_REG (x);
811
812 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
813 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
814 return 1;
815
816 /* If INNER is not a hard register, then INNER will not need to
817 be reloaded. */
818 if (GET_CODE (inner) != REG
819 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
820 return 0;
821
|
| 822 if (!subreg_offset_representable_p
823 (REGNO (SUBREG_REG (x)),
824 GET_MODE (SUBREG_REG (x)),
825 SUBREG_BYTE (x),
826 GET_MODE (x)))
827 return 1;
828
|
820 /* If INNER is not ok for MODE, then INNER will need reloading. */
821 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
822 return 1;
823
824 /* If the outer part is a word or smaller, INNER larger than a
825 word and the number of regs for INNER is not the same as the
826 number of words in INNER, then INNER will need reloading. */
827 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
828 && output
829 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
830 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
| 829 /* If INNER is not ok for MODE, then INNER will need reloading. */
830 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
831 return 1;
832
833 /* If the outer part is a word or smaller, INNER larger than a
834 word and the number of regs for INNER is not the same as the
835 number of words in INNER, then INNER will need reloading. */
836 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
837 && output
838 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
839 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
|
831 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
| 840 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
|
832}
833
834/* Record one reload that needs to be performed.
835 IN is an rtx saying where the data are to be found before this instruction.
836 OUT says where they must be stored after the instruction.
837 (IN is zero for data not read, and OUT is zero for data not written.)
838 INLOC and OUTLOC point to the places in the instructions where
839 IN and OUT were found.
| 841}
842
843/* Record one reload that needs to be performed.
844 IN is an rtx saying where the data are to be found before this instruction.
845 OUT says where they must be stored after the instruction.
846 (IN is zero for data not read, and OUT is zero for data not written.)
847 INLOC and OUTLOC point to the places in the instructions where
848 IN and OUT were found.
|
840 If IN and OUT are both non-zero, it means the same register must be used
| 849 If IN and OUT are both nonzero, it means the same register must be used
|
841 to reload both IN and OUT.
842
843 CLASS is a register class required for the reloaded data.
844 INMODE is the machine mode that the instruction requires
845 for the reg that replaces IN and OUTMODE is likewise for OUT.
846
847 If IN is zero, then OUT's location and mode should be passed as
848 INLOC and INMODE.
849
850 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
851
852 OPTIONAL nonzero means this reload does not need to be performed:
853 it can be discarded if that is more convenient.
854
855 OPNUM and TYPE say what the purpose of this reload is.
856
857 The return value is the reload-number for this reload.
858
859 If both IN and OUT are nonzero, in some rare cases we might
860 want to make two separate reloads. (Actually we never do this now.)
861 Therefore, the reload-number for OUT is stored in
862 output_reloadnum when we return; the return value applies to IN.
863 Usually (presently always), when IN and OUT are nonzero,
864 the two reload-numbers are equal, but the caller should be careful to
865 distinguish them. */
866
867int
868push_reload (in, out, inloc, outloc, class,
869 inmode, outmode, strict_low, optional, opnum, type)
870 rtx in, out;
871 rtx *inloc, *outloc;
872 enum reg_class class;
873 enum machine_mode inmode, outmode;
874 int strict_low;
875 int optional;
876 int opnum;
877 enum reload_type type;
878{
879 int i;
880 int dont_share = 0;
881 int dont_remove_subreg = 0;
882 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
883 int secondary_in_reload = -1, secondary_out_reload = -1;
884 enum insn_code secondary_in_icode = CODE_FOR_nothing;
885 enum insn_code secondary_out_icode = CODE_FOR_nothing;
886
887 /* INMODE and/or OUTMODE could be VOIDmode if no mode
888 has been specified for the operand. In that case,
889 use the operand's mode as the mode to reload. */
890 if (inmode == VOIDmode && in != 0)
891 inmode = GET_MODE (in);
892 if (outmode == VOIDmode && out != 0)
893 outmode = GET_MODE (out);
894
895 /* If IN is a pseudo register everywhere-equivalent to a constant, and
896 it is not in a hard register, reload straight from the constant,
897 since we want to get rid of such pseudo registers.
898 Often this is done earlier, but not always in find_reloads_address. */
899 if (in != 0 && GET_CODE (in) == REG)
900 {
901 int regno = REGNO (in);
902
903 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
904 && reg_equiv_constant[regno] != 0)
905 in = reg_equiv_constant[regno];
906 }
907
908 /* Likewise for OUT. Of course, OUT will never be equivalent to
909 an actual constant, but it might be equivalent to a memory location
910 (in the case of a parameter). */
911 if (out != 0 && GET_CODE (out) == REG)
912 {
913 int regno = REGNO (out);
914
915 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
916 && reg_equiv_constant[regno] != 0)
917 out = reg_equiv_constant[regno];
918 }
919
920 /* If we have a read-write operand with an address side-effect,
921 change either IN or OUT so the side-effect happens only once. */
922 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
923 switch (GET_CODE (XEXP (in, 0)))
924 {
925 case POST_INC: case POST_DEC: case POST_MODIFY:
926 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
927 break;
928
929 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
930 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
931 break;
932
933 default:
934 break;
935 }
936
937 /* If we are reloading a (SUBREG constant ...), really reload just the
938 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
939 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
940 a pseudo and hence will become a MEM) with M1 wider than M2 and the
941 register is a pseudo, also reload the inside expression.
942 For machines that extend byte loads, do this for any SUBREG of a pseudo
943 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
944 M2 is an integral mode that gets extended when loaded.
945 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
946 either M1 is not valid for R or M2 is wider than a word but we only
947 need one word to store an M2-sized quantity in R.
948 (However, if OUT is nonzero, we need to reload the reg *and*
949 the subreg, so do nothing here, and let following statement handle it.)
950
951 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
952 we can't handle it here because CONST_INT does not indicate a mode.
953
954 Similarly, we must reload the inside expression if we have a
955 STRICT_LOW_PART (presumably, in == out in the cas).
956
957 Also reload the inner expression if it does not require a secondary
958 reload but the SUBREG does.
959
960 Finally, reload the inner expression if it is a register that is in
961 the class whose registers cannot be referenced in a different size
962 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
963 cannot reload just the inside since we might end up with the wrong
964 register class. But if it is inside a STRICT_LOW_PART, we have
965 no choice, so we hope we do get the right register class there. */
966
967 if (in != 0 && GET_CODE (in) == SUBREG
968 && (subreg_lowpart_p (in) || strict_low)
| 850 to reload both IN and OUT.
851
852 CLASS is a register class required for the reloaded data.
853 INMODE is the machine mode that the instruction requires
854 for the reg that replaces IN and OUTMODE is likewise for OUT.
855
856 If IN is zero, then OUT's location and mode should be passed as
857 INLOC and INMODE.
858
859 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
860
861 OPTIONAL nonzero means this reload does not need to be performed:
862 it can be discarded if that is more convenient.
863
864 OPNUM and TYPE say what the purpose of this reload is.
865
866 The return value is the reload-number for this reload.
867
868 If both IN and OUT are nonzero, in some rare cases we might
869 want to make two separate reloads. (Actually we never do this now.)
870 Therefore, the reload-number for OUT is stored in
871 output_reloadnum when we return; the return value applies to IN.
872 Usually (presently always), when IN and OUT are nonzero,
873 the two reload-numbers are equal, but the caller should be careful to
874 distinguish them. */
875
876int
877push_reload (in, out, inloc, outloc, class,
878 inmode, outmode, strict_low, optional, opnum, type)
879 rtx in, out;
880 rtx *inloc, *outloc;
881 enum reg_class class;
882 enum machine_mode inmode, outmode;
883 int strict_low;
884 int optional;
885 int opnum;
886 enum reload_type type;
887{
888 int i;
889 int dont_share = 0;
890 int dont_remove_subreg = 0;
891 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
892 int secondary_in_reload = -1, secondary_out_reload = -1;
893 enum insn_code secondary_in_icode = CODE_FOR_nothing;
894 enum insn_code secondary_out_icode = CODE_FOR_nothing;
895
896 /* INMODE and/or OUTMODE could be VOIDmode if no mode
897 has been specified for the operand. In that case,
898 use the operand's mode as the mode to reload. */
899 if (inmode == VOIDmode && in != 0)
900 inmode = GET_MODE (in);
901 if (outmode == VOIDmode && out != 0)
902 outmode = GET_MODE (out);
903
904 /* If IN is a pseudo register everywhere-equivalent to a constant, and
905 it is not in a hard register, reload straight from the constant,
906 since we want to get rid of such pseudo registers.
907 Often this is done earlier, but not always in find_reloads_address. */
908 if (in != 0 && GET_CODE (in) == REG)
909 {
910 int regno = REGNO (in);
911
912 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
913 && reg_equiv_constant[regno] != 0)
914 in = reg_equiv_constant[regno];
915 }
916
917 /* Likewise for OUT. Of course, OUT will never be equivalent to
918 an actual constant, but it might be equivalent to a memory location
919 (in the case of a parameter). */
920 if (out != 0 && GET_CODE (out) == REG)
921 {
922 int regno = REGNO (out);
923
924 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
925 && reg_equiv_constant[regno] != 0)
926 out = reg_equiv_constant[regno];
927 }
928
929 /* If we have a read-write operand with an address side-effect,
930 change either IN or OUT so the side-effect happens only once. */
931 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
932 switch (GET_CODE (XEXP (in, 0)))
933 {
934 case POST_INC: case POST_DEC: case POST_MODIFY:
935 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
936 break;
937
938 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
939 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
940 break;
941
942 default:
943 break;
944 }
945
946 /* If we are reloading a (SUBREG constant ...), really reload just the
947 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
948 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
949 a pseudo and hence will become a MEM) with M1 wider than M2 and the
950 register is a pseudo, also reload the inside expression.
951 For machines that extend byte loads, do this for any SUBREG of a pseudo
952 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
953 M2 is an integral mode that gets extended when loaded.
954 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
955 either M1 is not valid for R or M2 is wider than a word but we only
956 need one word to store an M2-sized quantity in R.
957 (However, if OUT is nonzero, we need to reload the reg *and*
958 the subreg, so do nothing here, and let following statement handle it.)
959
960 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
961 we can't handle it here because CONST_INT does not indicate a mode.
962
963 Similarly, we must reload the inside expression if we have a
964 STRICT_LOW_PART (presumably, in == out in the cas).
965
966 Also reload the inner expression if it does not require a secondary
967 reload but the SUBREG does.
968
969 Finally, reload the inner expression if it is a register that is in
970 the class whose registers cannot be referenced in a different size
971 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
972 cannot reload just the inside since we might end up with the wrong
973 register class. But if it is inside a STRICT_LOW_PART, we have
974 no choice, so we hope we do get the right register class there. */
975
976 if (in != 0 && GET_CODE (in) == SUBREG
977 && (subreg_lowpart_p (in) || strict_low)
|
969#ifdef CLASS_CANNOT_CHANGE_MODE
970 && (class != CLASS_CANNOT_CHANGE_MODE
971 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode))
| 978#ifdef CANNOT_CHANGE_MODE_CLASS
979 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
|
972#endif
973 && (CONSTANT_P (SUBREG_REG (in))
974 || GET_CODE (SUBREG_REG (in)) == PLUS
975 || strict_low
976 || (((GET_CODE (SUBREG_REG (in)) == REG
977 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
978 || GET_CODE (SUBREG_REG (in)) == MEM)
979 && ((GET_MODE_SIZE (inmode)
980 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
981#ifdef LOAD_EXTEND_OP
982 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
983 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
984 <= UNITS_PER_WORD)
985 && (GET_MODE_SIZE (inmode)
986 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
987 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
988 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
989#endif
990#ifdef WORD_REGISTER_OPERATIONS
991 || ((GET_MODE_SIZE (inmode)
992 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
993 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
994 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
995 / UNITS_PER_WORD)))
996#endif
997 ))
998 || (GET_CODE (SUBREG_REG (in)) == REG
999 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1000 /* The case where out is nonzero
1001 is handled differently in the following statement. */
1002 && (out == 0 || subreg_lowpart_p (in))
1003 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1004 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1005 > UNITS_PER_WORD)
1006 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1007 / UNITS_PER_WORD)
| 980#endif
981 && (CONSTANT_P (SUBREG_REG (in))
982 || GET_CODE (SUBREG_REG (in)) == PLUS
983 || strict_low
984 || (((GET_CODE (SUBREG_REG (in)) == REG
985 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
986 || GET_CODE (SUBREG_REG (in)) == MEM)
987 && ((GET_MODE_SIZE (inmode)
988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
989#ifdef LOAD_EXTEND_OP
990 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
991 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
992 <= UNITS_PER_WORD)
993 && (GET_MODE_SIZE (inmode)
994 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
995 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
996 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
997#endif
998#ifdef WORD_REGISTER_OPERATIONS
999 || ((GET_MODE_SIZE (inmode)
1000 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1001 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1002 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1003 / UNITS_PER_WORD)))
1004#endif
1005 ))
1006 || (GET_CODE (SUBREG_REG (in)) == REG
1007 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1008 /* The case where out is nonzero
1009 is handled differently in the following statement. */
1010 && (out == 0 || subreg_lowpart_p (in))
1011 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1013 > UNITS_PER_WORD)
1014 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1015 / UNITS_PER_WORD)
|
1008 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1009 GET_MODE (SUBREG_REG (in)))))
| 1016 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1017 GET_MODE (SUBREG_REG (in)))))
|
1010 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1011#ifdef SECONDARY_INPUT_RELOAD_CLASS
1012 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1013 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1014 GET_MODE (SUBREG_REG (in)),
1015 SUBREG_REG (in))
1016 == NO_REGS))
1017#endif
| 1018 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1019#ifdef SECONDARY_INPUT_RELOAD_CLASS
1020 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1021 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1022 GET_MODE (SUBREG_REG (in)),
1023 SUBREG_REG (in))
1024 == NO_REGS))
1025#endif
|
1018#ifdef CLASS_CANNOT_CHANGE_MODE
| 1026#ifdef CANNOT_CHANGE_MODE_CLASS
|
1019 || (GET_CODE (SUBREG_REG (in)) == REG
1020 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
| 1027 || (GET_CODE (SUBREG_REG (in)) == REG
1028 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
|
1021 && (TEST_HARD_REG_BIT
1022 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1023 REGNO (SUBREG_REG (in))))
1024 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
1025 inmode))
| 1029 && REG_CANNOT_CHANGE_MODE_P
1030 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
|
1026#endif
1027 ))
1028 {
1029 in_subreg_loc = inloc;
1030 inloc = &SUBREG_REG (in);
1031 in = *inloc;
1032#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1033 if (GET_CODE (in) == MEM)
1034 /* This is supposed to happen only for paradoxical subregs made by
1035 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1036 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1037 abort ();
1038#endif
1039 inmode = GET_MODE (in);
1040 }
1041
1042 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1043 either M1 is not valid for R or M2 is wider than a word but we only
1044 need one word to store an M2-sized quantity in R.
1045
1046 However, we must reload the inner reg *as well as* the subreg in
1047 that case. */
1048
1049 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1050 code above. This can happen if SUBREG_BYTE != 0. */
1051
1052 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1053 {
1054 enum reg_class in_class = class;
1055
1056 if (GET_CODE (SUBREG_REG (in)) == REG)
1057 in_class
1058 = find_valid_class (inmode,
1059 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1060 GET_MODE (SUBREG_REG (in)),
1061 SUBREG_BYTE (in),
1062 GET_MODE (in)),
1063 REGNO (SUBREG_REG (in)));
1064
1065 /* This relies on the fact that emit_reload_insns outputs the
1066 instructions for input reloads of type RELOAD_OTHER in the same
1067 order as the reloads. Thus if the outer reload is also of type
1068 RELOAD_OTHER, we are guaranteed that this inner reload will be
1069 output before the outer reload. */
1070 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1071 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1072 dont_remove_subreg = 1;
1073 }
1074
1075 /* Similarly for paradoxical and problematical SUBREGs on the output.
1076 Note that there is no reason we need worry about the previous value
1077 of SUBREG_REG (out); even if wider than out,
1078 storing in a subreg is entitled to clobber it all
1079 (except in the case of STRICT_LOW_PART,
1080 and in that case the constraint should label it input-output.) */
1081 if (out != 0 && GET_CODE (out) == SUBREG
1082 && (subreg_lowpart_p (out) || strict_low)
| 1031#endif
1032 ))
1033 {
1034 in_subreg_loc = inloc;
1035 inloc = &SUBREG_REG (in);
1036 in = *inloc;
1037#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1038 if (GET_CODE (in) == MEM)
1039 /* This is supposed to happen only for paradoxical subregs made by
1040 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1041 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1042 abort ();
1043#endif
1044 inmode = GET_MODE (in);
1045 }
1046
1047 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1048 either M1 is not valid for R or M2 is wider than a word but we only
1049 need one word to store an M2-sized quantity in R.
1050
1051 However, we must reload the inner reg *as well as* the subreg in
1052 that case. */
1053
1054 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1055 code above. This can happen if SUBREG_BYTE != 0. */
1056
1057 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1058 {
1059 enum reg_class in_class = class;
1060
1061 if (GET_CODE (SUBREG_REG (in)) == REG)
1062 in_class
1063 = find_valid_class (inmode,
1064 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1065 GET_MODE (SUBREG_REG (in)),
1066 SUBREG_BYTE (in),
1067 GET_MODE (in)),
1068 REGNO (SUBREG_REG (in)));
1069
1070 /* This relies on the fact that emit_reload_insns outputs the
1071 instructions for input reloads of type RELOAD_OTHER in the same
1072 order as the reloads. Thus if the outer reload is also of type
1073 RELOAD_OTHER, we are guaranteed that this inner reload will be
1074 output before the outer reload. */
1075 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1076 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1077 dont_remove_subreg = 1;
1078 }
1079
1080 /* Similarly for paradoxical and problematical SUBREGs on the output.
1081 Note that there is no reason we need worry about the previous value
1082 of SUBREG_REG (out); even if wider than out,
1083 storing in a subreg is entitled to clobber it all
1084 (except in the case of STRICT_LOW_PART,
1085 and in that case the constraint should label it input-output.) */
1086 if (out != 0 && GET_CODE (out) == SUBREG
1087 && (subreg_lowpart_p (out) || strict_low)
|
1083#ifdef CLASS_CANNOT_CHANGE_MODE
1084 && (class != CLASS_CANNOT_CHANGE_MODE
1085 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1086 outmode))
| 1088#ifdef CANNOT_CHANGE_MODE_CLASS
1089 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
|
1087#endif
1088 && (CONSTANT_P (SUBREG_REG (out))
1089 || strict_low
1090 || (((GET_CODE (SUBREG_REG (out)) == REG
1091 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1092 || GET_CODE (SUBREG_REG (out)) == MEM)
1093 && ((GET_MODE_SIZE (outmode)
1094 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1095#ifdef WORD_REGISTER_OPERATIONS
1096 || ((GET_MODE_SIZE (outmode)
1097 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1098 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1099 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1100 / UNITS_PER_WORD)))
1101#endif
1102 ))
1103 || (GET_CODE (SUBREG_REG (out)) == REG
1104 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1105 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1106 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1107 > UNITS_PER_WORD)
1108 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1109 / UNITS_PER_WORD)
| 1090#endif
1091 && (CONSTANT_P (SUBREG_REG (out))
1092 || strict_low
1093 || (((GET_CODE (SUBREG_REG (out)) == REG
1094 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1095 || GET_CODE (SUBREG_REG (out)) == MEM)
1096 && ((GET_MODE_SIZE (outmode)
1097 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1098#ifdef WORD_REGISTER_OPERATIONS
1099 || ((GET_MODE_SIZE (outmode)
1100 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1101 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1102 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1103 / UNITS_PER_WORD)))
1104#endif
1105 ))
1106 || (GET_CODE (SUBREG_REG (out)) == REG
1107 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1108 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1109 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1110 > UNITS_PER_WORD)
1111 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1112 / UNITS_PER_WORD)
|
1110 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1111 GET_MODE (SUBREG_REG (out)))))
| 1113 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1114 GET_MODE (SUBREG_REG (out)))))
|
1112 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1113#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1114 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1115 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1116 GET_MODE (SUBREG_REG (out)),
1117 SUBREG_REG (out))
1118 == NO_REGS))
1119#endif
| 1115 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1116#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1117 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1118 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1119 GET_MODE (SUBREG_REG (out)),
1120 SUBREG_REG (out))
1121 == NO_REGS))
1122#endif
|
1120#ifdef CLASS_CANNOT_CHANGE_MODE
| 1123#ifdef CANNOT_CHANGE_MODE_CLASS
|
1121 || (GET_CODE (SUBREG_REG (out)) == REG
1122 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
| 1124 || (GET_CODE (SUBREG_REG (out)) == REG
1125 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
|
1123 && (TEST_HARD_REG_BIT
1124 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1125 REGNO (SUBREG_REG (out))))
1126 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1127 outmode))
| 1126 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1127 GET_MODE (SUBREG_REG (out)),
1128 outmode))
|
1128#endif
1129 ))
1130 {
1131 out_subreg_loc = outloc;
1132 outloc = &SUBREG_REG (out);
1133 out = *outloc;
1134#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1135 if (GET_CODE (out) == MEM
1136 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1137 abort ();
1138#endif
1139 outmode = GET_MODE (out);
1140 }
1141
1142 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1143 either M1 is not valid for R or M2 is wider than a word but we only
1144 need one word to store an M2-sized quantity in R.
1145
1146 However, we must reload the inner reg *as well as* the subreg in
1147 that case. In this case, the inner reg is an in-out reload. */
1148
1149 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1150 {
1151 /* This relies on the fact that emit_reload_insns outputs the
1152 instructions for output reloads of type RELOAD_OTHER in reverse
1153 order of the reloads. Thus if the outer reload is also of type
1154 RELOAD_OTHER, we are guaranteed that this inner reload will be
1155 output after the outer reload. */
1156 dont_remove_subreg = 1;
1157 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1158 &SUBREG_REG (out),
1159 find_valid_class (outmode,
1160 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1161 GET_MODE (SUBREG_REG (out)),
1162 SUBREG_BYTE (out),
1163 GET_MODE (out)),
1164 REGNO (SUBREG_REG (out))),
1165 VOIDmode, VOIDmode, 0, 0,
1166 opnum, RELOAD_OTHER);
1167 }
1168
1169 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1170 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1171 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1172 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1173 dont_share = 1;
1174
1175 /* If IN is a SUBREG of a hard register, make a new REG. This
1176 simplifies some of the cases below. */
1177
1178 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1179 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1180 && ! dont_remove_subreg)
1181 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1182
1183 /* Similarly for OUT. */
1184 if (out != 0 && GET_CODE (out) == SUBREG
1185 && GET_CODE (SUBREG_REG (out)) == REG
1186 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1187 && ! dont_remove_subreg)
1188 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1189
1190 /* Narrow down the class of register wanted if that is
1191 desirable on this machine for efficiency. */
1192 if (in != 0)
1193 class = PREFERRED_RELOAD_CLASS (in, class);
1194
1195 /* Output reloads may need analogous treatment, different in detail. */
1196#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1197 if (out != 0)
1198 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1199#endif
1200
1201 /* Make sure we use a class that can handle the actual pseudo
1202 inside any subreg. For example, on the 386, QImode regs
1203 can appear within SImode subregs. Although GENERAL_REGS
1204 can handle SImode, QImode needs a smaller class. */
1205#ifdef LIMIT_RELOAD_CLASS
1206 if (in_subreg_loc)
1207 class = LIMIT_RELOAD_CLASS (inmode, class);
1208 else if (in != 0 && GET_CODE (in) == SUBREG)
1209 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1210
1211 if (out_subreg_loc)
1212 class = LIMIT_RELOAD_CLASS (outmode, class);
1213 if (out != 0 && GET_CODE (out) == SUBREG)
1214 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1215#endif
1216
1217 /* Verify that this class is at least possible for the mode that
1218 is specified. */
1219 if (this_insn_is_asm)
1220 {
1221 enum machine_mode mode;
1222 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1223 mode = inmode;
1224 else
1225 mode = outmode;
1226 if (mode == VOIDmode)
1227 {
1228 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1229 mode = word_mode;
1230 if (in != 0)
1231 inmode = word_mode;
1232 if (out != 0)
1233 outmode = word_mode;
1234 }
1235 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1236 if (HARD_REGNO_MODE_OK (i, mode)
1237 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1238 {
1239 int nregs = HARD_REGNO_NREGS (i, mode);
1240
1241 int j;
1242 for (j = 1; j < nregs; j++)
1243 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1244 break;
1245 if (j == nregs)
1246 break;
1247 }
1248 if (i == FIRST_PSEUDO_REGISTER)
1249 {
1250 error_for_asm (this_insn, "impossible register constraint in `asm'");
1251 class = ALL_REGS;
1252 }
1253 }
1254
1255 /* Optional output reloads are always OK even if we have no register class,
1256 since the function of these reloads is only to have spill_reg_store etc.
1257 set, so that the storing insn can be deleted later. */
1258 if (class == NO_REGS
1259 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1260 abort ();
1261
1262 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1263
1264 if (i == n_reloads)
1265 {
1266 /* See if we need a secondary reload register to move between CLASS
1267 and IN or CLASS and OUT. Get the icode and push any required reloads
1268 needed for each of them if so. */
1269
1270#ifdef SECONDARY_INPUT_RELOAD_CLASS
1271 if (in != 0)
1272 secondary_in_reload
1273 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1274 &secondary_in_icode);
1275#endif
1276
1277#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1278 if (out != 0 && GET_CODE (out) != SCRATCH)
1279 secondary_out_reload
1280 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1281 type, &secondary_out_icode);
1282#endif
1283
1284 /* We found no existing reload suitable for re-use.
1285 So add an additional reload. */
1286
1287#ifdef SECONDARY_MEMORY_NEEDED
| 1129#endif
1130 ))
1131 {
1132 out_subreg_loc = outloc;
1133 outloc = &SUBREG_REG (out);
1134 out = *outloc;
1135#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1136 if (GET_CODE (out) == MEM
1137 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1138 abort ();
1139#endif
1140 outmode = GET_MODE (out);
1141 }
1142
1143 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1144 either M1 is not valid for R or M2 is wider than a word but we only
1145 need one word to store an M2-sized quantity in R.
1146
1147 However, we must reload the inner reg *as well as* the subreg in
1148 that case. In this case, the inner reg is an in-out reload. */
1149
1150 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1151 {
1152 /* This relies on the fact that emit_reload_insns outputs the
1153 instructions for output reloads of type RELOAD_OTHER in reverse
1154 order of the reloads. Thus if the outer reload is also of type
1155 RELOAD_OTHER, we are guaranteed that this inner reload will be
1156 output after the outer reload. */
1157 dont_remove_subreg = 1;
1158 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1159 &SUBREG_REG (out),
1160 find_valid_class (outmode,
1161 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1162 GET_MODE (SUBREG_REG (out)),
1163 SUBREG_BYTE (out),
1164 GET_MODE (out)),
1165 REGNO (SUBREG_REG (out))),
1166 VOIDmode, VOIDmode, 0, 0,
1167 opnum, RELOAD_OTHER);
1168 }
1169
1170 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1171 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1172 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1173 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1174 dont_share = 1;
1175
1176 /* If IN is a SUBREG of a hard register, make a new REG. This
1177 simplifies some of the cases below. */
1178
1179 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1180 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1181 && ! dont_remove_subreg)
1182 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1183
1184 /* Similarly for OUT. */
1185 if (out != 0 && GET_CODE (out) == SUBREG
1186 && GET_CODE (SUBREG_REG (out)) == REG
1187 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1188 && ! dont_remove_subreg)
1189 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1190
1191 /* Narrow down the class of register wanted if that is
1192 desirable on this machine for efficiency. */
1193 if (in != 0)
1194 class = PREFERRED_RELOAD_CLASS (in, class);
1195
1196 /* Output reloads may need analogous treatment, different in detail. */
1197#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1198 if (out != 0)
1199 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1200#endif
1201
1202 /* Make sure we use a class that can handle the actual pseudo
1203 inside any subreg. For example, on the 386, QImode regs
1204 can appear within SImode subregs. Although GENERAL_REGS
1205 can handle SImode, QImode needs a smaller class. */
1206#ifdef LIMIT_RELOAD_CLASS
1207 if (in_subreg_loc)
1208 class = LIMIT_RELOAD_CLASS (inmode, class);
1209 else if (in != 0 && GET_CODE (in) == SUBREG)
1210 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1211
1212 if (out_subreg_loc)
1213 class = LIMIT_RELOAD_CLASS (outmode, class);
1214 if (out != 0 && GET_CODE (out) == SUBREG)
1215 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1216#endif
1217
1218 /* Verify that this class is at least possible for the mode that
1219 is specified. */
1220 if (this_insn_is_asm)
1221 {
1222 enum machine_mode mode;
1223 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1224 mode = inmode;
1225 else
1226 mode = outmode;
1227 if (mode == VOIDmode)
1228 {
1229 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1230 mode = word_mode;
1231 if (in != 0)
1232 inmode = word_mode;
1233 if (out != 0)
1234 outmode = word_mode;
1235 }
1236 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1237 if (HARD_REGNO_MODE_OK (i, mode)
1238 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1239 {
1240 int nregs = HARD_REGNO_NREGS (i, mode);
1241
1242 int j;
1243 for (j = 1; j < nregs; j++)
1244 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1245 break;
1246 if (j == nregs)
1247 break;
1248 }
1249 if (i == FIRST_PSEUDO_REGISTER)
1250 {
1251 error_for_asm (this_insn, "impossible register constraint in `asm'");
1252 class = ALL_REGS;
1253 }
1254 }
1255
1256 /* Optional output reloads are always OK even if we have no register class,
1257 since the function of these reloads is only to have spill_reg_store etc.
1258 set, so that the storing insn can be deleted later. */
1259 if (class == NO_REGS
1260 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1261 abort ();
1262
1263 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1264
1265 if (i == n_reloads)
1266 {
1267 /* See if we need a secondary reload register to move between CLASS
1268 and IN or CLASS and OUT. Get the icode and push any required reloads
1269 needed for each of them if so. */
1270
1271#ifdef SECONDARY_INPUT_RELOAD_CLASS
1272 if (in != 0)
1273 secondary_in_reload
1274 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1275 &secondary_in_icode);
1276#endif
1277
1278#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1279 if (out != 0 && GET_CODE (out) != SCRATCH)
1280 secondary_out_reload
1281 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1282 type, &secondary_out_icode);
1283#endif
1284
1285 /* We found no existing reload suitable for re-use.
1286 So add an additional reload. */
1287
1288#ifdef SECONDARY_MEMORY_NEEDED
|
1288 {
1289 int regnum;
1290
1291 /* If a memory location is needed for the copy, make one. */
1292 if (in != 0
1293 && ((regnum = true_regnum (in)) >= 0)
1294 && regnum < FIRST_PSEUDO_REGISTER
1295 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (regnum),
1296 class, inmode))
1297 get_secondary_mem (in, inmode, opnum, type);
1298 }
| 1289 /* If a memory location is needed for the copy, make one. */
1290 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1291 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1292 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1293 class, inmode))
1294 get_secondary_mem (in, inmode, opnum, type);
|
1299#endif
1300
1301 i = n_reloads;
1302 rld[i].in = in;
1303 rld[i].out = out;
1304 rld[i].class = class;
1305 rld[i].inmode = inmode;
1306 rld[i].outmode = outmode;
1307 rld[i].reg_rtx = 0;
1308 rld[i].optional = optional;
1309 rld[i].inc = 0;
1310 rld[i].nocombine = 0;
1311 rld[i].in_reg = inloc ? *inloc : 0;
1312 rld[i].out_reg = outloc ? *outloc : 0;
1313 rld[i].opnum = opnum;
1314 rld[i].when_needed = type;
1315 rld[i].secondary_in_reload = secondary_in_reload;
1316 rld[i].secondary_out_reload = secondary_out_reload;
1317 rld[i].secondary_in_icode = secondary_in_icode;
1318 rld[i].secondary_out_icode = secondary_out_icode;
1319 rld[i].secondary_p = 0;
1320
1321 n_reloads++;
1322
1323#ifdef SECONDARY_MEMORY_NEEDED
| 1295#endif
1296
1297 i = n_reloads;
1298 rld[i].in = in;
1299 rld[i].out = out;
1300 rld[i].class = class;
1301 rld[i].inmode = inmode;
1302 rld[i].outmode = outmode;
1303 rld[i].reg_rtx = 0;
1304 rld[i].optional = optional;
1305 rld[i].inc = 0;
1306 rld[i].nocombine = 0;
1307 rld[i].in_reg = inloc ? *inloc : 0;
1308 rld[i].out_reg = outloc ? *outloc : 0;
1309 rld[i].opnum = opnum;
1310 rld[i].when_needed = type;
1311 rld[i].secondary_in_reload = secondary_in_reload;
1312 rld[i].secondary_out_reload = secondary_out_reload;
1313 rld[i].secondary_in_icode = secondary_in_icode;
1314 rld[i].secondary_out_icode = secondary_out_icode;
1315 rld[i].secondary_p = 0;
1316
1317 n_reloads++;
1318
1319#ifdef SECONDARY_MEMORY_NEEDED
|
1324 {
1325 int regnum;
1326
1327 if (out != 0
1328 && ((regnum = true_regnum (out)) >= 0)
1329 && regnum < FIRST_PSEUDO_REGISTER
1330 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (regnum),
1331 outmode))
1332 get_secondary_mem (out, outmode, opnum, type);
1333 }
| 1320 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1321 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (class,
1323 REGNO_REG_CLASS (reg_or_subregno (out)),
1324 outmode))
1325 get_secondary_mem (out, outmode, opnum, type);
|
1334#endif
1335 }
1336 else
1337 {
1338 /* We are reusing an existing reload,
1339 but we may have additional information for it.
1340 For example, we may now have both IN and OUT
1341 while the old one may have just one of them. */
1342
1343 /* The modes can be different. If they are, we want to reload in
1344 the larger mode, so that the value is valid for both modes. */
1345 if (inmode != VOIDmode
1346 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1347 rld[i].inmode = inmode;
1348 if (outmode != VOIDmode
1349 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1350 rld[i].outmode = outmode;
1351 if (in != 0)
1352 {
1353 rtx in_reg = inloc ? *inloc : 0;
1354 /* If we merge reloads for two distinct rtl expressions that
1355 are identical in content, there might be duplicate address
1356 reloads. Remove the extra set now, so that if we later find
1357 that we can inherit this reload, we can get rid of the
1358 address reloads altogether.
1359
1360 Do not do this if both reloads are optional since the result
1361 would be an optional reload which could potentially leave
1362 unresolved address replacements.
1363
1364 It is not sufficient to call transfer_replacements since
1365 choose_reload_regs will remove the replacements for address
1366 reloads of inherited reloads which results in the same
1367 problem. */
1368 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1369 && ! (rld[i].optional && optional))
1370 {
1371 /* We must keep the address reload with the lower operand
1372 number alive. */
1373 if (opnum > rld[i].opnum)
1374 {
1375 remove_address_replacements (in);
1376 in = rld[i].in;
1377 in_reg = rld[i].in_reg;
1378 }
1379 else
1380 remove_address_replacements (rld[i].in);
1381 }
1382 rld[i].in = in;
1383 rld[i].in_reg = in_reg;
1384 }
1385 if (out != 0)
1386 {
1387 rld[i].out = out;
1388 rld[i].out_reg = outloc ? *outloc : 0;
1389 }
1390 if (reg_class_subset_p (class, rld[i].class))
1391 rld[i].class = class;
1392 rld[i].optional &= optional;
1393 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1394 opnum, rld[i].opnum))
1395 rld[i].when_needed = RELOAD_OTHER;
1396 rld[i].opnum = MIN (rld[i].opnum, opnum);
1397 }
1398
1399 /* If the ostensible rtx being reloaded differs from the rtx found
1400 in the location to substitute, this reload is not safe to combine
1401 because we cannot reliably tell whether it appears in the insn. */
1402
1403 if (in != 0 && in != *inloc)
1404 rld[i].nocombine = 1;
1405
1406#if 0
1407 /* This was replaced by changes in find_reloads_address_1 and the new
1408 function inc_for_reload, which go with a new meaning of reload_inc. */
1409
1410 /* If this is an IN/OUT reload in an insn that sets the CC,
1411 it must be for an autoincrement. It doesn't work to store
1412 the incremented value after the insn because that would clobber the CC.
1413 So we must do the increment of the value reloaded from,
1414 increment it, store it back, then decrement again. */
1415 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1416 {
1417 out = 0;
1418 rld[i].out = 0;
1419 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1420 /* If we did not find a nonzero amount-to-increment-by,
1421 that contradicts the belief that IN is being incremented
1422 in an address in this insn. */
1423 if (rld[i].inc == 0)
1424 abort ();
1425 }
1426#endif
1427
1428 /* If we will replace IN and OUT with the reload-reg,
1429 record where they are located so that substitution need
1430 not do a tree walk. */
1431
1432 if (replace_reloads)
1433 {
1434 if (inloc != 0)
1435 {
1436 struct replacement *r = &replacements[n_replacements++];
1437 r->what = i;
1438 r->subreg_loc = in_subreg_loc;
1439 r->where = inloc;
1440 r->mode = inmode;
1441 }
1442 if (outloc != 0 && outloc != inloc)
1443 {
1444 struct replacement *r = &replacements[n_replacements++];
1445 r->what = i;
1446 r->where = outloc;
1447 r->subreg_loc = out_subreg_loc;
1448 r->mode = outmode;
1449 }
1450 }
1451
1452 /* If this reload is just being introduced and it has both
1453 an incoming quantity and an outgoing quantity that are
1454 supposed to be made to match, see if either one of the two
1455 can serve as the place to reload into.
1456
1457 If one of them is acceptable, set rld[i].reg_rtx
1458 to that one. */
1459
1460 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1461 {
1462 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1463 inmode, outmode,
1464 rld[i].class, i,
1465 earlyclobber_operand_p (out));
1466
1467 /* If the outgoing register already contains the same value
1468 as the incoming one, we can dispense with loading it.
1469 The easiest way to tell the caller that is to give a phony
1470 value for the incoming operand (same as outgoing one). */
1471 if (rld[i].reg_rtx == out
1472 && (GET_CODE (in) == REG || CONSTANT_P (in))
1473 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1474 static_reload_reg_p, i, inmode))
1475 rld[i].in = out;
1476 }
1477
1478 /* If this is an input reload and the operand contains a register that
1479 dies in this insn and is used nowhere else, see if it is the right class
1480 to be used for this reload. Use it if so. (This occurs most commonly
1481 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1482 this if it is also an output reload that mentions the register unless
1483 the output is a SUBREG that clobbers an entire register.
1484
1485 Note that the operand might be one of the spill regs, if it is a
1486 pseudo reg and we are in a block where spilling has not taken place.
1487 But if there is no spilling in this block, that is OK.
1488 An explicitly used hard reg cannot be a spill reg. */
1489
1490 if (rld[i].reg_rtx == 0 && in != 0)
1491 {
1492 rtx note;
1493 int regno;
1494 enum machine_mode rel_mode = inmode;
1495
1496 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1497 rel_mode = outmode;
1498
1499 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1500 if (REG_NOTE_KIND (note) == REG_DEAD
1501 && GET_CODE (XEXP (note, 0)) == REG
1502 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1503 && reg_mentioned_p (XEXP (note, 0), in)
1504 && ! refers_to_regno_for_reload_p (regno,
1505 (regno
1506 + HARD_REGNO_NREGS (regno,
1507 rel_mode)),
1508 PATTERN (this_insn), inloc)
1509 /* If this is also an output reload, IN cannot be used as
1510 the reload register if it is set in this insn unless IN
1511 is also OUT. */
1512 && (out == 0 || in == out
1513 || ! hard_reg_set_here_p (regno,
1514 (regno
1515 + HARD_REGNO_NREGS (regno,
1516 rel_mode)),
1517 PATTERN (this_insn)))
1518 /* ??? Why is this code so different from the previous?
1519 Is there any simple coherent way to describe the two together?
1520 What's going on here. */
1521 && (in != out
1522 || (GET_CODE (in) == SUBREG
1523 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1524 / UNITS_PER_WORD)
1525 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1526 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1527 /* Make sure the operand fits in the reg that dies. */
1528 && (GET_MODE_SIZE (rel_mode)
1529 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1530 && HARD_REGNO_MODE_OK (regno, inmode)
1531 && HARD_REGNO_MODE_OK (regno, outmode))
1532 {
1533 unsigned int offs;
1534 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1535 HARD_REGNO_NREGS (regno, outmode));
1536
1537 for (offs = 0; offs < nregs; offs++)
1538 if (fixed_regs[regno + offs]
1539 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1540 regno + offs))
1541 break;
1542
1543 if (offs == nregs)
1544 {
1545 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1546 break;
1547 }
1548 }
1549 }
1550
1551 if (out)
1552 output_reloadnum = i;
1553
1554 return i;
1555}
1556
1557/* Record an additional place we must replace a value
1558 for which we have already recorded a reload.
1559 RELOADNUM is the value returned by push_reload
1560 when the reload was recorded.
1561 This is used in insn patterns that use match_dup. */
1562
1563static void
1564push_replacement (loc, reloadnum, mode)
1565 rtx *loc;
1566 int reloadnum;
1567 enum machine_mode mode;
1568{
1569 if (replace_reloads)
1570 {
1571 struct replacement *r = &replacements[n_replacements++];
1572 r->what = reloadnum;
1573 r->where = loc;
1574 r->subreg_loc = 0;
1575 r->mode = mode;
1576 }
1577}
| 1326#endif
1327 }
1328 else
1329 {
1330 /* We are reusing an existing reload,
1331 but we may have additional information for it.
1332 For example, we may now have both IN and OUT
1333 while the old one may have just one of them. */
1334
1335 /* The modes can be different. If they are, we want to reload in
1336 the larger mode, so that the value is valid for both modes. */
1337 if (inmode != VOIDmode
1338 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1339 rld[i].inmode = inmode;
1340 if (outmode != VOIDmode
1341 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1342 rld[i].outmode = outmode;
1343 if (in != 0)
1344 {
1345 rtx in_reg = inloc ? *inloc : 0;
1346 /* If we merge reloads for two distinct rtl expressions that
1347 are identical in content, there might be duplicate address
1348 reloads. Remove the extra set now, so that if we later find
1349 that we can inherit this reload, we can get rid of the
1350 address reloads altogether.
1351
1352 Do not do this if both reloads are optional since the result
1353 would be an optional reload which could potentially leave
1354 unresolved address replacements.
1355
1356 It is not sufficient to call transfer_replacements since
1357 choose_reload_regs will remove the replacements for address
1358 reloads of inherited reloads which results in the same
1359 problem. */
1360 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1361 && ! (rld[i].optional && optional))
1362 {
1363 /* We must keep the address reload with the lower operand
1364 number alive. */
1365 if (opnum > rld[i].opnum)
1366 {
1367 remove_address_replacements (in);
1368 in = rld[i].in;
1369 in_reg = rld[i].in_reg;
1370 }
1371 else
1372 remove_address_replacements (rld[i].in);
1373 }
1374 rld[i].in = in;
1375 rld[i].in_reg = in_reg;
1376 }
1377 if (out != 0)
1378 {
1379 rld[i].out = out;
1380 rld[i].out_reg = outloc ? *outloc : 0;
1381 }
1382 if (reg_class_subset_p (class, rld[i].class))
1383 rld[i].class = class;
1384 rld[i].optional &= optional;
1385 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1386 opnum, rld[i].opnum))
1387 rld[i].when_needed = RELOAD_OTHER;
1388 rld[i].opnum = MIN (rld[i].opnum, opnum);
1389 }
1390
1391 /* If the ostensible rtx being reloaded differs from the rtx found
1392 in the location to substitute, this reload is not safe to combine
1393 because we cannot reliably tell whether it appears in the insn. */
1394
1395 if (in != 0 && in != *inloc)
1396 rld[i].nocombine = 1;
1397
1398#if 0
1399 /* This was replaced by changes in find_reloads_address_1 and the new
1400 function inc_for_reload, which go with a new meaning of reload_inc. */
1401
1402 /* If this is an IN/OUT reload in an insn that sets the CC,
1403 it must be for an autoincrement. It doesn't work to store
1404 the incremented value after the insn because that would clobber the CC.
1405 So we must do the increment of the value reloaded from,
1406 increment it, store it back, then decrement again. */
1407 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1408 {
1409 out = 0;
1410 rld[i].out = 0;
1411 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1412 /* If we did not find a nonzero amount-to-increment-by,
1413 that contradicts the belief that IN is being incremented
1414 in an address in this insn. */
1415 if (rld[i].inc == 0)
1416 abort ();
1417 }
1418#endif
1419
1420 /* If we will replace IN and OUT with the reload-reg,
1421 record where they are located so that substitution need
1422 not do a tree walk. */
1423
1424 if (replace_reloads)
1425 {
1426 if (inloc != 0)
1427 {
1428 struct replacement *r = &replacements[n_replacements++];
1429 r->what = i;
1430 r->subreg_loc = in_subreg_loc;
1431 r->where = inloc;
1432 r->mode = inmode;
1433 }
1434 if (outloc != 0 && outloc != inloc)
1435 {
1436 struct replacement *r = &replacements[n_replacements++];
1437 r->what = i;
1438 r->where = outloc;
1439 r->subreg_loc = out_subreg_loc;
1440 r->mode = outmode;
1441 }
1442 }
1443
1444 /* If this reload is just being introduced and it has both
1445 an incoming quantity and an outgoing quantity that are
1446 supposed to be made to match, see if either one of the two
1447 can serve as the place to reload into.
1448
1449 If one of them is acceptable, set rld[i].reg_rtx
1450 to that one. */
1451
1452 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1453 {
1454 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1455 inmode, outmode,
1456 rld[i].class, i,
1457 earlyclobber_operand_p (out));
1458
1459 /* If the outgoing register already contains the same value
1460 as the incoming one, we can dispense with loading it.
1461 The easiest way to tell the caller that is to give a phony
1462 value for the incoming operand (same as outgoing one). */
1463 if (rld[i].reg_rtx == out
1464 && (GET_CODE (in) == REG || CONSTANT_P (in))
1465 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1466 static_reload_reg_p, i, inmode))
1467 rld[i].in = out;
1468 }
1469
1470 /* If this is an input reload and the operand contains a register that
1471 dies in this insn and is used nowhere else, see if it is the right class
1472 to be used for this reload. Use it if so. (This occurs most commonly
1473 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1474 this if it is also an output reload that mentions the register unless
1475 the output is a SUBREG that clobbers an entire register.
1476
1477 Note that the operand might be one of the spill regs, if it is a
1478 pseudo reg and we are in a block where spilling has not taken place.
1479 But if there is no spilling in this block, that is OK.
1480 An explicitly used hard reg cannot be a spill reg. */
1481
1482 if (rld[i].reg_rtx == 0 && in != 0)
1483 {
1484 rtx note;
1485 int regno;
1486 enum machine_mode rel_mode = inmode;
1487
1488 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1489 rel_mode = outmode;
1490
1491 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1492 if (REG_NOTE_KIND (note) == REG_DEAD
1493 && GET_CODE (XEXP (note, 0)) == REG
1494 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1495 && reg_mentioned_p (XEXP (note, 0), in)
1496 && ! refers_to_regno_for_reload_p (regno,
1497 (regno
1498 + HARD_REGNO_NREGS (regno,
1499 rel_mode)),
1500 PATTERN (this_insn), inloc)
1501 /* If this is also an output reload, IN cannot be used as
1502 the reload register if it is set in this insn unless IN
1503 is also OUT. */
1504 && (out == 0 || in == out
1505 || ! hard_reg_set_here_p (regno,
1506 (regno
1507 + HARD_REGNO_NREGS (regno,
1508 rel_mode)),
1509 PATTERN (this_insn)))
1510 /* ??? Why is this code so different from the previous?
1511 Is there any simple coherent way to describe the two together?
1512 What's going on here. */
1513 && (in != out
1514 || (GET_CODE (in) == SUBREG
1515 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1516 / UNITS_PER_WORD)
1517 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1518 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1519 /* Make sure the operand fits in the reg that dies. */
1520 && (GET_MODE_SIZE (rel_mode)
1521 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1522 && HARD_REGNO_MODE_OK (regno, inmode)
1523 && HARD_REGNO_MODE_OK (regno, outmode))
1524 {
1525 unsigned int offs;
1526 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1527 HARD_REGNO_NREGS (regno, outmode));
1528
1529 for (offs = 0; offs < nregs; offs++)
1530 if (fixed_regs[regno + offs]
1531 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1532 regno + offs))
1533 break;
1534
1535 if (offs == nregs)
1536 {
1537 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1538 break;
1539 }
1540 }
1541 }
1542
1543 if (out)
1544 output_reloadnum = i;
1545
1546 return i;
1547}
1548
1549/* Record an additional place we must replace a value
1550 for which we have already recorded a reload.
1551 RELOADNUM is the value returned by push_reload
1552 when the reload was recorded.
1553 This is used in insn patterns that use match_dup. */
1554
1555static void
1556push_replacement (loc, reloadnum, mode)
1557 rtx *loc;
1558 int reloadnum;
1559 enum machine_mode mode;
1560{
1561 if (replace_reloads)
1562 {
1563 struct replacement *r = &replacements[n_replacements++];
1564 r->what = reloadnum;
1565 r->where = loc;
1566 r->subreg_loc = 0;
1567 r->mode = mode;
1568 }
1569}
|
| 1570
1571/* Duplicate any replacement we have recorded to apply at
1572 location ORIG_LOC to also be performed at DUP_LOC.
1573 This is used in insn patterns that use match_dup. */
1574
1575static void
1576dup_replacements (dup_loc, orig_loc)
1577 rtx *dup_loc;
1578 rtx *orig_loc;
1579{
1580 int i, n = n_replacements;
1581
1582 for (i = 0; i < n; i++)
1583 {
1584 struct replacement *r = &replacements[i];
1585 if (r->where == orig_loc)
1586 push_replacement (dup_loc, r->what, r->mode);
1587 }
1588}
|
1578
1579/* Transfer all replacements that used to be in reload FROM to be in
1580 reload TO. */
1581
1582void
1583transfer_replacements (to, from)
1584 int to, from;
1585{
1586 int i;
1587
1588 for (i = 0; i < n_replacements; i++)
1589 if (replacements[i].what == from)
1590 replacements[i].what = to;
1591}
1592
1593/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1594 or a subpart of it. If we have any replacements registered for IN_RTX,
1595 cancel the reloads that were supposed to load them.
| 1589
1590/* Transfer all replacements that used to be in reload FROM to be in
1591 reload TO. */
1592
1593void
1594transfer_replacements (to, from)
1595 int to, from;
1596{
1597 int i;
1598
1599 for (i = 0; i < n_replacements; i++)
1600 if (replacements[i].what == from)
1601 replacements[i].what = to;
1602}
1603
1604/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1605 or a subpart of it. If we have any replacements registered for IN_RTX,
1606 cancel the reloads that were supposed to load them.
|
1596 Return non-zero if we canceled any reloads. */
| 1607 Return nonzero if we canceled any reloads. */
|
1597int
1598remove_address_replacements (in_rtx)
1599 rtx in_rtx;
1600{
1601 int i, j;
1602 char reload_flags[MAX_RELOADS];
1603 int something_changed = 0;
1604
1605 memset (reload_flags, 0, sizeof reload_flags);
1606 for (i = 0, j = 0; i < n_replacements; i++)
1607 {
1608 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1609 reload_flags[replacements[i].what] |= 1;
1610 else
1611 {
1612 replacements[j++] = replacements[i];
1613 reload_flags[replacements[i].what] |= 2;
1614 }
1615 }
1616 /* Note that the following store must be done before the recursive calls. */
1617 n_replacements = j;
1618
1619 for (i = n_reloads - 1; i >= 0; i--)
1620 {
1621 if (reload_flags[i] == 1)
1622 {
1623 deallocate_reload_reg (i);
1624 remove_address_replacements (rld[i].in);
1625 rld[i].in = 0;
1626 something_changed = 1;
1627 }
1628 }
1629 return something_changed;
1630}
1631
1632/* If there is only one output reload, and it is not for an earlyclobber
1633 operand, try to combine it with a (logically unrelated) input reload
1634 to reduce the number of reload registers needed.
1635
1636 This is safe if the input reload does not appear in
1637 the value being output-reloaded, because this implies
1638 it is not needed any more once the original insn completes.
1639
1640 If that doesn't work, see we can use any of the registers that
1641 die in this insn as a reload register. We can if it is of the right
1642 class and does not appear in the value being output-reloaded. */
1643
1644static void
1645combine_reloads ()
1646{
1647 int i;
1648 int output_reload = -1;
1649 int secondary_out = -1;
1650 rtx note;
1651
1652 /* Find the output reload; return unless there is exactly one
1653 and that one is mandatory. */
1654
1655 for (i = 0; i < n_reloads; i++)
1656 if (rld[i].out != 0)
1657 {
1658 if (output_reload >= 0)
1659 return;
1660 output_reload = i;
1661 }
1662
1663 if (output_reload < 0 || rld[output_reload].optional)
1664 return;
1665
1666 /* An input-output reload isn't combinable. */
1667
1668 if (rld[output_reload].in != 0)
1669 return;
1670
1671 /* If this reload is for an earlyclobber operand, we can't do anything. */
1672 if (earlyclobber_operand_p (rld[output_reload].out))
1673 return;
1674
1675 /* If there is a reload for part of the address of this operand, we would
1676 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1677 its life to the point where doing this combine would not lower the
1678 number of spill registers needed. */
1679 for (i = 0; i < n_reloads; i++)
1680 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1681 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1682 && rld[i].opnum == rld[output_reload].opnum)
1683 return;
1684
1685 /* Check each input reload; can we combine it? */
1686
1687 for (i = 0; i < n_reloads; i++)
1688 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1689 /* Life span of this reload must not extend past main insn. */
1690 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1691 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1692 && rld[i].when_needed != RELOAD_OTHER
1693 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1694 == CLASS_MAX_NREGS (rld[output_reload].class,
1695 rld[output_reload].outmode))
1696 && rld[i].inc == 0
1697 && rld[i].reg_rtx == 0
1698#ifdef SECONDARY_MEMORY_NEEDED
1699 /* Don't combine two reloads with different secondary
1700 memory locations. */
1701 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1702 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1703 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1704 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1705#endif
1706 && (SMALL_REGISTER_CLASSES
1707 ? (rld[i].class == rld[output_reload].class)
1708 : (reg_class_subset_p (rld[i].class,
1709 rld[output_reload].class)
1710 || reg_class_subset_p (rld[output_reload].class,
1711 rld[i].class)))
1712 && (MATCHES (rld[i].in, rld[output_reload].out)
1713 /* Args reversed because the first arg seems to be
1714 the one that we imagine being modified
1715 while the second is the one that might be affected. */
1716 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1717 rld[i].in)
1718 /* However, if the input is a register that appears inside
1719 the output, then we also can't share.
1720 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1721 If the same reload reg is used for both reg 69 and the
1722 result to be stored in memory, then that result
1723 will clobber the address of the memory ref. */
1724 && ! (GET_CODE (rld[i].in) == REG
1725 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1726 rld[output_reload].out))))
1727 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1728 rld[i].when_needed != RELOAD_FOR_INPUT)
1729 && (reg_class_size[(int) rld[i].class]
1730 || SMALL_REGISTER_CLASSES)
1731 /* We will allow making things slightly worse by combining an
1732 input and an output, but no worse than that. */
1733 && (rld[i].when_needed == RELOAD_FOR_INPUT
1734 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1735 {
1736 int j;
1737
1738 /* We have found a reload to combine with! */
1739 rld[i].out = rld[output_reload].out;
1740 rld[i].out_reg = rld[output_reload].out_reg;
1741 rld[i].outmode = rld[output_reload].outmode;
1742 /* Mark the old output reload as inoperative. */
1743 rld[output_reload].out = 0;
1744 /* The combined reload is needed for the entire insn. */
1745 rld[i].when_needed = RELOAD_OTHER;
1746 /* If the output reload had a secondary reload, copy it. */
1747 if (rld[output_reload].secondary_out_reload != -1)
1748 {
1749 rld[i].secondary_out_reload
1750 = rld[output_reload].secondary_out_reload;
1751 rld[i].secondary_out_icode
1752 = rld[output_reload].secondary_out_icode;
1753 }
1754
1755#ifdef SECONDARY_MEMORY_NEEDED
1756 /* Copy any secondary MEM. */
1757 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1758 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1759 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1760#endif
1761 /* If required, minimize the register class. */
1762 if (reg_class_subset_p (rld[output_reload].class,
1763 rld[i].class))
1764 rld[i].class = rld[output_reload].class;
1765
1766 /* Transfer all replacements from the old reload to the combined. */
1767 for (j = 0; j < n_replacements; j++)
1768 if (replacements[j].what == output_reload)
1769 replacements[j].what = i;
1770
1771 return;
1772 }
1773
1774 /* If this insn has only one operand that is modified or written (assumed
1775 to be the first), it must be the one corresponding to this reload. It
1776 is safe to use anything that dies in this insn for that output provided
1777 that it does not occur in the output (we already know it isn't an
1778 earlyclobber. If this is an asm insn, give up. */
1779
1780 if (INSN_CODE (this_insn) == -1)
1781 return;
1782
1783 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1784 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1785 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1786 return;
1787
1788 /* See if some hard register that dies in this insn and is not used in
1789 the output is the right class. Only works if the register we pick
1790 up can fully hold our output reload. */
1791 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1792 if (REG_NOTE_KIND (note) == REG_DEAD
1793 && GET_CODE (XEXP (note, 0)) == REG
1794 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1795 rld[output_reload].out)
1796 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1797 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1798 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1799 REGNO (XEXP (note, 0)))
1800 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1801 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1802 /* Ensure that a secondary or tertiary reload for this output
1803 won't want this register. */
1804 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1805 || (! (TEST_HARD_REG_BIT
1806 (reg_class_contents[(int) rld[secondary_out].class],
1807 REGNO (XEXP (note, 0))))
1808 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1809 || ! (TEST_HARD_REG_BIT
1810 (reg_class_contents[(int) rld[secondary_out].class],
1811 REGNO (XEXP (note, 0)))))))
1812 && ! fixed_regs[REGNO (XEXP (note, 0))])
1813 {
1814 rld[output_reload].reg_rtx
1815 = gen_rtx_REG (rld[output_reload].outmode,
1816 REGNO (XEXP (note, 0)));
1817 return;
1818 }
1819}
1820
1821/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1822 See if one of IN and OUT is a register that may be used;
1823 this is desirable since a spill-register won't be needed.
1824 If so, return the register rtx that proves acceptable.
1825
1826 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1827 CLASS is the register class required for the reload.
1828
1829 If FOR_REAL is >= 0, it is the number of the reload,
1830 and in some cases when it can be discovered that OUT doesn't need
1831 to be computed, clear out rld[FOR_REAL].out.
1832
1833 If FOR_REAL is -1, this should not be done, because this call
1834 is just to see if a register can be found, not to find and install it.
1835
| 1608int
1609remove_address_replacements (in_rtx)
1610 rtx in_rtx;
1611{
1612 int i, j;
1613 char reload_flags[MAX_RELOADS];
1614 int something_changed = 0;
1615
1616 memset (reload_flags, 0, sizeof reload_flags);
1617 for (i = 0, j = 0; i < n_replacements; i++)
1618 {
1619 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1620 reload_flags[replacements[i].what] |= 1;
1621 else
1622 {
1623 replacements[j++] = replacements[i];
1624 reload_flags[replacements[i].what] |= 2;
1625 }
1626 }
1627 /* Note that the following store must be done before the recursive calls. */
1628 n_replacements = j;
1629
1630 for (i = n_reloads - 1; i >= 0; i--)
1631 {
1632 if (reload_flags[i] == 1)
1633 {
1634 deallocate_reload_reg (i);
1635 remove_address_replacements (rld[i].in);
1636 rld[i].in = 0;
1637 something_changed = 1;
1638 }
1639 }
1640 return something_changed;
1641}
1642
1643/* If there is only one output reload, and it is not for an earlyclobber
1644 operand, try to combine it with a (logically unrelated) input reload
1645 to reduce the number of reload registers needed.
1646
1647 This is safe if the input reload does not appear in
1648 the value being output-reloaded, because this implies
1649 it is not needed any more once the original insn completes.
1650
1651 If that doesn't work, see we can use any of the registers that
1652 die in this insn as a reload register. We can if it is of the right
1653 class and does not appear in the value being output-reloaded. */
1654
1655static void
1656combine_reloads ()
1657{
1658 int i;
1659 int output_reload = -1;
1660 int secondary_out = -1;
1661 rtx note;
1662
1663 /* Find the output reload; return unless there is exactly one
1664 and that one is mandatory. */
1665
1666 for (i = 0; i < n_reloads; i++)
1667 if (rld[i].out != 0)
1668 {
1669 if (output_reload >= 0)
1670 return;
1671 output_reload = i;
1672 }
1673
1674 if (output_reload < 0 || rld[output_reload].optional)
1675 return;
1676
1677 /* An input-output reload isn't combinable. */
1678
1679 if (rld[output_reload].in != 0)
1680 return;
1681
1682 /* If this reload is for an earlyclobber operand, we can't do anything. */
1683 if (earlyclobber_operand_p (rld[output_reload].out))
1684 return;
1685
1686 /* If there is a reload for part of the address of this operand, we would
1687 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1688 its life to the point where doing this combine would not lower the
1689 number of spill registers needed. */
1690 for (i = 0; i < n_reloads; i++)
1691 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1692 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1693 && rld[i].opnum == rld[output_reload].opnum)
1694 return;
1695
1696 /* Check each input reload; can we combine it? */
1697
1698 for (i = 0; i < n_reloads; i++)
1699 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1700 /* Life span of this reload must not extend past main insn. */
1701 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1702 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1703 && rld[i].when_needed != RELOAD_OTHER
1704 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1705 == CLASS_MAX_NREGS (rld[output_reload].class,
1706 rld[output_reload].outmode))
1707 && rld[i].inc == 0
1708 && rld[i].reg_rtx == 0
1709#ifdef SECONDARY_MEMORY_NEEDED
1710 /* Don't combine two reloads with different secondary
1711 memory locations. */
1712 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1713 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1714 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1715 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1716#endif
1717 && (SMALL_REGISTER_CLASSES
1718 ? (rld[i].class == rld[output_reload].class)
1719 : (reg_class_subset_p (rld[i].class,
1720 rld[output_reload].class)
1721 || reg_class_subset_p (rld[output_reload].class,
1722 rld[i].class)))
1723 && (MATCHES (rld[i].in, rld[output_reload].out)
1724 /* Args reversed because the first arg seems to be
1725 the one that we imagine being modified
1726 while the second is the one that might be affected. */
1727 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1728 rld[i].in)
1729 /* However, if the input is a register that appears inside
1730 the output, then we also can't share.
1731 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1732 If the same reload reg is used for both reg 69 and the
1733 result to be stored in memory, then that result
1734 will clobber the address of the memory ref. */
1735 && ! (GET_CODE (rld[i].in) == REG
1736 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1737 rld[output_reload].out))))
1738 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1739 rld[i].when_needed != RELOAD_FOR_INPUT)
1740 && (reg_class_size[(int) rld[i].class]
1741 || SMALL_REGISTER_CLASSES)
1742 /* We will allow making things slightly worse by combining an
1743 input and an output, but no worse than that. */
1744 && (rld[i].when_needed == RELOAD_FOR_INPUT
1745 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1746 {
1747 int j;
1748
1749 /* We have found a reload to combine with! */
1750 rld[i].out = rld[output_reload].out;
1751 rld[i].out_reg = rld[output_reload].out_reg;
1752 rld[i].outmode = rld[output_reload].outmode;
1753 /* Mark the old output reload as inoperative. */
1754 rld[output_reload].out = 0;
1755 /* The combined reload is needed for the entire insn. */
1756 rld[i].when_needed = RELOAD_OTHER;
1757 /* If the output reload had a secondary reload, copy it. */
1758 if (rld[output_reload].secondary_out_reload != -1)
1759 {
1760 rld[i].secondary_out_reload
1761 = rld[output_reload].secondary_out_reload;
1762 rld[i].secondary_out_icode
1763 = rld[output_reload].secondary_out_icode;
1764 }
1765
1766#ifdef SECONDARY_MEMORY_NEEDED
1767 /* Copy any secondary MEM. */
1768 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1769 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1770 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1771#endif
1772 /* If required, minimize the register class. */
1773 if (reg_class_subset_p (rld[output_reload].class,
1774 rld[i].class))
1775 rld[i].class = rld[output_reload].class;
1776
1777 /* Transfer all replacements from the old reload to the combined. */
1778 for (j = 0; j < n_replacements; j++)
1779 if (replacements[j].what == output_reload)
1780 replacements[j].what = i;
1781
1782 return;
1783 }
1784
1785 /* If this insn has only one operand that is modified or written (assumed
1786 to be the first), it must be the one corresponding to this reload. It
1787 is safe to use anything that dies in this insn for that output provided
1788 that it does not occur in the output (we already know it isn't an
1789 earlyclobber. If this is an asm insn, give up. */
1790
1791 if (INSN_CODE (this_insn) == -1)
1792 return;
1793
1794 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1795 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1796 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1797 return;
1798
1799 /* See if some hard register that dies in this insn and is not used in
1800 the output is the right class. Only works if the register we pick
1801 up can fully hold our output reload. */
1802 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1803 if (REG_NOTE_KIND (note) == REG_DEAD
1804 && GET_CODE (XEXP (note, 0)) == REG
1805 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1806 rld[output_reload].out)
1807 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1808 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1809 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1810 REGNO (XEXP (note, 0)))
1811 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1812 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1813 /* Ensure that a secondary or tertiary reload for this output
1814 won't want this register. */
1815 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1816 || (! (TEST_HARD_REG_BIT
1817 (reg_class_contents[(int) rld[secondary_out].class],
1818 REGNO (XEXP (note, 0))))
1819 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1820 || ! (TEST_HARD_REG_BIT
1821 (reg_class_contents[(int) rld[secondary_out].class],
1822 REGNO (XEXP (note, 0)))))))
1823 && ! fixed_regs[REGNO (XEXP (note, 0))])
1824 {
1825 rld[output_reload].reg_rtx
1826 = gen_rtx_REG (rld[output_reload].outmode,
1827 REGNO (XEXP (note, 0)));
1828 return;
1829 }
1830}
1831
1832/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1833 See if one of IN and OUT is a register that may be used;
1834 this is desirable since a spill-register won't be needed.
1835 If so, return the register rtx that proves acceptable.
1836
1837 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1838 CLASS is the register class required for the reload.
1839
1840 If FOR_REAL is >= 0, it is the number of the reload,
1841 and in some cases when it can be discovered that OUT doesn't need
1842 to be computed, clear out rld[FOR_REAL].out.
1843
1844 If FOR_REAL is -1, this should not be done, because this call
1845 is just to see if a register can be found, not to find and install it.
1846
|
1836 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
| 1847 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
|
1837 puts an additional constraint on being able to use IN for OUT since
1838 IN must not appear elsewhere in the insn (it is assumed that IN itself
1839 is safe from the earlyclobber). */
1840
1841static rtx
1842find_dummy_reload (real_in, real_out, inloc, outloc,
1843 inmode, outmode, class, for_real, earlyclobber)
1844 rtx real_in, real_out;
1845 rtx *inloc, *outloc;
1846 enum machine_mode inmode, outmode;
1847 enum reg_class class;
1848 int for_real;
1849 int earlyclobber;
1850{
1851 rtx in = real_in;
1852 rtx out = real_out;
1853 int in_offset = 0;
1854 int out_offset = 0;
1855 rtx value = 0;
1856
1857 /* If operands exceed a word, we can't use either of them
1858 unless they have the same size. */
1859 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1860 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1861 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1862 return 0;
1863
1864 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1865 respectively refers to a hard register. */
1866
1867 /* Find the inside of any subregs. */
1868 while (GET_CODE (out) == SUBREG)
1869 {
1870 if (GET_CODE (SUBREG_REG (out)) == REG
1871 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1872 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1873 GET_MODE (SUBREG_REG (out)),
1874 SUBREG_BYTE (out),
1875 GET_MODE (out));
1876 out = SUBREG_REG (out);
1877 }
1878 while (GET_CODE (in) == SUBREG)
1879 {
1880 if (GET_CODE (SUBREG_REG (in)) == REG
1881 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1882 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1883 GET_MODE (SUBREG_REG (in)),
1884 SUBREG_BYTE (in),
1885 GET_MODE (in));
1886 in = SUBREG_REG (in);
1887 }
1888
1889 /* Narrow down the reg class, the same way push_reload will;
1890 otherwise we might find a dummy now, but push_reload won't. */
1891 class = PREFERRED_RELOAD_CLASS (in, class);
1892
1893 /* See if OUT will do. */
1894 if (GET_CODE (out) == REG
1895 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1896 {
1897 unsigned int regno = REGNO (out) + out_offset;
1898 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1899 rtx saved_rtx;
1900
1901 /* When we consider whether the insn uses OUT,
1902 ignore references within IN. They don't prevent us
1903 from copying IN into OUT, because those refs would
1904 move into the insn that reloads IN.
1905
1906 However, we only ignore IN in its role as this reload.
1907 If the insn uses IN elsewhere and it contains OUT,
1908 that counts. We can't be sure it's the "same" operand
1909 so it might not go through this reload. */
1910 saved_rtx = *inloc;
1911 *inloc = const0_rtx;
1912
1913 if (regno < FIRST_PSEUDO_REGISTER
1914 && HARD_REGNO_MODE_OK (regno, outmode)
1915 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1916 PATTERN (this_insn), outloc))
1917 {
1918 unsigned int i;
1919
1920 for (i = 0; i < nwords; i++)
1921 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1922 regno + i))
1923 break;
1924
1925 if (i == nwords)
1926 {
1927 if (GET_CODE (real_out) == REG)
1928 value = real_out;
1929 else
1930 value = gen_rtx_REG (outmode, regno);
1931 }
1932 }
1933
1934 *inloc = saved_rtx;
1935 }
1936
1937 /* Consider using IN if OUT was not acceptable
1938 or if OUT dies in this insn (like the quotient in a divmod insn).
1939 We can't use IN unless it is dies in this insn,
1940 which means we must know accurately which hard regs are live.
1941 Also, the result can't go in IN if IN is used within OUT,
1942 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1943 if (hard_regs_live_known
1944 && GET_CODE (in) == REG
1945 && REGNO (in) < FIRST_PSEUDO_REGISTER
1946 && (value == 0
1947 || find_reg_note (this_insn, REG_UNUSED, real_out))
1948 && find_reg_note (this_insn, REG_DEAD, real_in)
1949 && !fixed_regs[REGNO (in)]
1950 && HARD_REGNO_MODE_OK (REGNO (in),
1951 /* The only case where out and real_out might
1952 have different modes is where real_out
1953 is a subreg, and in that case, out
1954 has a real mode. */
1955 (GET_MODE (out) != VOIDmode
1956 ? GET_MODE (out) : outmode)))
1957 {
1958 unsigned int regno = REGNO (in) + in_offset;
1959 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1960
1961 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1962 && ! hard_reg_set_here_p (regno, regno + nwords,
1963 PATTERN (this_insn))
1964 && (! earlyclobber
1965 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1966 PATTERN (this_insn), inloc)))
1967 {
1968 unsigned int i;
1969
1970 for (i = 0; i < nwords; i++)
1971 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1972 regno + i))
1973 break;
1974
1975 if (i == nwords)
1976 {
1977 /* If we were going to use OUT as the reload reg
1978 and changed our mind, it means OUT is a dummy that
1979 dies here. So don't bother copying value to it. */
1980 if (for_real >= 0 && value == real_out)
1981 rld[for_real].out = 0;
1982 if (GET_CODE (real_in) == REG)
1983 value = real_in;
1984 else
1985 value = gen_rtx_REG (inmode, regno);
1986 }
1987 }
1988 }
1989
1990 return value;
1991}
1992
1993/* This page contains subroutines used mainly for determining
1994 whether the IN or an OUT of a reload can serve as the
1995 reload register. */
1996
1997/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1998
1999int
2000earlyclobber_operand_p (x)
2001 rtx x;
2002{
2003 int i;
2004
2005 for (i = 0; i < n_earlyclobbers; i++)
2006 if (reload_earlyclobbers[i] == x)
2007 return 1;
2008
2009 return 0;
2010}
2011
2012/* Return 1 if expression X alters a hard reg in the range
2013 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2014 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2015 X should be the body of an instruction. */
2016
2017static int
2018hard_reg_set_here_p (beg_regno, end_regno, x)
2019 unsigned int beg_regno, end_regno;
2020 rtx x;
2021{
2022 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2023 {
2024 rtx op0 = SET_DEST (x);
2025
2026 while (GET_CODE (op0) == SUBREG)
2027 op0 = SUBREG_REG (op0);
2028 if (GET_CODE (op0) == REG)
2029 {
2030 unsigned int r = REGNO (op0);
2031
2032 /* See if this reg overlaps range under consideration. */
2033 if (r < end_regno
2034 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2035 return 1;
2036 }
2037 }
2038 else if (GET_CODE (x) == PARALLEL)
2039 {
2040 int i = XVECLEN (x, 0) - 1;
2041
2042 for (; i >= 0; i--)
2043 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2044 return 1;
2045 }
2046
2047 return 0;
2048}
2049
2050/* Return 1 if ADDR is a valid memory address for mode MODE,
2051 and check that each pseudo reg has the proper kind of
2052 hard reg. */
2053
2054int
2055strict_memory_address_p (mode, addr)
2056 enum machine_mode mode ATTRIBUTE_UNUSED;
2057 rtx addr;
2058{
2059 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2060 return 0;
2061
2062 win:
2063 return 1;
2064}
2065
2066/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2067 if they are the same hard reg, and has special hacks for
2068 autoincrement and autodecrement.
2069 This is specifically intended for find_reloads to use
2070 in determining whether two operands match.
2071 X is the operand whose number is the lower of the two.
2072
2073 The value is 2 if Y contains a pre-increment that matches
2074 a non-incrementing address in X. */
2075
2076/* ??? To be completely correct, we should arrange to pass
2077 for X the output operand and for Y the input operand.
2078 For now, we assume that the output operand has the lower number
2079 because that is natural in (SET output (... input ...)). */
2080
2081int
2082operands_match_p (x, y)
2083 rtx x, y;
2084{
2085 int i;
2086 RTX_CODE code = GET_CODE (x);
2087 const char *fmt;
2088 int success_2;
2089
2090 if (x == y)
2091 return 1;
2092 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2093 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2094 && GET_CODE (SUBREG_REG (y)) == REG)))
2095 {
2096 int j;
2097
2098 if (code == SUBREG)
2099 {
2100 i = REGNO (SUBREG_REG (x));
2101 if (i >= FIRST_PSEUDO_REGISTER)
2102 goto slow;
2103 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2104 GET_MODE (SUBREG_REG (x)),
2105 SUBREG_BYTE (x),
2106 GET_MODE (x));
2107 }
2108 else
2109 i = REGNO (x);
2110
2111 if (GET_CODE (y) == SUBREG)
2112 {
2113 j = REGNO (SUBREG_REG (y));
2114 if (j >= FIRST_PSEUDO_REGISTER)
2115 goto slow;
2116 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2117 GET_MODE (SUBREG_REG (y)),
2118 SUBREG_BYTE (y),
2119 GET_MODE (y));
2120 }
2121 else
2122 j = REGNO (y);
2123
2124 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2125 multiple hard register group, so that for example (reg:DI 0) and
2126 (reg:SI 1) will be considered the same register. */
2127 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2128 && i < FIRST_PSEUDO_REGISTER)
2129 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2130 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2131 && j < FIRST_PSEUDO_REGISTER)
2132 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2133
2134 return i == j;
2135 }
2136 /* If two operands must match, because they are really a single
2137 operand of an assembler insn, then two postincrements are invalid
2138 because the assembler insn would increment only once.
| 1848 puts an additional constraint on being able to use IN for OUT since
1849 IN must not appear elsewhere in the insn (it is assumed that IN itself
1850 is safe from the earlyclobber). */
1851
1852static rtx
1853find_dummy_reload (real_in, real_out, inloc, outloc,
1854 inmode, outmode, class, for_real, earlyclobber)
1855 rtx real_in, real_out;
1856 rtx *inloc, *outloc;
1857 enum machine_mode inmode, outmode;
1858 enum reg_class class;
1859 int for_real;
1860 int earlyclobber;
1861{
1862 rtx in = real_in;
1863 rtx out = real_out;
1864 int in_offset = 0;
1865 int out_offset = 0;
1866 rtx value = 0;
1867
1868 /* If operands exceed a word, we can't use either of them
1869 unless they have the same size. */
1870 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1871 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1872 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1873 return 0;
1874
1875 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1876 respectively refers to a hard register. */
1877
1878 /* Find the inside of any subregs. */
1879 while (GET_CODE (out) == SUBREG)
1880 {
1881 if (GET_CODE (SUBREG_REG (out)) == REG
1882 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1883 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1884 GET_MODE (SUBREG_REG (out)),
1885 SUBREG_BYTE (out),
1886 GET_MODE (out));
1887 out = SUBREG_REG (out);
1888 }
1889 while (GET_CODE (in) == SUBREG)
1890 {
1891 if (GET_CODE (SUBREG_REG (in)) == REG
1892 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1893 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1894 GET_MODE (SUBREG_REG (in)),
1895 SUBREG_BYTE (in),
1896 GET_MODE (in));
1897 in = SUBREG_REG (in);
1898 }
1899
1900 /* Narrow down the reg class, the same way push_reload will;
1901 otherwise we might find a dummy now, but push_reload won't. */
1902 class = PREFERRED_RELOAD_CLASS (in, class);
1903
1904 /* See if OUT will do. */
1905 if (GET_CODE (out) == REG
1906 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1907 {
1908 unsigned int regno = REGNO (out) + out_offset;
1909 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1910 rtx saved_rtx;
1911
1912 /* When we consider whether the insn uses OUT,
1913 ignore references within IN. They don't prevent us
1914 from copying IN into OUT, because those refs would
1915 move into the insn that reloads IN.
1916
1917 However, we only ignore IN in its role as this reload.
1918 If the insn uses IN elsewhere and it contains OUT,
1919 that counts. We can't be sure it's the "same" operand
1920 so it might not go through this reload. */
1921 saved_rtx = *inloc;
1922 *inloc = const0_rtx;
1923
1924 if (regno < FIRST_PSEUDO_REGISTER
1925 && HARD_REGNO_MODE_OK (regno, outmode)
1926 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1927 PATTERN (this_insn), outloc))
1928 {
1929 unsigned int i;
1930
1931 for (i = 0; i < nwords; i++)
1932 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1933 regno + i))
1934 break;
1935
1936 if (i == nwords)
1937 {
1938 if (GET_CODE (real_out) == REG)
1939 value = real_out;
1940 else
1941 value = gen_rtx_REG (outmode, regno);
1942 }
1943 }
1944
1945 *inloc = saved_rtx;
1946 }
1947
1948 /* Consider using IN if OUT was not acceptable
1949 or if OUT dies in this insn (like the quotient in a divmod insn).
1950 We can't use IN unless it is dies in this insn,
1951 which means we must know accurately which hard regs are live.
1952 Also, the result can't go in IN if IN is used within OUT,
1953 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1954 if (hard_regs_live_known
1955 && GET_CODE (in) == REG
1956 && REGNO (in) < FIRST_PSEUDO_REGISTER
1957 && (value == 0
1958 || find_reg_note (this_insn, REG_UNUSED, real_out))
1959 && find_reg_note (this_insn, REG_DEAD, real_in)
1960 && !fixed_regs[REGNO (in)]
1961 && HARD_REGNO_MODE_OK (REGNO (in),
1962 /* The only case where out and real_out might
1963 have different modes is where real_out
1964 is a subreg, and in that case, out
1965 has a real mode. */
1966 (GET_MODE (out) != VOIDmode
1967 ? GET_MODE (out) : outmode)))
1968 {
1969 unsigned int regno = REGNO (in) + in_offset;
1970 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1971
1972 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1973 && ! hard_reg_set_here_p (regno, regno + nwords,
1974 PATTERN (this_insn))
1975 && (! earlyclobber
1976 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1977 PATTERN (this_insn), inloc)))
1978 {
1979 unsigned int i;
1980
1981 for (i = 0; i < nwords; i++)
1982 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1983 regno + i))
1984 break;
1985
1986 if (i == nwords)
1987 {
1988 /* If we were going to use OUT as the reload reg
1989 and changed our mind, it means OUT is a dummy that
1990 dies here. So don't bother copying value to it. */
1991 if (for_real >= 0 && value == real_out)
1992 rld[for_real].out = 0;
1993 if (GET_CODE (real_in) == REG)
1994 value = real_in;
1995 else
1996 value = gen_rtx_REG (inmode, regno);
1997 }
1998 }
1999 }
2000
2001 return value;
2002}
2003
2004/* This page contains subroutines used mainly for determining
2005 whether the IN or an OUT of a reload can serve as the
2006 reload register. */
2007
2008/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2009
2010int
2011earlyclobber_operand_p (x)
2012 rtx x;
2013{
2014 int i;
2015
2016 for (i = 0; i < n_earlyclobbers; i++)
2017 if (reload_earlyclobbers[i] == x)
2018 return 1;
2019
2020 return 0;
2021}
2022
2023/* Return 1 if expression X alters a hard reg in the range
2024 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2025 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2026 X should be the body of an instruction. */
2027
2028static int
2029hard_reg_set_here_p (beg_regno, end_regno, x)
2030 unsigned int beg_regno, end_regno;
2031 rtx x;
2032{
2033 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2034 {
2035 rtx op0 = SET_DEST (x);
2036
2037 while (GET_CODE (op0) == SUBREG)
2038 op0 = SUBREG_REG (op0);
2039 if (GET_CODE (op0) == REG)
2040 {
2041 unsigned int r = REGNO (op0);
2042
2043 /* See if this reg overlaps range under consideration. */
2044 if (r < end_regno
2045 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2046 return 1;
2047 }
2048 }
2049 else if (GET_CODE (x) == PARALLEL)
2050 {
2051 int i = XVECLEN (x, 0) - 1;
2052
2053 for (; i >= 0; i--)
2054 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2055 return 1;
2056 }
2057
2058 return 0;
2059}
2060
2061/* Return 1 if ADDR is a valid memory address for mode MODE,
2062 and check that each pseudo reg has the proper kind of
2063 hard reg. */
2064
2065int
2066strict_memory_address_p (mode, addr)
2067 enum machine_mode mode ATTRIBUTE_UNUSED;
2068 rtx addr;
2069{
2070 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2071 return 0;
2072
2073 win:
2074 return 1;
2075}
2076
2077/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2078 if they are the same hard reg, and has special hacks for
2079 autoincrement and autodecrement.
2080 This is specifically intended for find_reloads to use
2081 in determining whether two operands match.
2082 X is the operand whose number is the lower of the two.
2083
2084 The value is 2 if Y contains a pre-increment that matches
2085 a non-incrementing address in X. */
2086
2087/* ??? To be completely correct, we should arrange to pass
2088 for X the output operand and for Y the input operand.
2089 For now, we assume that the output operand has the lower number
2090 because that is natural in (SET output (... input ...)). */
2091
2092int
2093operands_match_p (x, y)
2094 rtx x, y;
2095{
2096 int i;
2097 RTX_CODE code = GET_CODE (x);
2098 const char *fmt;
2099 int success_2;
2100
2101 if (x == y)
2102 return 1;
2103 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2104 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2105 && GET_CODE (SUBREG_REG (y)) == REG)))
2106 {
2107 int j;
2108
2109 if (code == SUBREG)
2110 {
2111 i = REGNO (SUBREG_REG (x));
2112 if (i >= FIRST_PSEUDO_REGISTER)
2113 goto slow;
2114 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2115 GET_MODE (SUBREG_REG (x)),
2116 SUBREG_BYTE (x),
2117 GET_MODE (x));
2118 }
2119 else
2120 i = REGNO (x);
2121
2122 if (GET_CODE (y) == SUBREG)
2123 {
2124 j = REGNO (SUBREG_REG (y));
2125 if (j >= FIRST_PSEUDO_REGISTER)
2126 goto slow;
2127 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2128 GET_MODE (SUBREG_REG (y)),
2129 SUBREG_BYTE (y),
2130 GET_MODE (y));
2131 }
2132 else
2133 j = REGNO (y);
2134
2135 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2136 multiple hard register group, so that for example (reg:DI 0) and
2137 (reg:SI 1) will be considered the same register. */
2138 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2139 && i < FIRST_PSEUDO_REGISTER)
2140 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2141 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2142 && j < FIRST_PSEUDO_REGISTER)
2143 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2144
2145 return i == j;
2146 }
2147 /* If two operands must match, because they are really a single
2148 operand of an assembler insn, then two postincrements are invalid
2149 because the assembler insn would increment only once.
|
2139 On the other hand, an postincrement matches ordinary indexing
| 2150 On the other hand, a postincrement matches ordinary indexing
|
2140 if the postincrement is the output operand. */
2141 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2142 return operands_match_p (XEXP (x, 0), y);
2143 /* Two preincrements are invalid
2144 because the assembler insn would increment only once.
| 2151 if the postincrement is the output operand. */
2152 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2153 return operands_match_p (XEXP (x, 0), y);
2154 /* Two preincrements are invalid
2155 because the assembler insn would increment only once.
|
2145 On the other hand, an preincrement matches ordinary indexing
| 2156 On the other hand, a preincrement matches ordinary indexing
|
2146 if the preincrement is the input operand.
2147 In this case, return 2, since some callers need to do special
2148 things when this happens. */
2149 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2150 || GET_CODE (y) == PRE_MODIFY)
2151 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2152
2153 slow:
2154
2155 /* Now we have disposed of all the cases
2156 in which different rtx codes can match. */
2157 if (code != GET_CODE (y))
2158 return 0;
2159 if (code == LABEL_REF)
2160 return XEXP (x, 0) == XEXP (y, 0);
2161 if (code == SYMBOL_REF)
2162 return XSTR (x, 0) == XSTR (y, 0);
2163
2164 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2165
2166 if (GET_MODE (x) != GET_MODE (y))
2167 return 0;
2168
2169 /* Compare the elements. If any pair of corresponding elements
2170 fail to match, return 0 for the whole things. */
2171
2172 success_2 = 0;
2173 fmt = GET_RTX_FORMAT (code);
2174 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2175 {
2176 int val, j;
2177 switch (fmt[i])
2178 {
2179 case 'w':
2180 if (XWINT (x, i) != XWINT (y, i))
2181 return 0;
2182 break;
2183
2184 case 'i':
2185 if (XINT (x, i) != XINT (y, i))
2186 return 0;
2187 break;
2188
2189 case 'e':
2190 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2191 if (val == 0)
2192 return 0;
2193 /* If any subexpression returns 2,
2194 we should return 2 if we are successful. */
2195 if (val == 2)
2196 success_2 = 1;
2197 break;
2198
2199 case '0':
2200 break;
2201
2202 case 'E':
2203 if (XVECLEN (x, i) != XVECLEN (y, i))
2204 return 0;
2205 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2206 {
2207 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2208 if (val == 0)
2209 return 0;
2210 if (val == 2)
2211 success_2 = 1;
2212 }
2213 break;
2214
2215 /* It is believed that rtx's at this level will never
2216 contain anything but integers and other rtx's,
2217 except for within LABEL_REFs and SYMBOL_REFs. */
2218 default:
2219 abort ();
2220 }
2221 }
2222 return 1 + success_2;
2223}
2224
2225/* Describe the range of registers or memory referenced by X.
2226 If X is a register, set REG_FLAG and put the first register
2227 number into START and the last plus one into END.
2228 If X is a memory reference, put a base address into BASE
2229 and a range of integer offsets into START and END.
2230 If X is pushing on the stack, we can assume it causes no trouble,
2231 so we set the SAFE field. */
2232
2233static struct decomposition
2234decompose (x)
2235 rtx x;
2236{
2237 struct decomposition val;
2238 int all_const = 0;
2239
2240 val.reg_flag = 0;
2241 val.safe = 0;
2242 val.base = 0;
2243 if (GET_CODE (x) == MEM)
2244 {
2245 rtx base = NULL_RTX, offset = 0;
2246 rtx addr = XEXP (x, 0);
2247
2248 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2249 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2250 {
2251 val.base = XEXP (addr, 0);
2252 val.start = -GET_MODE_SIZE (GET_MODE (x));
2253 val.end = GET_MODE_SIZE (GET_MODE (x));
2254 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2255 return val;
2256 }
2257
2258 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2259 {
2260 if (GET_CODE (XEXP (addr, 1)) == PLUS
2261 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2262 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2263 {
2264 val.base = XEXP (addr, 0);
2265 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2266 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2267 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2268 return val;
2269 }
2270 }
2271
2272 if (GET_CODE (addr) == CONST)
2273 {
2274 addr = XEXP (addr, 0);
2275 all_const = 1;
2276 }
2277 if (GET_CODE (addr) == PLUS)
2278 {
2279 if (CONSTANT_P (XEXP (addr, 0)))
2280 {
2281 base = XEXP (addr, 1);
2282 offset = XEXP (addr, 0);
2283 }
2284 else if (CONSTANT_P (XEXP (addr, 1)))
2285 {
2286 base = XEXP (addr, 0);
2287 offset = XEXP (addr, 1);
2288 }
2289 }
2290
2291 if (offset == 0)
2292 {
2293 base = addr;
2294 offset = const0_rtx;
2295 }
2296 if (GET_CODE (offset) == CONST)
2297 offset = XEXP (offset, 0);
2298 if (GET_CODE (offset) == PLUS)
2299 {
2300 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2301 {
2302 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2303 offset = XEXP (offset, 0);
2304 }
2305 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2306 {
2307 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2308 offset = XEXP (offset, 1);
2309 }
2310 else
2311 {
2312 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2313 offset = const0_rtx;
2314 }
2315 }
2316 else if (GET_CODE (offset) != CONST_INT)
2317 {
2318 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2319 offset = const0_rtx;
2320 }
2321
2322 if (all_const && GET_CODE (base) == PLUS)
2323 base = gen_rtx_CONST (GET_MODE (base), base);
2324
2325 if (GET_CODE (offset) != CONST_INT)
2326 abort ();
2327
2328 val.start = INTVAL (offset);
2329 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2330 val.base = base;
2331 return val;
2332 }
2333 else if (GET_CODE (x) == REG)
2334 {
2335 val.reg_flag = 1;
2336 val.start = true_regnum (x);
2337 if (val.start < 0)
2338 {
2339 /* A pseudo with no hard reg. */
2340 val.start = REGNO (x);
2341 val.end = val.start + 1;
2342 }
2343 else
2344 /* A hard reg. */
2345 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2346 }
2347 else if (GET_CODE (x) == SUBREG)
2348 {
2349 if (GET_CODE (SUBREG_REG (x)) != REG)
2350 /* This could be more precise, but it's good enough. */
2351 return decompose (SUBREG_REG (x));
2352 val.reg_flag = 1;
2353 val.start = true_regnum (x);
2354 if (val.start < 0)
2355 return decompose (SUBREG_REG (x));
2356 else
2357 /* A hard reg. */
2358 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2359 }
2360 else if (CONSTANT_P (x)
2361 /* This hasn't been assigned yet, so it can't conflict yet. */
2362 || GET_CODE (x) == SCRATCH)
2363 val.safe = 1;
2364 else
2365 abort ();
2366 return val;
2367}
2368
2369/* Return 1 if altering Y will not modify the value of X.
2370 Y is also described by YDATA, which should be decompose (Y). */
2371
2372static int
2373immune_p (x, y, ydata)
2374 rtx x, y;
2375 struct decomposition ydata;
2376{
2377 struct decomposition xdata;
2378
2379 if (ydata.reg_flag)
2380 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2381 if (ydata.safe)
2382 return 1;
2383
2384 if (GET_CODE (y) != MEM)
2385 abort ();
2386 /* If Y is memory and X is not, Y can't affect X. */
2387 if (GET_CODE (x) != MEM)
2388 return 1;
2389
2390 xdata = decompose (x);
2391
2392 if (! rtx_equal_p (xdata.base, ydata.base))
2393 {
2394 /* If bases are distinct symbolic constants, there is no overlap. */
2395 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2396 return 1;
2397 /* Constants and stack slots never overlap. */
2398 if (CONSTANT_P (xdata.base)
2399 && (ydata.base == frame_pointer_rtx
2400 || ydata.base == hard_frame_pointer_rtx
2401 || ydata.base == stack_pointer_rtx))
2402 return 1;
2403 if (CONSTANT_P (ydata.base)
2404 && (xdata.base == frame_pointer_rtx
2405 || xdata.base == hard_frame_pointer_rtx
2406 || xdata.base == stack_pointer_rtx))
2407 return 1;
2408 /* If either base is variable, we don't know anything. */
2409 return 0;
2410 }
2411
2412 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2413}
2414
2415/* Similar, but calls decompose. */
2416
2417int
2418safe_from_earlyclobber (op, clobber)
2419 rtx op, clobber;
2420{
2421 struct decomposition early_data;
2422
2423 early_data = decompose (clobber);
2424 return immune_p (op, clobber, early_data);
2425}
2426
2427/* Main entry point of this file: search the body of INSN
2428 for values that need reloading and record them with push_reload.
2429 REPLACE nonzero means record also where the values occur
2430 so that subst_reloads can be used.
2431
2432 IND_LEVELS says how many levels of indirection are supported by this
2433 machine; a value of zero means that a memory reference is not a valid
2434 memory address.
2435
2436 LIVE_KNOWN says we have valid information about which hard
2437 regs are live at each point in the program; this is true when
2438 we are called from global_alloc but false when stupid register
2439 allocation has been done.
2440
2441 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2442 which is nonnegative if the reg has been commandeered for reloading into.
2443 It is copied into STATIC_RELOAD_REG_P and referenced from there
2444 by various subroutines.
2445
2446 Return TRUE if some operands need to be changed, because of swapping
2447 commutative operands, reg_equiv_address substitution, or whatever. */
2448
2449int
2450find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2451 rtx insn;
2452 int replace, ind_levels;
2453 int live_known;
2454 short *reload_reg_p;
2455{
2456 int insn_code_number;
2457 int i, j;
2458 int noperands;
2459 /* These start out as the constraints for the insn
2460 and they are chewed up as we consider alternatives. */
2461 char *constraints[MAX_RECOG_OPERANDS];
2462 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2463 a register. */
2464 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2465 char pref_or_nothing[MAX_RECOG_OPERANDS];
2466 /* Nonzero for a MEM operand whose entire address needs a reload. */
2467 int address_reloaded[MAX_RECOG_OPERANDS];
| 2157 if the preincrement is the input operand.
2158 In this case, return 2, since some callers need to do special
2159 things when this happens. */
2160 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2161 || GET_CODE (y) == PRE_MODIFY)
2162 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2163
2164 slow:
2165
2166 /* Now we have disposed of all the cases
2167 in which different rtx codes can match. */
2168 if (code != GET_CODE (y))
2169 return 0;
2170 if (code == LABEL_REF)
2171 return XEXP (x, 0) == XEXP (y, 0);
2172 if (code == SYMBOL_REF)
2173 return XSTR (x, 0) == XSTR (y, 0);
2174
2175 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2176
2177 if (GET_MODE (x) != GET_MODE (y))
2178 return 0;
2179
2180 /* Compare the elements. If any pair of corresponding elements
2181 fail to match, return 0 for the whole things. */
2182
2183 success_2 = 0;
2184 fmt = GET_RTX_FORMAT (code);
2185 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2186 {
2187 int val, j;
2188 switch (fmt[i])
2189 {
2190 case 'w':
2191 if (XWINT (x, i) != XWINT (y, i))
2192 return 0;
2193 break;
2194
2195 case 'i':
2196 if (XINT (x, i) != XINT (y, i))
2197 return 0;
2198 break;
2199
2200 case 'e':
2201 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2202 if (val == 0)
2203 return 0;
2204 /* If any subexpression returns 2,
2205 we should return 2 if we are successful. */
2206 if (val == 2)
2207 success_2 = 1;
2208 break;
2209
2210 case '0':
2211 break;
2212
2213 case 'E':
2214 if (XVECLEN (x, i) != XVECLEN (y, i))
2215 return 0;
2216 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2217 {
2218 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2219 if (val == 0)
2220 return 0;
2221 if (val == 2)
2222 success_2 = 1;
2223 }
2224 break;
2225
2226 /* It is believed that rtx's at this level will never
2227 contain anything but integers and other rtx's,
2228 except for within LABEL_REFs and SYMBOL_REFs. */
2229 default:
2230 abort ();
2231 }
2232 }
2233 return 1 + success_2;
2234}
2235
2236/* Describe the range of registers or memory referenced by X.
2237 If X is a register, set REG_FLAG and put the first register
2238 number into START and the last plus one into END.
2239 If X is a memory reference, put a base address into BASE
2240 and a range of integer offsets into START and END.
2241 If X is pushing on the stack, we can assume it causes no trouble,
2242 so we set the SAFE field. */
2243
2244static struct decomposition
2245decompose (x)
2246 rtx x;
2247{
2248 struct decomposition val;
2249 int all_const = 0;
2250
2251 val.reg_flag = 0;
2252 val.safe = 0;
2253 val.base = 0;
2254 if (GET_CODE (x) == MEM)
2255 {
2256 rtx base = NULL_RTX, offset = 0;
2257 rtx addr = XEXP (x, 0);
2258
2259 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2260 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2261 {
2262 val.base = XEXP (addr, 0);
2263 val.start = -GET_MODE_SIZE (GET_MODE (x));
2264 val.end = GET_MODE_SIZE (GET_MODE (x));
2265 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2266 return val;
2267 }
2268
2269 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2270 {
2271 if (GET_CODE (XEXP (addr, 1)) == PLUS
2272 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2273 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2274 {
2275 val.base = XEXP (addr, 0);
2276 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2277 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2278 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2279 return val;
2280 }
2281 }
2282
2283 if (GET_CODE (addr) == CONST)
2284 {
2285 addr = XEXP (addr, 0);
2286 all_const = 1;
2287 }
2288 if (GET_CODE (addr) == PLUS)
2289 {
2290 if (CONSTANT_P (XEXP (addr, 0)))
2291 {
2292 base = XEXP (addr, 1);
2293 offset = XEXP (addr, 0);
2294 }
2295 else if (CONSTANT_P (XEXP (addr, 1)))
2296 {
2297 base = XEXP (addr, 0);
2298 offset = XEXP (addr, 1);
2299 }
2300 }
2301
2302 if (offset == 0)
2303 {
2304 base = addr;
2305 offset = const0_rtx;
2306 }
2307 if (GET_CODE (offset) == CONST)
2308 offset = XEXP (offset, 0);
2309 if (GET_CODE (offset) == PLUS)
2310 {
2311 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2312 {
2313 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2314 offset = XEXP (offset, 0);
2315 }
2316 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2317 {
2318 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2319 offset = XEXP (offset, 1);
2320 }
2321 else
2322 {
2323 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2324 offset = const0_rtx;
2325 }
2326 }
2327 else if (GET_CODE (offset) != CONST_INT)
2328 {
2329 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2330 offset = const0_rtx;
2331 }
2332
2333 if (all_const && GET_CODE (base) == PLUS)
2334 base = gen_rtx_CONST (GET_MODE (base), base);
2335
2336 if (GET_CODE (offset) != CONST_INT)
2337 abort ();
2338
2339 val.start = INTVAL (offset);
2340 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2341 val.base = base;
2342 return val;
2343 }
2344 else if (GET_CODE (x) == REG)
2345 {
2346 val.reg_flag = 1;
2347 val.start = true_regnum (x);
2348 if (val.start < 0)
2349 {
2350 /* A pseudo with no hard reg. */
2351 val.start = REGNO (x);
2352 val.end = val.start + 1;
2353 }
2354 else
2355 /* A hard reg. */
2356 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2357 }
2358 else if (GET_CODE (x) == SUBREG)
2359 {
2360 if (GET_CODE (SUBREG_REG (x)) != REG)
2361 /* This could be more precise, but it's good enough. */
2362 return decompose (SUBREG_REG (x));
2363 val.reg_flag = 1;
2364 val.start = true_regnum (x);
2365 if (val.start < 0)
2366 return decompose (SUBREG_REG (x));
2367 else
2368 /* A hard reg. */
2369 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2370 }
2371 else if (CONSTANT_P (x)
2372 /* This hasn't been assigned yet, so it can't conflict yet. */
2373 || GET_CODE (x) == SCRATCH)
2374 val.safe = 1;
2375 else
2376 abort ();
2377 return val;
2378}
2379
2380/* Return 1 if altering Y will not modify the value of X.
2381 Y is also described by YDATA, which should be decompose (Y). */
2382
2383static int
2384immune_p (x, y, ydata)
2385 rtx x, y;
2386 struct decomposition ydata;
2387{
2388 struct decomposition xdata;
2389
2390 if (ydata.reg_flag)
2391 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2392 if (ydata.safe)
2393 return 1;
2394
2395 if (GET_CODE (y) != MEM)
2396 abort ();
2397 /* If Y is memory and X is not, Y can't affect X. */
2398 if (GET_CODE (x) != MEM)
2399 return 1;
2400
2401 xdata = decompose (x);
2402
2403 if (! rtx_equal_p (xdata.base, ydata.base))
2404 {
2405 /* If bases are distinct symbolic constants, there is no overlap. */
2406 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2407 return 1;
2408 /* Constants and stack slots never overlap. */
2409 if (CONSTANT_P (xdata.base)
2410 && (ydata.base == frame_pointer_rtx
2411 || ydata.base == hard_frame_pointer_rtx
2412 || ydata.base == stack_pointer_rtx))
2413 return 1;
2414 if (CONSTANT_P (ydata.base)
2415 && (xdata.base == frame_pointer_rtx
2416 || xdata.base == hard_frame_pointer_rtx
2417 || xdata.base == stack_pointer_rtx))
2418 return 1;
2419 /* If either base is variable, we don't know anything. */
2420 return 0;
2421 }
2422
2423 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2424}
2425
2426/* Similar, but calls decompose. */
2427
2428int
2429safe_from_earlyclobber (op, clobber)
2430 rtx op, clobber;
2431{
2432 struct decomposition early_data;
2433
2434 early_data = decompose (clobber);
2435 return immune_p (op, clobber, early_data);
2436}
2437
2438/* Main entry point of this file: search the body of INSN
2439 for values that need reloading and record them with push_reload.
2440 REPLACE nonzero means record also where the values occur
2441 so that subst_reloads can be used.
2442
2443 IND_LEVELS says how many levels of indirection are supported by this
2444 machine; a value of zero means that a memory reference is not a valid
2445 memory address.
2446
2447 LIVE_KNOWN says we have valid information about which hard
2448 regs are live at each point in the program; this is true when
2449 we are called from global_alloc but false when stupid register
2450 allocation has been done.
2451
2452 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2453 which is nonnegative if the reg has been commandeered for reloading into.
2454 It is copied into STATIC_RELOAD_REG_P and referenced from there
2455 by various subroutines.
2456
2457 Return TRUE if some operands need to be changed, because of swapping
2458 commutative operands, reg_equiv_address substitution, or whatever. */
2459
2460int
2461find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2462 rtx insn;
2463 int replace, ind_levels;
2464 int live_known;
2465 short *reload_reg_p;
2466{
2467 int insn_code_number;
2468 int i, j;
2469 int noperands;
2470 /* These start out as the constraints for the insn
2471 and they are chewed up as we consider alternatives. */
2472 char *constraints[MAX_RECOG_OPERANDS];
2473 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2474 a register. */
2475 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2476 char pref_or_nothing[MAX_RECOG_OPERANDS];
2477 /* Nonzero for a MEM operand whose entire address needs a reload. */
2478 int address_reloaded[MAX_RECOG_OPERANDS];
|
| 2479 /* Nonzero for an address operand that needs to be completely reloaded. */
2480 int address_operand_reloaded[MAX_RECOG_OPERANDS];
|
2468 /* Value of enum reload_type to use for operand. */
2469 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2470 /* Value of enum reload_type to use within address of operand. */
2471 enum reload_type address_type[MAX_RECOG_OPERANDS];
2472 /* Save the usage of each operand. */
2473 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2474 int no_input_reloads = 0, no_output_reloads = 0;
2475 int n_alternatives;
2476 int this_alternative[MAX_RECOG_OPERANDS];
2477 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2478 char this_alternative_win[MAX_RECOG_OPERANDS];
2479 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2480 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2481 int this_alternative_matches[MAX_RECOG_OPERANDS];
2482 int swapped;
2483 int goal_alternative[MAX_RECOG_OPERANDS];
2484 int this_alternative_number;
2485 int goal_alternative_number = 0;
2486 int operand_reloadnum[MAX_RECOG_OPERANDS];
2487 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2488 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2489 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2490 char goal_alternative_win[MAX_RECOG_OPERANDS];
2491 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2492 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2493 int goal_alternative_swapped;
2494 int best;
2495 int commutative;
2496 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2497 rtx substed_operand[MAX_RECOG_OPERANDS];
2498 rtx body = PATTERN (insn);
2499 rtx set = single_set (insn);
2500 int goal_earlyclobber = 0, this_earlyclobber;
2501 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2502 int retval = 0;
2503
2504 this_insn = insn;
2505 n_reloads = 0;
2506 n_replacements = 0;
2507 n_earlyclobbers = 0;
2508 replace_reloads = replace;
2509 hard_regs_live_known = live_known;
2510 static_reload_reg_p = reload_reg_p;
2511
2512 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2513 neither are insns that SET cc0. Insns that use CC0 are not allowed
2514 to have any input reloads. */
2515 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2516 no_output_reloads = 1;
2517
2518#ifdef HAVE_cc0
2519 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2520 no_input_reloads = 1;
2521 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2522 no_output_reloads = 1;
2523#endif
2524
2525#ifdef SECONDARY_MEMORY_NEEDED
2526 /* The eliminated forms of any secondary memory locations are per-insn, so
2527 clear them out here. */
2528
2529 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2530#endif
2531
2532 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2533 is cheap to move between them. If it is not, there may not be an insn
2534 to do the copy, so we may need a reload. */
2535 if (GET_CODE (body) == SET
2536 && GET_CODE (SET_DEST (body)) == REG
2537 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2538 && GET_CODE (SET_SRC (body)) == REG
2539 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2540 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2541 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2542 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2543 return 0;
2544
2545 extract_insn (insn);
2546
2547 noperands = reload_n_operands = recog_data.n_operands;
2548 n_alternatives = recog_data.n_alternatives;
2549
2550 /* Just return "no reloads" if insn has no operands with constraints. */
2551 if (noperands == 0 || n_alternatives == 0)
2552 return 0;
2553
2554 insn_code_number = INSN_CODE (insn);
2555 this_insn_is_asm = insn_code_number < 0;
2556
2557 memcpy (operand_mode, recog_data.operand_mode,
2558 noperands * sizeof (enum machine_mode));
2559 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2560
2561 commutative = -1;
2562
2563 /* If we will need to know, later, whether some pair of operands
2564 are the same, we must compare them now and save the result.
2565 Reloading the base and index registers will clobber them
2566 and afterward they will fail to match. */
2567
2568 for (i = 0; i < noperands; i++)
2569 {
2570 char *p;
2571 int c;
2572
2573 substed_operand[i] = recog_data.operand[i];
2574 p = constraints[i];
2575
2576 modified[i] = RELOAD_READ;
2577
2578 /* Scan this operand's constraint to see if it is an output operand,
2579 an in-out operand, is commutative, or should match another. */
2580
2581 while ((c = *p++))
2582 {
2583 if (c == '=')
2584 modified[i] = RELOAD_WRITE;
2585 else if (c == '+')
2586 modified[i] = RELOAD_READ_WRITE;
2587 else if (c == '%')
2588 {
2589 /* The last operand should not be marked commutative. */
2590 if (i == noperands - 1)
2591 abort ();
2592
2593 commutative = i;
2594 }
2595 else if (ISDIGIT (c))
2596 {
2597 c = strtoul (p - 1, &p, 10);
2598
2599 operands_match[c][i]
2600 = operands_match_p (recog_data.operand[c],
2601 recog_data.operand[i]);
2602
2603 /* An operand may not match itself. */
2604 if (c == i)
2605 abort ();
2606
2607 /* If C can be commuted with C+1, and C might need to match I,
2608 then C+1 might also need to match I. */
2609 if (commutative >= 0)
2610 {
2611 if (c == commutative || c == commutative + 1)
2612 {
2613 int other = c + (c == commutative ? 1 : -1);
2614 operands_match[other][i]
2615 = operands_match_p (recog_data.operand[other],
2616 recog_data.operand[i]);
2617 }
2618 if (i == commutative || i == commutative + 1)
2619 {
2620 int other = i + (i == commutative ? 1 : -1);
2621 operands_match[c][other]
2622 = operands_match_p (recog_data.operand[c],
2623 recog_data.operand[other]);
2624 }
2625 /* Note that C is supposed to be less than I.
2626 No need to consider altering both C and I because in
2627 that case we would alter one into the other. */
2628 }
2629 }
2630 }
2631 }
2632
2633 /* Examine each operand that is a memory reference or memory address
2634 and reload parts of the addresses into index registers.
2635 Also here any references to pseudo regs that didn't get hard regs
2636 but are equivalent to constants get replaced in the insn itself
2637 with those constants. Nobody will ever see them again.
2638
2639 Finally, set up the preferred classes of each operand. */
2640
2641 for (i = 0; i < noperands; i++)
2642 {
2643 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2644
2645 address_reloaded[i] = 0;
| 2481 /* Value of enum reload_type to use for operand. */
2482 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2483 /* Value of enum reload_type to use within address of operand. */
2484 enum reload_type address_type[MAX_RECOG_OPERANDS];
2485 /* Save the usage of each operand. */
2486 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2487 int no_input_reloads = 0, no_output_reloads = 0;
2488 int n_alternatives;
2489 int this_alternative[MAX_RECOG_OPERANDS];
2490 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2491 char this_alternative_win[MAX_RECOG_OPERANDS];
2492 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2493 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2494 int this_alternative_matches[MAX_RECOG_OPERANDS];
2495 int swapped;
2496 int goal_alternative[MAX_RECOG_OPERANDS];
2497 int this_alternative_number;
2498 int goal_alternative_number = 0;
2499 int operand_reloadnum[MAX_RECOG_OPERANDS];
2500 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2501 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2502 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2503 char goal_alternative_win[MAX_RECOG_OPERANDS];
2504 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2505 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2506 int goal_alternative_swapped;
2507 int best;
2508 int commutative;
2509 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2510 rtx substed_operand[MAX_RECOG_OPERANDS];
2511 rtx body = PATTERN (insn);
2512 rtx set = single_set (insn);
2513 int goal_earlyclobber = 0, this_earlyclobber;
2514 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2515 int retval = 0;
2516
2517 this_insn = insn;
2518 n_reloads = 0;
2519 n_replacements = 0;
2520 n_earlyclobbers = 0;
2521 replace_reloads = replace;
2522 hard_regs_live_known = live_known;
2523 static_reload_reg_p = reload_reg_p;
2524
2525 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2526 neither are insns that SET cc0. Insns that use CC0 are not allowed
2527 to have any input reloads. */
2528 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2529 no_output_reloads = 1;
2530
2531#ifdef HAVE_cc0
2532 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2533 no_input_reloads = 1;
2534 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2535 no_output_reloads = 1;
2536#endif
2537
2538#ifdef SECONDARY_MEMORY_NEEDED
2539 /* The eliminated forms of any secondary memory locations are per-insn, so
2540 clear them out here. */
2541
2542 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2543#endif
2544
2545 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2546 is cheap to move between them. If it is not, there may not be an insn
2547 to do the copy, so we may need a reload. */
2548 if (GET_CODE (body) == SET
2549 && GET_CODE (SET_DEST (body)) == REG
2550 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2551 && GET_CODE (SET_SRC (body)) == REG
2552 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2553 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2554 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2555 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2556 return 0;
2557
2558 extract_insn (insn);
2559
2560 noperands = reload_n_operands = recog_data.n_operands;
2561 n_alternatives = recog_data.n_alternatives;
2562
2563 /* Just return "no reloads" if insn has no operands with constraints. */
2564 if (noperands == 0 || n_alternatives == 0)
2565 return 0;
2566
2567 insn_code_number = INSN_CODE (insn);
2568 this_insn_is_asm = insn_code_number < 0;
2569
2570 memcpy (operand_mode, recog_data.operand_mode,
2571 noperands * sizeof (enum machine_mode));
2572 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2573
2574 commutative = -1;
2575
2576 /* If we will need to know, later, whether some pair of operands
2577 are the same, we must compare them now and save the result.
2578 Reloading the base and index registers will clobber them
2579 and afterward they will fail to match. */
2580
2581 for (i = 0; i < noperands; i++)
2582 {
2583 char *p;
2584 int c;
2585
2586 substed_operand[i] = recog_data.operand[i];
2587 p = constraints[i];
2588
2589 modified[i] = RELOAD_READ;
2590
2591 /* Scan this operand's constraint to see if it is an output operand,
2592 an in-out operand, is commutative, or should match another. */
2593
2594 while ((c = *p++))
2595 {
2596 if (c == '=')
2597 modified[i] = RELOAD_WRITE;
2598 else if (c == '+')
2599 modified[i] = RELOAD_READ_WRITE;
2600 else if (c == '%')
2601 {
2602 /* The last operand should not be marked commutative. */
2603 if (i == noperands - 1)
2604 abort ();
2605
2606 commutative = i;
2607 }
2608 else if (ISDIGIT (c))
2609 {
2610 c = strtoul (p - 1, &p, 10);
2611
2612 operands_match[c][i]
2613 = operands_match_p (recog_data.operand[c],
2614 recog_data.operand[i]);
2615
2616 /* An operand may not match itself. */
2617 if (c == i)
2618 abort ();
2619
2620 /* If C can be commuted with C+1, and C might need to match I,
2621 then C+1 might also need to match I. */
2622 if (commutative >= 0)
2623 {
2624 if (c == commutative || c == commutative + 1)
2625 {
2626 int other = c + (c == commutative ? 1 : -1);
2627 operands_match[other][i]
2628 = operands_match_p (recog_data.operand[other],
2629 recog_data.operand[i]);
2630 }
2631 if (i == commutative || i == commutative + 1)
2632 {
2633 int other = i + (i == commutative ? 1 : -1);
2634 operands_match[c][other]
2635 = operands_match_p (recog_data.operand[c],
2636 recog_data.operand[other]);
2637 }
2638 /* Note that C is supposed to be less than I.
2639 No need to consider altering both C and I because in
2640 that case we would alter one into the other. */
2641 }
2642 }
2643 }
2644 }
2645
2646 /* Examine each operand that is a memory reference or memory address
2647 and reload parts of the addresses into index registers.
2648 Also here any references to pseudo regs that didn't get hard regs
2649 but are equivalent to constants get replaced in the insn itself
2650 with those constants. Nobody will ever see them again.
2651
2652 Finally, set up the preferred classes of each operand. */
2653
2654 for (i = 0; i < noperands; i++)
2655 {
2656 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2657
2658 address_reloaded[i] = 0;
|
| 2659 address_operand_reloaded[i] = 0;
|
2646 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2647 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2648 : RELOAD_OTHER);
2649 address_type[i]
2650 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2651 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2652 : RELOAD_OTHER);
2653
2654 if (*constraints[i] == 0)
2655 /* Ignore things like match_operator operands. */
2656 ;
| 2660 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2661 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2662 : RELOAD_OTHER);
2663 address_type[i]
2664 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2665 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2666 : RELOAD_OTHER);
2667
2668 if (*constraints[i] == 0)
2669 /* Ignore things like match_operator operands. */
2670 ;
|
2657 else if (constraints[i][0] == 'p')
| 2671 else if (constraints[i][0] == 'p'
2672 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0]))
|
2658 {
| 2673 {
|
2659 find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2660 recog_data.operand[i],
2661 recog_data.operand_loc[i],
2662 i, operand_type[i], ind_levels, insn);
| 2674 address_operand_reloaded[i]
2675 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2676 recog_data.operand[i],
2677 recog_data.operand_loc[i],
2678 i, operand_type[i], ind_levels, insn);
|
2663
2664 /* If we now have a simple operand where we used to have a
2665 PLUS or MULT, re-recognize and try again. */
2666 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2667 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2668 && (GET_CODE (recog_data.operand[i]) == MULT
2669 || GET_CODE (recog_data.operand[i]) == PLUS))
2670 {
2671 INSN_CODE (insn) = -1;
2672 retval = find_reloads (insn, replace, ind_levels, live_known,
2673 reload_reg_p);
2674 return retval;
2675 }
2676
2677 recog_data.operand[i] = *recog_data.operand_loc[i];
2678 substed_operand[i] = recog_data.operand[i];
| 2679
2680 /* If we now have a simple operand where we used to have a
2681 PLUS or MULT, re-recognize and try again. */
2682 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2683 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2684 && (GET_CODE (recog_data.operand[i]) == MULT
2685 || GET_CODE (recog_data.operand[i]) == PLUS))
2686 {
2687 INSN_CODE (insn) = -1;
2688 retval = find_reloads (insn, replace, ind_levels, live_known,
2689 reload_reg_p);
2690 return retval;
2691 }
2692
2693 recog_data.operand[i] = *recog_data.operand_loc[i];
2694 substed_operand[i] = recog_data.operand[i];
|
| 2695
2696 /* Address operands are reloaded in their existing mode,
2697 no matter what is specified in the machine description. */
2698 operand_mode[i] = GET_MODE (recog_data.operand[i]);
|
2679 }
2680 else if (code == MEM)
2681 {
2682 address_reloaded[i]
2683 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2684 recog_data.operand_loc[i],
2685 XEXP (recog_data.operand[i], 0),
2686 &XEXP (recog_data.operand[i], 0),
2687 i, address_type[i], ind_levels, insn);
2688 recog_data.operand[i] = *recog_data.operand_loc[i];
2689 substed_operand[i] = recog_data.operand[i];
2690 }
2691 else if (code == SUBREG)
2692 {
2693 rtx reg = SUBREG_REG (recog_data.operand[i]);
2694 rtx op
2695 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2696 ind_levels,
2697 set != 0
2698 && &SET_DEST (set) == recog_data.operand_loc[i],
2699 insn,
2700 &address_reloaded[i]);
2701
2702 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2703 that didn't get a hard register, emit a USE with a REG_EQUAL
2704 note in front so that we might inherit a previous, possibly
2705 wider reload. */
2706
2707 if (replace
2708 && GET_CODE (op) == MEM
2709 && GET_CODE (reg) == REG
2710 && (GET_MODE_SIZE (GET_MODE (reg))
2711 >= GET_MODE_SIZE (GET_MODE (op))))
2712 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2713 insn),
2714 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2715
2716 substed_operand[i] = recog_data.operand[i] = op;
2717 }
2718 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2719 /* We can get a PLUS as an "operand" as a result of register
2720 elimination. See eliminate_regs and gen_reload. We handle
2721 a unary operator by reloading the operand. */
2722 substed_operand[i] = recog_data.operand[i]
2723 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2724 ind_levels, 0, insn,
2725 &address_reloaded[i]);
2726 else if (code == REG)
2727 {
2728 /* This is equivalent to calling find_reloads_toplev.
2729 The code is duplicated for speed.
2730 When we find a pseudo always equivalent to a constant,
2731 we replace it by the constant. We must be sure, however,
2732 that we don't try to replace it in the insn in which it
2733 is being set. */
2734 int regno = REGNO (recog_data.operand[i]);
2735 if (reg_equiv_constant[regno] != 0
2736 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2737 {
2738 /* Record the existing mode so that the check if constants are
2739 allowed will work when operand_mode isn't specified. */
2740
2741 if (operand_mode[i] == VOIDmode)
2742 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2743
2744 substed_operand[i] = recog_data.operand[i]
2745 = reg_equiv_constant[regno];
2746 }
2747 if (reg_equiv_memory_loc[regno] != 0
2748 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2749 /* We need not give a valid is_set_dest argument since the case
2750 of a constant equivalence was checked above. */
2751 substed_operand[i] = recog_data.operand[i]
2752 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2753 ind_levels, 0, insn,
2754 &address_reloaded[i]);
2755 }
2756 /* If the operand is still a register (we didn't replace it with an
2757 equivalent), get the preferred class to reload it into. */
2758 code = GET_CODE (recog_data.operand[i]);
2759 preferred_class[i]
2760 = ((code == REG && REGNO (recog_data.operand[i])
2761 >= FIRST_PSEUDO_REGISTER)
2762 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2763 : NO_REGS);
2764 pref_or_nothing[i]
2765 = (code == REG
2766 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2767 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2768 }
2769
2770 /* If this is simply a copy from operand 1 to operand 0, merge the
2771 preferred classes for the operands. */
2772 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2773 && recog_data.operand[1] == SET_SRC (set))
2774 {
2775 preferred_class[0] = preferred_class[1]
2776 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2777 pref_or_nothing[0] |= pref_or_nothing[1];
2778 pref_or_nothing[1] |= pref_or_nothing[0];
2779 }
2780
2781 /* Now see what we need for pseudo-regs that didn't get hard regs
2782 or got the wrong kind of hard reg. For this, we must consider
2783 all the operands together against the register constraints. */
2784
2785 best = MAX_RECOG_OPERANDS * 2 + 600;
2786
2787 swapped = 0;
2788 goal_alternative_swapped = 0;
2789 try_swapped:
2790
2791 /* The constraints are made of several alternatives.
2792 Each operand's constraint looks like foo,bar,... with commas
2793 separating the alternatives. The first alternatives for all
2794 operands go together, the second alternatives go together, etc.
2795
2796 First loop over alternatives. */
2797
2798 for (this_alternative_number = 0;
2799 this_alternative_number < n_alternatives;
2800 this_alternative_number++)
2801 {
2802 /* Loop over operands for one constraint alternative. */
2803 /* LOSERS counts those that don't fit this alternative
2804 and would require loading. */
2805 int losers = 0;
2806 /* BAD is set to 1 if it some operand can't fit this alternative
2807 even after reloading. */
2808 int bad = 0;
2809 /* REJECT is a count of how undesirable this alternative says it is
2810 if any reloading is required. If the alternative matches exactly
2811 then REJECT is ignored, but otherwise it gets this much
2812 counted against it in addition to the reloading needed. Each
2813 ? counts three times here since we want the disparaging caused by
2814 a bad register class to only count 1/3 as much. */
2815 int reject = 0;
2816
2817 this_earlyclobber = 0;
2818
2819 for (i = 0; i < noperands; i++)
2820 {
2821 char *p = constraints[i];
2822 int win = 0;
2823 int did_match = 0;
2824 /* 0 => this operand can be reloaded somehow for this alternative. */
2825 int badop = 1;
2826 /* 0 => this operand can be reloaded if the alternative allows regs. */
2827 int winreg = 0;
2828 int c;
2829 rtx operand = recog_data.operand[i];
2830 int offset = 0;
2831 /* Nonzero means this is a MEM that must be reloaded into a reg
2832 regardless of what the constraint says. */
2833 int force_reload = 0;
2834 int offmemok = 0;
2835 /* Nonzero if a constant forced into memory would be OK for this
2836 operand. */
2837 int constmemok = 0;
2838 int earlyclobber = 0;
2839
2840 /* If the predicate accepts a unary operator, it means that
2841 we need to reload the operand, but do not do this for
2842 match_operator and friends. */
2843 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2844 operand = XEXP (operand, 0);
2845
2846 /* If the operand is a SUBREG, extract
2847 the REG or MEM (or maybe even a constant) within.
2848 (Constants can occur as a result of reg_equiv_constant.) */
2849
2850 while (GET_CODE (operand) == SUBREG)
2851 {
2852 /* Offset only matters when operand is a REG and
2853 it is a hard reg. This is because it is passed
2854 to reg_fits_class_p if it is a REG and all pseudos
2855 return 0 from that function. */
2856 if (GET_CODE (SUBREG_REG (operand)) == REG
2857 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2858 {
| 2699 }
2700 else if (code == MEM)
2701 {
2702 address_reloaded[i]
2703 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2704 recog_data.operand_loc[i],
2705 XEXP (recog_data.operand[i], 0),
2706 &XEXP (recog_data.operand[i], 0),
2707 i, address_type[i], ind_levels, insn);
2708 recog_data.operand[i] = *recog_data.operand_loc[i];
2709 substed_operand[i] = recog_data.operand[i];
2710 }
2711 else if (code == SUBREG)
2712 {
2713 rtx reg = SUBREG_REG (recog_data.operand[i]);
2714 rtx op
2715 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2716 ind_levels,
2717 set != 0
2718 && &SET_DEST (set) == recog_data.operand_loc[i],
2719 insn,
2720 &address_reloaded[i]);
2721
2722 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2723 that didn't get a hard register, emit a USE with a REG_EQUAL
2724 note in front so that we might inherit a previous, possibly
2725 wider reload. */
2726
2727 if (replace
2728 && GET_CODE (op) == MEM
2729 && GET_CODE (reg) == REG
2730 && (GET_MODE_SIZE (GET_MODE (reg))
2731 >= GET_MODE_SIZE (GET_MODE (op))))
2732 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2733 insn),
2734 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2735
2736 substed_operand[i] = recog_data.operand[i] = op;
2737 }
2738 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2739 /* We can get a PLUS as an "operand" as a result of register
2740 elimination. See eliminate_regs and gen_reload. We handle
2741 a unary operator by reloading the operand. */
2742 substed_operand[i] = recog_data.operand[i]
2743 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2744 ind_levels, 0, insn,
2745 &address_reloaded[i]);
2746 else if (code == REG)
2747 {
2748 /* This is equivalent to calling find_reloads_toplev.
2749 The code is duplicated for speed.
2750 When we find a pseudo always equivalent to a constant,
2751 we replace it by the constant. We must be sure, however,
2752 that we don't try to replace it in the insn in which it
2753 is being set. */
2754 int regno = REGNO (recog_data.operand[i]);
2755 if (reg_equiv_constant[regno] != 0
2756 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2757 {
2758 /* Record the existing mode so that the check if constants are
2759 allowed will work when operand_mode isn't specified. */
2760
2761 if (operand_mode[i] == VOIDmode)
2762 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2763
2764 substed_operand[i] = recog_data.operand[i]
2765 = reg_equiv_constant[regno];
2766 }
2767 if (reg_equiv_memory_loc[regno] != 0
2768 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2769 /* We need not give a valid is_set_dest argument since the case
2770 of a constant equivalence was checked above. */
2771 substed_operand[i] = recog_data.operand[i]
2772 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2773 ind_levels, 0, insn,
2774 &address_reloaded[i]);
2775 }
2776 /* If the operand is still a register (we didn't replace it with an
2777 equivalent), get the preferred class to reload it into. */
2778 code = GET_CODE (recog_data.operand[i]);
2779 preferred_class[i]
2780 = ((code == REG && REGNO (recog_data.operand[i])
2781 >= FIRST_PSEUDO_REGISTER)
2782 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2783 : NO_REGS);
2784 pref_or_nothing[i]
2785 = (code == REG
2786 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2787 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2788 }
2789
2790 /* If this is simply a copy from operand 1 to operand 0, merge the
2791 preferred classes for the operands. */
2792 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2793 && recog_data.operand[1] == SET_SRC (set))
2794 {
2795 preferred_class[0] = preferred_class[1]
2796 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2797 pref_or_nothing[0] |= pref_or_nothing[1];
2798 pref_or_nothing[1] |= pref_or_nothing[0];
2799 }
2800
2801 /* Now see what we need for pseudo-regs that didn't get hard regs
2802 or got the wrong kind of hard reg. For this, we must consider
2803 all the operands together against the register constraints. */
2804
2805 best = MAX_RECOG_OPERANDS * 2 + 600;
2806
2807 swapped = 0;
2808 goal_alternative_swapped = 0;
2809 try_swapped:
2810
2811 /* The constraints are made of several alternatives.
2812 Each operand's constraint looks like foo,bar,... with commas
2813 separating the alternatives. The first alternatives for all
2814 operands go together, the second alternatives go together, etc.
2815
2816 First loop over alternatives. */
2817
2818 for (this_alternative_number = 0;
2819 this_alternative_number < n_alternatives;
2820 this_alternative_number++)
2821 {
2822 /* Loop over operands for one constraint alternative. */
2823 /* LOSERS counts those that don't fit this alternative
2824 and would require loading. */
2825 int losers = 0;
2826 /* BAD is set to 1 if it some operand can't fit this alternative
2827 even after reloading. */
2828 int bad = 0;
2829 /* REJECT is a count of how undesirable this alternative says it is
2830 if any reloading is required. If the alternative matches exactly
2831 then REJECT is ignored, but otherwise it gets this much
2832 counted against it in addition to the reloading needed. Each
2833 ? counts three times here since we want the disparaging caused by
2834 a bad register class to only count 1/3 as much. */
2835 int reject = 0;
2836
2837 this_earlyclobber = 0;
2838
2839 for (i = 0; i < noperands; i++)
2840 {
2841 char *p = constraints[i];
2842 int win = 0;
2843 int did_match = 0;
2844 /* 0 => this operand can be reloaded somehow for this alternative. */
2845 int badop = 1;
2846 /* 0 => this operand can be reloaded if the alternative allows regs. */
2847 int winreg = 0;
2848 int c;
2849 rtx operand = recog_data.operand[i];
2850 int offset = 0;
2851 /* Nonzero means this is a MEM that must be reloaded into a reg
2852 regardless of what the constraint says. */
2853 int force_reload = 0;
2854 int offmemok = 0;
2855 /* Nonzero if a constant forced into memory would be OK for this
2856 operand. */
2857 int constmemok = 0;
2858 int earlyclobber = 0;
2859
2860 /* If the predicate accepts a unary operator, it means that
2861 we need to reload the operand, but do not do this for
2862 match_operator and friends. */
2863 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2864 operand = XEXP (operand, 0);
2865
2866 /* If the operand is a SUBREG, extract
2867 the REG or MEM (or maybe even a constant) within.
2868 (Constants can occur as a result of reg_equiv_constant.) */
2869
2870 while (GET_CODE (operand) == SUBREG)
2871 {
2872 /* Offset only matters when operand is a REG and
2873 it is a hard reg. This is because it is passed
2874 to reg_fits_class_p if it is a REG and all pseudos
2875 return 0 from that function. */
2876 if (GET_CODE (SUBREG_REG (operand)) == REG
2877 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2878 {
|
| 2879 if (!subreg_offset_representable_p
2880 (REGNO (SUBREG_REG (operand)),
2881 GET_MODE (SUBREG_REG (operand)),
2882 SUBREG_BYTE (operand),
2883 GET_MODE (operand)))
2884 force_reload = 1;
|
2859 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2860 GET_MODE (SUBREG_REG (operand)),
2861 SUBREG_BYTE (operand),
2862 GET_MODE (operand));
2863 }
2864 operand = SUBREG_REG (operand);
2865 /* Force reload if this is a constant or PLUS or if there may
2866 be a problem accessing OPERAND in the outer mode. */
2867 if (CONSTANT_P (operand)
2868 || GET_CODE (operand) == PLUS
2869 /* We must force a reload of paradoxical SUBREGs
2870 of a MEM because the alignment of the inner value
2871 may not be enough to do the outer reference. On
2872 big-endian machines, it may also reference outside
2873 the object.
2874
2875 On machines that extend byte operations and we have a
2876 SUBREG where both the inner and outer modes are no wider
2877 than a word and the inner mode is narrower, is integral,
2878 and gets extended when loaded from memory, combine.c has
2879 made assumptions about the behavior of the machine in such
2880 register access. If the data is, in fact, in memory we
2881 must always load using the size assumed to be in the
2882 register and let the insn do the different-sized
2883 accesses.
2884
2885 This is doubly true if WORD_REGISTER_OPERATIONS. In
2886 this case eliminate_regs has left non-paradoxical
2887 subregs for push_reloads to see. Make sure it does
2888 by forcing the reload.
2889
2890 ??? When is it right at this stage to have a subreg
2891 of a mem that is _not_ to be handled specialy? IMO
2892 those should have been reduced to just a mem. */
2893 || ((GET_CODE (operand) == MEM
2894 || (GET_CODE (operand)== REG
2895 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2896#ifndef WORD_REGISTER_OPERATIONS
2897 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2898 < BIGGEST_ALIGNMENT)
2899 && (GET_MODE_SIZE (operand_mode[i])
2900 > GET_MODE_SIZE (GET_MODE (operand))))
2901 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2902#ifdef LOAD_EXTEND_OP
2903 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2904 && (GET_MODE_SIZE (GET_MODE (operand))
2905 <= UNITS_PER_WORD)
2906 && (GET_MODE_SIZE (operand_mode[i])
2907 > GET_MODE_SIZE (GET_MODE (operand)))
2908 && INTEGRAL_MODE_P (GET_MODE (operand))
2909 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2910#endif
2911 )
2912#endif
2913 )
| 2885 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2886 GET_MODE (SUBREG_REG (operand)),
2887 SUBREG_BYTE (operand),
2888 GET_MODE (operand));
2889 }
2890 operand = SUBREG_REG (operand);
2891 /* Force reload if this is a constant or PLUS or if there may
2892 be a problem accessing OPERAND in the outer mode. */
2893 if (CONSTANT_P (operand)
2894 || GET_CODE (operand) == PLUS
2895 /* We must force a reload of paradoxical SUBREGs
2896 of a MEM because the alignment of the inner value
2897 may not be enough to do the outer reference. On
2898 big-endian machines, it may also reference outside
2899 the object.
2900
2901 On machines that extend byte operations and we have a
2902 SUBREG where both the inner and outer modes are no wider
2903 than a word and the inner mode is narrower, is integral,
2904 and gets extended when loaded from memory, combine.c has
2905 made assumptions about the behavior of the machine in such
2906 register access. If the data is, in fact, in memory we
2907 must always load using the size assumed to be in the
2908 register and let the insn do the different-sized
2909 accesses.
2910
2911 This is doubly true if WORD_REGISTER_OPERATIONS. In
2912 this case eliminate_regs has left non-paradoxical
2913 subregs for push_reloads to see. Make sure it does
2914 by forcing the reload.
2915
2916 ??? When is it right at this stage to have a subreg
2917 of a mem that is _not_ to be handled specialy? IMO
2918 those should have been reduced to just a mem. */
2919 || ((GET_CODE (operand) == MEM
2920 || (GET_CODE (operand)== REG
2921 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2922#ifndef WORD_REGISTER_OPERATIONS
2923 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2924 < BIGGEST_ALIGNMENT)
2925 && (GET_MODE_SIZE (operand_mode[i])
2926 > GET_MODE_SIZE (GET_MODE (operand))))
2927 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2928#ifdef LOAD_EXTEND_OP
2929 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2930 && (GET_MODE_SIZE (GET_MODE (operand))
2931 <= UNITS_PER_WORD)
2932 && (GET_MODE_SIZE (operand_mode[i])
2933 > GET_MODE_SIZE (GET_MODE (operand)))
2934 && INTEGRAL_MODE_P (GET_MODE (operand))
2935 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2936#endif
2937 )
2938#endif
2939 )
|
2914 /* This following hunk of code should no longer be
2915 needed at all with SUBREG_BYTE. If you need this
2916 code back, please explain to me why so I can
2917 fix the real problem. -DaveM */
2918#if 0
2919 /* Subreg of a hard reg which can't handle the subreg's mode
2920 or which would handle that mode in the wrong number of
2921 registers for subregging to work. */
2922 || (GET_CODE (operand) == REG
2923 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2924 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2925 && (GET_MODE_SIZE (GET_MODE (operand))
2926 > UNITS_PER_WORD)
2927 && ((GET_MODE_SIZE (GET_MODE (operand))
2928 / UNITS_PER_WORD)
2929 != HARD_REGNO_NREGS (REGNO (operand),
2930 GET_MODE (operand))))
2931 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2932 operand_mode[i])))
2933#endif
| |
2934 )
2935 force_reload = 1;
2936 }
2937
2938 this_alternative[i] = (int) NO_REGS;
2939 this_alternative_win[i] = 0;
2940 this_alternative_match_win[i] = 0;
2941 this_alternative_offmemok[i] = 0;
2942 this_alternative_earlyclobber[i] = 0;
2943 this_alternative_matches[i] = -1;
2944
2945 /* An empty constraint or empty alternative
2946 allows anything which matched the pattern. */
2947 if (*p == 0 || *p == ',')
2948 win = 1, badop = 0;
2949
2950 /* Scan this alternative's specs for this operand;
2951 set WIN if the operand fits any letter in this alternative.
2952 Otherwise, clear BADOP if this operand could
2953 fit some letter after reloads,
2954 or set WINREG if this operand could fit after reloads
2955 provided the constraint allows some registers. */
2956
2957 while (*p && (c = *p++) != ',')
2958 switch (c)
2959 {
2960 case '=': case '+': case '*':
2961 break;
2962
2963 case '%':
2964 /* The last operand should not be marked commutative. */
2965 if (i != noperands - 1)
2966 commutative = i;
2967 break;
2968
2969 case '?':
2970 reject += 6;
2971 break;
2972
2973 case '!':
2974 reject = 600;
2975 break;
2976
2977 case '#':
2978 /* Ignore rest of this alternative as far as
2979 reloading is concerned. */
2980 while (*p && *p != ',')
2981 p++;
2982 break;
2983
2984 case '0': case '1': case '2': case '3': case '4':
2985 case '5': case '6': case '7': case '8': case '9':
2986 c = strtoul (p - 1, &p, 10);
2987
2988 this_alternative_matches[i] = c;
2989 /* We are supposed to match a previous operand.
2990 If we do, we win if that one did.
2991 If we do not, count both of the operands as losers.
2992 (This is too conservative, since most of the time
2993 only a single reload insn will be needed to make
2994 the two operands win. As a result, this alternative
2995 may be rejected when it is actually desirable.) */
2996 if ((swapped && (c != commutative || i != commutative + 1))
2997 /* If we are matching as if two operands were swapped,
2998 also pretend that operands_match had been computed
2999 with swapped.
3000 But if I is the second of those and C is the first,
3001 don't exchange them, because operands_match is valid
3002 only on one side of its diagonal. */
3003 ? (operands_match
3004 [(c == commutative || c == commutative + 1)
3005 ? 2 * commutative + 1 - c : c]
3006 [(i == commutative || i == commutative + 1)
3007 ? 2 * commutative + 1 - i : i])
3008 : operands_match[c][i])
3009 {
3010 /* If we are matching a non-offsettable address where an
3011 offsettable address was expected, then we must reject
3012 this combination, because we can't reload it. */
3013 if (this_alternative_offmemok[c]
3014 && GET_CODE (recog_data.operand[c]) == MEM
3015 && this_alternative[c] == (int) NO_REGS
3016 && ! this_alternative_win[c])
3017 bad = 1;
3018
3019 did_match = this_alternative_win[c];
3020 }
3021 else
3022 {
3023 /* Operands don't match. */
3024 rtx value;
3025 /* Retroactively mark the operand we had to match
3026 as a loser, if it wasn't already. */
3027 if (this_alternative_win[c])
3028 losers++;
3029 this_alternative_win[c] = 0;
3030 if (this_alternative[c] == (int) NO_REGS)
3031 bad = 1;
3032 /* But count the pair only once in the total badness of
3033 this alternative, if the pair can be a dummy reload. */
3034 value
3035 = find_dummy_reload (recog_data.operand[i],
3036 recog_data.operand[c],
3037 recog_data.operand_loc[i],
3038 recog_data.operand_loc[c],
3039 operand_mode[i], operand_mode[c],
3040 this_alternative[c], -1,
3041 this_alternative_earlyclobber[c]);
3042
3043 if (value != 0)
3044 losers--;
3045 }
3046 /* This can be fixed with reloads if the operand
3047 we are supposed to match can be fixed with reloads. */
3048 badop = 0;
3049 this_alternative[i] = this_alternative[c];
3050
3051 /* If we have to reload this operand and some previous
3052 operand also had to match the same thing as this
3053 operand, we don't know how to do that. So reject this
3054 alternative. */
3055 if (! did_match || force_reload)
3056 for (j = 0; j < i; j++)
3057 if (this_alternative_matches[j]
3058 == this_alternative_matches[i])
3059 badop = 1;
3060 break;
3061
3062 case 'p':
3063 /* All necessary reloads for an address_operand
3064 were handled in find_reloads_address. */
3065 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3066 win = 1;
3067 badop = 0;
3068 break;
3069
3070 case 'm':
3071 if (force_reload)
3072 break;
3073 if (GET_CODE (operand) == MEM
3074 || (GET_CODE (operand) == REG
3075 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3076 && reg_renumber[REGNO (operand)] < 0))
3077 win = 1;
3078 if (CONSTANT_P (operand)
3079 /* force_const_mem does not accept HIGH. */
3080 && GET_CODE (operand) != HIGH)
3081 badop = 0;
3082 constmemok = 1;
3083 break;
3084
3085 case '<':
3086 if (GET_CODE (operand) == MEM
3087 && ! address_reloaded[i]
3088 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3089 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3090 win = 1;
3091 break;
3092
3093 case '>':
3094 if (GET_CODE (operand) == MEM
3095 && ! address_reloaded[i]
3096 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3097 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3098 win = 1;
3099 break;
3100
3101 /* Memory operand whose address is not offsettable. */
3102 case 'V':
3103 if (force_reload)
3104 break;
3105 if (GET_CODE (operand) == MEM
3106 && ! (ind_levels ? offsettable_memref_p (operand)
3107 : offsettable_nonstrict_memref_p (operand))
3108 /* Certain mem addresses will become offsettable
3109 after they themselves are reloaded. This is important;
3110 we don't want our own handling of unoffsettables
3111 to override the handling of reg_equiv_address. */
3112 && !(GET_CODE (XEXP (operand, 0)) == REG
3113 && (ind_levels == 0
3114 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3115 win = 1;
3116 break;
3117
3118 /* Memory operand whose address is offsettable. */
3119 case 'o':
3120 if (force_reload)
3121 break;
3122 if ((GET_CODE (operand) == MEM
3123 /* If IND_LEVELS, find_reloads_address won't reload a
3124 pseudo that didn't get a hard reg, so we have to
3125 reject that case. */
3126 && ((ind_levels ? offsettable_memref_p (operand)
3127 : offsettable_nonstrict_memref_p (operand))
3128 /* A reloaded address is offsettable because it is now
3129 just a simple register indirect. */
3130 || address_reloaded[i]))
3131 || (GET_CODE (operand) == REG
3132 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3133 && reg_renumber[REGNO (operand)] < 0
3134 /* If reg_equiv_address is nonzero, we will be
3135 loading it into a register; hence it will be
3136 offsettable, but we cannot say that reg_equiv_mem
3137 is offsettable without checking. */
3138 && ((reg_equiv_mem[REGNO (operand)] != 0
3139 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3140 || (reg_equiv_address[REGNO (operand)] != 0))))
3141 win = 1;
3142 /* force_const_mem does not accept HIGH. */
3143 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3144 || GET_CODE (operand) == MEM)
3145 badop = 0;
3146 constmemok = 1;
3147 offmemok = 1;
3148 break;
3149
3150 case '&':
3151 /* Output operand that is stored before the need for the
3152 input operands (and their index registers) is over. */
3153 earlyclobber = 1, this_earlyclobber = 1;
3154 break;
3155
3156 case 'E':
| 2940 )
2941 force_reload = 1;
2942 }
2943
2944 this_alternative[i] = (int) NO_REGS;
2945 this_alternative_win[i] = 0;
2946 this_alternative_match_win[i] = 0;
2947 this_alternative_offmemok[i] = 0;
2948 this_alternative_earlyclobber[i] = 0;
2949 this_alternative_matches[i] = -1;
2950
2951 /* An empty constraint or empty alternative
2952 allows anything which matched the pattern. */
2953 if (*p == 0 || *p == ',')
2954 win = 1, badop = 0;
2955
2956 /* Scan this alternative's specs for this operand;
2957 set WIN if the operand fits any letter in this alternative.
2958 Otherwise, clear BADOP if this operand could
2959 fit some letter after reloads,
2960 or set WINREG if this operand could fit after reloads
2961 provided the constraint allows some registers. */
2962
2963 while (*p && (c = *p++) != ',')
2964 switch (c)
2965 {
2966 case '=': case '+': case '*':
2967 break;
2968
2969 case '%':
2970 /* The last operand should not be marked commutative. */
2971 if (i != noperands - 1)
2972 commutative = i;
2973 break;
2974
2975 case '?':
2976 reject += 6;
2977 break;
2978
2979 case '!':
2980 reject = 600;
2981 break;
2982
2983 case '#':
2984 /* Ignore rest of this alternative as far as
2985 reloading is concerned. */
2986 while (*p && *p != ',')
2987 p++;
2988 break;
2989
2990 case '0': case '1': case '2': case '3': case '4':
2991 case '5': case '6': case '7': case '8': case '9':
2992 c = strtoul (p - 1, &p, 10);
2993
2994 this_alternative_matches[i] = c;
2995 /* We are supposed to match a previous operand.
2996 If we do, we win if that one did.
2997 If we do not, count both of the operands as losers.
2998 (This is too conservative, since most of the time
2999 only a single reload insn will be needed to make
3000 the two operands win. As a result, this alternative
3001 may be rejected when it is actually desirable.) */
3002 if ((swapped && (c != commutative || i != commutative + 1))
3003 /* If we are matching as if two operands were swapped,
3004 also pretend that operands_match had been computed
3005 with swapped.
3006 But if I is the second of those and C is the first,
3007 don't exchange them, because operands_match is valid
3008 only on one side of its diagonal. */
3009 ? (operands_match
3010 [(c == commutative || c == commutative + 1)
3011 ? 2 * commutative + 1 - c : c]
3012 [(i == commutative || i == commutative + 1)
3013 ? 2 * commutative + 1 - i : i])
3014 : operands_match[c][i])
3015 {
3016 /* If we are matching a non-offsettable address where an
3017 offsettable address was expected, then we must reject
3018 this combination, because we can't reload it. */
3019 if (this_alternative_offmemok[c]
3020 && GET_CODE (recog_data.operand[c]) == MEM
3021 && this_alternative[c] == (int) NO_REGS
3022 && ! this_alternative_win[c])
3023 bad = 1;
3024
3025 did_match = this_alternative_win[c];
3026 }
3027 else
3028 {
3029 /* Operands don't match. */
3030 rtx value;
3031 /* Retroactively mark the operand we had to match
3032 as a loser, if it wasn't already. */
3033 if (this_alternative_win[c])
3034 losers++;
3035 this_alternative_win[c] = 0;
3036 if (this_alternative[c] == (int) NO_REGS)
3037 bad = 1;
3038 /* But count the pair only once in the total badness of
3039 this alternative, if the pair can be a dummy reload. */
3040 value
3041 = find_dummy_reload (recog_data.operand[i],
3042 recog_data.operand[c],
3043 recog_data.operand_loc[i],
3044 recog_data.operand_loc[c],
3045 operand_mode[i], operand_mode[c],
3046 this_alternative[c], -1,
3047 this_alternative_earlyclobber[c]);
3048
3049 if (value != 0)
3050 losers--;
3051 }
3052 /* This can be fixed with reloads if the operand
3053 we are supposed to match can be fixed with reloads. */
3054 badop = 0;
3055 this_alternative[i] = this_alternative[c];
3056
3057 /* If we have to reload this operand and some previous
3058 operand also had to match the same thing as this
3059 operand, we don't know how to do that. So reject this
3060 alternative. */
3061 if (! did_match || force_reload)
3062 for (j = 0; j < i; j++)
3063 if (this_alternative_matches[j]
3064 == this_alternative_matches[i])
3065 badop = 1;
3066 break;
3067
3068 case 'p':
3069 /* All necessary reloads for an address_operand
3070 were handled in find_reloads_address. */
3071 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3072 win = 1;
3073 badop = 0;
3074 break;
3075
3076 case 'm':
3077 if (force_reload)
3078 break;
3079 if (GET_CODE (operand) == MEM
3080 || (GET_CODE (operand) == REG
3081 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3082 && reg_renumber[REGNO (operand)] < 0))
3083 win = 1;
3084 if (CONSTANT_P (operand)
3085 /* force_const_mem does not accept HIGH. */
3086 && GET_CODE (operand) != HIGH)
3087 badop = 0;
3088 constmemok = 1;
3089 break;
3090
3091 case '<':
3092 if (GET_CODE (operand) == MEM
3093 && ! address_reloaded[i]
3094 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3095 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3096 win = 1;
3097 break;
3098
3099 case '>':
3100 if (GET_CODE (operand) == MEM
3101 && ! address_reloaded[i]
3102 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3103 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3104 win = 1;
3105 break;
3106
3107 /* Memory operand whose address is not offsettable. */
3108 case 'V':
3109 if (force_reload)
3110 break;
3111 if (GET_CODE (operand) == MEM
3112 && ! (ind_levels ? offsettable_memref_p (operand)
3113 : offsettable_nonstrict_memref_p (operand))
3114 /* Certain mem addresses will become offsettable
3115 after they themselves are reloaded. This is important;
3116 we don't want our own handling of unoffsettables
3117 to override the handling of reg_equiv_address. */
3118 && !(GET_CODE (XEXP (operand, 0)) == REG
3119 && (ind_levels == 0
3120 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3121 win = 1;
3122 break;
3123
3124 /* Memory operand whose address is offsettable. */
3125 case 'o':
3126 if (force_reload)
3127 break;
3128 if ((GET_CODE (operand) == MEM
3129 /* If IND_LEVELS, find_reloads_address won't reload a
3130 pseudo that didn't get a hard reg, so we have to
3131 reject that case. */
3132 && ((ind_levels ? offsettable_memref_p (operand)
3133 : offsettable_nonstrict_memref_p (operand))
3134 /* A reloaded address is offsettable because it is now
3135 just a simple register indirect. */
3136 || address_reloaded[i]))
3137 || (GET_CODE (operand) == REG
3138 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3139 && reg_renumber[REGNO (operand)] < 0
3140 /* If reg_equiv_address is nonzero, we will be
3141 loading it into a register; hence it will be
3142 offsettable, but we cannot say that reg_equiv_mem
3143 is offsettable without checking. */
3144 && ((reg_equiv_mem[REGNO (operand)] != 0
3145 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3146 || (reg_equiv_address[REGNO (operand)] != 0))))
3147 win = 1;
3148 /* force_const_mem does not accept HIGH. */
3149 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3150 || GET_CODE (operand) == MEM)
3151 badop = 0;
3152 constmemok = 1;
3153 offmemok = 1;
3154 break;
3155
3156 case '&':
3157 /* Output operand that is stored before the need for the
3158 input operands (and their index registers) is over. */
3159 earlyclobber = 1, this_earlyclobber = 1;
3160 break;
3161
3162 case 'E':
|
3157#ifndef REAL_ARITHMETIC
3158 /* Match any floating double constant, but only if
3159 we can examine the bits of it reliably. */
3160 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3161 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3162 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3163 break;
3164#endif
3165 if (GET_CODE (operand) == CONST_DOUBLE)
3166 win = 1;
3167 break;
3168
| |
3169 case 'F':
| 3163 case 'F':
|
3170 if (GET_CODE (operand) == CONST_DOUBLE)
| 3164 if (GET_CODE (operand) == CONST_DOUBLE
3165 || (GET_CODE (operand) == CONST_VECTOR
3166 && (GET_MODE_CLASS (GET_MODE (operand))
3167 == MODE_VECTOR_FLOAT)))
|
3171 win = 1;
3172 break;
3173
3174 case 'G':
3175 case 'H':
3176 if (GET_CODE (operand) == CONST_DOUBLE
3177 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3178 win = 1;
3179 break;
3180
3181 case 's':
3182 if (GET_CODE (operand) == CONST_INT
3183 || (GET_CODE (operand) == CONST_DOUBLE
3184 && GET_MODE (operand) == VOIDmode))
3185 break;
3186 case 'i':
3187 if (CONSTANT_P (operand)
3188#ifdef LEGITIMATE_PIC_OPERAND_P
3189 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3190#endif
3191 )
3192 win = 1;
3193 break;
3194
3195 case 'n':
3196 if (GET_CODE (operand) == CONST_INT
3197 || (GET_CODE (operand) == CONST_DOUBLE
3198 && GET_MODE (operand) == VOIDmode))
3199 win = 1;
3200 break;
3201
3202 case 'I':
3203 case 'J':
3204 case 'K':
3205 case 'L':
3206 case 'M':
3207 case 'N':
3208 case 'O':
3209 case 'P':
3210 if (GET_CODE (operand) == CONST_INT
3211 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3212 win = 1;
3213 break;
3214
3215 case 'X':
3216 win = 1;
3217 break;
3218
3219 case 'g':
3220 if (! force_reload
3221 /* A PLUS is never a valid operand, but reload can make
3222 it from a register when eliminating registers. */
3223 && GET_CODE (operand) != PLUS
3224 /* A SCRATCH is not a valid operand. */
3225 && GET_CODE (operand) != SCRATCH
3226#ifdef LEGITIMATE_PIC_OPERAND_P
3227 && (! CONSTANT_P (operand)
3228 || ! flag_pic
3229 || LEGITIMATE_PIC_OPERAND_P (operand))
3230#endif
3231 && (GENERAL_REGS == ALL_REGS
3232 || GET_CODE (operand) != REG
3233 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3234 && reg_renumber[REGNO (operand)] < 0)))
3235 win = 1;
3236 /* Drop through into 'r' case. */
3237
3238 case 'r':
3239 this_alternative[i]
3240 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3241 goto reg;
3242
3243 default:
3244 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3245 {
3246#ifdef EXTRA_CONSTRAINT
| 3168 win = 1;
3169 break;
3170
3171 case 'G':
3172 case 'H':
3173 if (GET_CODE (operand) == CONST_DOUBLE
3174 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3175 win = 1;
3176 break;
3177
3178 case 's':
3179 if (GET_CODE (operand) == CONST_INT
3180 || (GET_CODE (operand) == CONST_DOUBLE
3181 && GET_MODE (operand) == VOIDmode))
3182 break;
3183 case 'i':
3184 if (CONSTANT_P (operand)
3185#ifdef LEGITIMATE_PIC_OPERAND_P
3186 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3187#endif
3188 )
3189 win = 1;
3190 break;
3191
3192 case 'n':
3193 if (GET_CODE (operand) == CONST_INT
3194 || (GET_CODE (operand) == CONST_DOUBLE
3195 && GET_MODE (operand) == VOIDmode))
3196 win = 1;
3197 break;
3198
3199 case 'I':
3200 case 'J':
3201 case 'K':
3202 case 'L':
3203 case 'M':
3204 case 'N':
3205 case 'O':
3206 case 'P':
3207 if (GET_CODE (operand) == CONST_INT
3208 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3209 win = 1;
3210 break;
3211
3212 case 'X':
3213 win = 1;
3214 break;
3215
3216 case 'g':
3217 if (! force_reload
3218 /* A PLUS is never a valid operand, but reload can make
3219 it from a register when eliminating registers. */
3220 && GET_CODE (operand) != PLUS
3221 /* A SCRATCH is not a valid operand. */
3222 && GET_CODE (operand) != SCRATCH
3223#ifdef LEGITIMATE_PIC_OPERAND_P
3224 && (! CONSTANT_P (operand)
3225 || ! flag_pic
3226 || LEGITIMATE_PIC_OPERAND_P (operand))
3227#endif
3228 && (GENERAL_REGS == ALL_REGS
3229 || GET_CODE (operand) != REG
3230 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3231 && reg_renumber[REGNO (operand)] < 0)))
3232 win = 1;
3233 /* Drop through into 'r' case. */
3234
3235 case 'r':
3236 this_alternative[i]
3237 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3238 goto reg;
3239
3240 default:
3241 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3242 {
3243#ifdef EXTRA_CONSTRAINT
|
| 3244 if (EXTRA_MEMORY_CONSTRAINT (c))
3245 {
3246 if (force_reload)
3247 break;
3248 if (EXTRA_CONSTRAINT (operand, c))
3249 win = 1;
3250 /* If the address was already reloaded,
3251 we win as well. */
3252 if (GET_CODE (operand) == MEM && address_reloaded[i])
3253 win = 1;
3254 /* Likewise if the address will be reloaded because
3255 reg_equiv_address is nonzero. For reg_equiv_mem
3256 we have to check. */
3257 if (GET_CODE (operand) == REG
3258 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3259 && reg_renumber[REGNO (operand)] < 0
3260 && ((reg_equiv_mem[REGNO (operand)] != 0
3261 && EXTRA_CONSTRAINT (reg_equiv_mem[REGNO (operand)], c))
3262 || (reg_equiv_address[REGNO (operand)] != 0)))
3263 win = 1;
3264
3265 /* If we didn't already win, we can reload
3266 constants via force_const_mem, and other
3267 MEMs by reloading the address like for 'o'. */
3268 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3269 || GET_CODE (operand) == MEM)
3270 badop = 0;
3271 constmemok = 1;
3272 offmemok = 1;
3273 break;
3274 }
3275 if (EXTRA_ADDRESS_CONSTRAINT (c))
3276 {
3277 if (EXTRA_CONSTRAINT (operand, c))
3278 win = 1;
3279
3280 /* If we didn't already win, we can reload
3281 the address into a base register. */
3282 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3283 badop = 0;
3284 break;
3285 }
3286
|
3247 if (EXTRA_CONSTRAINT (operand, c))
3248 win = 1;
3249#endif
3250 break;
3251 }
3252
3253 this_alternative[i]
3254 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3255 reg:
3256 if (GET_MODE (operand) == BLKmode)
3257 break;
3258 winreg = 1;
3259 if (GET_CODE (operand) == REG
3260 && reg_fits_class_p (operand, this_alternative[i],
3261 offset, GET_MODE (recog_data.operand[i])))
3262 win = 1;
3263 break;
3264 }
3265
3266 constraints[i] = p;
3267
3268 /* If this operand could be handled with a reg,
3269 and some reg is allowed, then this operand can be handled. */
3270 if (winreg && this_alternative[i] != (int) NO_REGS)
3271 badop = 0;
3272
3273 /* Record which operands fit this alternative. */
3274 this_alternative_earlyclobber[i] = earlyclobber;
3275 if (win && ! force_reload)
3276 this_alternative_win[i] = 1;
3277 else if (did_match && ! force_reload)
3278 this_alternative_match_win[i] = 1;
3279 else
3280 {
3281 int const_to_mem = 0;
3282
3283 this_alternative_offmemok[i] = offmemok;
3284 losers++;
3285 if (badop)
3286 bad = 1;
3287 /* Alternative loses if it has no regs for a reg operand. */
3288 if (GET_CODE (operand) == REG
3289 && this_alternative[i] == (int) NO_REGS
3290 && this_alternative_matches[i] < 0)
3291 bad = 1;
3292
3293 /* If this is a constant that is reloaded into the desired
3294 class by copying it to memory first, count that as another
3295 reload. This is consistent with other code and is
3296 required to avoid choosing another alternative when
3297 the constant is moved into memory by this function on
3298 an early reload pass. Note that the test here is
3299 precisely the same as in the code below that calls
3300 force_const_mem. */
3301 if (CONSTANT_P (operand)
3302 /* force_const_mem does not accept HIGH. */
3303 && GET_CODE (operand) != HIGH
3304 && ((PREFERRED_RELOAD_CLASS (operand,
3305 (enum reg_class) this_alternative[i])
3306 == NO_REGS)
3307 || no_input_reloads)
3308 && operand_mode[i] != VOIDmode)
3309 {
3310 const_to_mem = 1;
3311 if (this_alternative[i] != (int) NO_REGS)
3312 losers++;
3313 }
3314
3315 /* If we can't reload this value at all, reject this
3316 alternative. Note that we could also lose due to
3317 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3318 here. */
3319
3320 if (! CONSTANT_P (operand)
3321 && (enum reg_class) this_alternative[i] != NO_REGS
3322 && (PREFERRED_RELOAD_CLASS (operand,
3323 (enum reg_class) this_alternative[i])
3324 == NO_REGS))
3325 bad = 1;
3326
3327 /* Alternative loses if it requires a type of reload not
3328 permitted for this insn. We can always reload SCRATCH
3329 and objects with a REG_UNUSED note. */
3330 else if (GET_CODE (operand) != SCRATCH
3331 && modified[i] != RELOAD_READ && no_output_reloads
3332 && ! find_reg_note (insn, REG_UNUSED, operand))
3333 bad = 1;
3334 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3335 && ! const_to_mem)
3336 bad = 1;
3337
3338 /* We prefer to reload pseudos over reloading other things,
3339 since such reloads may be able to be eliminated later.
3340 If we are reloading a SCRATCH, we won't be generating any
3341 insns, just using a register, so it is also preferred.
3342 So bump REJECT in other cases. Don't do this in the
3343 case where we are forcing a constant into memory and
3344 it will then win since we don't want to have a different
3345 alternative match then. */
3346 if (! (GET_CODE (operand) == REG
3347 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3348 && GET_CODE (operand) != SCRATCH
3349 && ! (const_to_mem && constmemok))
3350 reject += 2;
3351
3352 /* Input reloads can be inherited more often than output
3353 reloads can be removed, so penalize output reloads. */
3354 if (operand_type[i] != RELOAD_FOR_INPUT
3355 && GET_CODE (operand) != SCRATCH)
3356 reject++;
3357 }
3358
3359 /* If this operand is a pseudo register that didn't get a hard
3360 reg and this alternative accepts some register, see if the
3361 class that we want is a subset of the preferred class for this
3362 register. If not, but it intersects that class, use the
3363 preferred class instead. If it does not intersect the preferred
3364 class, show that usage of this alternative should be discouraged;
3365 it will be discouraged more still if the register is `preferred
3366 or nothing'. We do this because it increases the chance of
3367 reusing our spill register in a later insn and avoiding a pair
3368 of memory stores and loads.
3369
3370 Don't bother with this if this alternative will accept this
3371 operand.
3372
3373 Don't do this for a multiword operand, since it is only a
3374 small win and has the risk of requiring more spill registers,
3375 which could cause a large loss.
3376
3377 Don't do this if the preferred class has only one register
3378 because we might otherwise exhaust the class. */
3379
3380 if (! win && ! did_match
3381 && this_alternative[i] != (int) NO_REGS
3382 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3383 && reg_class_size[(int) preferred_class[i]] > 1)
3384 {
3385 if (! reg_class_subset_p (this_alternative[i],
3386 preferred_class[i]))
3387 {
3388 /* Since we don't have a way of forming the intersection,
3389 we just do something special if the preferred class
3390 is a subset of the class we have; that's the most
3391 common case anyway. */
3392 if (reg_class_subset_p (preferred_class[i],
3393 this_alternative[i]))
3394 this_alternative[i] = (int) preferred_class[i];
3395 else
3396 reject += (2 + 2 * pref_or_nothing[i]);
3397 }
3398 }
3399 }
3400
3401 /* Now see if any output operands that are marked "earlyclobber"
3402 in this alternative conflict with any input operands
3403 or any memory addresses. */
3404
3405 for (i = 0; i < noperands; i++)
3406 if (this_alternative_earlyclobber[i]
3407 && (this_alternative_win[i] || this_alternative_match_win[i]))
3408 {
3409 struct decomposition early_data;
3410
3411 early_data = decompose (recog_data.operand[i]);
3412
3413 if (modified[i] == RELOAD_READ)
3414 abort ();
3415
3416 if (this_alternative[i] == NO_REGS)
3417 {
3418 this_alternative_earlyclobber[i] = 0;
3419 if (this_insn_is_asm)
3420 error_for_asm (this_insn,
3421 "`&' constraint used with no register class");
3422 else
3423 abort ();
3424 }
3425
3426 for (j = 0; j < noperands; j++)
3427 /* Is this an input operand or a memory ref? */
3428 if ((GET_CODE (recog_data.operand[j]) == MEM
3429 || modified[j] != RELOAD_WRITE)
3430 && j != i
3431 /* Ignore things like match_operator operands. */
3432 && *recog_data.constraints[j] != 0
3433 /* Don't count an input operand that is constrained to match
3434 the early clobber operand. */
3435 && ! (this_alternative_matches[j] == i
3436 && rtx_equal_p (recog_data.operand[i],
3437 recog_data.operand[j]))
3438 /* Is it altered by storing the earlyclobber operand? */
3439 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3440 early_data))
3441 {
3442 /* If the output is in a single-reg class,
3443 it's costly to reload it, so reload the input instead. */
3444 if (reg_class_size[this_alternative[i]] == 1
3445 && (GET_CODE (recog_data.operand[j]) == REG
3446 || GET_CODE (recog_data.operand[j]) == SUBREG))
3447 {
3448 losers++;
3449 this_alternative_win[j] = 0;
3450 this_alternative_match_win[j] = 0;
3451 }
3452 else
3453 break;
3454 }
3455 /* If an earlyclobber operand conflicts with something,
3456 it must be reloaded, so request this and count the cost. */
3457 if (j != noperands)
3458 {
3459 losers++;
3460 this_alternative_win[i] = 0;
3461 this_alternative_match_win[j] = 0;
3462 for (j = 0; j < noperands; j++)
3463 if (this_alternative_matches[j] == i
3464 && this_alternative_match_win[j])
3465 {
3466 this_alternative_win[j] = 0;
3467 this_alternative_match_win[j] = 0;
3468 losers++;
3469 }
3470 }
3471 }
3472
3473 /* If one alternative accepts all the operands, no reload required,
3474 choose that alternative; don't consider the remaining ones. */
3475 if (losers == 0)
3476 {
3477 /* Unswap these so that they are never swapped at `finish'. */
3478 if (commutative >= 0)
3479 {
3480 recog_data.operand[commutative] = substed_operand[commutative];
3481 recog_data.operand[commutative + 1]
3482 = substed_operand[commutative + 1];
3483 }
3484 for (i = 0; i < noperands; i++)
3485 {
3486 goal_alternative_win[i] = this_alternative_win[i];
3487 goal_alternative_match_win[i] = this_alternative_match_win[i];
3488 goal_alternative[i] = this_alternative[i];
3489 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3490 goal_alternative_matches[i] = this_alternative_matches[i];
3491 goal_alternative_earlyclobber[i]
3492 = this_alternative_earlyclobber[i];
3493 }
3494 goal_alternative_number = this_alternative_number;
3495 goal_alternative_swapped = swapped;
3496 goal_earlyclobber = this_earlyclobber;
3497 goto finish;
3498 }
3499
3500 /* REJECT, set by the ! and ? constraint characters and when a register
3501 would be reloaded into a non-preferred class, discourages the use of
3502 this alternative for a reload goal. REJECT is incremented by six
3503 for each ? and two for each non-preferred class. */
3504 losers = losers * 6 + reject;
3505
3506 /* If this alternative can be made to work by reloading,
3507 and it needs less reloading than the others checked so far,
3508 record it as the chosen goal for reloading. */
3509 if (! bad && best > losers)
3510 {
3511 for (i = 0; i < noperands; i++)
3512 {
3513 goal_alternative[i] = this_alternative[i];
3514 goal_alternative_win[i] = this_alternative_win[i];
3515 goal_alternative_match_win[i] = this_alternative_match_win[i];
3516 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3517 goal_alternative_matches[i] = this_alternative_matches[i];
3518 goal_alternative_earlyclobber[i]
3519 = this_alternative_earlyclobber[i];
3520 }
3521 goal_alternative_swapped = swapped;
3522 best = losers;
3523 goal_alternative_number = this_alternative_number;
3524 goal_earlyclobber = this_earlyclobber;
3525 }
3526 }
3527
3528 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3529 then we need to try each alternative twice,
3530 the second time matching those two operands
3531 as if we had exchanged them.
3532 To do this, really exchange them in operands.
3533
3534 If we have just tried the alternatives the second time,
3535 return operands to normal and drop through. */
3536
3537 if (commutative >= 0)
3538 {
3539 swapped = !swapped;
3540 if (swapped)
3541 {
3542 enum reg_class tclass;
3543 int t;
3544
3545 recog_data.operand[commutative] = substed_operand[commutative + 1];
3546 recog_data.operand[commutative + 1] = substed_operand[commutative];
3547 /* Swap the duplicates too. */
3548 for (i = 0; i < recog_data.n_dups; i++)
3549 if (recog_data.dup_num[i] == commutative
3550 || recog_data.dup_num[i] == commutative + 1)
3551 *recog_data.dup_loc[i]
3552 = recog_data.operand[(int) recog_data.dup_num[i]];
3553
3554 tclass = preferred_class[commutative];
3555 preferred_class[commutative] = preferred_class[commutative + 1];
3556 preferred_class[commutative + 1] = tclass;
3557
3558 t = pref_or_nothing[commutative];
3559 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3560 pref_or_nothing[commutative + 1] = t;
3561
3562 memcpy (constraints, recog_data.constraints,
3563 noperands * sizeof (char *));
3564 goto try_swapped;
3565 }
3566 else
3567 {
3568 recog_data.operand[commutative] = substed_operand[commutative];
3569 recog_data.operand[commutative + 1]
3570 = substed_operand[commutative + 1];
3571 /* Unswap the duplicates too. */
3572 for (i = 0; i < recog_data.n_dups; i++)
3573 if (recog_data.dup_num[i] == commutative
3574 || recog_data.dup_num[i] == commutative + 1)
3575 *recog_data.dup_loc[i]
3576 = recog_data.operand[(int) recog_data.dup_num[i]];
3577 }
3578 }
3579
3580 /* The operands don't meet the constraints.
3581 goal_alternative describes the alternative
3582 that we could reach by reloading the fewest operands.
3583 Reload so as to fit it. */
3584
3585 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3586 {
3587 /* No alternative works with reloads?? */
3588 if (insn_code_number >= 0)
3589 fatal_insn ("unable to generate reloads for:", insn);
3590 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3591 /* Avoid further trouble with this insn. */
3592 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3593 n_reloads = 0;
3594 return 0;
3595 }
3596
3597 /* Jump to `finish' from above if all operands are valid already.
3598 In that case, goal_alternative_win is all 1. */
3599 finish:
3600
3601 /* Right now, for any pair of operands I and J that are required to match,
3602 with I < J,
3603 goal_alternative_matches[J] is I.
3604 Set up goal_alternative_matched as the inverse function:
3605 goal_alternative_matched[I] = J. */
3606
3607 for (i = 0; i < noperands; i++)
3608 goal_alternative_matched[i] = -1;
| 3287 if (EXTRA_CONSTRAINT (operand, c))
3288 win = 1;
3289#endif
3290 break;
3291 }
3292
3293 this_alternative[i]
3294 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3295 reg:
3296 if (GET_MODE (operand) == BLKmode)
3297 break;
3298 winreg = 1;
3299 if (GET_CODE (operand) == REG
3300 && reg_fits_class_p (operand, this_alternative[i],
3301 offset, GET_MODE (recog_data.operand[i])))
3302 win = 1;
3303 break;
3304 }
3305
3306 constraints[i] = p;
3307
3308 /* If this operand could be handled with a reg,
3309 and some reg is allowed, then this operand can be handled. */
3310 if (winreg && this_alternative[i] != (int) NO_REGS)
3311 badop = 0;
3312
3313 /* Record which operands fit this alternative. */
3314 this_alternative_earlyclobber[i] = earlyclobber;
3315 if (win && ! force_reload)
3316 this_alternative_win[i] = 1;
3317 else if (did_match && ! force_reload)
3318 this_alternative_match_win[i] = 1;
3319 else
3320 {
3321 int const_to_mem = 0;
3322
3323 this_alternative_offmemok[i] = offmemok;
3324 losers++;
3325 if (badop)
3326 bad = 1;
3327 /* Alternative loses if it has no regs for a reg operand. */
3328 if (GET_CODE (operand) == REG
3329 && this_alternative[i] == (int) NO_REGS
3330 && this_alternative_matches[i] < 0)
3331 bad = 1;
3332
3333 /* If this is a constant that is reloaded into the desired
3334 class by copying it to memory first, count that as another
3335 reload. This is consistent with other code and is
3336 required to avoid choosing another alternative when
3337 the constant is moved into memory by this function on
3338 an early reload pass. Note that the test here is
3339 precisely the same as in the code below that calls
3340 force_const_mem. */
3341 if (CONSTANT_P (operand)
3342 /* force_const_mem does not accept HIGH. */
3343 && GET_CODE (operand) != HIGH
3344 && ((PREFERRED_RELOAD_CLASS (operand,
3345 (enum reg_class) this_alternative[i])
3346 == NO_REGS)
3347 || no_input_reloads)
3348 && operand_mode[i] != VOIDmode)
3349 {
3350 const_to_mem = 1;
3351 if (this_alternative[i] != (int) NO_REGS)
3352 losers++;
3353 }
3354
3355 /* If we can't reload this value at all, reject this
3356 alternative. Note that we could also lose due to
3357 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3358 here. */
3359
3360 if (! CONSTANT_P (operand)
3361 && (enum reg_class) this_alternative[i] != NO_REGS
3362 && (PREFERRED_RELOAD_CLASS (operand,
3363 (enum reg_class) this_alternative[i])
3364 == NO_REGS))
3365 bad = 1;
3366
3367 /* Alternative loses if it requires a type of reload not
3368 permitted for this insn. We can always reload SCRATCH
3369 and objects with a REG_UNUSED note. */
3370 else if (GET_CODE (operand) != SCRATCH
3371 && modified[i] != RELOAD_READ && no_output_reloads
3372 && ! find_reg_note (insn, REG_UNUSED, operand))
3373 bad = 1;
3374 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3375 && ! const_to_mem)
3376 bad = 1;
3377
3378 /* We prefer to reload pseudos over reloading other things,
3379 since such reloads may be able to be eliminated later.
3380 If we are reloading a SCRATCH, we won't be generating any
3381 insns, just using a register, so it is also preferred.
3382 So bump REJECT in other cases. Don't do this in the
3383 case where we are forcing a constant into memory and
3384 it will then win since we don't want to have a different
3385 alternative match then. */
3386 if (! (GET_CODE (operand) == REG
3387 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3388 && GET_CODE (operand) != SCRATCH
3389 && ! (const_to_mem && constmemok))
3390 reject += 2;
3391
3392 /* Input reloads can be inherited more often than output
3393 reloads can be removed, so penalize output reloads. */
3394 if (operand_type[i] != RELOAD_FOR_INPUT
3395 && GET_CODE (operand) != SCRATCH)
3396 reject++;
3397 }
3398
3399 /* If this operand is a pseudo register that didn't get a hard
3400 reg and this alternative accepts some register, see if the
3401 class that we want is a subset of the preferred class for this
3402 register. If not, but it intersects that class, use the
3403 preferred class instead. If it does not intersect the preferred
3404 class, show that usage of this alternative should be discouraged;
3405 it will be discouraged more still if the register is `preferred
3406 or nothing'. We do this because it increases the chance of
3407 reusing our spill register in a later insn and avoiding a pair
3408 of memory stores and loads.
3409
3410 Don't bother with this if this alternative will accept this
3411 operand.
3412
3413 Don't do this for a multiword operand, since it is only a
3414 small win and has the risk of requiring more spill registers,
3415 which could cause a large loss.
3416
3417 Don't do this if the preferred class has only one register
3418 because we might otherwise exhaust the class. */
3419
3420 if (! win && ! did_match
3421 && this_alternative[i] != (int) NO_REGS
3422 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3423 && reg_class_size[(int) preferred_class[i]] > 1)
3424 {
3425 if (! reg_class_subset_p (this_alternative[i],
3426 preferred_class[i]))
3427 {
3428 /* Since we don't have a way of forming the intersection,
3429 we just do something special if the preferred class
3430 is a subset of the class we have; that's the most
3431 common case anyway. */
3432 if (reg_class_subset_p (preferred_class[i],
3433 this_alternative[i]))
3434 this_alternative[i] = (int) preferred_class[i];
3435 else
3436 reject += (2 + 2 * pref_or_nothing[i]);
3437 }
3438 }
3439 }
3440
3441 /* Now see if any output operands that are marked "earlyclobber"
3442 in this alternative conflict with any input operands
3443 or any memory addresses. */
3444
3445 for (i = 0; i < noperands; i++)
3446 if (this_alternative_earlyclobber[i]
3447 && (this_alternative_win[i] || this_alternative_match_win[i]))
3448 {
3449 struct decomposition early_data;
3450
3451 early_data = decompose (recog_data.operand[i]);
3452
3453 if (modified[i] == RELOAD_READ)
3454 abort ();
3455
3456 if (this_alternative[i] == NO_REGS)
3457 {
3458 this_alternative_earlyclobber[i] = 0;
3459 if (this_insn_is_asm)
3460 error_for_asm (this_insn,
3461 "`&' constraint used with no register class");
3462 else
3463 abort ();
3464 }
3465
3466 for (j = 0; j < noperands; j++)
3467 /* Is this an input operand or a memory ref? */
3468 if ((GET_CODE (recog_data.operand[j]) == MEM
3469 || modified[j] != RELOAD_WRITE)
3470 && j != i
3471 /* Ignore things like match_operator operands. */
3472 && *recog_data.constraints[j] != 0
3473 /* Don't count an input operand that is constrained to match
3474 the early clobber operand. */
3475 && ! (this_alternative_matches[j] == i
3476 && rtx_equal_p (recog_data.operand[i],
3477 recog_data.operand[j]))
3478 /* Is it altered by storing the earlyclobber operand? */
3479 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3480 early_data))
3481 {
3482 /* If the output is in a single-reg class,
3483 it's costly to reload it, so reload the input instead. */
3484 if (reg_class_size[this_alternative[i]] == 1
3485 && (GET_CODE (recog_data.operand[j]) == REG
3486 || GET_CODE (recog_data.operand[j]) == SUBREG))
3487 {
3488 losers++;
3489 this_alternative_win[j] = 0;
3490 this_alternative_match_win[j] = 0;
3491 }
3492 else
3493 break;
3494 }
3495 /* If an earlyclobber operand conflicts with something,
3496 it must be reloaded, so request this and count the cost. */
3497 if (j != noperands)
3498 {
3499 losers++;
3500 this_alternative_win[i] = 0;
3501 this_alternative_match_win[j] = 0;
3502 for (j = 0; j < noperands; j++)
3503 if (this_alternative_matches[j] == i
3504 && this_alternative_match_win[j])
3505 {
3506 this_alternative_win[j] = 0;
3507 this_alternative_match_win[j] = 0;
3508 losers++;
3509 }
3510 }
3511 }
3512
3513 /* If one alternative accepts all the operands, no reload required,
3514 choose that alternative; don't consider the remaining ones. */
3515 if (losers == 0)
3516 {
3517 /* Unswap these so that they are never swapped at `finish'. */
3518 if (commutative >= 0)
3519 {
3520 recog_data.operand[commutative] = substed_operand[commutative];
3521 recog_data.operand[commutative + 1]
3522 = substed_operand[commutative + 1];
3523 }
3524 for (i = 0; i < noperands; i++)
3525 {
3526 goal_alternative_win[i] = this_alternative_win[i];
3527 goal_alternative_match_win[i] = this_alternative_match_win[i];
3528 goal_alternative[i] = this_alternative[i];
3529 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3530 goal_alternative_matches[i] = this_alternative_matches[i];
3531 goal_alternative_earlyclobber[i]
3532 = this_alternative_earlyclobber[i];
3533 }
3534 goal_alternative_number = this_alternative_number;
3535 goal_alternative_swapped = swapped;
3536 goal_earlyclobber = this_earlyclobber;
3537 goto finish;
3538 }
3539
3540 /* REJECT, set by the ! and ? constraint characters and when a register
3541 would be reloaded into a non-preferred class, discourages the use of
3542 this alternative for a reload goal. REJECT is incremented by six
3543 for each ? and two for each non-preferred class. */
3544 losers = losers * 6 + reject;
3545
3546 /* If this alternative can be made to work by reloading,
3547 and it needs less reloading than the others checked so far,
3548 record it as the chosen goal for reloading. */
3549 if (! bad && best > losers)
3550 {
3551 for (i = 0; i < noperands; i++)
3552 {
3553 goal_alternative[i] = this_alternative[i];
3554 goal_alternative_win[i] = this_alternative_win[i];
3555 goal_alternative_match_win[i] = this_alternative_match_win[i];
3556 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3557 goal_alternative_matches[i] = this_alternative_matches[i];
3558 goal_alternative_earlyclobber[i]
3559 = this_alternative_earlyclobber[i];
3560 }
3561 goal_alternative_swapped = swapped;
3562 best = losers;
3563 goal_alternative_number = this_alternative_number;
3564 goal_earlyclobber = this_earlyclobber;
3565 }
3566 }
3567
3568 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3569 then we need to try each alternative twice,
3570 the second time matching those two operands
3571 as if we had exchanged them.
3572 To do this, really exchange them in operands.
3573
3574 If we have just tried the alternatives the second time,
3575 return operands to normal and drop through. */
3576
3577 if (commutative >= 0)
3578 {
3579 swapped = !swapped;
3580 if (swapped)
3581 {
3582 enum reg_class tclass;
3583 int t;
3584
3585 recog_data.operand[commutative] = substed_operand[commutative + 1];
3586 recog_data.operand[commutative + 1] = substed_operand[commutative];
3587 /* Swap the duplicates too. */
3588 for (i = 0; i < recog_data.n_dups; i++)
3589 if (recog_data.dup_num[i] == commutative
3590 || recog_data.dup_num[i] == commutative + 1)
3591 *recog_data.dup_loc[i]
3592 = recog_data.operand[(int) recog_data.dup_num[i]];
3593
3594 tclass = preferred_class[commutative];
3595 preferred_class[commutative] = preferred_class[commutative + 1];
3596 preferred_class[commutative + 1] = tclass;
3597
3598 t = pref_or_nothing[commutative];
3599 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3600 pref_or_nothing[commutative + 1] = t;
3601
3602 memcpy (constraints, recog_data.constraints,
3603 noperands * sizeof (char *));
3604 goto try_swapped;
3605 }
3606 else
3607 {
3608 recog_data.operand[commutative] = substed_operand[commutative];
3609 recog_data.operand[commutative + 1]
3610 = substed_operand[commutative + 1];
3611 /* Unswap the duplicates too. */
3612 for (i = 0; i < recog_data.n_dups; i++)
3613 if (recog_data.dup_num[i] == commutative
3614 || recog_data.dup_num[i] == commutative + 1)
3615 *recog_data.dup_loc[i]
3616 = recog_data.operand[(int) recog_data.dup_num[i]];
3617 }
3618 }
3619
3620 /* The operands don't meet the constraints.
3621 goal_alternative describes the alternative
3622 that we could reach by reloading the fewest operands.
3623 Reload so as to fit it. */
3624
3625 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3626 {
3627 /* No alternative works with reloads?? */
3628 if (insn_code_number >= 0)
3629 fatal_insn ("unable to generate reloads for:", insn);
3630 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3631 /* Avoid further trouble with this insn. */
3632 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3633 n_reloads = 0;
3634 return 0;
3635 }
3636
3637 /* Jump to `finish' from above if all operands are valid already.
3638 In that case, goal_alternative_win is all 1. */
3639 finish:
3640
3641 /* Right now, for any pair of operands I and J that are required to match,
3642 with I < J,
3643 goal_alternative_matches[J] is I.
3644 Set up goal_alternative_matched as the inverse function:
3645 goal_alternative_matched[I] = J. */
3646
3647 for (i = 0; i < noperands; i++)
3648 goal_alternative_matched[i] = -1;
|
3609
| 3649
|
3610 for (i = 0; i < noperands; i++)
3611 if (! goal_alternative_win[i]
3612 && goal_alternative_matches[i] >= 0)
3613 goal_alternative_matched[goal_alternative_matches[i]] = i;
3614
3615 for (i = 0; i < noperands; i++)
3616 goal_alternative_win[i] |= goal_alternative_match_win[i];
3617
3618 /* If the best alternative is with operands 1 and 2 swapped,
3619 consider them swapped before reporting the reloads. Update the
3620 operand numbers of any reloads already pushed. */
3621
3622 if (goal_alternative_swapped)
3623 {
3624 rtx tem;
3625
3626 tem = substed_operand[commutative];
3627 substed_operand[commutative] = substed_operand[commutative + 1];
3628 substed_operand[commutative + 1] = tem;
3629 tem = recog_data.operand[commutative];
3630 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3631 recog_data.operand[commutative + 1] = tem;
3632 tem = *recog_data.operand_loc[commutative];
3633 *recog_data.operand_loc[commutative]
3634 = *recog_data.operand_loc[commutative + 1];
3635 *recog_data.operand_loc[commutative + 1] = tem;
3636
3637 for (i = 0; i < n_reloads; i++)
3638 {
3639 if (rld[i].opnum == commutative)
3640 rld[i].opnum = commutative + 1;
3641 else if (rld[i].opnum == commutative + 1)
3642 rld[i].opnum = commutative;
3643 }
3644 }
3645
3646 for (i = 0; i < noperands; i++)
3647 {
3648 operand_reloadnum[i] = -1;
3649
3650 /* If this is an earlyclobber operand, we need to widen the scope.
3651 The reload must remain valid from the start of the insn being
3652 reloaded until after the operand is stored into its destination.
3653 We approximate this with RELOAD_OTHER even though we know that we
3654 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3655
3656 One special case that is worth checking is when we have an
3657 output that is earlyclobber but isn't used past the insn (typically
3658 a SCRATCH). In this case, we only need have the reload live
3659 through the insn itself, but not for any of our input or output
3660 reloads.
3661 But we must not accidentally narrow the scope of an existing
3662 RELOAD_OTHER reload - leave these alone.
3663
3664 In any case, anything needed to address this operand can remain
3665 however they were previously categorized. */
3666
3667 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3668 operand_type[i]
3669 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3670 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3671 }
3672
3673 /* Any constants that aren't allowed and can't be reloaded
3674 into registers are here changed into memory references. */
3675 for (i = 0; i < noperands; i++)
3676 if (! goal_alternative_win[i]
3677 && CONSTANT_P (recog_data.operand[i])
3678 /* force_const_mem does not accept HIGH. */
3679 && GET_CODE (recog_data.operand[i]) != HIGH
3680 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3681 (enum reg_class) goal_alternative[i])
3682 == NO_REGS)
3683 || no_input_reloads)
3684 && operand_mode[i] != VOIDmode)
3685 {
3686 substed_operand[i] = recog_data.operand[i]
3687 = find_reloads_toplev (force_const_mem (operand_mode[i],
3688 recog_data.operand[i]),
3689 i, address_type[i], ind_levels, 0, insn,
3690 NULL);
3691 if (alternative_allows_memconst (recog_data.constraints[i],
3692 goal_alternative_number))
3693 goal_alternative_win[i] = 1;
3694 }
3695
3696 /* Record the values of the earlyclobber operands for the caller. */
3697 if (goal_earlyclobber)
3698 for (i = 0; i < noperands; i++)
3699 if (goal_alternative_earlyclobber[i])
3700 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3701
3702 /* Now record reloads for all the operands that need them. */
3703 for (i = 0; i < noperands; i++)
3704 if (! goal_alternative_win[i])
3705 {
3706 /* Operands that match previous ones have already been handled. */
3707 if (goal_alternative_matches[i] >= 0)
3708 ;
3709 /* Handle an operand with a nonoffsettable address
3710 appearing where an offsettable address will do
3711 by reloading the address into a base register.
3712
3713 ??? We can also do this when the operand is a register and
3714 reg_equiv_mem is not offsettable, but this is a bit tricky,
3715 so we don't bother with it. It may not be worth doing. */
3716 else if (goal_alternative_matched[i] == -1
3717 && goal_alternative_offmemok[i]
3718 && GET_CODE (recog_data.operand[i]) == MEM)
3719 {
3720 operand_reloadnum[i]
3721 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3722 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3723 MODE_BASE_REG_CLASS (VOIDmode),
3724 GET_MODE (XEXP (recog_data.operand[i], 0)),
3725 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3726 rld[operand_reloadnum[i]].inc
3727 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3728
3729 /* If this operand is an output, we will have made any
3730 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3731 now we are treating part of the operand as an input, so
3732 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3733
3734 if (modified[i] == RELOAD_WRITE)
3735 {
3736 for (j = 0; j < n_reloads; j++)
3737 {
3738 if (rld[j].opnum == i)
3739 {
3740 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3741 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3742 else if (rld[j].when_needed
3743 == RELOAD_FOR_OUTADDR_ADDRESS)
3744 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3745 }
3746 }
3747 }
3748 }
3749 else if (goal_alternative_matched[i] == -1)
3750 {
3751 operand_reloadnum[i]
3752 = push_reload ((modified[i] != RELOAD_WRITE
3753 ? recog_data.operand[i] : 0),
3754 (modified[i] != RELOAD_READ
3755 ? recog_data.operand[i] : 0),
3756 (modified[i] != RELOAD_WRITE
3757 ? recog_data.operand_loc[i] : 0),
3758 (modified[i] != RELOAD_READ
3759 ? recog_data.operand_loc[i] : 0),
3760 (enum reg_class) goal_alternative[i],
3761 (modified[i] == RELOAD_WRITE
3762 ? VOIDmode : operand_mode[i]),
3763 (modified[i] == RELOAD_READ
3764 ? VOIDmode : operand_mode[i]),
3765 (insn_code_number < 0 ? 0
3766 : insn_data[insn_code_number].operand[i].strict_low),
3767 0, i, operand_type[i]);
3768 }
3769 /* In a matching pair of operands, one must be input only
3770 and the other must be output only.
3771 Pass the input operand as IN and the other as OUT. */
3772 else if (modified[i] == RELOAD_READ
3773 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3774 {
3775 operand_reloadnum[i]
3776 = push_reload (recog_data.operand[i],
3777 recog_data.operand[goal_alternative_matched[i]],
3778 recog_data.operand_loc[i],
3779 recog_data.operand_loc[goal_alternative_matched[i]],
3780 (enum reg_class) goal_alternative[i],
3781 operand_mode[i],
3782 operand_mode[goal_alternative_matched[i]],
3783 0, 0, i, RELOAD_OTHER);
3784 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3785 }
3786 else if (modified[i] == RELOAD_WRITE
3787 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3788 {
3789 operand_reloadnum[goal_alternative_matched[i]]
3790 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3791 recog_data.operand[i],
3792 recog_data.operand_loc[goal_alternative_matched[i]],
3793 recog_data.operand_loc[i],
3794 (enum reg_class) goal_alternative[i],
3795 operand_mode[goal_alternative_matched[i]],
3796 operand_mode[i],
3797 0, 0, i, RELOAD_OTHER);
3798 operand_reloadnum[i] = output_reloadnum;
3799 }
3800 else if (insn_code_number >= 0)
3801 abort ();
3802 else
3803 {
3804 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3805 /* Avoid further trouble with this insn. */
3806 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3807 n_reloads = 0;
3808 return 0;
3809 }
3810 }
3811 else if (goal_alternative_matched[i] < 0
3812 && goal_alternative_matches[i] < 0
| 3650 for (i = 0; i < noperands; i++)
3651 if (! goal_alternative_win[i]
3652 && goal_alternative_matches[i] >= 0)
3653 goal_alternative_matched[goal_alternative_matches[i]] = i;
3654
3655 for (i = 0; i < noperands; i++)
3656 goal_alternative_win[i] |= goal_alternative_match_win[i];
3657
3658 /* If the best alternative is with operands 1 and 2 swapped,
3659 consider them swapped before reporting the reloads. Update the
3660 operand numbers of any reloads already pushed. */
3661
3662 if (goal_alternative_swapped)
3663 {
3664 rtx tem;
3665
3666 tem = substed_operand[commutative];
3667 substed_operand[commutative] = substed_operand[commutative + 1];
3668 substed_operand[commutative + 1] = tem;
3669 tem = recog_data.operand[commutative];
3670 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3671 recog_data.operand[commutative + 1] = tem;
3672 tem = *recog_data.operand_loc[commutative];
3673 *recog_data.operand_loc[commutative]
3674 = *recog_data.operand_loc[commutative + 1];
3675 *recog_data.operand_loc[commutative + 1] = tem;
3676
3677 for (i = 0; i < n_reloads; i++)
3678 {
3679 if (rld[i].opnum == commutative)
3680 rld[i].opnum = commutative + 1;
3681 else if (rld[i].opnum == commutative + 1)
3682 rld[i].opnum = commutative;
3683 }
3684 }
3685
3686 for (i = 0; i < noperands; i++)
3687 {
3688 operand_reloadnum[i] = -1;
3689
3690 /* If this is an earlyclobber operand, we need to widen the scope.
3691 The reload must remain valid from the start of the insn being
3692 reloaded until after the operand is stored into its destination.
3693 We approximate this with RELOAD_OTHER even though we know that we
3694 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3695
3696 One special case that is worth checking is when we have an
3697 output that is earlyclobber but isn't used past the insn (typically
3698 a SCRATCH). In this case, we only need have the reload live
3699 through the insn itself, but not for any of our input or output
3700 reloads.
3701 But we must not accidentally narrow the scope of an existing
3702 RELOAD_OTHER reload - leave these alone.
3703
3704 In any case, anything needed to address this operand can remain
3705 however they were previously categorized. */
3706
3707 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3708 operand_type[i]
3709 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3710 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3711 }
3712
3713 /* Any constants that aren't allowed and can't be reloaded
3714 into registers are here changed into memory references. */
3715 for (i = 0; i < noperands; i++)
3716 if (! goal_alternative_win[i]
3717 && CONSTANT_P (recog_data.operand[i])
3718 /* force_const_mem does not accept HIGH. */
3719 && GET_CODE (recog_data.operand[i]) != HIGH
3720 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3721 (enum reg_class) goal_alternative[i])
3722 == NO_REGS)
3723 || no_input_reloads)
3724 && operand_mode[i] != VOIDmode)
3725 {
3726 substed_operand[i] = recog_data.operand[i]
3727 = find_reloads_toplev (force_const_mem (operand_mode[i],
3728 recog_data.operand[i]),
3729 i, address_type[i], ind_levels, 0, insn,
3730 NULL);
3731 if (alternative_allows_memconst (recog_data.constraints[i],
3732 goal_alternative_number))
3733 goal_alternative_win[i] = 1;
3734 }
3735
3736 /* Record the values of the earlyclobber operands for the caller. */
3737 if (goal_earlyclobber)
3738 for (i = 0; i < noperands; i++)
3739 if (goal_alternative_earlyclobber[i])
3740 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3741
3742 /* Now record reloads for all the operands that need them. */
3743 for (i = 0; i < noperands; i++)
3744 if (! goal_alternative_win[i])
3745 {
3746 /* Operands that match previous ones have already been handled. */
3747 if (goal_alternative_matches[i] >= 0)
3748 ;
3749 /* Handle an operand with a nonoffsettable address
3750 appearing where an offsettable address will do
3751 by reloading the address into a base register.
3752
3753 ??? We can also do this when the operand is a register and
3754 reg_equiv_mem is not offsettable, but this is a bit tricky,
3755 so we don't bother with it. It may not be worth doing. */
3756 else if (goal_alternative_matched[i] == -1
3757 && goal_alternative_offmemok[i]
3758 && GET_CODE (recog_data.operand[i]) == MEM)
3759 {
3760 operand_reloadnum[i]
3761 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3762 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3763 MODE_BASE_REG_CLASS (VOIDmode),
3764 GET_MODE (XEXP (recog_data.operand[i], 0)),
3765 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3766 rld[operand_reloadnum[i]].inc
3767 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3768
3769 /* If this operand is an output, we will have made any
3770 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3771 now we are treating part of the operand as an input, so
3772 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3773
3774 if (modified[i] == RELOAD_WRITE)
3775 {
3776 for (j = 0; j < n_reloads; j++)
3777 {
3778 if (rld[j].opnum == i)
3779 {
3780 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3781 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3782 else if (rld[j].when_needed
3783 == RELOAD_FOR_OUTADDR_ADDRESS)
3784 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3785 }
3786 }
3787 }
3788 }
3789 else if (goal_alternative_matched[i] == -1)
3790 {
3791 operand_reloadnum[i]
3792 = push_reload ((modified[i] != RELOAD_WRITE
3793 ? recog_data.operand[i] : 0),
3794 (modified[i] != RELOAD_READ
3795 ? recog_data.operand[i] : 0),
3796 (modified[i] != RELOAD_WRITE
3797 ? recog_data.operand_loc[i] : 0),
3798 (modified[i] != RELOAD_READ
3799 ? recog_data.operand_loc[i] : 0),
3800 (enum reg_class) goal_alternative[i],
3801 (modified[i] == RELOAD_WRITE
3802 ? VOIDmode : operand_mode[i]),
3803 (modified[i] == RELOAD_READ
3804 ? VOIDmode : operand_mode[i]),
3805 (insn_code_number < 0 ? 0
3806 : insn_data[insn_code_number].operand[i].strict_low),
3807 0, i, operand_type[i]);
3808 }
3809 /* In a matching pair of operands, one must be input only
3810 and the other must be output only.
3811 Pass the input operand as IN and the other as OUT. */
3812 else if (modified[i] == RELOAD_READ
3813 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3814 {
3815 operand_reloadnum[i]
3816 = push_reload (recog_data.operand[i],
3817 recog_data.operand[goal_alternative_matched[i]],
3818 recog_data.operand_loc[i],
3819 recog_data.operand_loc[goal_alternative_matched[i]],
3820 (enum reg_class) goal_alternative[i],
3821 operand_mode[i],
3822 operand_mode[goal_alternative_matched[i]],
3823 0, 0, i, RELOAD_OTHER);
3824 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3825 }
3826 else if (modified[i] == RELOAD_WRITE
3827 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3828 {
3829 operand_reloadnum[goal_alternative_matched[i]]
3830 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3831 recog_data.operand[i],
3832 recog_data.operand_loc[goal_alternative_matched[i]],
3833 recog_data.operand_loc[i],
3834 (enum reg_class) goal_alternative[i],
3835 operand_mode[goal_alternative_matched[i]],
3836 operand_mode[i],
3837 0, 0, i, RELOAD_OTHER);
3838 operand_reloadnum[i] = output_reloadnum;
3839 }
3840 else if (insn_code_number >= 0)
3841 abort ();
3842 else
3843 {
3844 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3845 /* Avoid further trouble with this insn. */
3846 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3847 n_reloads = 0;
3848 return 0;
3849 }
3850 }
3851 else if (goal_alternative_matched[i] < 0
3852 && goal_alternative_matches[i] < 0
|
| 3853 && !address_operand_reloaded[i]
|
3813 && optimize)
3814 {
3815 /* For each non-matching operand that's a MEM or a pseudo-register
3816 that didn't get a hard register, make an optional reload.
3817 This may get done even if the insn needs no reloads otherwise. */
3818
3819 rtx operand = recog_data.operand[i];
3820
3821 while (GET_CODE (operand) == SUBREG)
3822 operand = SUBREG_REG (operand);
3823 if ((GET_CODE (operand) == MEM
3824 || (GET_CODE (operand) == REG
3825 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3826 /* If this is only for an output, the optional reload would not
3827 actually cause us to use a register now, just note that
3828 something is stored here. */
3829 && ((enum reg_class) goal_alternative[i] != NO_REGS
3830 || modified[i] == RELOAD_WRITE)
3831 && ! no_input_reloads
3832 /* An optional output reload might allow to delete INSN later.
3833 We mustn't make in-out reloads on insns that are not permitted
3834 output reloads.
3835 If this is an asm, we can't delete it; we must not even call
3836 push_reload for an optional output reload in this case,
3837 because we can't be sure that the constraint allows a register,
3838 and push_reload verifies the constraints for asms. */
3839 && (modified[i] == RELOAD_READ
3840 || (! no_output_reloads && ! this_insn_is_asm)))
3841 operand_reloadnum[i]
3842 = push_reload ((modified[i] != RELOAD_WRITE
3843 ? recog_data.operand[i] : 0),
3844 (modified[i] != RELOAD_READ
3845 ? recog_data.operand[i] : 0),
3846 (modified[i] != RELOAD_WRITE
3847 ? recog_data.operand_loc[i] : 0),
3848 (modified[i] != RELOAD_READ
3849 ? recog_data.operand_loc[i] : 0),
3850 (enum reg_class) goal_alternative[i],
3851 (modified[i] == RELOAD_WRITE
3852 ? VOIDmode : operand_mode[i]),
3853 (modified[i] == RELOAD_READ
3854 ? VOIDmode : operand_mode[i]),
3855 (insn_code_number < 0 ? 0
3856 : insn_data[insn_code_number].operand[i].strict_low),
3857 1, i, operand_type[i]);
3858 /* If a memory reference remains (either as a MEM or a pseudo that
3859 did not get a hard register), yet we can't make an optional
3860 reload, check if this is actually a pseudo register reference;
3861 we then need to emit a USE and/or a CLOBBER so that reload
3862 inheritance will do the right thing. */
3863 else if (replace
3864 && (GET_CODE (operand) == MEM
3865 || (GET_CODE (operand) == REG
3866 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3867 && reg_renumber [REGNO (operand)] < 0)))
3868 {
3869 operand = *recog_data.operand_loc[i];
3870
3871 while (GET_CODE (operand) == SUBREG)
3872 operand = SUBREG_REG (operand);
3873 if (GET_CODE (operand) == REG)
3874 {
3875 if (modified[i] != RELOAD_WRITE)
3876 /* We mark the USE with QImode so that we recognize
3877 it as one that can be safely deleted at the end
3878 of reload. */
3879 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3880 insn), QImode);
3881 if (modified[i] != RELOAD_READ)
3882 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3883 }
3884 }
3885 }
3886 else if (goal_alternative_matches[i] >= 0
3887 && goal_alternative_win[goal_alternative_matches[i]]
3888 && modified[i] == RELOAD_READ
3889 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3890 && ! no_input_reloads && ! no_output_reloads
3891 && optimize)
3892 {
3893 /* Similarly, make an optional reload for a pair of matching
3894 objects that are in MEM or a pseudo that didn't get a hard reg. */
3895
3896 rtx operand = recog_data.operand[i];
3897
3898 while (GET_CODE (operand) == SUBREG)
3899 operand = SUBREG_REG (operand);
3900 if ((GET_CODE (operand) == MEM
3901 || (GET_CODE (operand) == REG
3902 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3903 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3904 != NO_REGS))
3905 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3906 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3907 recog_data.operand[i],
3908 recog_data.operand_loc[goal_alternative_matches[i]],
3909 recog_data.operand_loc[i],
3910 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3911 operand_mode[goal_alternative_matches[i]],
3912 operand_mode[i],
3913 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3914 }
3915
3916 /* Perform whatever substitutions on the operands we are supposed
3917 to make due to commutativity or replacement of registers
3918 with equivalent constants or memory slots. */
3919
3920 for (i = 0; i < noperands; i++)
3921 {
3922 /* We only do this on the last pass through reload, because it is
3923 possible for some data (like reg_equiv_address) to be changed during
3924 later passes. Moreover, we loose the opportunity to get a useful
3925 reload_{in,out}_reg when we do these replacements. */
3926
3927 if (replace)
3928 {
3929 rtx substitution = substed_operand[i];
3930
3931 *recog_data.operand_loc[i] = substitution;
3932
3933 /* If we're replacing an operand with a LABEL_REF, we need
3934 to make sure that there's a REG_LABEL note attached to
3935 this instruction. */
3936 if (GET_CODE (insn) != JUMP_INSN
3937 && GET_CODE (substitution) == LABEL_REF
3938 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3939 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
3940 XEXP (substitution, 0),
3941 REG_NOTES (insn));
3942 }
3943 else
3944 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3945 }
3946
3947 /* If this insn pattern contains any MATCH_DUP's, make sure that
3948 they will be substituted if the operands they match are substituted.
3949 Also do now any substitutions we already did on the operands.
3950
3951 Don't do this if we aren't making replacements because we might be
3952 propagating things allocated by frame pointer elimination into places
3953 it doesn't expect. */
3954
3955 if (insn_code_number >= 0 && replace)
3956 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3957 {
3958 int opno = recog_data.dup_num[i];
3959 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
| 3854 && optimize)
3855 {
3856 /* For each non-matching operand that's a MEM or a pseudo-register
3857 that didn't get a hard register, make an optional reload.
3858 This may get done even if the insn needs no reloads otherwise. */
3859
3860 rtx operand = recog_data.operand[i];
3861
3862 while (GET_CODE (operand) == SUBREG)
3863 operand = SUBREG_REG (operand);
3864 if ((GET_CODE (operand) == MEM
3865 || (GET_CODE (operand) == REG
3866 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3867 /* If this is only for an output, the optional reload would not
3868 actually cause us to use a register now, just note that
3869 something is stored here. */
3870 && ((enum reg_class) goal_alternative[i] != NO_REGS
3871 || modified[i] == RELOAD_WRITE)
3872 && ! no_input_reloads
3873 /* An optional output reload might allow to delete INSN later.
3874 We mustn't make in-out reloads on insns that are not permitted
3875 output reloads.
3876 If this is an asm, we can't delete it; we must not even call
3877 push_reload for an optional output reload in this case,
3878 because we can't be sure that the constraint allows a register,
3879 and push_reload verifies the constraints for asms. */
3880 && (modified[i] == RELOAD_READ
3881 || (! no_output_reloads && ! this_insn_is_asm)))
3882 operand_reloadnum[i]
3883 = push_reload ((modified[i] != RELOAD_WRITE
3884 ? recog_data.operand[i] : 0),
3885 (modified[i] != RELOAD_READ
3886 ? recog_data.operand[i] : 0),
3887 (modified[i] != RELOAD_WRITE
3888 ? recog_data.operand_loc[i] : 0),
3889 (modified[i] != RELOAD_READ
3890 ? recog_data.operand_loc[i] : 0),
3891 (enum reg_class) goal_alternative[i],
3892 (modified[i] == RELOAD_WRITE
3893 ? VOIDmode : operand_mode[i]),
3894 (modified[i] == RELOAD_READ
3895 ? VOIDmode : operand_mode[i]),
3896 (insn_code_number < 0 ? 0
3897 : insn_data[insn_code_number].operand[i].strict_low),
3898 1, i, operand_type[i]);
3899 /* If a memory reference remains (either as a MEM or a pseudo that
3900 did not get a hard register), yet we can't make an optional
3901 reload, check if this is actually a pseudo register reference;
3902 we then need to emit a USE and/or a CLOBBER so that reload
3903 inheritance will do the right thing. */
3904 else if (replace
3905 && (GET_CODE (operand) == MEM
3906 || (GET_CODE (operand) == REG
3907 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3908 && reg_renumber [REGNO (operand)] < 0)))
3909 {
3910 operand = *recog_data.operand_loc[i];
3911
3912 while (GET_CODE (operand) == SUBREG)
3913 operand = SUBREG_REG (operand);
3914 if (GET_CODE (operand) == REG)
3915 {
3916 if (modified[i] != RELOAD_WRITE)
3917 /* We mark the USE with QImode so that we recognize
3918 it as one that can be safely deleted at the end
3919 of reload. */
3920 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3921 insn), QImode);
3922 if (modified[i] != RELOAD_READ)
3923 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3924 }
3925 }
3926 }
3927 else if (goal_alternative_matches[i] >= 0
3928 && goal_alternative_win[goal_alternative_matches[i]]
3929 && modified[i] == RELOAD_READ
3930 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3931 && ! no_input_reloads && ! no_output_reloads
3932 && optimize)
3933 {
3934 /* Similarly, make an optional reload for a pair of matching
3935 objects that are in MEM or a pseudo that didn't get a hard reg. */
3936
3937 rtx operand = recog_data.operand[i];
3938
3939 while (GET_CODE (operand) == SUBREG)
3940 operand = SUBREG_REG (operand);
3941 if ((GET_CODE (operand) == MEM
3942 || (GET_CODE (operand) == REG
3943 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3944 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3945 != NO_REGS))
3946 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3947 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3948 recog_data.operand[i],
3949 recog_data.operand_loc[goal_alternative_matches[i]],
3950 recog_data.operand_loc[i],
3951 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3952 operand_mode[goal_alternative_matches[i]],
3953 operand_mode[i],
3954 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3955 }
3956
3957 /* Perform whatever substitutions on the operands we are supposed
3958 to make due to commutativity or replacement of registers
3959 with equivalent constants or memory slots. */
3960
3961 for (i = 0; i < noperands; i++)
3962 {
3963 /* We only do this on the last pass through reload, because it is
3964 possible for some data (like reg_equiv_address) to be changed during
3965 later passes. Moreover, we loose the opportunity to get a useful
3966 reload_{in,out}_reg when we do these replacements. */
3967
3968 if (replace)
3969 {
3970 rtx substitution = substed_operand[i];
3971
3972 *recog_data.operand_loc[i] = substitution;
3973
3974 /* If we're replacing an operand with a LABEL_REF, we need
3975 to make sure that there's a REG_LABEL note attached to
3976 this instruction. */
3977 if (GET_CODE (insn) != JUMP_INSN
3978 && GET_CODE (substitution) == LABEL_REF
3979 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3980 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
3981 XEXP (substitution, 0),
3982 REG_NOTES (insn));
3983 }
3984 else
3985 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3986 }
3987
3988 /* If this insn pattern contains any MATCH_DUP's, make sure that
3989 they will be substituted if the operands they match are substituted.
3990 Also do now any substitutions we already did on the operands.
3991
3992 Don't do this if we aren't making replacements because we might be
3993 propagating things allocated by frame pointer elimination into places
3994 it doesn't expect. */
3995
3996 if (insn_code_number >= 0 && replace)
3997 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3998 {
3999 int opno = recog_data.dup_num[i];
4000 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
|
3960 if (operand_reloadnum[opno] >= 0)
3961 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3962 insn_data[insn_code_number].operand[opno].mode);
| 4001 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
|
3963 }
3964
3965#if 0
3966 /* This loses because reloading of prior insns can invalidate the equivalence
3967 (or at least find_equiv_reg isn't smart enough to find it any more),
3968 causing this insn to need more reload regs than it needed before.
3969 It may be too late to make the reload regs available.
3970 Now this optimization is done safely in choose_reload_regs. */
3971
3972 /* For each reload of a reg into some other class of reg,
3973 search for an existing equivalent reg (same value now) in the right class.
3974 We can use it as long as we don't need to change its contents. */
3975 for (i = 0; i < n_reloads; i++)
3976 if (rld[i].reg_rtx == 0
3977 && rld[i].in != 0
3978 && GET_CODE (rld[i].in) == REG
3979 && rld[i].out == 0)
3980 {
3981 rld[i].reg_rtx
3982 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
3983 static_reload_reg_p, 0, rld[i].inmode);
3984 /* Prevent generation of insn to load the value
3985 because the one we found already has the value. */
3986 if (rld[i].reg_rtx)
3987 rld[i].in = rld[i].reg_rtx;
3988 }
3989#endif
3990
3991 /* Perhaps an output reload can be combined with another
3992 to reduce needs by one. */
3993 if (!goal_earlyclobber)
3994 combine_reloads ();
3995
3996 /* If we have a pair of reloads for parts of an address, they are reloading
3997 the same object, the operands themselves were not reloaded, and they
3998 are for two operands that are supposed to match, merge the reloads and
3999 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4000
4001 for (i = 0; i < n_reloads; i++)
4002 {
4003 int k;
4004
4005 for (j = i + 1; j < n_reloads; j++)
4006 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4007 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4008 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4009 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4010 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4011 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4012 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4013 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4014 && rtx_equal_p (rld[i].in, rld[j].in)
4015 && (operand_reloadnum[rld[i].opnum] < 0
4016 || rld[operand_reloadnum[rld[i].opnum]].optional)
4017 && (operand_reloadnum[rld[j].opnum] < 0
4018 || rld[operand_reloadnum[rld[j].opnum]].optional)
4019 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4020 || (goal_alternative_matches[rld[j].opnum]
4021 == rld[i].opnum)))
4022 {
4023 for (k = 0; k < n_replacements; k++)
4024 if (replacements[k].what == j)
4025 replacements[k].what = i;
4026
4027 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4028 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4029 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4030 else
4031 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4032 rld[j].in = 0;
4033 }
4034 }
4035
4036 /* Scan all the reloads and update their type.
4037 If a reload is for the address of an operand and we didn't reload
4038 that operand, change the type. Similarly, change the operand number
4039 of a reload when two operands match. If a reload is optional, treat it
4040 as though the operand isn't reloaded.
4041
4042 ??? This latter case is somewhat odd because if we do the optional
4043 reload, it means the object is hanging around. Thus we need only
4044 do the address reload if the optional reload was NOT done.
4045
4046 Change secondary reloads to be the address type of their operand, not
4047 the normal type.
4048
4049 If an operand's reload is now RELOAD_OTHER, change any
4050 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4051 RELOAD_FOR_OTHER_ADDRESS. */
4052
4053 for (i = 0; i < n_reloads; i++)
4054 {
4055 if (rld[i].secondary_p
4056 && rld[i].when_needed == operand_type[rld[i].opnum])
4057 rld[i].when_needed = address_type[rld[i].opnum];
4058
4059 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4060 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4061 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4062 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4063 && (operand_reloadnum[rld[i].opnum] < 0
4064 || rld[operand_reloadnum[rld[i].opnum]].optional))
4065 {
4066 /* If we have a secondary reload to go along with this reload,
4067 change its type to RELOAD_FOR_OPADDR_ADDR. */
4068
4069 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4070 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4071 && rld[i].secondary_in_reload != -1)
4072 {
4073 int secondary_in_reload = rld[i].secondary_in_reload;
4074
4075 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4076
4077 /* If there's a tertiary reload we have to change it also. */
4078 if (secondary_in_reload > 0
4079 && rld[secondary_in_reload].secondary_in_reload != -1)
4080 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4081 = RELOAD_FOR_OPADDR_ADDR;
4082 }
4083
4084 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4085 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4086 && rld[i].secondary_out_reload != -1)
4087 {
4088 int secondary_out_reload = rld[i].secondary_out_reload;
4089
4090 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4091
4092 /* If there's a tertiary reload we have to change it also. */
4093 if (secondary_out_reload
4094 && rld[secondary_out_reload].secondary_out_reload != -1)
4095 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4096 = RELOAD_FOR_OPADDR_ADDR;
4097 }
4098
4099 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4100 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4101 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4102 else
4103 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4104 }
4105
4106 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4107 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4108 && operand_reloadnum[rld[i].opnum] >= 0
4109 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4110 == RELOAD_OTHER))
4111 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4112
4113 if (goal_alternative_matches[rld[i].opnum] >= 0)
4114 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4115 }
4116
4117 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4118 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4119 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4120
4121 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4122 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4123 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4124 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4125 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4126 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4127 This is complicated by the fact that a single operand can have more
4128 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4129 choose_reload_regs without affecting code quality, and cases that
4130 actually fail are extremely rare, so it turns out to be better to fix
4131 the problem here by not generating cases that choose_reload_regs will
4132 fail for. */
4133 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4134 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4135 a single operand.
4136 We can reduce the register pressure by exploiting that a
4137 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4138 does not conflict with any of them, if it is only used for the first of
4139 the RELOAD_FOR_X_ADDRESS reloads. */
4140 {
4141 int first_op_addr_num = -2;
4142 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4143 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4144 int need_change = 0;
4145 /* We use last_op_addr_reload and the contents of the above arrays
4146 first as flags - -2 means no instance encountered, -1 means exactly
4147 one instance encountered.
4148 If more than one instance has been encountered, we store the reload
4149 number of the first reload of the kind in question; reload numbers
4150 are known to be non-negative. */
4151 for (i = 0; i < noperands; i++)
4152 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4153 for (i = n_reloads - 1; i >= 0; i--)
4154 {
4155 switch (rld[i].when_needed)
4156 {
4157 case RELOAD_FOR_OPERAND_ADDRESS:
4158 if (++first_op_addr_num >= 0)
4159 {
4160 first_op_addr_num = i;
4161 need_change = 1;
4162 }
4163 break;
4164 case RELOAD_FOR_INPUT_ADDRESS:
4165 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4166 {
4167 first_inpaddr_num[rld[i].opnum] = i;
4168 need_change = 1;
4169 }
4170 break;
4171 case RELOAD_FOR_OUTPUT_ADDRESS:
4172 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4173 {
4174 first_outpaddr_num[rld[i].opnum] = i;
4175 need_change = 1;
4176 }
4177 break;
4178 default:
4179 break;
4180 }
4181 }
4182
4183 if (need_change)
4184 {
4185 for (i = 0; i < n_reloads; i++)
4186 {
4187 int first_num;
4188 enum reload_type type;
4189
4190 switch (rld[i].when_needed)
4191 {
4192 case RELOAD_FOR_OPADDR_ADDR:
4193 first_num = first_op_addr_num;
4194 type = RELOAD_FOR_OPERAND_ADDRESS;
4195 break;
4196 case RELOAD_FOR_INPADDR_ADDRESS:
4197 first_num = first_inpaddr_num[rld[i].opnum];
4198 type = RELOAD_FOR_INPUT_ADDRESS;
4199 break;
4200 case RELOAD_FOR_OUTADDR_ADDRESS:
4201 first_num = first_outpaddr_num[rld[i].opnum];
4202 type = RELOAD_FOR_OUTPUT_ADDRESS;
4203 break;
4204 default:
4205 continue;
4206 }
4207 if (first_num < 0)
4208 continue;
4209 else if (i > first_num)
4210 rld[i].when_needed = type;
4211 else
4212 {
4213 /* Check if the only TYPE reload that uses reload I is
4214 reload FIRST_NUM. */
4215 for (j = n_reloads - 1; j > first_num; j--)
4216 {
4217 if (rld[j].when_needed == type
4218 && (rld[i].secondary_p
4219 ? rld[j].secondary_in_reload == i
4220 : reg_mentioned_p (rld[i].in, rld[j].in)))
4221 {
4222 rld[i].when_needed = type;
4223 break;
4224 }
4225 }
4226 }
4227 }
4228 }
4229 }
4230
4231 /* See if we have any reloads that are now allowed to be merged
4232 because we've changed when the reload is needed to
4233 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4234 check for the most common cases. */
4235
4236 for (i = 0; i < n_reloads; i++)
4237 if (rld[i].in != 0 && rld[i].out == 0
4238 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4239 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4240 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4241 for (j = 0; j < n_reloads; j++)
4242 if (i != j && rld[j].in != 0 && rld[j].out == 0
4243 && rld[j].when_needed == rld[i].when_needed
4244 && MATCHES (rld[i].in, rld[j].in)
4245 && rld[i].class == rld[j].class
4246 && !rld[i].nocombine && !rld[j].nocombine
4247 && rld[i].reg_rtx == rld[j].reg_rtx)
4248 {
4249 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4250 transfer_replacements (i, j);
4251 rld[j].in = 0;
4252 }
4253
4254#ifdef HAVE_cc0
4255 /* If we made any reloads for addresses, see if they violate a
4256 "no input reloads" requirement for this insn. But loads that we
4257 do after the insn (such as for output addresses) are fine. */
4258 if (no_input_reloads)
4259 for (i = 0; i < n_reloads; i++)
4260 if (rld[i].in != 0
4261 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4262 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4263 abort ();
4264#endif
4265
4266 /* Compute reload_mode and reload_nregs. */
4267 for (i = 0; i < n_reloads; i++)
4268 {
4269 rld[i].mode
4270 = (rld[i].inmode == VOIDmode
4271 || (GET_MODE_SIZE (rld[i].outmode)
4272 > GET_MODE_SIZE (rld[i].inmode)))
4273 ? rld[i].outmode : rld[i].inmode;
4274
4275 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4276 }
4277
4278 /* Special case a simple move with an input reload and a
4279 destination of a hard reg, if the hard reg is ok, use it. */
4280 for (i = 0; i < n_reloads; i++)
4281 if (rld[i].when_needed == RELOAD_FOR_INPUT
4282 && GET_CODE (PATTERN (insn)) == SET
4283 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4284 && SET_SRC (PATTERN (insn)) == rld[i].in)
4285 {
4286 rtx dest = SET_DEST (PATTERN (insn));
4287 unsigned int regno = REGNO (dest);
4288
4289 if (regno < FIRST_PSEUDO_REGISTER
4290 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4291 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4292 rld[i].reg_rtx = dest;
4293 }
4294
4295 return retval;
4296}
4297
4298/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4299 accepts a memory operand with constant address. */
4300
4301static int
4302alternative_allows_memconst (constraint, altnum)
4303 const char *constraint;
4304 int altnum;
4305{
4306 int c;
4307 /* Skip alternatives before the one requested. */
4308 while (altnum > 0)
4309 {
4310 while (*constraint++ != ',');
4311 altnum--;
4312 }
4313 /* Scan the requested alternative for 'm' or 'o'.
4314 If one of them is present, this alternative accepts memory constants. */
4315 while ((c = *constraint++) && c != ',' && c != '#')
| 4002 }
4003
4004#if 0
4005 /* This loses because reloading of prior insns can invalidate the equivalence
4006 (or at least find_equiv_reg isn't smart enough to find it any more),
4007 causing this insn to need more reload regs than it needed before.
4008 It may be too late to make the reload regs available.
4009 Now this optimization is done safely in choose_reload_regs. */
4010
4011 /* For each reload of a reg into some other class of reg,
4012 search for an existing equivalent reg (same value now) in the right class.
4013 We can use it as long as we don't need to change its contents. */
4014 for (i = 0; i < n_reloads; i++)
4015 if (rld[i].reg_rtx == 0
4016 && rld[i].in != 0
4017 && GET_CODE (rld[i].in) == REG
4018 && rld[i].out == 0)
4019 {
4020 rld[i].reg_rtx
4021 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4022 static_reload_reg_p, 0, rld[i].inmode);
4023 /* Prevent generation of insn to load the value
4024 because the one we found already has the value. */
4025 if (rld[i].reg_rtx)
4026 rld[i].in = rld[i].reg_rtx;
4027 }
4028#endif
4029
4030 /* Perhaps an output reload can be combined with another
4031 to reduce needs by one. */
4032 if (!goal_earlyclobber)
4033 combine_reloads ();
4034
4035 /* If we have a pair of reloads for parts of an address, they are reloading
4036 the same object, the operands themselves were not reloaded, and they
4037 are for two operands that are supposed to match, merge the reloads and
4038 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4039
4040 for (i = 0; i < n_reloads; i++)
4041 {
4042 int k;
4043
4044 for (j = i + 1; j < n_reloads; j++)
4045 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4046 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4047 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4048 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4049 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4050 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4051 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4052 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4053 && rtx_equal_p (rld[i].in, rld[j].in)
4054 && (operand_reloadnum[rld[i].opnum] < 0
4055 || rld[operand_reloadnum[rld[i].opnum]].optional)
4056 && (operand_reloadnum[rld[j].opnum] < 0
4057 || rld[operand_reloadnum[rld[j].opnum]].optional)
4058 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4059 || (goal_alternative_matches[rld[j].opnum]
4060 == rld[i].opnum)))
4061 {
4062 for (k = 0; k < n_replacements; k++)
4063 if (replacements[k].what == j)
4064 replacements[k].what = i;
4065
4066 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4067 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4068 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4069 else
4070 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4071 rld[j].in = 0;
4072 }
4073 }
4074
4075 /* Scan all the reloads and update their type.
4076 If a reload is for the address of an operand and we didn't reload
4077 that operand, change the type. Similarly, change the operand number
4078 of a reload when two operands match. If a reload is optional, treat it
4079 as though the operand isn't reloaded.
4080
4081 ??? This latter case is somewhat odd because if we do the optional
4082 reload, it means the object is hanging around. Thus we need only
4083 do the address reload if the optional reload was NOT done.
4084
4085 Change secondary reloads to be the address type of their operand, not
4086 the normal type.
4087
4088 If an operand's reload is now RELOAD_OTHER, change any
4089 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4090 RELOAD_FOR_OTHER_ADDRESS. */
4091
4092 for (i = 0; i < n_reloads; i++)
4093 {
4094 if (rld[i].secondary_p
4095 && rld[i].when_needed == operand_type[rld[i].opnum])
4096 rld[i].when_needed = address_type[rld[i].opnum];
4097
4098 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4099 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4100 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4101 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4102 && (operand_reloadnum[rld[i].opnum] < 0
4103 || rld[operand_reloadnum[rld[i].opnum]].optional))
4104 {
4105 /* If we have a secondary reload to go along with this reload,
4106 change its type to RELOAD_FOR_OPADDR_ADDR. */
4107
4108 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4109 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4110 && rld[i].secondary_in_reload != -1)
4111 {
4112 int secondary_in_reload = rld[i].secondary_in_reload;
4113
4114 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4115
4116 /* If there's a tertiary reload we have to change it also. */
4117 if (secondary_in_reload > 0
4118 && rld[secondary_in_reload].secondary_in_reload != -1)
4119 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4120 = RELOAD_FOR_OPADDR_ADDR;
4121 }
4122
4123 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4124 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4125 && rld[i].secondary_out_reload != -1)
4126 {
4127 int secondary_out_reload = rld[i].secondary_out_reload;
4128
4129 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4130
4131 /* If there's a tertiary reload we have to change it also. */
4132 if (secondary_out_reload
4133 && rld[secondary_out_reload].secondary_out_reload != -1)
4134 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4135 = RELOAD_FOR_OPADDR_ADDR;
4136 }
4137
4138 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4139 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4140 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4141 else
4142 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4143 }
4144
4145 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4146 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4147 && operand_reloadnum[rld[i].opnum] >= 0
4148 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4149 == RELOAD_OTHER))
4150 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4151
4152 if (goal_alternative_matches[rld[i].opnum] >= 0)
4153 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4154 }
4155
4156 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4157 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4158 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4159
4160 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4161 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4162 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4163 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4164 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4165 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4166 This is complicated by the fact that a single operand can have more
4167 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4168 choose_reload_regs without affecting code quality, and cases that
4169 actually fail are extremely rare, so it turns out to be better to fix
4170 the problem here by not generating cases that choose_reload_regs will
4171 fail for. */
4172 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4173 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4174 a single operand.
4175 We can reduce the register pressure by exploiting that a
4176 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4177 does not conflict with any of them, if it is only used for the first of
4178 the RELOAD_FOR_X_ADDRESS reloads. */
4179 {
4180 int first_op_addr_num = -2;
4181 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4182 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4183 int need_change = 0;
4184 /* We use last_op_addr_reload and the contents of the above arrays
4185 first as flags - -2 means no instance encountered, -1 means exactly
4186 one instance encountered.
4187 If more than one instance has been encountered, we store the reload
4188 number of the first reload of the kind in question; reload numbers
4189 are known to be non-negative. */
4190 for (i = 0; i < noperands; i++)
4191 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4192 for (i = n_reloads - 1; i >= 0; i--)
4193 {
4194 switch (rld[i].when_needed)
4195 {
4196 case RELOAD_FOR_OPERAND_ADDRESS:
4197 if (++first_op_addr_num >= 0)
4198 {
4199 first_op_addr_num = i;
4200 need_change = 1;
4201 }
4202 break;
4203 case RELOAD_FOR_INPUT_ADDRESS:
4204 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4205 {
4206 first_inpaddr_num[rld[i].opnum] = i;
4207 need_change = 1;
4208 }
4209 break;
4210 case RELOAD_FOR_OUTPUT_ADDRESS:
4211 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4212 {
4213 first_outpaddr_num[rld[i].opnum] = i;
4214 need_change = 1;
4215 }
4216 break;
4217 default:
4218 break;
4219 }
4220 }
4221
4222 if (need_change)
4223 {
4224 for (i = 0; i < n_reloads; i++)
4225 {
4226 int first_num;
4227 enum reload_type type;
4228
4229 switch (rld[i].when_needed)
4230 {
4231 case RELOAD_FOR_OPADDR_ADDR:
4232 first_num = first_op_addr_num;
4233 type = RELOAD_FOR_OPERAND_ADDRESS;
4234 break;
4235 case RELOAD_FOR_INPADDR_ADDRESS:
4236 first_num = first_inpaddr_num[rld[i].opnum];
4237 type = RELOAD_FOR_INPUT_ADDRESS;
4238 break;
4239 case RELOAD_FOR_OUTADDR_ADDRESS:
4240 first_num = first_outpaddr_num[rld[i].opnum];
4241 type = RELOAD_FOR_OUTPUT_ADDRESS;
4242 break;
4243 default:
4244 continue;
4245 }
4246 if (first_num < 0)
4247 continue;
4248 else if (i > first_num)
4249 rld[i].when_needed = type;
4250 else
4251 {
4252 /* Check if the only TYPE reload that uses reload I is
4253 reload FIRST_NUM. */
4254 for (j = n_reloads - 1; j > first_num; j--)
4255 {
4256 if (rld[j].when_needed == type
4257 && (rld[i].secondary_p
4258 ? rld[j].secondary_in_reload == i
4259 : reg_mentioned_p (rld[i].in, rld[j].in)))
4260 {
4261 rld[i].when_needed = type;
4262 break;
4263 }
4264 }
4265 }
4266 }
4267 }
4268 }
4269
4270 /* See if we have any reloads that are now allowed to be merged
4271 because we've changed when the reload is needed to
4272 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4273 check for the most common cases. */
4274
4275 for (i = 0; i < n_reloads; i++)
4276 if (rld[i].in != 0 && rld[i].out == 0
4277 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4278 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4279 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4280 for (j = 0; j < n_reloads; j++)
4281 if (i != j && rld[j].in != 0 && rld[j].out == 0
4282 && rld[j].when_needed == rld[i].when_needed
4283 && MATCHES (rld[i].in, rld[j].in)
4284 && rld[i].class == rld[j].class
4285 && !rld[i].nocombine && !rld[j].nocombine
4286 && rld[i].reg_rtx == rld[j].reg_rtx)
4287 {
4288 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4289 transfer_replacements (i, j);
4290 rld[j].in = 0;
4291 }
4292
4293#ifdef HAVE_cc0
4294 /* If we made any reloads for addresses, see if they violate a
4295 "no input reloads" requirement for this insn. But loads that we
4296 do after the insn (such as for output addresses) are fine. */
4297 if (no_input_reloads)
4298 for (i = 0; i < n_reloads; i++)
4299 if (rld[i].in != 0
4300 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4301 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4302 abort ();
4303#endif
4304
4305 /* Compute reload_mode and reload_nregs. */
4306 for (i = 0; i < n_reloads; i++)
4307 {
4308 rld[i].mode
4309 = (rld[i].inmode == VOIDmode
4310 || (GET_MODE_SIZE (rld[i].outmode)
4311 > GET_MODE_SIZE (rld[i].inmode)))
4312 ? rld[i].outmode : rld[i].inmode;
4313
4314 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4315 }
4316
4317 /* Special case a simple move with an input reload and a
4318 destination of a hard reg, if the hard reg is ok, use it. */
4319 for (i = 0; i < n_reloads; i++)
4320 if (rld[i].when_needed == RELOAD_FOR_INPUT
4321 && GET_CODE (PATTERN (insn)) == SET
4322 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4323 && SET_SRC (PATTERN (insn)) == rld[i].in)
4324 {
4325 rtx dest = SET_DEST (PATTERN (insn));
4326 unsigned int regno = REGNO (dest);
4327
4328 if (regno < FIRST_PSEUDO_REGISTER
4329 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4330 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4331 rld[i].reg_rtx = dest;
4332 }
4333
4334 return retval;
4335}
4336
4337/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4338 accepts a memory operand with constant address. */
4339
4340static int
4341alternative_allows_memconst (constraint, altnum)
4342 const char *constraint;
4343 int altnum;
4344{
4345 int c;
4346 /* Skip alternatives before the one requested. */
4347 while (altnum > 0)
4348 {
4349 while (*constraint++ != ',');
4350 altnum--;
4351 }
4352 /* Scan the requested alternative for 'm' or 'o'.
4353 If one of them is present, this alternative accepts memory constants. */
4354 while ((c = *constraint++) && c != ',' && c != '#')
|
4316 if (c == 'm' || c == 'o')
| 4355 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c))
|
4317 return 1;
4318 return 0;
4319}
4320
4321/* Scan X for memory references and scan the addresses for reloading.
4322 Also checks for references to "constant" regs that we want to eliminate
4323 and replaces them with the values they stand for.
4324 We may alter X destructively if it contains a reference to such.
4325 If X is just a constant reg, we return the equivalent value
4326 instead of X.
4327
4328 IND_LEVELS says how many levels of indirect addressing this machine
4329 supports.
4330
4331 OPNUM and TYPE identify the purpose of the reload.
4332
4333 IS_SET_DEST is true if X is the destination of a SET, which is not
4334 appropriate to be replaced by a constant.
4335
4336 INSN, if nonzero, is the insn in which we do the reload. It is used
4337 to determine if we may generate output reloads, and where to put USEs
4338 for pseudos that we have to replace with stack slots.
4339
4340 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4341 result of find_reloads_address. */
4342
4343static rtx
4344find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4345 address_reloaded)
4346 rtx x;
4347 int opnum;
4348 enum reload_type type;
4349 int ind_levels;
4350 int is_set_dest;
4351 rtx insn;
4352 int *address_reloaded;
4353{
4354 RTX_CODE code = GET_CODE (x);
4355
4356 const char *fmt = GET_RTX_FORMAT (code);
4357 int i;
4358 int copied;
4359
4360 if (code == REG)
4361 {
4362 /* This code is duplicated for speed in find_reloads. */
4363 int regno = REGNO (x);
4364 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4365 x = reg_equiv_constant[regno];
4366#if 0
4367 /* This creates (subreg (mem...)) which would cause an unnecessary
4368 reload of the mem. */
4369 else if (reg_equiv_mem[regno] != 0)
4370 x = reg_equiv_mem[regno];
4371#endif
4372 else if (reg_equiv_memory_loc[regno]
4373 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4374 {
4375 rtx mem = make_memloc (x, regno);
4376 if (reg_equiv_address[regno]
4377 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4378 {
4379 /* If this is not a toplevel operand, find_reloads doesn't see
4380 this substitution. We have to emit a USE of the pseudo so
4381 that delete_output_reload can see it. */
4382 if (replace_reloads && recog_data.operand[opnum] != x)
4383 /* We mark the USE with QImode so that we recognize it
4384 as one that can be safely deleted at the end of
4385 reload. */
4386 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4387 QImode);
4388 x = mem;
4389 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4390 opnum, type, ind_levels, insn);
4391 if (address_reloaded)
4392 *address_reloaded = i;
4393 }
4394 }
4395 return x;
4396 }
4397 if (code == MEM)
4398 {
4399 rtx tem = x;
4400
4401 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4402 opnum, type, ind_levels, insn);
4403 if (address_reloaded)
4404 *address_reloaded = i;
4405
4406 return tem;
4407 }
4408
4409 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4410 {
4411 /* Check for SUBREG containing a REG that's equivalent to a constant.
4412 If the constant has a known value, truncate it right now.
4413 Similarly if we are extracting a single-word of a multi-word
4414 constant. If the constant is symbolic, allow it to be substituted
4415 normally. push_reload will strip the subreg later. If the
4416 constant is VOIDmode, abort because we will lose the mode of
4417 the register (this should never happen because one of the cases
4418 above should handle it). */
4419
4420 int regno = REGNO (SUBREG_REG (x));
4421 rtx tem;
4422
4423 if (subreg_lowpart_p (x)
4424 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4425 && reg_equiv_constant[regno] != 0
4426 && (tem = gen_lowpart_common (GET_MODE (x),
4427 reg_equiv_constant[regno])) != 0)
4428 return tem;
4429
4430 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4431 && reg_equiv_constant[regno] != 0)
4432 {
4433 tem =
4434 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4435 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4436 if (!tem)
4437 abort ();
4438 return tem;
4439 }
4440
| 4356 return 1;
4357 return 0;
4358}
4359
4360/* Scan X for memory references and scan the addresses for reloading.
4361 Also checks for references to "constant" regs that we want to eliminate
4362 and replaces them with the values they stand for.
4363 We may alter X destructively if it contains a reference to such.
4364 If X is just a constant reg, we return the equivalent value
4365 instead of X.
4366
4367 IND_LEVELS says how many levels of indirect addressing this machine
4368 supports.
4369
4370 OPNUM and TYPE identify the purpose of the reload.
4371
4372 IS_SET_DEST is true if X is the destination of a SET, which is not
4373 appropriate to be replaced by a constant.
4374
4375 INSN, if nonzero, is the insn in which we do the reload. It is used
4376 to determine if we may generate output reloads, and where to put USEs
4377 for pseudos that we have to replace with stack slots.
4378
4379 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4380 result of find_reloads_address. */
4381
4382static rtx
4383find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4384 address_reloaded)
4385 rtx x;
4386 int opnum;
4387 enum reload_type type;
4388 int ind_levels;
4389 int is_set_dest;
4390 rtx insn;
4391 int *address_reloaded;
4392{
4393 RTX_CODE code = GET_CODE (x);
4394
4395 const char *fmt = GET_RTX_FORMAT (code);
4396 int i;
4397 int copied;
4398
4399 if (code == REG)
4400 {
4401 /* This code is duplicated for speed in find_reloads. */
4402 int regno = REGNO (x);
4403 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4404 x = reg_equiv_constant[regno];
4405#if 0
4406 /* This creates (subreg (mem...)) which would cause an unnecessary
4407 reload of the mem. */
4408 else if (reg_equiv_mem[regno] != 0)
4409 x = reg_equiv_mem[regno];
4410#endif
4411 else if (reg_equiv_memory_loc[regno]
4412 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4413 {
4414 rtx mem = make_memloc (x, regno);
4415 if (reg_equiv_address[regno]
4416 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4417 {
4418 /* If this is not a toplevel operand, find_reloads doesn't see
4419 this substitution. We have to emit a USE of the pseudo so
4420 that delete_output_reload can see it. */
4421 if (replace_reloads && recog_data.operand[opnum] != x)
4422 /* We mark the USE with QImode so that we recognize it
4423 as one that can be safely deleted at the end of
4424 reload. */
4425 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4426 QImode);
4427 x = mem;
4428 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4429 opnum, type, ind_levels, insn);
4430 if (address_reloaded)
4431 *address_reloaded = i;
4432 }
4433 }
4434 return x;
4435 }
4436 if (code == MEM)
4437 {
4438 rtx tem = x;
4439
4440 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4441 opnum, type, ind_levels, insn);
4442 if (address_reloaded)
4443 *address_reloaded = i;
4444
4445 return tem;
4446 }
4447
4448 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4449 {
4450 /* Check for SUBREG containing a REG that's equivalent to a constant.
4451 If the constant has a known value, truncate it right now.
4452 Similarly if we are extracting a single-word of a multi-word
4453 constant. If the constant is symbolic, allow it to be substituted
4454 normally. push_reload will strip the subreg later. If the
4455 constant is VOIDmode, abort because we will lose the mode of
4456 the register (this should never happen because one of the cases
4457 above should handle it). */
4458
4459 int regno = REGNO (SUBREG_REG (x));
4460 rtx tem;
4461
4462 if (subreg_lowpart_p (x)
4463 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4464 && reg_equiv_constant[regno] != 0
4465 && (tem = gen_lowpart_common (GET_MODE (x),
4466 reg_equiv_constant[regno])) != 0)
4467 return tem;
4468
4469 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4470 && reg_equiv_constant[regno] != 0)
4471 {
4472 tem =
4473 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4474 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4475 if (!tem)
4476 abort ();
4477 return tem;
4478 }
4479
|
4441 /* If the SUBREG is wider than a word, the above test will fail.
4442 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4443 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4444 a 32 bit target. We still can - and have to - handle this
4445 for non-paradoxical subregs of CONST_INTs. */
4446 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4447 && reg_equiv_constant[regno] != 0
4448 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4449 && (GET_MODE_SIZE (GET_MODE (x))
4450 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4451 {
4452 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT;
4453 if (WORDS_BIG_ENDIAN)
4454 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4455 - GET_MODE_BITSIZE (GET_MODE (x))
4456 - shift);
4457 /* Here we use the knowledge that CONST_INTs have a
4458 HOST_WIDE_INT field. */
4459 if (shift >= HOST_BITS_PER_WIDE_INT)
4460 shift = HOST_BITS_PER_WIDE_INT - 1;
4461 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4462 }
4463
4464 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4465 && reg_equiv_constant[regno] != 0
4466 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4467 abort ();
4468
| |
4469 /* If the subreg contains a reg that will be converted to a mem,
4470 convert the subreg to a narrower memref now.
4471 Otherwise, we would get (subreg (mem ...) ...),
4472 which would force reload of the mem.
4473
4474 We also need to do this if there is an equivalent MEM that is
4475 not offsettable. In that case, alter_subreg would produce an
4476 invalid address on big-endian machines.
4477
4478 For machines that extend byte loads, we must not reload using
4479 a wider mode if we have a paradoxical SUBREG. find_reloads will
4480 force a reload in that case. So we should not do anything here. */
4481
4482 else if (regno >= FIRST_PSEUDO_REGISTER
4483#ifdef LOAD_EXTEND_OP
4484 && (GET_MODE_SIZE (GET_MODE (x))
4485 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4486#endif
4487 && (reg_equiv_address[regno] != 0
4488 || (reg_equiv_mem[regno] != 0
4489 && (! strict_memory_address_p (GET_MODE (x),
4490 XEXP (reg_equiv_mem[regno], 0))
4491 || ! offsettable_memref_p (reg_equiv_mem[regno])
4492 || num_not_at_initial_offset))))
4493 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4494 insn);
4495 }
4496
4497 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4498 {
4499 if (fmt[i] == 'e')
4500 {
4501 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4502 ind_levels, is_set_dest, insn,
4503 address_reloaded);
4504 /* If we have replaced a reg with it's equivalent memory loc -
4505 that can still be handled here e.g. if it's in a paradoxical
4506 subreg - we must make the change in a copy, rather than using
4507 a destructive change. This way, find_reloads can still elect
4508 not to do the change. */
4509 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4510 {
4511 x = shallow_copy_rtx (x);
4512 copied = 1;
4513 }
4514 XEXP (x, i) = new_part;
4515 }
4516 }
4517 return x;
4518}
4519
4520/* Return a mem ref for the memory equivalent of reg REGNO.
4521 This mem ref is not shared with anything. */
4522
4523static rtx
4524make_memloc (ad, regno)
4525 rtx ad;
4526 int regno;
4527{
4528 /* We must rerun eliminate_regs, in case the elimination
4529 offsets have changed. */
4530 rtx tem
4531 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4532
4533 /* If TEM might contain a pseudo, we must copy it to avoid
4534 modifying it when we do the substitution for the reload. */
4535 if (rtx_varies_p (tem, 0))
4536 tem = copy_rtx (tem);
4537
4538 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4539 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4540
4541 /* Copy the result if it's still the same as the equivalence, to avoid
4542 modifying it when we do the substitution for the reload. */
4543 if (tem == reg_equiv_memory_loc[regno])
4544 tem = copy_rtx (tem);
4545 return tem;
4546}
4547
| 4480 /* If the subreg contains a reg that will be converted to a mem,
4481 convert the subreg to a narrower memref now.
4482 Otherwise, we would get (subreg (mem ...) ...),
4483 which would force reload of the mem.
4484
4485 We also need to do this if there is an equivalent MEM that is
4486 not offsettable. In that case, alter_subreg would produce an
4487 invalid address on big-endian machines.
4488
4489 For machines that extend byte loads, we must not reload using
4490 a wider mode if we have a paradoxical SUBREG. find_reloads will
4491 force a reload in that case. So we should not do anything here. */
4492
4493 else if (regno >= FIRST_PSEUDO_REGISTER
4494#ifdef LOAD_EXTEND_OP
4495 && (GET_MODE_SIZE (GET_MODE (x))
4496 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4497#endif
4498 && (reg_equiv_address[regno] != 0
4499 || (reg_equiv_mem[regno] != 0
4500 && (! strict_memory_address_p (GET_MODE (x),
4501 XEXP (reg_equiv_mem[regno], 0))
4502 || ! offsettable_memref_p (reg_equiv_mem[regno])
4503 || num_not_at_initial_offset))))
4504 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4505 insn);
4506 }
4507
4508 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4509 {
4510 if (fmt[i] == 'e')
4511 {
4512 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4513 ind_levels, is_set_dest, insn,
4514 address_reloaded);
4515 /* If we have replaced a reg with it's equivalent memory loc -
4516 that can still be handled here e.g. if it's in a paradoxical
4517 subreg - we must make the change in a copy, rather than using
4518 a destructive change. This way, find_reloads can still elect
4519 not to do the change. */
4520 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4521 {
4522 x = shallow_copy_rtx (x);
4523 copied = 1;
4524 }
4525 XEXP (x, i) = new_part;
4526 }
4527 }
4528 return x;
4529}
4530
4531/* Return a mem ref for the memory equivalent of reg REGNO.
4532 This mem ref is not shared with anything. */
4533
4534static rtx
4535make_memloc (ad, regno)
4536 rtx ad;
4537 int regno;
4538{
4539 /* We must rerun eliminate_regs, in case the elimination
4540 offsets have changed. */
4541 rtx tem
4542 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4543
4544 /* If TEM might contain a pseudo, we must copy it to avoid
4545 modifying it when we do the substitution for the reload. */
4546 if (rtx_varies_p (tem, 0))
4547 tem = copy_rtx (tem);
4548
4549 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4550 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4551
4552 /* Copy the result if it's still the same as the equivalence, to avoid
4553 modifying it when we do the substitution for the reload. */
4554 if (tem == reg_equiv_memory_loc[regno])
4555 tem = copy_rtx (tem);
4556 return tem;
4557}
4558
|
| 4559/* Returns true if AD could be turned into a valid memory reference
4560 to mode MODE by reloading the part pointed to by PART into a
4561 register. */
4562
4563static int
4564maybe_memory_address_p (mode, ad, part)
4565 enum machine_mode mode;
4566 rtx ad;
4567 rtx *part;
4568{
4569 int retv;
4570 rtx tem = *part;
4571 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4572
4573 *part = reg;
4574 retv = memory_address_p (mode, ad);
4575 *part = tem;
4576
4577 return retv;
4578}
4579
|
4548/* Record all reloads needed for handling memory address AD
4549 which appears in *LOC in a memory reference to mode MODE
4550 which itself is found in location *MEMREFLOC.
4551 Note that we take shortcuts assuming that no multi-reg machine mode
4552 occurs as part of an address.
4553
4554 OPNUM and TYPE specify the purpose of this reload.
4555
4556 IND_LEVELS says how many levels of indirect addressing this machine
4557 supports.
4558
4559 INSN, if nonzero, is the insn in which we do the reload. It is used
4560 to determine if we may generate output reloads, and where to put USEs
4561 for pseudos that we have to replace with stack slots.
4562
4563 Value is nonzero if this address is reloaded or replaced as a whole.
4564 This is interesting to the caller if the address is an autoincrement.
4565
4566 Note that there is no verification that the address will be valid after
4567 this routine does its work. Instead, we rely on the fact that the address
4568 was valid when reload started. So we need only undo things that reload
4569 could have broken. These are wrong register types, pseudos not allocated
4570 to a hard register, and frame pointer elimination. */
4571
4572static int
4573find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4574 enum machine_mode mode;
4575 rtx *memrefloc;
4576 rtx ad;
4577 rtx *loc;
4578 int opnum;
4579 enum reload_type type;
4580 int ind_levels;
4581 rtx insn;
4582{
4583 int regno;
4584 int removed_and = 0;
4585 rtx tem;
4586
4587 /* If the address is a register, see if it is a legitimate address and
4588 reload if not. We first handle the cases where we need not reload
4589 or where we must reload in a non-standard way. */
4590
4591 if (GET_CODE (ad) == REG)
4592 {
4593 regno = REGNO (ad);
4594
4595 /* If the register is equivalent to an invariant expression, substitute
4596 the invariant, and eliminate any eliminable register references. */
4597 tem = reg_equiv_constant[regno];
4598 if (tem != 0
4599 && (tem = eliminate_regs (tem, mode, insn))
4600 && strict_memory_address_p (mode, tem))
4601 {
4602 *loc = ad = tem;
4603 return 0;
4604 }
4605
4606 tem = reg_equiv_memory_loc[regno];
4607 if (tem != 0)
4608 {
4609 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4610 {
4611 tem = make_memloc (ad, regno);
4612 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4613 {
| 4580/* Record all reloads needed for handling memory address AD
4581 which appears in *LOC in a memory reference to mode MODE
4582 which itself is found in location *MEMREFLOC.
4583 Note that we take shortcuts assuming that no multi-reg machine mode
4584 occurs as part of an address.
4585
4586 OPNUM and TYPE specify the purpose of this reload.
4587
4588 IND_LEVELS says how many levels of indirect addressing this machine
4589 supports.
4590
4591 INSN, if nonzero, is the insn in which we do the reload. It is used
4592 to determine if we may generate output reloads, and where to put USEs
4593 for pseudos that we have to replace with stack slots.
4594
4595 Value is nonzero if this address is reloaded or replaced as a whole.
4596 This is interesting to the caller if the address is an autoincrement.
4597
4598 Note that there is no verification that the address will be valid after
4599 this routine does its work. Instead, we rely on the fact that the address
4600 was valid when reload started. So we need only undo things that reload
4601 could have broken. These are wrong register types, pseudos not allocated
4602 to a hard register, and frame pointer elimination. */
4603
4604static int
4605find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4606 enum machine_mode mode;
4607 rtx *memrefloc;
4608 rtx ad;
4609 rtx *loc;
4610 int opnum;
4611 enum reload_type type;
4612 int ind_levels;
4613 rtx insn;
4614{
4615 int regno;
4616 int removed_and = 0;
4617 rtx tem;
4618
4619 /* If the address is a register, see if it is a legitimate address and
4620 reload if not. We first handle the cases where we need not reload
4621 or where we must reload in a non-standard way. */
4622
4623 if (GET_CODE (ad) == REG)
4624 {
4625 regno = REGNO (ad);
4626
4627 /* If the register is equivalent to an invariant expression, substitute
4628 the invariant, and eliminate any eliminable register references. */
4629 tem = reg_equiv_constant[regno];
4630 if (tem != 0
4631 && (tem = eliminate_regs (tem, mode, insn))
4632 && strict_memory_address_p (mode, tem))
4633 {
4634 *loc = ad = tem;
4635 return 0;
4636 }
4637
4638 tem = reg_equiv_memory_loc[regno];
4639 if (tem != 0)
4640 {
4641 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4642 {
4643 tem = make_memloc (ad, regno);
4644 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4645 {
|
4614 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0),
4615 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4616 ind_levels, insn);
| 4646 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4647 &XEXP (tem, 0), opnum,
4648 ADDR_TYPE (type), ind_levels, insn);
|
4617 }
4618 /* We can avoid a reload if the register's equivalent memory
4619 expression is valid as an indirect memory address.
4620 But not all addresses are valid in a mem used as an indirect
4621 address: only reg or reg+constant. */
4622
4623 if (ind_levels > 0
4624 && strict_memory_address_p (mode, tem)
4625 && (GET_CODE (XEXP (tem, 0)) == REG
4626 || (GET_CODE (XEXP (tem, 0)) == PLUS
4627 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4628 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4629 {
4630 /* TEM is not the same as what we'll be replacing the
4631 pseudo with after reload, put a USE in front of INSN
4632 in the final reload pass. */
4633 if (replace_reloads
4634 && num_not_at_initial_offset
4635 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4636 {
4637 *loc = tem;
4638 /* We mark the USE with QImode so that we
4639 recognize it as one that can be safely
4640 deleted at the end of reload. */
4641 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4642 insn), QImode);
4643
4644 /* This doesn't really count as replacing the address
4645 as a whole, since it is still a memory access. */
4646 }
4647 return 0;
4648 }
4649 ad = tem;
4650 }
4651 }
4652
4653 /* The only remaining case where we can avoid a reload is if this is a
4654 hard register that is valid as a base register and which is not the
4655 subject of a CLOBBER in this insn. */
4656
4657 else if (regno < FIRST_PSEUDO_REGISTER
4658 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4659 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4660 return 0;
4661
4662 /* If we do not have one of the cases above, we must do the reload. */
4663 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4664 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4665 return 1;
4666 }
4667
4668 if (strict_memory_address_p (mode, ad))
4669 {
4670 /* The address appears valid, so reloads are not needed.
4671 But the address may contain an eliminable register.
4672 This can happen because a machine with indirect addressing
4673 may consider a pseudo register by itself a valid address even when
4674 it has failed to get a hard reg.
4675 So do a tree-walk to find and eliminate all such regs. */
4676
4677 /* But first quickly dispose of a common case. */
4678 if (GET_CODE (ad) == PLUS
4679 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4680 && GET_CODE (XEXP (ad, 0)) == REG
4681 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4682 return 0;
4683
4684 subst_reg_equivs_changed = 0;
4685 *loc = subst_reg_equivs (ad, insn);
4686
4687 if (! subst_reg_equivs_changed)
4688 return 0;
4689
4690 /* Check result for validity after substitution. */
4691 if (strict_memory_address_p (mode, ad))
4692 return 0;
4693 }
4694
4695#ifdef LEGITIMIZE_RELOAD_ADDRESS
4696 do
4697 {
4698 if (memrefloc)
4699 {
4700 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4701 ind_levels, win);
4702 }
4703 break;
4704 win:
4705 *memrefloc = copy_rtx (*memrefloc);
4706 XEXP (*memrefloc, 0) = ad;
4707 move_replacements (&ad, &XEXP (*memrefloc, 0));
4708 return 1;
4709 }
4710 while (0);
4711#endif
4712
4713 /* The address is not valid. We have to figure out why. First see if
4714 we have an outer AND and remove it if so. Then analyze what's inside. */
4715
4716 if (GET_CODE (ad) == AND)
4717 {
4718 removed_and = 1;
4719 loc = &XEXP (ad, 0);
4720 ad = *loc;
4721 }
4722
4723 /* One possibility for why the address is invalid is that it is itself
4724 a MEM. This can happen when the frame pointer is being eliminated, a
4725 pseudo is not allocated to a hard register, and the offset between the
4726 frame and stack pointers is not its initial value. In that case the
4727 pseudo will have been replaced by a MEM referring to the
4728 stack pointer. */
4729 if (GET_CODE (ad) == MEM)
4730 {
4731 /* First ensure that the address in this MEM is valid. Then, unless
4732 indirect addresses are valid, reload the MEM into a register. */
4733 tem = ad;
4734 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4735 opnum, ADDR_TYPE (type),
4736 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4737
4738 /* If tem was changed, then we must create a new memory reference to
4739 hold it and store it back into memrefloc. */
4740 if (tem != ad && memrefloc)
4741 {
4742 *memrefloc = copy_rtx (*memrefloc);
4743 copy_replacements (tem, XEXP (*memrefloc, 0));
4744 loc = &XEXP (*memrefloc, 0);
4745 if (removed_and)
4746 loc = &XEXP (*loc, 0);
4747 }
4748
4749 /* Check similar cases as for indirect addresses as above except
4750 that we can allow pseudos and a MEM since they should have been
4751 taken care of above. */
4752
4753 if (ind_levels == 0
4754 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4755 || GET_CODE (XEXP (tem, 0)) == MEM
4756 || ! (GET_CODE (XEXP (tem, 0)) == REG
4757 || (GET_CODE (XEXP (tem, 0)) == PLUS
4758 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4759 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4760 {
4761 /* Must use TEM here, not AD, since it is the one that will
4762 have any subexpressions reloaded, if needed. */
4763 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4764 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4765 VOIDmode, 0,
4766 0, opnum, type);
4767 return ! removed_and;
4768 }
4769 else
4770 return 0;
4771 }
4772
4773 /* If we have address of a stack slot but it's not valid because the
4774 displacement is too large, compute the sum in a register.
4775 Handle all base registers here, not just fp/ap/sp, because on some
4776 targets (namely SH) we can also get too large displacements from
4777 big-endian corrections. */
4778 else if (GET_CODE (ad) == PLUS
4779 && GET_CODE (XEXP (ad, 0)) == REG
4780 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4781 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4782 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4783 {
4784 /* Unshare the MEM rtx so we can safely alter it. */
4785 if (memrefloc)
4786 {
4787 *memrefloc = copy_rtx (*memrefloc);
4788 loc = &XEXP (*memrefloc, 0);
4789 if (removed_and)
4790 loc = &XEXP (*loc, 0);
4791 }
4792
4793 if (double_reg_address_ok)
4794 {
4795 /* Unshare the sum as well. */
4796 *loc = ad = copy_rtx (ad);
4797
4798 /* Reload the displacement into an index reg.
4799 We assume the frame pointer or arg pointer is a base reg. */
4800 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4801 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4802 type, ind_levels);
4803 return 0;
4804 }
4805 else
4806 {
4807 /* If the sum of two regs is not necessarily valid,
4808 reload the sum into a base reg.
4809 That will at least work. */
4810 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4811 Pmode, opnum, type, ind_levels);
4812 }
4813 return ! removed_and;
4814 }
4815
4816 /* If we have an indexed stack slot, there are three possible reasons why
4817 it might be invalid: The index might need to be reloaded, the address
4818 might have been made by frame pointer elimination and hence have a
4819 constant out of range, or both reasons might apply.
4820
4821 We can easily check for an index needing reload, but even if that is the
4822 case, we might also have an invalid constant. To avoid making the
4823 conservative assumption and requiring two reloads, we see if this address
4824 is valid when not interpreted strictly. If it is, the only problem is
4825 that the index needs a reload and find_reloads_address_1 will take care
4826 of it.
4827
| 4649 }
4650 /* We can avoid a reload if the register's equivalent memory
4651 expression is valid as an indirect memory address.
4652 But not all addresses are valid in a mem used as an indirect
4653 address: only reg or reg+constant. */
4654
4655 if (ind_levels > 0
4656 && strict_memory_address_p (mode, tem)
4657 && (GET_CODE (XEXP (tem, 0)) == REG
4658 || (GET_CODE (XEXP (tem, 0)) == PLUS
4659 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4660 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4661 {
4662 /* TEM is not the same as what we'll be replacing the
4663 pseudo with after reload, put a USE in front of INSN
4664 in the final reload pass. */
4665 if (replace_reloads
4666 && num_not_at_initial_offset
4667 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4668 {
4669 *loc = tem;
4670 /* We mark the USE with QImode so that we
4671 recognize it as one that can be safely
4672 deleted at the end of reload. */
4673 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4674 insn), QImode);
4675
4676 /* This doesn't really count as replacing the address
4677 as a whole, since it is still a memory access. */
4678 }
4679 return 0;
4680 }
4681 ad = tem;
4682 }
4683 }
4684
4685 /* The only remaining case where we can avoid a reload is if this is a
4686 hard register that is valid as a base register and which is not the
4687 subject of a CLOBBER in this insn. */
4688
4689 else if (regno < FIRST_PSEUDO_REGISTER
4690 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4691 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4692 return 0;
4693
4694 /* If we do not have one of the cases above, we must do the reload. */
4695 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4696 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4697 return 1;
4698 }
4699
4700 if (strict_memory_address_p (mode, ad))
4701 {
4702 /* The address appears valid, so reloads are not needed.
4703 But the address may contain an eliminable register.
4704 This can happen because a machine with indirect addressing
4705 may consider a pseudo register by itself a valid address even when
4706 it has failed to get a hard reg.
4707 So do a tree-walk to find and eliminate all such regs. */
4708
4709 /* But first quickly dispose of a common case. */
4710 if (GET_CODE (ad) == PLUS
4711 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4712 && GET_CODE (XEXP (ad, 0)) == REG
4713 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4714 return 0;
4715
4716 subst_reg_equivs_changed = 0;
4717 *loc = subst_reg_equivs (ad, insn);
4718
4719 if (! subst_reg_equivs_changed)
4720 return 0;
4721
4722 /* Check result for validity after substitution. */
4723 if (strict_memory_address_p (mode, ad))
4724 return 0;
4725 }
4726
4727#ifdef LEGITIMIZE_RELOAD_ADDRESS
4728 do
4729 {
4730 if (memrefloc)
4731 {
4732 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4733 ind_levels, win);
4734 }
4735 break;
4736 win:
4737 *memrefloc = copy_rtx (*memrefloc);
4738 XEXP (*memrefloc, 0) = ad;
4739 move_replacements (&ad, &XEXP (*memrefloc, 0));
4740 return 1;
4741 }
4742 while (0);
4743#endif
4744
4745 /* The address is not valid. We have to figure out why. First see if
4746 we have an outer AND and remove it if so. Then analyze what's inside. */
4747
4748 if (GET_CODE (ad) == AND)
4749 {
4750 removed_and = 1;
4751 loc = &XEXP (ad, 0);
4752 ad = *loc;
4753 }
4754
4755 /* One possibility for why the address is invalid is that it is itself
4756 a MEM. This can happen when the frame pointer is being eliminated, a
4757 pseudo is not allocated to a hard register, and the offset between the
4758 frame and stack pointers is not its initial value. In that case the
4759 pseudo will have been replaced by a MEM referring to the
4760 stack pointer. */
4761 if (GET_CODE (ad) == MEM)
4762 {
4763 /* First ensure that the address in this MEM is valid. Then, unless
4764 indirect addresses are valid, reload the MEM into a register. */
4765 tem = ad;
4766 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4767 opnum, ADDR_TYPE (type),
4768 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4769
4770 /* If tem was changed, then we must create a new memory reference to
4771 hold it and store it back into memrefloc. */
4772 if (tem != ad && memrefloc)
4773 {
4774 *memrefloc = copy_rtx (*memrefloc);
4775 copy_replacements (tem, XEXP (*memrefloc, 0));
4776 loc = &XEXP (*memrefloc, 0);
4777 if (removed_and)
4778 loc = &XEXP (*loc, 0);
4779 }
4780
4781 /* Check similar cases as for indirect addresses as above except
4782 that we can allow pseudos and a MEM since they should have been
4783 taken care of above. */
4784
4785 if (ind_levels == 0
4786 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4787 || GET_CODE (XEXP (tem, 0)) == MEM
4788 || ! (GET_CODE (XEXP (tem, 0)) == REG
4789 || (GET_CODE (XEXP (tem, 0)) == PLUS
4790 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4791 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4792 {
4793 /* Must use TEM here, not AD, since it is the one that will
4794 have any subexpressions reloaded, if needed. */
4795 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4796 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4797 VOIDmode, 0,
4798 0, opnum, type);
4799 return ! removed_and;
4800 }
4801 else
4802 return 0;
4803 }
4804
4805 /* If we have address of a stack slot but it's not valid because the
4806 displacement is too large, compute the sum in a register.
4807 Handle all base registers here, not just fp/ap/sp, because on some
4808 targets (namely SH) we can also get too large displacements from
4809 big-endian corrections. */
4810 else if (GET_CODE (ad) == PLUS
4811 && GET_CODE (XEXP (ad, 0)) == REG
4812 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4813 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4814 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4815 {
4816 /* Unshare the MEM rtx so we can safely alter it. */
4817 if (memrefloc)
4818 {
4819 *memrefloc = copy_rtx (*memrefloc);
4820 loc = &XEXP (*memrefloc, 0);
4821 if (removed_and)
4822 loc = &XEXP (*loc, 0);
4823 }
4824
4825 if (double_reg_address_ok)
4826 {
4827 /* Unshare the sum as well. */
4828 *loc = ad = copy_rtx (ad);
4829
4830 /* Reload the displacement into an index reg.
4831 We assume the frame pointer or arg pointer is a base reg. */
4832 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4833 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4834 type, ind_levels);
4835 return 0;
4836 }
4837 else
4838 {
4839 /* If the sum of two regs is not necessarily valid,
4840 reload the sum into a base reg.
4841 That will at least work. */
4842 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4843 Pmode, opnum, type, ind_levels);
4844 }
4845 return ! removed_and;
4846 }
4847
4848 /* If we have an indexed stack slot, there are three possible reasons why
4849 it might be invalid: The index might need to be reloaded, the address
4850 might have been made by frame pointer elimination and hence have a
4851 constant out of range, or both reasons might apply.
4852
4853 We can easily check for an index needing reload, but even if that is the
4854 case, we might also have an invalid constant. To avoid making the
4855 conservative assumption and requiring two reloads, we see if this address
4856 is valid when not interpreted strictly. If it is, the only problem is
4857 that the index needs a reload and find_reloads_address_1 will take care
4858 of it.
4859
|
4828 If we decide to do something here, it must be that
4829 `double_reg_address_ok' is true and that this address rtl was made by
4830 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
| 4860 Handle all base registers here, not just fp/ap/sp, because on some
4861 targets (namely Sparc) we can also get invalid addresses from preventive
4862 subreg big-endian corrections made by find_reloads_toplev.
4863
4864 If we decide to do something, it must be that `double_reg_address_ok'
4865 is true. We generate a reload of the base register + constant and
|
4831 rework the sum so that the reload register will be added to the index.
4832 This is safe because we know the address isn't shared.
4833
| 4866 rework the sum so that the reload register will be added to the index.
4867 This is safe because we know the address isn't shared.
4868
|
4834 We check for fp/ap/sp as both the first and second operand of the
4835 innermost PLUS. */
| 4869 We check for the base register as both the first and second operand of
4870 the innermost PLUS. */
|
4836
4837 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4838 && GET_CODE (XEXP (ad, 0)) == PLUS
| 4871
4872 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4873 && GET_CODE (XEXP (ad, 0)) == PLUS
|
4839 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4840#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4841 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4842#endif
4843#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4844 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4845#endif
4846 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4847 && ! memory_address_p (mode, ad))
| 4874 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4875 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4876 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4877 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
|
4848 {
4849 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4850 plus_constant (XEXP (XEXP (ad, 0), 0),
4851 INTVAL (XEXP (ad, 1))),
4852 XEXP (XEXP (ad, 0), 1));
4853 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4854 MODE_BASE_REG_CLASS (mode),
4855 GET_MODE (ad), opnum, type, ind_levels);
4856 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4857 type, 0, insn);
4858
4859 return 0;
4860 }
4861
4862 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4863 && GET_CODE (XEXP (ad, 0)) == PLUS
| 4878 {
4879 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4880 plus_constant (XEXP (XEXP (ad, 0), 0),
4881 INTVAL (XEXP (ad, 1))),
4882 XEXP (XEXP (ad, 0), 1));
4883 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4884 MODE_BASE_REG_CLASS (mode),
4885 GET_MODE (ad), opnum, type, ind_levels);
4886 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4887 type, 0, insn);
4888
4889 return 0;
4890 }
4891
4892 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4893 && GET_CODE (XEXP (ad, 0)) == PLUS
|
4864 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4865#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4866 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4867#endif
4868#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4869 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4870#endif
4871 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4872 && ! memory_address_p (mode, ad))
| 4894 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4895 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4896 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4897 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
|
4873 {
4874 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4875 XEXP (XEXP (ad, 0), 0),
4876 plus_constant (XEXP (XEXP (ad, 0), 1),
4877 INTVAL (XEXP (ad, 1))));
4878 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4879 MODE_BASE_REG_CLASS (mode),
4880 GET_MODE (ad), opnum, type, ind_levels);
4881 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4882 type, 0, insn);
4883
4884 return 0;
4885 }
4886
4887 /* See if address becomes valid when an eliminable register
4888 in a sum is replaced. */
4889
4890 tem = ad;
4891 if (GET_CODE (ad) == PLUS)
4892 tem = subst_indexed_address (ad);
4893 if (tem != ad && strict_memory_address_p (mode, tem))
4894 {
4895 /* Ok, we win that way. Replace any additional eliminable
4896 registers. */
4897
4898 subst_reg_equivs_changed = 0;
4899 tem = subst_reg_equivs (tem, insn);
4900
4901 /* Make sure that didn't make the address invalid again. */
4902
4903 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4904 {
4905 *loc = tem;
4906 return 0;
4907 }
4908 }
4909
4910 /* If constants aren't valid addresses, reload the constant address
4911 into a register. */
4912 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4913 {
4914 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4915 Unshare it so we can safely alter it. */
4916 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4917 && CONSTANT_POOL_ADDRESS_P (ad))
4918 {
4919 *memrefloc = copy_rtx (*memrefloc);
4920 loc = &XEXP (*memrefloc, 0);
4921 if (removed_and)
4922 loc = &XEXP (*loc, 0);
4923 }
4924
4925 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4926 Pmode, opnum, type, ind_levels);
4927 return ! removed_and;
4928 }
4929
4930 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4931 insn);
4932}
4933
4934/* Find all pseudo regs appearing in AD
4935 that are eliminable in favor of equivalent values
4936 and do not have hard regs; replace them by their equivalents.
4937 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4938 front of it for pseudos that we have to replace with stack slots. */
4939
4940static rtx
4941subst_reg_equivs (ad, insn)
4942 rtx ad;
4943 rtx insn;
4944{
4945 RTX_CODE code = GET_CODE (ad);
4946 int i;
4947 const char *fmt;
4948
4949 switch (code)
4950 {
4951 case HIGH:
4952 case CONST_INT:
4953 case CONST:
4954 case CONST_DOUBLE:
4955 case CONST_VECTOR:
4956 case SYMBOL_REF:
4957 case LABEL_REF:
4958 case PC:
4959 case CC0:
4960 return ad;
4961
4962 case REG:
4963 {
4964 int regno = REGNO (ad);
4965
4966 if (reg_equiv_constant[regno] != 0)
4967 {
4968 subst_reg_equivs_changed = 1;
4969 return reg_equiv_constant[regno];
4970 }
4971 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4972 {
4973 rtx mem = make_memloc (ad, regno);
4974 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4975 {
4976 subst_reg_equivs_changed = 1;
4977 /* We mark the USE with QImode so that we recognize it
4978 as one that can be safely deleted at the end of
4979 reload. */
4980 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
4981 QImode);
4982 return mem;
4983 }
4984 }
4985 }
4986 return ad;
4987
4988 case PLUS:
4989 /* Quickly dispose of a common case. */
4990 if (XEXP (ad, 0) == frame_pointer_rtx
4991 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4992 return ad;
4993 break;
4994
4995 default:
4996 break;
4997 }
4998
4999 fmt = GET_RTX_FORMAT (code);
5000 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5001 if (fmt[i] == 'e')
5002 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5003 return ad;
5004}
5005
5006/* Compute the sum of X and Y, making canonicalizations assumed in an
5007 address, namely: sum constant integers, surround the sum of two
5008 constants with a CONST, put the constant as the second operand, and
5009 group the constant on the outermost sum.
5010
5011 This routine assumes both inputs are already in canonical form. */
5012
5013rtx
5014form_sum (x, y)
5015 rtx x, y;
5016{
5017 rtx tem;
5018 enum machine_mode mode = GET_MODE (x);
5019
5020 if (mode == VOIDmode)
5021 mode = GET_MODE (y);
5022
5023 if (mode == VOIDmode)
5024 mode = Pmode;
5025
5026 if (GET_CODE (x) == CONST_INT)
5027 return plus_constant (y, INTVAL (x));
5028 else if (GET_CODE (y) == CONST_INT)
5029 return plus_constant (x, INTVAL (y));
5030 else if (CONSTANT_P (x))
5031 tem = x, x = y, y = tem;
5032
5033 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5034 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5035
5036 /* Note that if the operands of Y are specified in the opposite
5037 order in the recursive calls below, infinite recursion will occur. */
5038 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5039 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5040
5041 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5042 constant will have been placed second. */
5043 if (CONSTANT_P (x) && CONSTANT_P (y))
5044 {
5045 if (GET_CODE (x) == CONST)
5046 x = XEXP (x, 0);
5047 if (GET_CODE (y) == CONST)
5048 y = XEXP (y, 0);
5049
5050 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5051 }
5052
5053 return gen_rtx_PLUS (mode, x, y);
5054}
5055
5056/* If ADDR is a sum containing a pseudo register that should be
5057 replaced with a constant (from reg_equiv_constant),
5058 return the result of doing so, and also apply the associative
5059 law so that the result is more likely to be a valid address.
5060 (But it is not guaranteed to be one.)
5061
5062 Note that at most one register is replaced, even if more are
5063 replaceable. Also, we try to put the result into a canonical form
5064 so it is more likely to be a valid address.
5065
5066 In all other cases, return ADDR. */
5067
5068static rtx
5069subst_indexed_address (addr)
5070 rtx addr;
5071{
5072 rtx op0 = 0, op1 = 0, op2 = 0;
5073 rtx tem;
5074 int regno;
5075
5076 if (GET_CODE (addr) == PLUS)
5077 {
5078 /* Try to find a register to replace. */
5079 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5080 if (GET_CODE (op0) == REG
5081 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5082 && reg_renumber[regno] < 0
5083 && reg_equiv_constant[regno] != 0)
5084 op0 = reg_equiv_constant[regno];
5085 else if (GET_CODE (op1) == REG
5086 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5087 && reg_renumber[regno] < 0
5088 && reg_equiv_constant[regno] != 0)
5089 op1 = reg_equiv_constant[regno];
5090 else if (GET_CODE (op0) == PLUS
5091 && (tem = subst_indexed_address (op0)) != op0)
5092 op0 = tem;
5093 else if (GET_CODE (op1) == PLUS
5094 && (tem = subst_indexed_address (op1)) != op1)
5095 op1 = tem;
5096 else
5097 return addr;
5098
5099 /* Pick out up to three things to add. */
5100 if (GET_CODE (op1) == PLUS)
5101 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5102 else if (GET_CODE (op0) == PLUS)
5103 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5104
5105 /* Compute the sum. */
5106 if (op2 != 0)
5107 op1 = form_sum (op1, op2);
5108 if (op1 != 0)
5109 op0 = form_sum (op0, op1);
5110
5111 return op0;
5112 }
5113 return addr;
5114}
5115
5116/* Update the REG_INC notes for an insn. It updates all REG_INC
5117 notes for the instruction which refer to REGNO the to refer
5118 to the reload number.
5119
5120 INSN is the insn for which any REG_INC notes need updating.
5121
5122 REGNO is the register number which has been reloaded.
5123
5124 RELOADNUM is the reload number. */
5125
5126static void
5127update_auto_inc_notes (insn, regno, reloadnum)
5128 rtx insn ATTRIBUTE_UNUSED;
5129 int regno ATTRIBUTE_UNUSED;
5130 int reloadnum ATTRIBUTE_UNUSED;
5131{
5132#ifdef AUTO_INC_DEC
5133 rtx link;
5134
5135 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5136 if (REG_NOTE_KIND (link) == REG_INC
5137 && REGNO (XEXP (link, 0)) == regno)
5138 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5139#endif
5140}
5141
5142/* Record the pseudo registers we must reload into hard registers in a
5143 subexpression of a would-be memory address, X referring to a value
5144 in mode MODE. (This function is not called if the address we find
5145 is strictly valid.)
5146
5147 CONTEXT = 1 means we are considering regs as index regs,
5148 = 0 means we are considering them as base regs.
5149
5150 OPNUM and TYPE specify the purpose of any reloads made.
5151
5152 IND_LEVELS says how many levels of indirect addressing are
5153 supported at this point in the address.
5154
5155 INSN, if nonzero, is the insn in which we do the reload. It is used
5156 to determine if we may generate output reloads.
5157
5158 We return nonzero if X, as a whole, is reloaded or replaced. */
5159
5160/* Note that we take shortcuts assuming that no multi-reg machine mode
5161 occurs as part of an address.
5162 Also, this is not fully machine-customizable; it works for machines
5163 such as VAXen and 68000's and 32000's, but other possible machines
5164 could have addressing modes that this does not handle right. */
5165
5166static int
5167find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5168 enum machine_mode mode;
5169 rtx x;
5170 int context;
5171 rtx *loc;
5172 int opnum;
5173 enum reload_type type;
5174 int ind_levels;
5175 rtx insn;
5176{
5177 RTX_CODE code = GET_CODE (x);
5178
5179 switch (code)
5180 {
5181 case PLUS:
5182 {
5183 rtx orig_op0 = XEXP (x, 0);
5184 rtx orig_op1 = XEXP (x, 1);
5185 RTX_CODE code0 = GET_CODE (orig_op0);
5186 RTX_CODE code1 = GET_CODE (orig_op1);
5187 rtx op0 = orig_op0;
5188 rtx op1 = orig_op1;
5189
5190 if (GET_CODE (op0) == SUBREG)
5191 {
5192 op0 = SUBREG_REG (op0);
5193 code0 = GET_CODE (op0);
5194 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5195 op0 = gen_rtx_REG (word_mode,
5196 (REGNO (op0) +
5197 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5198 GET_MODE (SUBREG_REG (orig_op0)),
5199 SUBREG_BYTE (orig_op0),
5200 GET_MODE (orig_op0))));
5201 }
5202
5203 if (GET_CODE (op1) == SUBREG)
5204 {
5205 op1 = SUBREG_REG (op1);
5206 code1 = GET_CODE (op1);
5207 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5208 /* ??? Why is this given op1's mode and above for
5209 ??? op0 SUBREGs we use word_mode? */
5210 op1 = gen_rtx_REG (GET_MODE (op1),
5211 (REGNO (op1) +
5212 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5213 GET_MODE (SUBREG_REG (orig_op1)),
5214 SUBREG_BYTE (orig_op1),
5215 GET_MODE (orig_op1))));
5216 }
| 4898 {
4899 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4900 XEXP (XEXP (ad, 0), 0),
4901 plus_constant (XEXP (XEXP (ad, 0), 1),
4902 INTVAL (XEXP (ad, 1))));
4903 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4904 MODE_BASE_REG_CLASS (mode),
4905 GET_MODE (ad), opnum, type, ind_levels);
4906 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4907 type, 0, insn);
4908
4909 return 0;
4910 }
4911
4912 /* See if address becomes valid when an eliminable register
4913 in a sum is replaced. */
4914
4915 tem = ad;
4916 if (GET_CODE (ad) == PLUS)
4917 tem = subst_indexed_address (ad);
4918 if (tem != ad && strict_memory_address_p (mode, tem))
4919 {
4920 /* Ok, we win that way. Replace any additional eliminable
4921 registers. */
4922
4923 subst_reg_equivs_changed = 0;
4924 tem = subst_reg_equivs (tem, insn);
4925
4926 /* Make sure that didn't make the address invalid again. */
4927
4928 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4929 {
4930 *loc = tem;
4931 return 0;
4932 }
4933 }
4934
4935 /* If constants aren't valid addresses, reload the constant address
4936 into a register. */
4937 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4938 {
4939 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4940 Unshare it so we can safely alter it. */
4941 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4942 && CONSTANT_POOL_ADDRESS_P (ad))
4943 {
4944 *memrefloc = copy_rtx (*memrefloc);
4945 loc = &XEXP (*memrefloc, 0);
4946 if (removed_and)
4947 loc = &XEXP (*loc, 0);
4948 }
4949
4950 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4951 Pmode, opnum, type, ind_levels);
4952 return ! removed_and;
4953 }
4954
4955 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4956 insn);
4957}
4958
4959/* Find all pseudo regs appearing in AD
4960 that are eliminable in favor of equivalent values
4961 and do not have hard regs; replace them by their equivalents.
4962 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4963 front of it for pseudos that we have to replace with stack slots. */
4964
4965static rtx
4966subst_reg_equivs (ad, insn)
4967 rtx ad;
4968 rtx insn;
4969{
4970 RTX_CODE code = GET_CODE (ad);
4971 int i;
4972 const char *fmt;
4973
4974 switch (code)
4975 {
4976 case HIGH:
4977 case CONST_INT:
4978 case CONST:
4979 case CONST_DOUBLE:
4980 case CONST_VECTOR:
4981 case SYMBOL_REF:
4982 case LABEL_REF:
4983 case PC:
4984 case CC0:
4985 return ad;
4986
4987 case REG:
4988 {
4989 int regno = REGNO (ad);
4990
4991 if (reg_equiv_constant[regno] != 0)
4992 {
4993 subst_reg_equivs_changed = 1;
4994 return reg_equiv_constant[regno];
4995 }
4996 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4997 {
4998 rtx mem = make_memloc (ad, regno);
4999 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5000 {
5001 subst_reg_equivs_changed = 1;
5002 /* We mark the USE with QImode so that we recognize it
5003 as one that can be safely deleted at the end of
5004 reload. */
5005 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5006 QImode);
5007 return mem;
5008 }
5009 }
5010 }
5011 return ad;
5012
5013 case PLUS:
5014 /* Quickly dispose of a common case. */
5015 if (XEXP (ad, 0) == frame_pointer_rtx
5016 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5017 return ad;
5018 break;
5019
5020 default:
5021 break;
5022 }
5023
5024 fmt = GET_RTX_FORMAT (code);
5025 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5026 if (fmt[i] == 'e')
5027 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5028 return ad;
5029}
5030
5031/* Compute the sum of X and Y, making canonicalizations assumed in an
5032 address, namely: sum constant integers, surround the sum of two
5033 constants with a CONST, put the constant as the second operand, and
5034 group the constant on the outermost sum.
5035
5036 This routine assumes both inputs are already in canonical form. */
5037
5038rtx
5039form_sum (x, y)
5040 rtx x, y;
5041{
5042 rtx tem;
5043 enum machine_mode mode = GET_MODE (x);
5044
5045 if (mode == VOIDmode)
5046 mode = GET_MODE (y);
5047
5048 if (mode == VOIDmode)
5049 mode = Pmode;
5050
5051 if (GET_CODE (x) == CONST_INT)
5052 return plus_constant (y, INTVAL (x));
5053 else if (GET_CODE (y) == CONST_INT)
5054 return plus_constant (x, INTVAL (y));
5055 else if (CONSTANT_P (x))
5056 tem = x, x = y, y = tem;
5057
5058 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5059 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5060
5061 /* Note that if the operands of Y are specified in the opposite
5062 order in the recursive calls below, infinite recursion will occur. */
5063 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5064 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5065
5066 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5067 constant will have been placed second. */
5068 if (CONSTANT_P (x) && CONSTANT_P (y))
5069 {
5070 if (GET_CODE (x) == CONST)
5071 x = XEXP (x, 0);
5072 if (GET_CODE (y) == CONST)
5073 y = XEXP (y, 0);
5074
5075 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5076 }
5077
5078 return gen_rtx_PLUS (mode, x, y);
5079}
5080
5081/* If ADDR is a sum containing a pseudo register that should be
5082 replaced with a constant (from reg_equiv_constant),
5083 return the result of doing so, and also apply the associative
5084 law so that the result is more likely to be a valid address.
5085 (But it is not guaranteed to be one.)
5086
5087 Note that at most one register is replaced, even if more are
5088 replaceable. Also, we try to put the result into a canonical form
5089 so it is more likely to be a valid address.
5090
5091 In all other cases, return ADDR. */
5092
5093static rtx
5094subst_indexed_address (addr)
5095 rtx addr;
5096{
5097 rtx op0 = 0, op1 = 0, op2 = 0;
5098 rtx tem;
5099 int regno;
5100
5101 if (GET_CODE (addr) == PLUS)
5102 {
5103 /* Try to find a register to replace. */
5104 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5105 if (GET_CODE (op0) == REG
5106 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5107 && reg_renumber[regno] < 0
5108 && reg_equiv_constant[regno] != 0)
5109 op0 = reg_equiv_constant[regno];
5110 else if (GET_CODE (op1) == REG
5111 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5112 && reg_renumber[regno] < 0
5113 && reg_equiv_constant[regno] != 0)
5114 op1 = reg_equiv_constant[regno];
5115 else if (GET_CODE (op0) == PLUS
5116 && (tem = subst_indexed_address (op0)) != op0)
5117 op0 = tem;
5118 else if (GET_CODE (op1) == PLUS
5119 && (tem = subst_indexed_address (op1)) != op1)
5120 op1 = tem;
5121 else
5122 return addr;
5123
5124 /* Pick out up to three things to add. */
5125 if (GET_CODE (op1) == PLUS)
5126 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5127 else if (GET_CODE (op0) == PLUS)
5128 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5129
5130 /* Compute the sum. */
5131 if (op2 != 0)
5132 op1 = form_sum (op1, op2);
5133 if (op1 != 0)
5134 op0 = form_sum (op0, op1);
5135
5136 return op0;
5137 }
5138 return addr;
5139}
5140
5141/* Update the REG_INC notes for an insn. It updates all REG_INC
5142 notes for the instruction which refer to REGNO the to refer
5143 to the reload number.
5144
5145 INSN is the insn for which any REG_INC notes need updating.
5146
5147 REGNO is the register number which has been reloaded.
5148
5149 RELOADNUM is the reload number. */
5150
5151static void
5152update_auto_inc_notes (insn, regno, reloadnum)
5153 rtx insn ATTRIBUTE_UNUSED;
5154 int regno ATTRIBUTE_UNUSED;
5155 int reloadnum ATTRIBUTE_UNUSED;
5156{
5157#ifdef AUTO_INC_DEC
5158 rtx link;
5159
5160 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5161 if (REG_NOTE_KIND (link) == REG_INC
5162 && REGNO (XEXP (link, 0)) == regno)
5163 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5164#endif
5165}
5166
5167/* Record the pseudo registers we must reload into hard registers in a
5168 subexpression of a would-be memory address, X referring to a value
5169 in mode MODE. (This function is not called if the address we find
5170 is strictly valid.)
5171
5172 CONTEXT = 1 means we are considering regs as index regs,
5173 = 0 means we are considering them as base regs.
5174
5175 OPNUM and TYPE specify the purpose of any reloads made.
5176
5177 IND_LEVELS says how many levels of indirect addressing are
5178 supported at this point in the address.
5179
5180 INSN, if nonzero, is the insn in which we do the reload. It is used
5181 to determine if we may generate output reloads.
5182
5183 We return nonzero if X, as a whole, is reloaded or replaced. */
5184
5185/* Note that we take shortcuts assuming that no multi-reg machine mode
5186 occurs as part of an address.
5187 Also, this is not fully machine-customizable; it works for machines
5188 such as VAXen and 68000's and 32000's, but other possible machines
5189 could have addressing modes that this does not handle right. */
5190
5191static int
5192find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5193 enum machine_mode mode;
5194 rtx x;
5195 int context;
5196 rtx *loc;
5197 int opnum;
5198 enum reload_type type;
5199 int ind_levels;
5200 rtx insn;
5201{
5202 RTX_CODE code = GET_CODE (x);
5203
5204 switch (code)
5205 {
5206 case PLUS:
5207 {
5208 rtx orig_op0 = XEXP (x, 0);
5209 rtx orig_op1 = XEXP (x, 1);
5210 RTX_CODE code0 = GET_CODE (orig_op0);
5211 RTX_CODE code1 = GET_CODE (orig_op1);
5212 rtx op0 = orig_op0;
5213 rtx op1 = orig_op1;
5214
5215 if (GET_CODE (op0) == SUBREG)
5216 {
5217 op0 = SUBREG_REG (op0);
5218 code0 = GET_CODE (op0);
5219 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5220 op0 = gen_rtx_REG (word_mode,
5221 (REGNO (op0) +
5222 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5223 GET_MODE (SUBREG_REG (orig_op0)),
5224 SUBREG_BYTE (orig_op0),
5225 GET_MODE (orig_op0))));
5226 }
5227
5228 if (GET_CODE (op1) == SUBREG)
5229 {
5230 op1 = SUBREG_REG (op1);
5231 code1 = GET_CODE (op1);
5232 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5233 /* ??? Why is this given op1's mode and above for
5234 ??? op0 SUBREGs we use word_mode? */
5235 op1 = gen_rtx_REG (GET_MODE (op1),
5236 (REGNO (op1) +
5237 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5238 GET_MODE (SUBREG_REG (orig_op1)),
5239 SUBREG_BYTE (orig_op1),
5240 GET_MODE (orig_op1))));
5241 }
|
| 5242 /* Plus in the index register may be created only as a result of
5243 register remateralization for expresion like &localvar*4. Reload it.
5244 It may be possible to combine the displacement on the outer level,
5245 but it is probably not worthwhile to do so. */
5246 if (context)
5247 {
5248 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5249 opnum, ADDR_TYPE (type), ind_levels, insn);
5250 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5251 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5252 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5253 return 1;
5254 }
|
5217
5218 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5219 || code0 == ZERO_EXTEND || code1 == MEM)
5220 {
5221 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5222 type, ind_levels, insn);
5223 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5224 type, ind_levels, insn);
5225 }
5226
5227 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5228 || code1 == ZERO_EXTEND || code0 == MEM)
5229 {
5230 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5231 type, ind_levels, insn);
5232 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5233 type, ind_levels, insn);
5234 }
5235
5236 else if (code0 == CONST_INT || code0 == CONST
5237 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5238 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5239 type, ind_levels, insn);
5240
5241 else if (code1 == CONST_INT || code1 == CONST
5242 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5243 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5244 type, ind_levels, insn);
5245
5246 else if (code0 == REG && code1 == REG)
5247 {
5248 if (REG_OK_FOR_INDEX_P (op0)
5249 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5250 return 0;
5251 else if (REG_OK_FOR_INDEX_P (op1)
5252 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5253 return 0;
5254 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5255 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5256 type, ind_levels, insn);
5257 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5258 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5259 type, ind_levels, insn);
5260 else if (REG_OK_FOR_INDEX_P (op1))
5261 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5262 type, ind_levels, insn);
5263 else if (REG_OK_FOR_INDEX_P (op0))
5264 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5265 type, ind_levels, insn);
5266 else
5267 {
5268 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5269 type, ind_levels, insn);
5270 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5271 type, ind_levels, insn);
5272 }
5273 }
5274
5275 else if (code0 == REG)
5276 {
5277 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5278 type, ind_levels, insn);
5279 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5280 type, ind_levels, insn);
5281 }
5282
5283 else if (code1 == REG)
5284 {
5285 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5286 type, ind_levels, insn);
5287 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5288 type, ind_levels, insn);
5289 }
5290 }
5291
5292 return 0;
5293
5294 case POST_MODIFY:
5295 case PRE_MODIFY:
5296 {
5297 rtx op0 = XEXP (x, 0);
5298 rtx op1 = XEXP (x, 1);
5299
5300 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5301 return 0;
5302
5303 /* Currently, we only support {PRE,POST}_MODIFY constructs
5304 where a base register is {inc,dec}remented by the contents
5305 of another register or by a constant value. Thus, these
5306 operands must match. */
5307 if (op0 != XEXP (op1, 0))
5308 abort ();
5309
5310 /* Require index register (or constant). Let's just handle the
5311 register case in the meantime... If the target allows
5312 auto-modify by a constant then we could try replacing a pseudo
5313 register with its equivalent constant where applicable. */
5314 if (REG_P (XEXP (op1, 1)))
5315 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5316 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5317 opnum, type, ind_levels, insn);
5318
5319 if (REG_P (XEXP (op1, 0)))
5320 {
5321 int regno = REGNO (XEXP (op1, 0));
5322 int reloadnum;
5323
5324 /* A register that is incremented cannot be constant! */
5325 if (regno >= FIRST_PSEUDO_REGISTER
5326 && reg_equiv_constant[regno] != 0)
5327 abort ();
5328
5329 /* Handle a register that is equivalent to a memory location
5330 which cannot be addressed directly. */
5331 if (reg_equiv_memory_loc[regno] != 0
5332 && (reg_equiv_address[regno] != 0
5333 || num_not_at_initial_offset))
5334 {
5335 rtx tem = make_memloc (XEXP (x, 0), regno);
5336
5337 if (reg_equiv_address[regno]
5338 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5339 {
5340 /* First reload the memory location's address.
5341 We can't use ADDR_TYPE (type) here, because we need to
5342 write back the value after reading it, hence we actually
5343 need two registers. */
| 5255
5256 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5257 || code0 == ZERO_EXTEND || code1 == MEM)
5258 {
5259 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5260 type, ind_levels, insn);
5261 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5262 type, ind_levels, insn);
5263 }
5264
5265 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5266 || code1 == ZERO_EXTEND || code0 == MEM)
5267 {
5268 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5269 type, ind_levels, insn);
5270 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5271 type, ind_levels, insn);
5272 }
5273
5274 else if (code0 == CONST_INT || code0 == CONST
5275 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5276 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5277 type, ind_levels, insn);
5278
5279 else if (code1 == CONST_INT || code1 == CONST
5280 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5281 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5282 type, ind_levels, insn);
5283
5284 else if (code0 == REG && code1 == REG)
5285 {
5286 if (REG_OK_FOR_INDEX_P (op0)
5287 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5288 return 0;
5289 else if (REG_OK_FOR_INDEX_P (op1)
5290 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5291 return 0;
5292 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5293 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5294 type, ind_levels, insn);
5295 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5296 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5297 type, ind_levels, insn);
5298 else if (REG_OK_FOR_INDEX_P (op1))
5299 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5300 type, ind_levels, insn);
5301 else if (REG_OK_FOR_INDEX_P (op0))
5302 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5303 type, ind_levels, insn);
5304 else
5305 {
5306 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5307 type, ind_levels, insn);
5308 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5309 type, ind_levels, insn);
5310 }
5311 }
5312
5313 else if (code0 == REG)
5314 {
5315 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5316 type, ind_levels, insn);
5317 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5318 type, ind_levels, insn);
5319 }
5320
5321 else if (code1 == REG)
5322 {
5323 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5324 type, ind_levels, insn);
5325 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5326 type, ind_levels, insn);
5327 }
5328 }
5329
5330 return 0;
5331
5332 case POST_MODIFY:
5333 case PRE_MODIFY:
5334 {
5335 rtx op0 = XEXP (x, 0);
5336 rtx op1 = XEXP (x, 1);
5337
5338 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5339 return 0;
5340
5341 /* Currently, we only support {PRE,POST}_MODIFY constructs
5342 where a base register is {inc,dec}remented by the contents
5343 of another register or by a constant value. Thus, these
5344 operands must match. */
5345 if (op0 != XEXP (op1, 0))
5346 abort ();
5347
5348 /* Require index register (or constant). Let's just handle the
5349 register case in the meantime... If the target allows
5350 auto-modify by a constant then we could try replacing a pseudo
5351 register with its equivalent constant where applicable. */
5352 if (REG_P (XEXP (op1, 1)))
5353 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5354 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5355 opnum, type, ind_levels, insn);
5356
5357 if (REG_P (XEXP (op1, 0)))
5358 {
5359 int regno = REGNO (XEXP (op1, 0));
5360 int reloadnum;
5361
5362 /* A register that is incremented cannot be constant! */
5363 if (regno >= FIRST_PSEUDO_REGISTER
5364 && reg_equiv_constant[regno] != 0)
5365 abort ();
5366
5367 /* Handle a register that is equivalent to a memory location
5368 which cannot be addressed directly. */
5369 if (reg_equiv_memory_loc[regno] != 0
5370 && (reg_equiv_address[regno] != 0
5371 || num_not_at_initial_offset))
5372 {
5373 rtx tem = make_memloc (XEXP (x, 0), regno);
5374
5375 if (reg_equiv_address[regno]
5376 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5377 {
5378 /* First reload the memory location's address.
5379 We can't use ADDR_TYPE (type) here, because we need to
5380 write back the value after reading it, hence we actually
5381 need two registers. */
|
5344 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
| 5382 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
|
5345 &XEXP (tem, 0), opnum,
5346 RELOAD_OTHER,
5347 ind_levels, insn);
5348
5349 /* Then reload the memory location into a base
5350 register. */
5351 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5352 &XEXP (op1, 0),
5353 MODE_BASE_REG_CLASS (mode),
5354 GET_MODE (x), GET_MODE (x), 0,
5355 0, opnum, RELOAD_OTHER);
5356
5357 update_auto_inc_notes (this_insn, regno, reloadnum);
5358 return 0;
5359 }
5360 }
5361
5362 if (reg_renumber[regno] >= 0)
5363 regno = reg_renumber[regno];
5364
5365 /* We require a base register here... */
5366 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5367 {
5368 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5369 &XEXP (op1, 0), &XEXP (x, 0),
5370 MODE_BASE_REG_CLASS (mode),
5371 GET_MODE (x), GET_MODE (x), 0, 0,
5372 opnum, RELOAD_OTHER);
5373
5374 update_auto_inc_notes (this_insn, regno, reloadnum);
5375 return 0;
5376 }
5377 }
5378 else
5379 abort ();
5380 }
5381 return 0;
5382
5383 case POST_INC:
5384 case POST_DEC:
5385 case PRE_INC:
5386 case PRE_DEC:
5387 if (GET_CODE (XEXP (x, 0)) == REG)
5388 {
5389 int regno = REGNO (XEXP (x, 0));
5390 int value = 0;
5391 rtx x_orig = x;
5392
5393 /* A register that is incremented cannot be constant! */
5394 if (regno >= FIRST_PSEUDO_REGISTER
5395 && reg_equiv_constant[regno] != 0)
5396 abort ();
5397
5398 /* Handle a register that is equivalent to a memory location
5399 which cannot be addressed directly. */
5400 if (reg_equiv_memory_loc[regno] != 0
5401 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5402 {
5403 rtx tem = make_memloc (XEXP (x, 0), regno);
5404 if (reg_equiv_address[regno]
5405 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5406 {
5407 /* First reload the memory location's address.
5408 We can't use ADDR_TYPE (type) here, because we need to
5409 write back the value after reading it, hence we actually
5410 need two registers. */
5411 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5412 &XEXP (tem, 0), opnum, type,
5413 ind_levels, insn);
5414 /* Put this inside a new increment-expression. */
5415 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5416 /* Proceed to reload that, as if it contained a register. */
5417 }
5418 }
5419
5420 /* If we have a hard register that is ok as an index,
5421 don't make a reload. If an autoincrement of a nice register
5422 isn't "valid", it must be that no autoincrement is "valid".
5423 If that is true and something made an autoincrement anyway,
5424 this must be a special context where one is allowed.
5425 (For example, a "push" instruction.)
5426 We can't improve this address, so leave it alone. */
5427
5428 /* Otherwise, reload the autoincrement into a suitable hard reg
5429 and record how much to increment by. */
5430
5431 if (reg_renumber[regno] >= 0)
5432 regno = reg_renumber[regno];
5433 if ((regno >= FIRST_PSEUDO_REGISTER
5434 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5435 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5436 {
5437 int reloadnum;
5438
5439 /* If we can output the register afterwards, do so, this
5440 saves the extra update.
5441 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5442 CALL_INSN - and it does not set CC0.
5443 But don't do this if we cannot directly address the
5444 memory location, since this will make it harder to
5445 reuse address reloads, and increases register pressure.
5446 Also don't do this if we can probably update x directly. */
5447 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5448 ? XEXP (x, 0)
5449 : reg_equiv_mem[regno]);
5450 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5451 if (insn && GET_CODE (insn) == INSN && equiv
5452 && memory_operand (equiv, GET_MODE (equiv))
5453#ifdef HAVE_cc0
5454 && ! sets_cc0_p (PATTERN (insn))
5455#endif
5456 && ! (icode != CODE_FOR_nothing
5457 && ((*insn_data[icode].operand[0].predicate)
5458 (equiv, Pmode))
5459 && ((*insn_data[icode].operand[1].predicate)
5460 (equiv, Pmode))))
5461 {
5462 /* We use the original pseudo for loc, so that
5463 emit_reload_insns() knows which pseudo this
5464 reload refers to and updates the pseudo rtx, not
5465 its equivalent memory location, as well as the
5466 corresponding entry in reg_last_reload_reg. */
5467 loc = &XEXP (x_orig, 0);
5468 x = XEXP (x, 0);
5469 reloadnum
5470 = push_reload (x, x, loc, loc,
5471 (context ? INDEX_REG_CLASS :
5472 MODE_BASE_REG_CLASS (mode)),
5473 GET_MODE (x), GET_MODE (x), 0, 0,
5474 opnum, RELOAD_OTHER);
5475 }
5476 else
5477 {
5478 reloadnum
5479 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5480 (context ? INDEX_REG_CLASS :
5481 MODE_BASE_REG_CLASS (mode)),
5482 GET_MODE (x), GET_MODE (x), 0, 0,
5483 opnum, type);
5484 rld[reloadnum].inc
5485 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5486
5487 value = 1;
5488 }
5489
5490 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5491 reloadnum);
5492 }
5493 return value;
5494 }
5495
5496 else if (GET_CODE (XEXP (x, 0)) == MEM)
5497 {
5498 /* This is probably the result of a substitution, by eliminate_regs,
5499 of an equivalent address for a pseudo that was not allocated to a
5500 hard register. Verify that the specified address is valid and
5501 reload it into a register. */
5502 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5503 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5504 rtx link;
5505 int reloadnum;
5506
5507 /* Since we know we are going to reload this item, don't decrement
5508 for the indirection level.
5509
5510 Note that this is actually conservative: it would be slightly
5511 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5512 reload1.c here. */
5513 /* We can't use ADDR_TYPE (type) here, because we need to
5514 write back the value after reading it, hence we actually
5515 need two registers. */
5516 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5517 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5518 opnum, type, ind_levels, insn);
5519
5520 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5521 (context ? INDEX_REG_CLASS :
5522 MODE_BASE_REG_CLASS (mode)),
5523 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5524 rld[reloadnum].inc
5525 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5526
5527 link = FIND_REG_INC_NOTE (this_insn, tem);
5528 if (link != 0)
5529 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5530
5531 return 1;
5532 }
5533 return 0;
5534
5535 case MEM:
5536 /* This is probably the result of a substitution, by eliminate_regs, of
5537 an equivalent address for a pseudo that was not allocated to a hard
5538 register. Verify that the specified address is valid and reload it
5539 into a register.
5540
5541 Since we know we are going to reload this item, don't decrement for
5542 the indirection level.
5543
5544 Note that this is actually conservative: it would be slightly more
5545 efficient to use the value of SPILL_INDIRECT_LEVELS from
5546 reload1.c here. */
5547
5548 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5549 opnum, ADDR_TYPE (type), ind_levels, insn);
5550 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5551 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5552 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5553 return 1;
5554
5555 case REG:
5556 {
5557 int regno = REGNO (x);
5558
5559 if (reg_equiv_constant[regno] != 0)
5560 {
5561 find_reloads_address_part (reg_equiv_constant[regno], loc,
5562 (context ? INDEX_REG_CLASS :
5563 MODE_BASE_REG_CLASS (mode)),
5564 GET_MODE (x), opnum, type, ind_levels);
5565 return 1;
5566 }
5567
5568#if 0 /* This might screw code in reload1.c to delete prior output-reload
5569 that feeds this insn. */
5570 if (reg_equiv_mem[regno] != 0)
5571 {
5572 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5573 (context ? INDEX_REG_CLASS :
5574 MODE_BASE_REG_CLASS (mode)),
5575 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5576 return 1;
5577 }
5578#endif
5579
5580 if (reg_equiv_memory_loc[regno]
5581 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5582 {
5583 rtx tem = make_memloc (x, regno);
5584 if (reg_equiv_address[regno] != 0
5585 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5586 {
5587 x = tem;
5588 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5589 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5590 ind_levels, insn);
5591 }
5592 }
5593
5594 if (reg_renumber[regno] >= 0)
5595 regno = reg_renumber[regno];
5596
5597 if ((regno >= FIRST_PSEUDO_REGISTER
5598 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5599 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5600 {
5601 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5602 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5603 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5604 return 1;
5605 }
5606
5607 /* If a register appearing in an address is the subject of a CLOBBER
5608 in this insn, reload it into some other register to be safe.
5609 The CLOBBER is supposed to make the register unavailable
5610 from before this insn to after it. */
5611 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5612 {
5613 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5614 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5615 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5616 return 1;
5617 }
5618 }
5619 return 0;
5620
5621 case SUBREG:
5622 if (GET_CODE (SUBREG_REG (x)) == REG)
5623 {
5624 /* If this is a SUBREG of a hard register and the resulting register
5625 is of the wrong class, reload the whole SUBREG. This avoids
5626 needless copies if SUBREG_REG is multi-word. */
5627 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5628 {
5629 int regno = subreg_regno (x);
5630
5631 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5632 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5633 {
5634 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5635 (context ? INDEX_REG_CLASS :
5636 MODE_BASE_REG_CLASS (mode)),
5637 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5638 return 1;
5639 }
5640 }
5641 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5642 is larger than the class size, then reload the whole SUBREG. */
5643 else
5644 {
5645 enum reg_class class = (context ? INDEX_REG_CLASS
5646 : MODE_BASE_REG_CLASS (mode));
| 5383 &XEXP (tem, 0), opnum,
5384 RELOAD_OTHER,
5385 ind_levels, insn);
5386
5387 /* Then reload the memory location into a base
5388 register. */
5389 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5390 &XEXP (op1, 0),
5391 MODE_BASE_REG_CLASS (mode),
5392 GET_MODE (x), GET_MODE (x), 0,
5393 0, opnum, RELOAD_OTHER);
5394
5395 update_auto_inc_notes (this_insn, regno, reloadnum);
5396 return 0;
5397 }
5398 }
5399
5400 if (reg_renumber[regno] >= 0)
5401 regno = reg_renumber[regno];
5402
5403 /* We require a base register here... */
5404 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5405 {
5406 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5407 &XEXP (op1, 0), &XEXP (x, 0),
5408 MODE_BASE_REG_CLASS (mode),
5409 GET_MODE (x), GET_MODE (x), 0, 0,
5410 opnum, RELOAD_OTHER);
5411
5412 update_auto_inc_notes (this_insn, regno, reloadnum);
5413 return 0;
5414 }
5415 }
5416 else
5417 abort ();
5418 }
5419 return 0;
5420
5421 case POST_INC:
5422 case POST_DEC:
5423 case PRE_INC:
5424 case PRE_DEC:
5425 if (GET_CODE (XEXP (x, 0)) == REG)
5426 {
5427 int regno = REGNO (XEXP (x, 0));
5428 int value = 0;
5429 rtx x_orig = x;
5430
5431 /* A register that is incremented cannot be constant! */
5432 if (regno >= FIRST_PSEUDO_REGISTER
5433 && reg_equiv_constant[regno] != 0)
5434 abort ();
5435
5436 /* Handle a register that is equivalent to a memory location
5437 which cannot be addressed directly. */
5438 if (reg_equiv_memory_loc[regno] != 0
5439 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5440 {
5441 rtx tem = make_memloc (XEXP (x, 0), regno);
5442 if (reg_equiv_address[regno]
5443 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5444 {
5445 /* First reload the memory location's address.
5446 We can't use ADDR_TYPE (type) here, because we need to
5447 write back the value after reading it, hence we actually
5448 need two registers. */
5449 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5450 &XEXP (tem, 0), opnum, type,
5451 ind_levels, insn);
5452 /* Put this inside a new increment-expression. */
5453 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5454 /* Proceed to reload that, as if it contained a register. */
5455 }
5456 }
5457
5458 /* If we have a hard register that is ok as an index,
5459 don't make a reload. If an autoincrement of a nice register
5460 isn't "valid", it must be that no autoincrement is "valid".
5461 If that is true and something made an autoincrement anyway,
5462 this must be a special context where one is allowed.
5463 (For example, a "push" instruction.)
5464 We can't improve this address, so leave it alone. */
5465
5466 /* Otherwise, reload the autoincrement into a suitable hard reg
5467 and record how much to increment by. */
5468
5469 if (reg_renumber[regno] >= 0)
5470 regno = reg_renumber[regno];
5471 if ((regno >= FIRST_PSEUDO_REGISTER
5472 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5473 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5474 {
5475 int reloadnum;
5476
5477 /* If we can output the register afterwards, do so, this
5478 saves the extra update.
5479 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5480 CALL_INSN - and it does not set CC0.
5481 But don't do this if we cannot directly address the
5482 memory location, since this will make it harder to
5483 reuse address reloads, and increases register pressure.
5484 Also don't do this if we can probably update x directly. */
5485 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5486 ? XEXP (x, 0)
5487 : reg_equiv_mem[regno]);
5488 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5489 if (insn && GET_CODE (insn) == INSN && equiv
5490 && memory_operand (equiv, GET_MODE (equiv))
5491#ifdef HAVE_cc0
5492 && ! sets_cc0_p (PATTERN (insn))
5493#endif
5494 && ! (icode != CODE_FOR_nothing
5495 && ((*insn_data[icode].operand[0].predicate)
5496 (equiv, Pmode))
5497 && ((*insn_data[icode].operand[1].predicate)
5498 (equiv, Pmode))))
5499 {
5500 /* We use the original pseudo for loc, so that
5501 emit_reload_insns() knows which pseudo this
5502 reload refers to and updates the pseudo rtx, not
5503 its equivalent memory location, as well as the
5504 corresponding entry in reg_last_reload_reg. */
5505 loc = &XEXP (x_orig, 0);
5506 x = XEXP (x, 0);
5507 reloadnum
5508 = push_reload (x, x, loc, loc,
5509 (context ? INDEX_REG_CLASS :
5510 MODE_BASE_REG_CLASS (mode)),
5511 GET_MODE (x), GET_MODE (x), 0, 0,
5512 opnum, RELOAD_OTHER);
5513 }
5514 else
5515 {
5516 reloadnum
5517 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5518 (context ? INDEX_REG_CLASS :
5519 MODE_BASE_REG_CLASS (mode)),
5520 GET_MODE (x), GET_MODE (x), 0, 0,
5521 opnum, type);
5522 rld[reloadnum].inc
5523 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5524
5525 value = 1;
5526 }
5527
5528 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5529 reloadnum);
5530 }
5531 return value;
5532 }
5533
5534 else if (GET_CODE (XEXP (x, 0)) == MEM)
5535 {
5536 /* This is probably the result of a substitution, by eliminate_regs,
5537 of an equivalent address for a pseudo that was not allocated to a
5538 hard register. Verify that the specified address is valid and
5539 reload it into a register. */
5540 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5541 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5542 rtx link;
5543 int reloadnum;
5544
5545 /* Since we know we are going to reload this item, don't decrement
5546 for the indirection level.
5547
5548 Note that this is actually conservative: it would be slightly
5549 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5550 reload1.c here. */
5551 /* We can't use ADDR_TYPE (type) here, because we need to
5552 write back the value after reading it, hence we actually
5553 need two registers. */
5554 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5555 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5556 opnum, type, ind_levels, insn);
5557
5558 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5559 (context ? INDEX_REG_CLASS :
5560 MODE_BASE_REG_CLASS (mode)),
5561 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5562 rld[reloadnum].inc
5563 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5564
5565 link = FIND_REG_INC_NOTE (this_insn, tem);
5566 if (link != 0)
5567 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5568
5569 return 1;
5570 }
5571 return 0;
5572
5573 case MEM:
5574 /* This is probably the result of a substitution, by eliminate_regs, of
5575 an equivalent address for a pseudo that was not allocated to a hard
5576 register. Verify that the specified address is valid and reload it
5577 into a register.
5578
5579 Since we know we are going to reload this item, don't decrement for
5580 the indirection level.
5581
5582 Note that this is actually conservative: it would be slightly more
5583 efficient to use the value of SPILL_INDIRECT_LEVELS from
5584 reload1.c here. */
5585
5586 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5587 opnum, ADDR_TYPE (type), ind_levels, insn);
5588 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5589 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5590 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5591 return 1;
5592
5593 case REG:
5594 {
5595 int regno = REGNO (x);
5596
5597 if (reg_equiv_constant[regno] != 0)
5598 {
5599 find_reloads_address_part (reg_equiv_constant[regno], loc,
5600 (context ? INDEX_REG_CLASS :
5601 MODE_BASE_REG_CLASS (mode)),
5602 GET_MODE (x), opnum, type, ind_levels);
5603 return 1;
5604 }
5605
5606#if 0 /* This might screw code in reload1.c to delete prior output-reload
5607 that feeds this insn. */
5608 if (reg_equiv_mem[regno] != 0)
5609 {
5610 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5611 (context ? INDEX_REG_CLASS :
5612 MODE_BASE_REG_CLASS (mode)),
5613 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5614 return 1;
5615 }
5616#endif
5617
5618 if (reg_equiv_memory_loc[regno]
5619 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5620 {
5621 rtx tem = make_memloc (x, regno);
5622 if (reg_equiv_address[regno] != 0
5623 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5624 {
5625 x = tem;
5626 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5627 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5628 ind_levels, insn);
5629 }
5630 }
5631
5632 if (reg_renumber[regno] >= 0)
5633 regno = reg_renumber[regno];
5634
5635 if ((regno >= FIRST_PSEUDO_REGISTER
5636 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5637 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5638 {
5639 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5640 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5641 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5642 return 1;
5643 }
5644
5645 /* If a register appearing in an address is the subject of a CLOBBER
5646 in this insn, reload it into some other register to be safe.
5647 The CLOBBER is supposed to make the register unavailable
5648 from before this insn to after it. */
5649 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5650 {
5651 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5652 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5653 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5654 return 1;
5655 }
5656 }
5657 return 0;
5658
5659 case SUBREG:
5660 if (GET_CODE (SUBREG_REG (x)) == REG)
5661 {
5662 /* If this is a SUBREG of a hard register and the resulting register
5663 is of the wrong class, reload the whole SUBREG. This avoids
5664 needless copies if SUBREG_REG is multi-word. */
5665 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5666 {
5667 int regno = subreg_regno (x);
5668
5669 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5670 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5671 {
5672 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5673 (context ? INDEX_REG_CLASS :
5674 MODE_BASE_REG_CLASS (mode)),
5675 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5676 return 1;
5677 }
5678 }
5679 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5680 is larger than the class size, then reload the whole SUBREG. */
5681 else
5682 {
5683 enum reg_class class = (context ? INDEX_REG_CLASS
5684 : MODE_BASE_REG_CLASS (mode));
|
5647 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
| 5685 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
|
5648 > reg_class_size[class])
5649 {
5650 x = find_reloads_subreg_address (x, 0, opnum, type,
5651 ind_levels, insn);
5652 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5653 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5654 return 1;
5655 }
5656 }
5657 }
5658 break;
5659
5660 default:
5661 break;
5662 }
5663
5664 {
5665 const char *fmt = GET_RTX_FORMAT (code);
5666 int i;
5667
5668 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5669 {
5670 if (fmt[i] == 'e')
5671 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5672 opnum, type, ind_levels, insn);
5673 }
5674 }
5675
5676 return 0;
5677}
5678
5679/* X, which is found at *LOC, is a part of an address that needs to be
5680 reloaded into a register of class CLASS. If X is a constant, or if
5681 X is a PLUS that contains a constant, check that the constant is a
5682 legitimate operand and that we are supposed to be able to load
5683 it into the register.
5684
5685 If not, force the constant into memory and reload the MEM instead.
5686
5687 MODE is the mode to use, in case X is an integer constant.
5688
5689 OPNUM and TYPE describe the purpose of any reloads made.
5690
5691 IND_LEVELS says how many levels of indirect addressing this machine
5692 supports. */
5693
5694static void
5695find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5696 rtx x;
5697 rtx *loc;
5698 enum reg_class class;
5699 enum machine_mode mode;
5700 int opnum;
5701 enum reload_type type;
5702 int ind_levels;
5703{
5704 if (CONSTANT_P (x)
5705 && (! LEGITIMATE_CONSTANT_P (x)
5706 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5707 {
5708 rtx tem;
5709
5710 tem = x = force_const_mem (mode, x);
5711 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5712 opnum, type, ind_levels, 0);
5713 }
5714
5715 else if (GET_CODE (x) == PLUS
5716 && CONSTANT_P (XEXP (x, 1))
5717 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5718 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5719 {
5720 rtx tem;
5721
5722 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5723 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5724 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5725 opnum, type, ind_levels, 0);
5726 }
5727
5728 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5729 mode, VOIDmode, 0, 0, opnum, type);
5730}
5731
5732/* X, a subreg of a pseudo, is a part of an address that needs to be
5733 reloaded.
5734
5735 If the pseudo is equivalent to a memory location that cannot be directly
5736 addressed, make the necessary address reloads.
5737
5738 If address reloads have been necessary, or if the address is changed
5739 by register elimination, return the rtx of the memory location;
5740 otherwise, return X.
5741
5742 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5743 memory location.
5744
5745 OPNUM and TYPE identify the purpose of the reload.
5746
5747 IND_LEVELS says how many levels of indirect addressing are
5748 supported at this point in the address.
5749
5750 INSN, if nonzero, is the insn in which we do the reload. It is used
5751 to determine where to put USEs for pseudos that we have to replace with
5752 stack slots. */
5753
5754static rtx
5755find_reloads_subreg_address (x, force_replace, opnum, type,
5756 ind_levels, insn)
5757 rtx x;
5758 int force_replace;
5759 int opnum;
5760 enum reload_type type;
5761 int ind_levels;
5762 rtx insn;
5763{
5764 int regno = REGNO (SUBREG_REG (x));
5765
5766 if (reg_equiv_memory_loc[regno])
5767 {
5768 /* If the address is not directly addressable, or if the address is not
5769 offsettable, then it must be replaced. */
5770 if (! force_replace
5771 && (reg_equiv_address[regno]
5772 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5773 force_replace = 1;
5774
5775 if (force_replace || num_not_at_initial_offset)
5776 {
5777 rtx tem = make_memloc (SUBREG_REG (x), regno);
5778
5779 /* If the address changes because of register elimination, then
5780 it must be replaced. */
5781 if (force_replace
5782 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5783 {
5784 int offset = SUBREG_BYTE (x);
5785 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5786 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5787
5788 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5789 PUT_MODE (tem, GET_MODE (x));
5790
5791 /* If this was a paradoxical subreg that we replaced, the
5792 resulting memory must be sufficiently aligned to allow
5793 us to widen the mode of the memory. */
5794 if (outer_size > inner_size && STRICT_ALIGNMENT)
5795 {
5796 rtx base;
5797
5798 base = XEXP (tem, 0);
5799 if (GET_CODE (base) == PLUS)
5800 {
5801 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5802 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5803 return x;
5804 base = XEXP (base, 0);
5805 }
5806 if (GET_CODE (base) != REG
5807 || (REGNO_POINTER_ALIGN (REGNO (base))
5808 < outer_size * BITS_PER_UNIT))
5809 return x;
5810 }
5811
5812 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5813 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5814 ind_levels, insn);
5815
5816 /* If this is not a toplevel operand, find_reloads doesn't see
5817 this substitution. We have to emit a USE of the pseudo so
5818 that delete_output_reload can see it. */
5819 if (replace_reloads && recog_data.operand[opnum] != x)
5820 /* We mark the USE with QImode so that we recognize it
5821 as one that can be safely deleted at the end of
5822 reload. */
5823 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5824 SUBREG_REG (x)),
5825 insn), QImode);
5826 x = tem;
5827 }
5828 }
5829 }
5830 return x;
5831}
5832
5833/* Substitute into the current INSN the registers into which we have reloaded
5834 the things that need reloading. The array `replacements'
5835 contains the locations of all pointers that must be changed
5836 and says what to replace them with.
5837
5838 Return the rtx that X translates into; usually X, but modified. */
5839
5840void
5841subst_reloads (insn)
5842 rtx insn;
5843{
5844 int i;
5845
5846 for (i = 0; i < n_replacements; i++)
5847 {
5848 struct replacement *r = &replacements[i];
5849 rtx reloadreg = rld[r->what].reg_rtx;
5850 if (reloadreg)
5851 {
5852#ifdef ENABLE_CHECKING
5853 /* Internal consistency test. Check that we don't modify
5854 anything in the equivalence arrays. Whenever something from
5855 those arrays needs to be reloaded, it must be unshared before
5856 being substituted into; the equivalence must not be modified.
5857 Otherwise, if the equivalence is used after that, it will
5858 have been modified, and the thing substituted (probably a
5859 register) is likely overwritten and not a usable equivalence. */
5860 int check_regno;
5861
5862 for (check_regno = 0; check_regno < max_regno; check_regno++)
5863 {
5864#define CHECK_MODF(ARRAY) \
5865 if (ARRAY[check_regno] \
5866 && loc_mentioned_in_p (r->where, \
5867 ARRAY[check_regno])) \
5868 abort ()
5869
5870 CHECK_MODF (reg_equiv_constant);
5871 CHECK_MODF (reg_equiv_memory_loc);
5872 CHECK_MODF (reg_equiv_address);
5873 CHECK_MODF (reg_equiv_mem);
5874#undef CHECK_MODF
5875 }
5876#endif /* ENABLE_CHECKING */
5877
5878 /* If we're replacing a LABEL_REF with a register, add a
5879 REG_LABEL note to indicate to flow which label this
5880 register refers to. */
5881 if (GET_CODE (*r->where) == LABEL_REF
5882 && GET_CODE (insn) == JUMP_INSN)
5883 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5884 XEXP (*r->where, 0),
5885 REG_NOTES (insn));
5886
5887 /* Encapsulate RELOADREG so its machine mode matches what
5888 used to be there. Note that gen_lowpart_common will
5889 do the wrong thing if RELOADREG is multi-word. RELOADREG
5890 will always be a REG here. */
5891 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5892 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5893
5894 /* If we are putting this into a SUBREG and RELOADREG is a
5895 SUBREG, we would be making nested SUBREGs, so we have to fix
5896 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5897
5898 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5899 {
5900 if (GET_MODE (*r->subreg_loc)
5901 == GET_MODE (SUBREG_REG (reloadreg)))
5902 *r->subreg_loc = SUBREG_REG (reloadreg);
5903 else
5904 {
5905 int final_offset =
5906 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5907
5908 /* When working with SUBREGs the rule is that the byte
5909 offset must be a multiple of the SUBREG's mode. */
5910 final_offset = (final_offset /
5911 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5912 final_offset = (final_offset *
5913 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5914
5915 *r->where = SUBREG_REG (reloadreg);
5916 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5917 }
5918 }
5919 else
5920 *r->where = reloadreg;
5921 }
5922 /* If reload got no reg and isn't optional, something's wrong. */
5923 else if (! rld[r->what].optional)
5924 abort ();
5925 }
5926}
5927
5928/* Make a copy of any replacements being done into X and move those
5929 copies to locations in Y, a copy of X. */
5930
5931void
5932copy_replacements (x, y)
5933 rtx x, y;
5934{
5935 /* We can't support X being a SUBREG because we might then need to know its
5936 location if something inside it was replaced. */
5937 if (GET_CODE (x) == SUBREG)
5938 abort ();
5939
5940 copy_replacements_1 (&x, &y, n_replacements);
5941}
5942
5943static void
5944copy_replacements_1 (px, py, orig_replacements)
5945 rtx *px;
5946 rtx *py;
5947 int orig_replacements;
5948{
5949 int i, j;
5950 rtx x, y;
5951 struct replacement *r;
5952 enum rtx_code code;
5953 const char *fmt;
5954
5955 for (j = 0; j < orig_replacements; j++)
5956 {
5957 if (replacements[j].subreg_loc == px)
5958 {
5959 r = &replacements[n_replacements++];
5960 r->where = replacements[j].where;
5961 r->subreg_loc = py;
5962 r->what = replacements[j].what;
5963 r->mode = replacements[j].mode;
5964 }
5965 else if (replacements[j].where == px)
5966 {
5967 r = &replacements[n_replacements++];
5968 r->where = py;
5969 r->subreg_loc = 0;
5970 r->what = replacements[j].what;
5971 r->mode = replacements[j].mode;
5972 }
5973 }
5974
5975 x = *px;
5976 y = *py;
5977 code = GET_CODE (x);
5978 fmt = GET_RTX_FORMAT (code);
5979
5980 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5981 {
5982 if (fmt[i] == 'e')
5983 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
5984 else if (fmt[i] == 'E')
5985 for (j = XVECLEN (x, i); --j >= 0; )
5986 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
5987 orig_replacements);
5988 }
5989}
5990
| 5686 > reg_class_size[class])
5687 {
5688 x = find_reloads_subreg_address (x, 0, opnum, type,
5689 ind_levels, insn);
5690 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5691 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5692 return 1;
5693 }
5694 }
5695 }
5696 break;
5697
5698 default:
5699 break;
5700 }
5701
5702 {
5703 const char *fmt = GET_RTX_FORMAT (code);
5704 int i;
5705
5706 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5707 {
5708 if (fmt[i] == 'e')
5709 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5710 opnum, type, ind_levels, insn);
5711 }
5712 }
5713
5714 return 0;
5715}
5716
5717/* X, which is found at *LOC, is a part of an address that needs to be
5718 reloaded into a register of class CLASS. If X is a constant, or if
5719 X is a PLUS that contains a constant, check that the constant is a
5720 legitimate operand and that we are supposed to be able to load
5721 it into the register.
5722
5723 If not, force the constant into memory and reload the MEM instead.
5724
5725 MODE is the mode to use, in case X is an integer constant.
5726
5727 OPNUM and TYPE describe the purpose of any reloads made.
5728
5729 IND_LEVELS says how many levels of indirect addressing this machine
5730 supports. */
5731
5732static void
5733find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5734 rtx x;
5735 rtx *loc;
5736 enum reg_class class;
5737 enum machine_mode mode;
5738 int opnum;
5739 enum reload_type type;
5740 int ind_levels;
5741{
5742 if (CONSTANT_P (x)
5743 && (! LEGITIMATE_CONSTANT_P (x)
5744 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5745 {
5746 rtx tem;
5747
5748 tem = x = force_const_mem (mode, x);
5749 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5750 opnum, type, ind_levels, 0);
5751 }
5752
5753 else if (GET_CODE (x) == PLUS
5754 && CONSTANT_P (XEXP (x, 1))
5755 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5756 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5757 {
5758 rtx tem;
5759
5760 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5761 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5762 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5763 opnum, type, ind_levels, 0);
5764 }
5765
5766 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5767 mode, VOIDmode, 0, 0, opnum, type);
5768}
5769
5770/* X, a subreg of a pseudo, is a part of an address that needs to be
5771 reloaded.
5772
5773 If the pseudo is equivalent to a memory location that cannot be directly
5774 addressed, make the necessary address reloads.
5775
5776 If address reloads have been necessary, or if the address is changed
5777 by register elimination, return the rtx of the memory location;
5778 otherwise, return X.
5779
5780 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5781 memory location.
5782
5783 OPNUM and TYPE identify the purpose of the reload.
5784
5785 IND_LEVELS says how many levels of indirect addressing are
5786 supported at this point in the address.
5787
5788 INSN, if nonzero, is the insn in which we do the reload. It is used
5789 to determine where to put USEs for pseudos that we have to replace with
5790 stack slots. */
5791
5792static rtx
5793find_reloads_subreg_address (x, force_replace, opnum, type,
5794 ind_levels, insn)
5795 rtx x;
5796 int force_replace;
5797 int opnum;
5798 enum reload_type type;
5799 int ind_levels;
5800 rtx insn;
5801{
5802 int regno = REGNO (SUBREG_REG (x));
5803
5804 if (reg_equiv_memory_loc[regno])
5805 {
5806 /* If the address is not directly addressable, or if the address is not
5807 offsettable, then it must be replaced. */
5808 if (! force_replace
5809 && (reg_equiv_address[regno]
5810 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5811 force_replace = 1;
5812
5813 if (force_replace || num_not_at_initial_offset)
5814 {
5815 rtx tem = make_memloc (SUBREG_REG (x), regno);
5816
5817 /* If the address changes because of register elimination, then
5818 it must be replaced. */
5819 if (force_replace
5820 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5821 {
5822 int offset = SUBREG_BYTE (x);
5823 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5824 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5825
5826 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5827 PUT_MODE (tem, GET_MODE (x));
5828
5829 /* If this was a paradoxical subreg that we replaced, the
5830 resulting memory must be sufficiently aligned to allow
5831 us to widen the mode of the memory. */
5832 if (outer_size > inner_size && STRICT_ALIGNMENT)
5833 {
5834 rtx base;
5835
5836 base = XEXP (tem, 0);
5837 if (GET_CODE (base) == PLUS)
5838 {
5839 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5840 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5841 return x;
5842 base = XEXP (base, 0);
5843 }
5844 if (GET_CODE (base) != REG
5845 || (REGNO_POINTER_ALIGN (REGNO (base))
5846 < outer_size * BITS_PER_UNIT))
5847 return x;
5848 }
5849
5850 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5851 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5852 ind_levels, insn);
5853
5854 /* If this is not a toplevel operand, find_reloads doesn't see
5855 this substitution. We have to emit a USE of the pseudo so
5856 that delete_output_reload can see it. */
5857 if (replace_reloads && recog_data.operand[opnum] != x)
5858 /* We mark the USE with QImode so that we recognize it
5859 as one that can be safely deleted at the end of
5860 reload. */
5861 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5862 SUBREG_REG (x)),
5863 insn), QImode);
5864 x = tem;
5865 }
5866 }
5867 }
5868 return x;
5869}
5870
5871/* Substitute into the current INSN the registers into which we have reloaded
5872 the things that need reloading. The array `replacements'
5873 contains the locations of all pointers that must be changed
5874 and says what to replace them with.
5875
5876 Return the rtx that X translates into; usually X, but modified. */
5877
5878void
5879subst_reloads (insn)
5880 rtx insn;
5881{
5882 int i;
5883
5884 for (i = 0; i < n_replacements; i++)
5885 {
5886 struct replacement *r = &replacements[i];
5887 rtx reloadreg = rld[r->what].reg_rtx;
5888 if (reloadreg)
5889 {
5890#ifdef ENABLE_CHECKING
5891 /* Internal consistency test. Check that we don't modify
5892 anything in the equivalence arrays. Whenever something from
5893 those arrays needs to be reloaded, it must be unshared before
5894 being substituted into; the equivalence must not be modified.
5895 Otherwise, if the equivalence is used after that, it will
5896 have been modified, and the thing substituted (probably a
5897 register) is likely overwritten and not a usable equivalence. */
5898 int check_regno;
5899
5900 for (check_regno = 0; check_regno < max_regno; check_regno++)
5901 {
5902#define CHECK_MODF(ARRAY) \
5903 if (ARRAY[check_regno] \
5904 && loc_mentioned_in_p (r->where, \
5905 ARRAY[check_regno])) \
5906 abort ()
5907
5908 CHECK_MODF (reg_equiv_constant);
5909 CHECK_MODF (reg_equiv_memory_loc);
5910 CHECK_MODF (reg_equiv_address);
5911 CHECK_MODF (reg_equiv_mem);
5912#undef CHECK_MODF
5913 }
5914#endif /* ENABLE_CHECKING */
5915
5916 /* If we're replacing a LABEL_REF with a register, add a
5917 REG_LABEL note to indicate to flow which label this
5918 register refers to. */
5919 if (GET_CODE (*r->where) == LABEL_REF
5920 && GET_CODE (insn) == JUMP_INSN)
5921 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5922 XEXP (*r->where, 0),
5923 REG_NOTES (insn));
5924
5925 /* Encapsulate RELOADREG so its machine mode matches what
5926 used to be there. Note that gen_lowpart_common will
5927 do the wrong thing if RELOADREG is multi-word. RELOADREG
5928 will always be a REG here. */
5929 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5930 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5931
5932 /* If we are putting this into a SUBREG and RELOADREG is a
5933 SUBREG, we would be making nested SUBREGs, so we have to fix
5934 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5935
5936 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5937 {
5938 if (GET_MODE (*r->subreg_loc)
5939 == GET_MODE (SUBREG_REG (reloadreg)))
5940 *r->subreg_loc = SUBREG_REG (reloadreg);
5941 else
5942 {
5943 int final_offset =
5944 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5945
5946 /* When working with SUBREGs the rule is that the byte
5947 offset must be a multiple of the SUBREG's mode. */
5948 final_offset = (final_offset /
5949 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5950 final_offset = (final_offset *
5951 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5952
5953 *r->where = SUBREG_REG (reloadreg);
5954 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5955 }
5956 }
5957 else
5958 *r->where = reloadreg;
5959 }
5960 /* If reload got no reg and isn't optional, something's wrong. */
5961 else if (! rld[r->what].optional)
5962 abort ();
5963 }
5964}
5965
5966/* Make a copy of any replacements being done into X and move those
5967 copies to locations in Y, a copy of X. */
5968
5969void
5970copy_replacements (x, y)
5971 rtx x, y;
5972{
5973 /* We can't support X being a SUBREG because we might then need to know its
5974 location if something inside it was replaced. */
5975 if (GET_CODE (x) == SUBREG)
5976 abort ();
5977
5978 copy_replacements_1 (&x, &y, n_replacements);
5979}
5980
5981static void
5982copy_replacements_1 (px, py, orig_replacements)
5983 rtx *px;
5984 rtx *py;
5985 int orig_replacements;
5986{
5987 int i, j;
5988 rtx x, y;
5989 struct replacement *r;
5990 enum rtx_code code;
5991 const char *fmt;
5992
5993 for (j = 0; j < orig_replacements; j++)
5994 {
5995 if (replacements[j].subreg_loc == px)
5996 {
5997 r = &replacements[n_replacements++];
5998 r->where = replacements[j].where;
5999 r->subreg_loc = py;
6000 r->what = replacements[j].what;
6001 r->mode = replacements[j].mode;
6002 }
6003 else if (replacements[j].where == px)
6004 {
6005 r = &replacements[n_replacements++];
6006 r->where = py;
6007 r->subreg_loc = 0;
6008 r->what = replacements[j].what;
6009 r->mode = replacements[j].mode;
6010 }
6011 }
6012
6013 x = *px;
6014 y = *py;
6015 code = GET_CODE (x);
6016 fmt = GET_RTX_FORMAT (code);
6017
6018 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6019 {
6020 if (fmt[i] == 'e')
6021 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6022 else if (fmt[i] == 'E')
6023 for (j = XVECLEN (x, i); --j >= 0; )
6024 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6025 orig_replacements);
6026 }
6027}
6028
|
5991/* Change any replacements being done to *X to be done to *Y */
| 6029/* Change any replacements being done to *X to be done to *Y. */
|
5992
5993void
5994move_replacements (x, y)
5995 rtx *x;
5996 rtx *y;
5997{
5998 int i;
5999
6000 for (i = 0; i < n_replacements; i++)
6001 if (replacements[i].subreg_loc == x)
6002 replacements[i].subreg_loc = y;
6003 else if (replacements[i].where == x)
6004 {
6005 replacements[i].where = y;
6006 replacements[i].subreg_loc = 0;
6007 }
6008}
6009
6010/* If LOC was scheduled to be replaced by something, return the replacement.
6011 Otherwise, return *LOC. */
6012
6013rtx
6014find_replacement (loc)
6015 rtx *loc;
6016{
6017 struct replacement *r;
6018
6019 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6020 {
6021 rtx reloadreg = rld[r->what].reg_rtx;
6022
6023 if (reloadreg && r->where == loc)
6024 {
6025 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6026 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6027
6028 return reloadreg;
6029 }
6030 else if (reloadreg && r->subreg_loc == loc)
6031 {
6032 /* RELOADREG must be either a REG or a SUBREG.
6033
6034 ??? Is it actually still ever a SUBREG? If so, why? */
6035
6036 if (GET_CODE (reloadreg) == REG)
6037 return gen_rtx_REG (GET_MODE (*loc),
6038 (REGNO (reloadreg) +
6039 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6040 GET_MODE (SUBREG_REG (*loc)),
6041 SUBREG_BYTE (*loc),
6042 GET_MODE (*loc))));
6043 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6044 return reloadreg;
6045 else
6046 {
6047 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6048
6049 /* When working with SUBREGs the rule is that the byte
6050 offset must be a multiple of the SUBREG's mode. */
6051 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6052 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6053 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6054 final_offset);
6055 }
6056 }
6057 }
6058
6059 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6060 what's inside and make a new rtl if so. */
6061 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6062 || GET_CODE (*loc) == MULT)
6063 {
6064 rtx x = find_replacement (&XEXP (*loc, 0));
6065 rtx y = find_replacement (&XEXP (*loc, 1));
6066
6067 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6068 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6069 }
6070
6071 return *loc;
6072}
6073
6074/* Return nonzero if register in range [REGNO, ENDREGNO)
6075 appears either explicitly or implicitly in X
6076 other than being stored into (except for earlyclobber operands).
6077
6078 References contained within the substructure at LOC do not count.
6079 LOC may be zero, meaning don't ignore anything.
6080
6081 This is similar to refers_to_regno_p in rtlanal.c except that we
6082 look at equivalences for pseudos that didn't get hard registers. */
6083
6084int
6085refers_to_regno_for_reload_p (regno, endregno, x, loc)
6086 unsigned int regno, endregno;
6087 rtx x;
6088 rtx *loc;
6089{
6090 int i;
6091 unsigned int r;
6092 RTX_CODE code;
6093 const char *fmt;
6094
6095 if (x == 0)
6096 return 0;
6097
6098 repeat:
6099 code = GET_CODE (x);
6100
6101 switch (code)
6102 {
6103 case REG:
6104 r = REGNO (x);
6105
6106 /* If this is a pseudo, a hard register must not have been allocated.
6107 X must therefore either be a constant or be in memory. */
6108 if (r >= FIRST_PSEUDO_REGISTER)
6109 {
6110 if (reg_equiv_memory_loc[r])
6111 return refers_to_regno_for_reload_p (regno, endregno,
6112 reg_equiv_memory_loc[r],
6113 (rtx*) 0);
6114
6115 if (reg_equiv_constant[r])
6116 return 0;
6117
6118 abort ();
6119 }
6120
6121 return (endregno > r
6122 && regno < r + (r < FIRST_PSEUDO_REGISTER
6123 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6124 : 1));
6125
6126 case SUBREG:
6127 /* If this is a SUBREG of a hard reg, we can see exactly which
6128 registers are being modified. Otherwise, handle normally. */
6129 if (GET_CODE (SUBREG_REG (x)) == REG
6130 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6131 {
6132 unsigned int inner_regno = subreg_regno (x);
6133 unsigned int inner_endregno
6134 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6135 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6136
6137 return endregno > inner_regno && regno < inner_endregno;
6138 }
6139 break;
6140
6141 case CLOBBER:
6142 case SET:
6143 if (&SET_DEST (x) != loc
6144 /* Note setting a SUBREG counts as referring to the REG it is in for
6145 a pseudo but not for hard registers since we can
6146 treat each word individually. */
6147 && ((GET_CODE (SET_DEST (x)) == SUBREG
6148 && loc != &SUBREG_REG (SET_DEST (x))
6149 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6150 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6151 && refers_to_regno_for_reload_p (regno, endregno,
6152 SUBREG_REG (SET_DEST (x)),
6153 loc))
6154 /* If the output is an earlyclobber operand, this is
6155 a conflict. */
6156 || ((GET_CODE (SET_DEST (x)) != REG
6157 || earlyclobber_operand_p (SET_DEST (x)))
6158 && refers_to_regno_for_reload_p (regno, endregno,
6159 SET_DEST (x), loc))))
6160 return 1;
6161
6162 if (code == CLOBBER || loc == &SET_SRC (x))
6163 return 0;
6164 x = SET_SRC (x);
6165 goto repeat;
6166
6167 default:
6168 break;
6169 }
6170
6171 /* X does not match, so try its subexpressions. */
6172
6173 fmt = GET_RTX_FORMAT (code);
6174 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6175 {
6176 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6177 {
6178 if (i == 0)
6179 {
6180 x = XEXP (x, 0);
6181 goto repeat;
6182 }
6183 else
6184 if (refers_to_regno_for_reload_p (regno, endregno,
6185 XEXP (x, i), loc))
6186 return 1;
6187 }
6188 else if (fmt[i] == 'E')
6189 {
6190 int j;
6191 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6192 if (loc != &XVECEXP (x, i, j)
6193 && refers_to_regno_for_reload_p (regno, endregno,
6194 XVECEXP (x, i, j), loc))
6195 return 1;
6196 }
6197 }
6198 return 0;
6199}
6200
6201/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6202 we check if any register number in X conflicts with the relevant register
6203 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6204 contains a MEM (we don't bother checking for memory addresses that can't
6205 conflict because we expect this to be a rare case.
6206
6207 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6208 that we look at equivalences for pseudos that didn't get hard registers. */
6209
6210int
6211reg_overlap_mentioned_for_reload_p (x, in)
6212 rtx x, in;
6213{
6214 int regno, endregno;
6215
6216 /* Overly conservative. */
6217 if (GET_CODE (x) == STRICT_LOW_PART
6218 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6219 x = XEXP (x, 0);
6220
6221 /* If either argument is a constant, then modifying X can not affect IN. */
6222 if (CONSTANT_P (x) || CONSTANT_P (in))
6223 return 0;
6224 else if (GET_CODE (x) == SUBREG)
6225 {
6226 regno = REGNO (SUBREG_REG (x));
6227 if (regno < FIRST_PSEUDO_REGISTER)
6228 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6229 GET_MODE (SUBREG_REG (x)),
6230 SUBREG_BYTE (x),
6231 GET_MODE (x));
6232 }
6233 else if (GET_CODE (x) == REG)
6234 {
6235 regno = REGNO (x);
6236
6237 /* If this is a pseudo, it must not have been assigned a hard register.
6238 Therefore, it must either be in memory or be a constant. */
6239
6240 if (regno >= FIRST_PSEUDO_REGISTER)
6241 {
6242 if (reg_equiv_memory_loc[regno])
6243 return refers_to_mem_for_reload_p (in);
6244 else if (reg_equiv_constant[regno])
6245 return 0;
6246 abort ();
6247 }
6248 }
6249 else if (GET_CODE (x) == MEM)
6250 return refers_to_mem_for_reload_p (in);
6251 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6252 || GET_CODE (x) == CC0)
6253 return reg_mentioned_p (x, in);
6254 else if (GET_CODE (x) == PLUS)
6255 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6256 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6257 else
6258 abort ();
6259
6260 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6261 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6262
6263 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6264}
6265
6266/* Return nonzero if anything in X contains a MEM. Look also for pseudo
6267 registers. */
6268
6269int
6270refers_to_mem_for_reload_p (x)
6271 rtx x;
6272{
6273 const char *fmt;
6274 int i;
6275
6276 if (GET_CODE (x) == MEM)
6277 return 1;
6278
6279 if (GET_CODE (x) == REG)
6280 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6281 && reg_equiv_memory_loc[REGNO (x)]);
6282
6283 fmt = GET_RTX_FORMAT (GET_CODE (x));
6284 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6285 if (fmt[i] == 'e'
6286 && (GET_CODE (XEXP (x, i)) == MEM
6287 || refers_to_mem_for_reload_p (XEXP (x, i))))
6288 return 1;
6289
6290 return 0;
6291}
6292
6293/* Check the insns before INSN to see if there is a suitable register
6294 containing the same value as GOAL.
6295 If OTHER is -1, look for a register in class CLASS.
6296 Otherwise, just see if register number OTHER shares GOAL's value.
6297
6298 Return an rtx for the register found, or zero if none is found.
6299
6300 If RELOAD_REG_P is (short *)1,
6301 we reject any hard reg that appears in reload_reg_rtx
6302 because such a hard reg is also needed coming into this insn.
6303
6304 If RELOAD_REG_P is any other nonzero value,
6305 it is a vector indexed by hard reg number
6306 and we reject any hard reg whose element in the vector is nonnegative
6307 as well as any that appears in reload_reg_rtx.
6308
6309 If GOAL is zero, then GOALREG is a register number; we look
6310 for an equivalent for that register.
6311
6312 MODE is the machine mode of the value we want an equivalence for.
6313 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6314
6315 This function is used by jump.c as well as in the reload pass.
6316
6317 If GOAL is the sum of the stack pointer and a constant, we treat it
6318 as if it were a constant except that sp is required to be unchanging. */
6319
6320rtx
6321find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6322 rtx goal;
6323 rtx insn;
6324 enum reg_class class;
6325 int other;
6326 short *reload_reg_p;
6327 int goalreg;
6328 enum machine_mode mode;
6329{
6330 rtx p = insn;
6331 rtx goaltry, valtry, value, where;
6332 rtx pat;
6333 int regno = -1;
6334 int valueno;
6335 int goal_mem = 0;
6336 int goal_const = 0;
6337 int goal_mem_addr_varies = 0;
6338 int need_stable_sp = 0;
6339 int nregs;
6340 int valuenregs;
6341
6342 if (goal == 0)
6343 regno = goalreg;
6344 else if (GET_CODE (goal) == REG)
6345 regno = REGNO (goal);
6346 else if (GET_CODE (goal) == MEM)
6347 {
6348 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6349 if (MEM_VOLATILE_P (goal))
6350 return 0;
6351 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6352 return 0;
6353 /* An address with side effects must be reexecuted. */
6354 switch (code)
6355 {
6356 case POST_INC:
6357 case PRE_INC:
6358 case POST_DEC:
6359 case PRE_DEC:
6360 case POST_MODIFY:
6361 case PRE_MODIFY:
6362 return 0;
6363 default:
6364 break;
6365 }
6366 goal_mem = 1;
6367 }
6368 else if (CONSTANT_P (goal))
6369 goal_const = 1;
6370 else if (GET_CODE (goal) == PLUS
6371 && XEXP (goal, 0) == stack_pointer_rtx
6372 && CONSTANT_P (XEXP (goal, 1)))
6373 goal_const = need_stable_sp = 1;
6374 else if (GET_CODE (goal) == PLUS
6375 && XEXP (goal, 0) == frame_pointer_rtx
6376 && CONSTANT_P (XEXP (goal, 1)))
6377 goal_const = 1;
6378 else
6379 return 0;
6380
6381 /* Scan insns back from INSN, looking for one that copies
6382 a value into or out of GOAL.
6383 Stop and give up if we reach a label. */
6384
6385 while (1)
6386 {
6387 p = PREV_INSN (p);
6388 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6389 return 0;
6390
6391 if (GET_CODE (p) == INSN
6392 /* If we don't want spill regs ... */
6393 && (! (reload_reg_p != 0
6394 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6395 /* ... then ignore insns introduced by reload; they aren't
6396 useful and can cause results in reload_as_needed to be
6397 different from what they were when calculating the need for
6398 spills. If we notice an input-reload insn here, we will
6399 reject it below, but it might hide a usable equivalent.
6400 That makes bad code. It may even abort: perhaps no reg was
6401 spilled for this insn because it was assumed we would find
6402 that equivalent. */
6403 || INSN_UID (p) < reload_first_uid))
6404 {
6405 rtx tem;
6406 pat = single_set (p);
6407
6408 /* First check for something that sets some reg equal to GOAL. */
6409 if (pat != 0
6410 && ((regno >= 0
6411 && true_regnum (SET_SRC (pat)) == regno
6412 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6413 ||
6414 (regno >= 0
6415 && true_regnum (SET_DEST (pat)) == regno
6416 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6417 ||
6418 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6419 /* When looking for stack pointer + const,
6420 make sure we don't use a stack adjust. */
6421 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6422 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6423 || (goal_mem
6424 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6425 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6426 || (goal_mem
6427 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6428 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6429 /* If we are looking for a constant,
6430 and something equivalent to that constant was copied
6431 into a reg, we can use that reg. */
6432 || (goal_const && REG_NOTES (p) != 0
6433 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6434 && ((rtx_equal_p (XEXP (tem, 0), goal)
6435 && (valueno
6436 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6437 || (GET_CODE (SET_DEST (pat)) == REG
6438 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6439 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6440 == MODE_FLOAT)
6441 && GET_CODE (goal) == CONST_INT
6442 && 0 != (goaltry
6443 = operand_subword (XEXP (tem, 0), 0, 0,
6444 VOIDmode))
6445 && rtx_equal_p (goal, goaltry)
6446 && (valtry
6447 = operand_subword (SET_DEST (pat), 0, 0,
6448 VOIDmode))
6449 && (valueno = true_regnum (valtry)) >= 0)))
6450 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6451 NULL_RTX))
6452 && GET_CODE (SET_DEST (pat)) == REG
6453 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6454 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6455 == MODE_FLOAT)
6456 && GET_CODE (goal) == CONST_INT
6457 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6458 VOIDmode))
6459 && rtx_equal_p (goal, goaltry)
6460 && (valtry
6461 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6462 && (valueno = true_regnum (valtry)) >= 0)))
6463 {
6464 if (other >= 0)
6465 {
6466 if (valueno != other)
6467 continue;
6468 }
6469 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6470 continue;
6471 else
6472 {
6473 int i;
6474
6475 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6476 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6477 valueno + i))
6478 break;
6479 if (i >= 0)
6480 continue;
6481 }
6482 value = valtry;
6483 where = p;
6484 break;
6485 }
6486 }
6487 }
6488
6489 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6490 (or copying VALUE into GOAL, if GOAL is also a register).
6491 Now verify that VALUE is really valid. */
6492
6493 /* VALUENO is the register number of VALUE; a hard register. */
6494
6495 /* Don't try to re-use something that is killed in this insn. We want
6496 to be able to trust REG_UNUSED notes. */
6497 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6498 return 0;
6499
6500 /* If we propose to get the value from the stack pointer or if GOAL is
6501 a MEM based on the stack pointer, we need a stable SP. */
6502 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6503 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6504 goal)))
6505 need_stable_sp = 1;
6506
6507 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6508 if (GET_MODE (value) != mode)
6509 return 0;
6510
6511 /* Reject VALUE if it was loaded from GOAL
6512 and is also a register that appears in the address of GOAL. */
6513
6514 if (goal_mem && value == SET_DEST (single_set (where))
6515 && refers_to_regno_for_reload_p (valueno,
6516 (valueno
6517 + HARD_REGNO_NREGS (valueno, mode)),
6518 goal, (rtx*) 0))
6519 return 0;
6520
6521 /* Reject registers that overlap GOAL. */
6522
6523 if (!goal_mem && !goal_const
6524 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6525 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6526 return 0;
6527
6528 nregs = HARD_REGNO_NREGS (regno, mode);
6529 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6530
6531 /* Reject VALUE if it is one of the regs reserved for reloads.
6532 Reload1 knows how to reuse them anyway, and it would get
6533 confused if we allocated one without its knowledge.
6534 (Now that insns introduced by reload are ignored above,
6535 this case shouldn't happen, but I'm not positive.) */
6536
6537 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6538 {
6539 int i;
6540 for (i = 0; i < valuenregs; ++i)
6541 if (reload_reg_p[valueno + i] >= 0)
6542 return 0;
6543 }
6544
6545 /* Reject VALUE if it is a register being used for an input reload
6546 even if it is not one of those reserved. */
6547
6548 if (reload_reg_p != 0)
6549 {
6550 int i;
6551 for (i = 0; i < n_reloads; i++)
6552 if (rld[i].reg_rtx != 0 && rld[i].in)
6553 {
6554 int regno1 = REGNO (rld[i].reg_rtx);
6555 int nregs1 = HARD_REGNO_NREGS (regno1,
6556 GET_MODE (rld[i].reg_rtx));
6557 if (regno1 < valueno + valuenregs
6558 && regno1 + nregs1 > valueno)
6559 return 0;
6560 }
6561 }
6562
6563 if (goal_mem)
6564 /* We must treat frame pointer as varying here,
6565 since it can vary--in a nonlocal goto as generated by expand_goto. */
6566 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6567
6568 /* Now verify that the values of GOAL and VALUE remain unaltered
6569 until INSN is reached. */
6570
6571 p = insn;
6572 while (1)
6573 {
6574 p = PREV_INSN (p);
6575 if (p == where)
6576 return value;
6577
6578 /* Don't trust the conversion past a function call
6579 if either of the two is in a call-clobbered register, or memory. */
6580 if (GET_CODE (p) == CALL_INSN)
6581 {
6582 int i;
6583
6584 if (goal_mem || need_stable_sp)
6585 return 0;
6586
6587 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6588 for (i = 0; i < nregs; ++i)
6589 if (call_used_regs[regno + i])
6590 return 0;
6591
6592 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6593 for (i = 0; i < valuenregs; ++i)
6594 if (call_used_regs[valueno + i])
6595 return 0;
6596#ifdef NON_SAVING_SETJMP
6597 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6598 return 0;
6599#endif
6600 }
6601
6602 if (INSN_P (p))
6603 {
6604 pat = PATTERN (p);
6605
6606 /* Watch out for unspec_volatile, and volatile asms. */
6607 if (volatile_insn_p (pat))
6608 return 0;
6609
6610 /* If this insn P stores in either GOAL or VALUE, return 0.
6611 If GOAL is a memory ref and this insn writes memory, return 0.
6612 If GOAL is a memory ref and its address is not constant,
6613 and this insn P changes a register used in GOAL, return 0. */
6614
6615 if (GET_CODE (pat) == COND_EXEC)
6616 pat = COND_EXEC_CODE (pat);
6617 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6618 {
6619 rtx dest = SET_DEST (pat);
6620 while (GET_CODE (dest) == SUBREG
6621 || GET_CODE (dest) == ZERO_EXTRACT
6622 || GET_CODE (dest) == SIGN_EXTRACT
6623 || GET_CODE (dest) == STRICT_LOW_PART)
6624 dest = XEXP (dest, 0);
6625 if (GET_CODE (dest) == REG)
6626 {
6627 int xregno = REGNO (dest);
6628 int xnregs;
6629 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6630 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6631 else
6632 xnregs = 1;
6633 if (xregno < regno + nregs && xregno + xnregs > regno)
6634 return 0;
6635 if (xregno < valueno + valuenregs
6636 && xregno + xnregs > valueno)
6637 return 0;
6638 if (goal_mem_addr_varies
6639 && reg_overlap_mentioned_for_reload_p (dest, goal))
6640 return 0;
6641 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6642 return 0;
6643 }
6644 else if (goal_mem && GET_CODE (dest) == MEM
6645 && ! push_operand (dest, GET_MODE (dest)))
6646 return 0;
6647 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6648 && reg_equiv_memory_loc[regno] != 0)
6649 return 0;
6650 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6651 return 0;
6652 }
6653 else if (GET_CODE (pat) == PARALLEL)
6654 {
6655 int i;
6656 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6657 {
6658 rtx v1 = XVECEXP (pat, 0, i);
6659 if (GET_CODE (v1) == COND_EXEC)
6660 v1 = COND_EXEC_CODE (v1);
6661 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6662 {
6663 rtx dest = SET_DEST (v1);
6664 while (GET_CODE (dest) == SUBREG
6665 || GET_CODE (dest) == ZERO_EXTRACT
6666 || GET_CODE (dest) == SIGN_EXTRACT
6667 || GET_CODE (dest) == STRICT_LOW_PART)
6668 dest = XEXP (dest, 0);
6669 if (GET_CODE (dest) == REG)
6670 {
6671 int xregno = REGNO (dest);
6672 int xnregs;
6673 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6674 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6675 else
6676 xnregs = 1;
6677 if (xregno < regno + nregs
6678 && xregno + xnregs > regno)
6679 return 0;
6680 if (xregno < valueno + valuenregs
6681 && xregno + xnregs > valueno)
6682 return 0;
6683 if (goal_mem_addr_varies
6684 && reg_overlap_mentioned_for_reload_p (dest,
6685 goal))
6686 return 0;
6687 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6688 return 0;
6689 }
6690 else if (goal_mem && GET_CODE (dest) == MEM
6691 && ! push_operand (dest, GET_MODE (dest)))
6692 return 0;
6693 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6694 && reg_equiv_memory_loc[regno] != 0)
6695 return 0;
6696 else if (need_stable_sp
6697 && push_operand (dest, GET_MODE (dest)))
6698 return 0;
6699 }
6700 }
6701 }
6702
6703 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6704 {
6705 rtx link;
6706
6707 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6708 link = XEXP (link, 1))
6709 {
6710 pat = XEXP (link, 0);
6711 if (GET_CODE (pat) == CLOBBER)
6712 {
6713 rtx dest = SET_DEST (pat);
6714
6715 if (GET_CODE (dest) == REG)
6716 {
6717 int xregno = REGNO (dest);
6718 int xnregs
6719 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6720
6721 if (xregno < regno + nregs
6722 && xregno + xnregs > regno)
6723 return 0;
6724 else if (xregno < valueno + valuenregs
6725 && xregno + xnregs > valueno)
6726 return 0;
6727 else if (goal_mem_addr_varies
6728 && reg_overlap_mentioned_for_reload_p (dest,
6729 goal))
6730 return 0;
6731 }
6732
6733 else if (goal_mem && GET_CODE (dest) == MEM
6734 && ! push_operand (dest, GET_MODE (dest)))
6735 return 0;
6736 else if (need_stable_sp
6737 && push_operand (dest, GET_MODE (dest)))
6738 return 0;
6739 }
6740 }
6741 }
6742
6743#ifdef AUTO_INC_DEC
6744 /* If this insn auto-increments or auto-decrements
6745 either regno or valueno, return 0 now.
6746 If GOAL is a memory ref and its address is not constant,
6747 and this insn P increments a register used in GOAL, return 0. */
6748 {
6749 rtx link;
6750
6751 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6752 if (REG_NOTE_KIND (link) == REG_INC
6753 && GET_CODE (XEXP (link, 0)) == REG)
6754 {
6755 int incno = REGNO (XEXP (link, 0));
6756 if (incno < regno + nregs && incno >= regno)
6757 return 0;
6758 if (incno < valueno + valuenregs && incno >= valueno)
6759 return 0;
6760 if (goal_mem_addr_varies
6761 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6762 goal))
6763 return 0;
6764 }
6765 }
6766#endif
6767 }
6768 }
6769}
6770
6771/* Find a place where INCED appears in an increment or decrement operator
6772 within X, and return the amount INCED is incremented or decremented by.
6773 The value is always positive. */
6774
6775static int
6776find_inc_amount (x, inced)
6777 rtx x, inced;
6778{
6779 enum rtx_code code = GET_CODE (x);
6780 const char *fmt;
6781 int i;
6782
6783 if (code == MEM)
6784 {
6785 rtx addr = XEXP (x, 0);
6786 if ((GET_CODE (addr) == PRE_DEC
6787 || GET_CODE (addr) == POST_DEC
6788 || GET_CODE (addr) == PRE_INC
6789 || GET_CODE (addr) == POST_INC)
6790 && XEXP (addr, 0) == inced)
6791 return GET_MODE_SIZE (GET_MODE (x));
6792 else if ((GET_CODE (addr) == PRE_MODIFY
6793 || GET_CODE (addr) == POST_MODIFY)
6794 && GET_CODE (XEXP (addr, 1)) == PLUS
6795 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6796 && XEXP (addr, 0) == inced
6797 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6798 {
6799 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6800 return i < 0 ? -i : i;
6801 }
6802 }
6803
6804 fmt = GET_RTX_FORMAT (code);
6805 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6806 {
6807 if (fmt[i] == 'e')
6808 {
6809 int tem = find_inc_amount (XEXP (x, i), inced);
6810 if (tem != 0)
6811 return tem;
6812 }
6813 if (fmt[i] == 'E')
6814 {
6815 int j;
6816 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6817 {
6818 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6819 if (tem != 0)
6820 return tem;
6821 }
6822 }
6823 }
6824
6825 return 0;
6826}
6827
6828/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6829 If SETS is nonzero, also consider SETs. */
6830
6831int
6832regno_clobbered_p (regno, insn, mode, sets)
6833 unsigned int regno;
6834 rtx insn;
6835 enum machine_mode mode;
6836 int sets;
6837{
6838 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6839 unsigned int endregno = regno + nregs;
6840
6841 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6842 || (sets && GET_CODE (PATTERN (insn)) == SET))
6843 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6844 {
6845 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6846
6847 return test >= regno && test < endregno;
6848 }
6849
6850 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6851 {
6852 int i = XVECLEN (PATTERN (insn), 0) - 1;
6853
6854 for (; i >= 0; i--)
6855 {
6856 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6857 if ((GET_CODE (elt) == CLOBBER
6858 || (sets && GET_CODE (PATTERN (insn)) == SET))
6859 && GET_CODE (XEXP (elt, 0)) == REG)
6860 {
6861 unsigned int test = REGNO (XEXP (elt, 0));
| 6030
6031void
6032move_replacements (x, y)
6033 rtx *x;
6034 rtx *y;
6035{
6036 int i;
6037
6038 for (i = 0; i < n_replacements; i++)
6039 if (replacements[i].subreg_loc == x)
6040 replacements[i].subreg_loc = y;
6041 else if (replacements[i].where == x)
6042 {
6043 replacements[i].where = y;
6044 replacements[i].subreg_loc = 0;
6045 }
6046}
6047
6048/* If LOC was scheduled to be replaced by something, return the replacement.
6049 Otherwise, return *LOC. */
6050
6051rtx
6052find_replacement (loc)
6053 rtx *loc;
6054{
6055 struct replacement *r;
6056
6057 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6058 {
6059 rtx reloadreg = rld[r->what].reg_rtx;
6060
6061 if (reloadreg && r->where == loc)
6062 {
6063 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6064 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6065
6066 return reloadreg;
6067 }
6068 else if (reloadreg && r->subreg_loc == loc)
6069 {
6070 /* RELOADREG must be either a REG or a SUBREG.
6071
6072 ??? Is it actually still ever a SUBREG? If so, why? */
6073
6074 if (GET_CODE (reloadreg) == REG)
6075 return gen_rtx_REG (GET_MODE (*loc),
6076 (REGNO (reloadreg) +
6077 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6078 GET_MODE (SUBREG_REG (*loc)),
6079 SUBREG_BYTE (*loc),
6080 GET_MODE (*loc))));
6081 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6082 return reloadreg;
6083 else
6084 {
6085 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6086
6087 /* When working with SUBREGs the rule is that the byte
6088 offset must be a multiple of the SUBREG's mode. */
6089 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6090 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6091 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6092 final_offset);
6093 }
6094 }
6095 }
6096
6097 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6098 what's inside and make a new rtl if so. */
6099 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6100 || GET_CODE (*loc) == MULT)
6101 {
6102 rtx x = find_replacement (&XEXP (*loc, 0));
6103 rtx y = find_replacement (&XEXP (*loc, 1));
6104
6105 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6106 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6107 }
6108
6109 return *loc;
6110}
6111
6112/* Return nonzero if register in range [REGNO, ENDREGNO)
6113 appears either explicitly or implicitly in X
6114 other than being stored into (except for earlyclobber operands).
6115
6116 References contained within the substructure at LOC do not count.
6117 LOC may be zero, meaning don't ignore anything.
6118
6119 This is similar to refers_to_regno_p in rtlanal.c except that we
6120 look at equivalences for pseudos that didn't get hard registers. */
6121
6122int
6123refers_to_regno_for_reload_p (regno, endregno, x, loc)
6124 unsigned int regno, endregno;
6125 rtx x;
6126 rtx *loc;
6127{
6128 int i;
6129 unsigned int r;
6130 RTX_CODE code;
6131 const char *fmt;
6132
6133 if (x == 0)
6134 return 0;
6135
6136 repeat:
6137 code = GET_CODE (x);
6138
6139 switch (code)
6140 {
6141 case REG:
6142 r = REGNO (x);
6143
6144 /* If this is a pseudo, a hard register must not have been allocated.
6145 X must therefore either be a constant or be in memory. */
6146 if (r >= FIRST_PSEUDO_REGISTER)
6147 {
6148 if (reg_equiv_memory_loc[r])
6149 return refers_to_regno_for_reload_p (regno, endregno,
6150 reg_equiv_memory_loc[r],
6151 (rtx*) 0);
6152
6153 if (reg_equiv_constant[r])
6154 return 0;
6155
6156 abort ();
6157 }
6158
6159 return (endregno > r
6160 && regno < r + (r < FIRST_PSEUDO_REGISTER
6161 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6162 : 1));
6163
6164 case SUBREG:
6165 /* If this is a SUBREG of a hard reg, we can see exactly which
6166 registers are being modified. Otherwise, handle normally. */
6167 if (GET_CODE (SUBREG_REG (x)) == REG
6168 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6169 {
6170 unsigned int inner_regno = subreg_regno (x);
6171 unsigned int inner_endregno
6172 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6173 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6174
6175 return endregno > inner_regno && regno < inner_endregno;
6176 }
6177 break;
6178
6179 case CLOBBER:
6180 case SET:
6181 if (&SET_DEST (x) != loc
6182 /* Note setting a SUBREG counts as referring to the REG it is in for
6183 a pseudo but not for hard registers since we can
6184 treat each word individually. */
6185 && ((GET_CODE (SET_DEST (x)) == SUBREG
6186 && loc != &SUBREG_REG (SET_DEST (x))
6187 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6188 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6189 && refers_to_regno_for_reload_p (regno, endregno,
6190 SUBREG_REG (SET_DEST (x)),
6191 loc))
6192 /* If the output is an earlyclobber operand, this is
6193 a conflict. */
6194 || ((GET_CODE (SET_DEST (x)) != REG
6195 || earlyclobber_operand_p (SET_DEST (x)))
6196 && refers_to_regno_for_reload_p (regno, endregno,
6197 SET_DEST (x), loc))))
6198 return 1;
6199
6200 if (code == CLOBBER || loc == &SET_SRC (x))
6201 return 0;
6202 x = SET_SRC (x);
6203 goto repeat;
6204
6205 default:
6206 break;
6207 }
6208
6209 /* X does not match, so try its subexpressions. */
6210
6211 fmt = GET_RTX_FORMAT (code);
6212 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6213 {
6214 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6215 {
6216 if (i == 0)
6217 {
6218 x = XEXP (x, 0);
6219 goto repeat;
6220 }
6221 else
6222 if (refers_to_regno_for_reload_p (regno, endregno,
6223 XEXP (x, i), loc))
6224 return 1;
6225 }
6226 else if (fmt[i] == 'E')
6227 {
6228 int j;
6229 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6230 if (loc != &XVECEXP (x, i, j)
6231 && refers_to_regno_for_reload_p (regno, endregno,
6232 XVECEXP (x, i, j), loc))
6233 return 1;
6234 }
6235 }
6236 return 0;
6237}
6238
6239/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6240 we check if any register number in X conflicts with the relevant register
6241 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6242 contains a MEM (we don't bother checking for memory addresses that can't
6243 conflict because we expect this to be a rare case.
6244
6245 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6246 that we look at equivalences for pseudos that didn't get hard registers. */
6247
6248int
6249reg_overlap_mentioned_for_reload_p (x, in)
6250 rtx x, in;
6251{
6252 int regno, endregno;
6253
6254 /* Overly conservative. */
6255 if (GET_CODE (x) == STRICT_LOW_PART
6256 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6257 x = XEXP (x, 0);
6258
6259 /* If either argument is a constant, then modifying X can not affect IN. */
6260 if (CONSTANT_P (x) || CONSTANT_P (in))
6261 return 0;
6262 else if (GET_CODE (x) == SUBREG)
6263 {
6264 regno = REGNO (SUBREG_REG (x));
6265 if (regno < FIRST_PSEUDO_REGISTER)
6266 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6267 GET_MODE (SUBREG_REG (x)),
6268 SUBREG_BYTE (x),
6269 GET_MODE (x));
6270 }
6271 else if (GET_CODE (x) == REG)
6272 {
6273 regno = REGNO (x);
6274
6275 /* If this is a pseudo, it must not have been assigned a hard register.
6276 Therefore, it must either be in memory or be a constant. */
6277
6278 if (regno >= FIRST_PSEUDO_REGISTER)
6279 {
6280 if (reg_equiv_memory_loc[regno])
6281 return refers_to_mem_for_reload_p (in);
6282 else if (reg_equiv_constant[regno])
6283 return 0;
6284 abort ();
6285 }
6286 }
6287 else if (GET_CODE (x) == MEM)
6288 return refers_to_mem_for_reload_p (in);
6289 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6290 || GET_CODE (x) == CC0)
6291 return reg_mentioned_p (x, in);
6292 else if (GET_CODE (x) == PLUS)
6293 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6294 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6295 else
6296 abort ();
6297
6298 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6299 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6300
6301 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6302}
6303
6304/* Return nonzero if anything in X contains a MEM. Look also for pseudo
6305 registers. */
6306
6307int
6308refers_to_mem_for_reload_p (x)
6309 rtx x;
6310{
6311 const char *fmt;
6312 int i;
6313
6314 if (GET_CODE (x) == MEM)
6315 return 1;
6316
6317 if (GET_CODE (x) == REG)
6318 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6319 && reg_equiv_memory_loc[REGNO (x)]);
6320
6321 fmt = GET_RTX_FORMAT (GET_CODE (x));
6322 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6323 if (fmt[i] == 'e'
6324 && (GET_CODE (XEXP (x, i)) == MEM
6325 || refers_to_mem_for_reload_p (XEXP (x, i))))
6326 return 1;
6327
6328 return 0;
6329}
6330
6331/* Check the insns before INSN to see if there is a suitable register
6332 containing the same value as GOAL.
6333 If OTHER is -1, look for a register in class CLASS.
6334 Otherwise, just see if register number OTHER shares GOAL's value.
6335
6336 Return an rtx for the register found, or zero if none is found.
6337
6338 If RELOAD_REG_P is (short *)1,
6339 we reject any hard reg that appears in reload_reg_rtx
6340 because such a hard reg is also needed coming into this insn.
6341
6342 If RELOAD_REG_P is any other nonzero value,
6343 it is a vector indexed by hard reg number
6344 and we reject any hard reg whose element in the vector is nonnegative
6345 as well as any that appears in reload_reg_rtx.
6346
6347 If GOAL is zero, then GOALREG is a register number; we look
6348 for an equivalent for that register.
6349
6350 MODE is the machine mode of the value we want an equivalence for.
6351 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6352
6353 This function is used by jump.c as well as in the reload pass.
6354
6355 If GOAL is the sum of the stack pointer and a constant, we treat it
6356 as if it were a constant except that sp is required to be unchanging. */
6357
6358rtx
6359find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6360 rtx goal;
6361 rtx insn;
6362 enum reg_class class;
6363 int other;
6364 short *reload_reg_p;
6365 int goalreg;
6366 enum machine_mode mode;
6367{
6368 rtx p = insn;
6369 rtx goaltry, valtry, value, where;
6370 rtx pat;
6371 int regno = -1;
6372 int valueno;
6373 int goal_mem = 0;
6374 int goal_const = 0;
6375 int goal_mem_addr_varies = 0;
6376 int need_stable_sp = 0;
6377 int nregs;
6378 int valuenregs;
6379
6380 if (goal == 0)
6381 regno = goalreg;
6382 else if (GET_CODE (goal) == REG)
6383 regno = REGNO (goal);
6384 else if (GET_CODE (goal) == MEM)
6385 {
6386 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6387 if (MEM_VOLATILE_P (goal))
6388 return 0;
6389 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6390 return 0;
6391 /* An address with side effects must be reexecuted. */
6392 switch (code)
6393 {
6394 case POST_INC:
6395 case PRE_INC:
6396 case POST_DEC:
6397 case PRE_DEC:
6398 case POST_MODIFY:
6399 case PRE_MODIFY:
6400 return 0;
6401 default:
6402 break;
6403 }
6404 goal_mem = 1;
6405 }
6406 else if (CONSTANT_P (goal))
6407 goal_const = 1;
6408 else if (GET_CODE (goal) == PLUS
6409 && XEXP (goal, 0) == stack_pointer_rtx
6410 && CONSTANT_P (XEXP (goal, 1)))
6411 goal_const = need_stable_sp = 1;
6412 else if (GET_CODE (goal) == PLUS
6413 && XEXP (goal, 0) == frame_pointer_rtx
6414 && CONSTANT_P (XEXP (goal, 1)))
6415 goal_const = 1;
6416 else
6417 return 0;
6418
6419 /* Scan insns back from INSN, looking for one that copies
6420 a value into or out of GOAL.
6421 Stop and give up if we reach a label. */
6422
6423 while (1)
6424 {
6425 p = PREV_INSN (p);
6426 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6427 return 0;
6428
6429 if (GET_CODE (p) == INSN
6430 /* If we don't want spill regs ... */
6431 && (! (reload_reg_p != 0
6432 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6433 /* ... then ignore insns introduced by reload; they aren't
6434 useful and can cause results in reload_as_needed to be
6435 different from what they were when calculating the need for
6436 spills. If we notice an input-reload insn here, we will
6437 reject it below, but it might hide a usable equivalent.
6438 That makes bad code. It may even abort: perhaps no reg was
6439 spilled for this insn because it was assumed we would find
6440 that equivalent. */
6441 || INSN_UID (p) < reload_first_uid))
6442 {
6443 rtx tem;
6444 pat = single_set (p);
6445
6446 /* First check for something that sets some reg equal to GOAL. */
6447 if (pat != 0
6448 && ((regno >= 0
6449 && true_regnum (SET_SRC (pat)) == regno
6450 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6451 ||
6452 (regno >= 0
6453 && true_regnum (SET_DEST (pat)) == regno
6454 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6455 ||
6456 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6457 /* When looking for stack pointer + const,
6458 make sure we don't use a stack adjust. */
6459 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6460 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6461 || (goal_mem
6462 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6463 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6464 || (goal_mem
6465 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6466 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6467 /* If we are looking for a constant,
6468 and something equivalent to that constant was copied
6469 into a reg, we can use that reg. */
6470 || (goal_const && REG_NOTES (p) != 0
6471 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6472 && ((rtx_equal_p (XEXP (tem, 0), goal)
6473 && (valueno
6474 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6475 || (GET_CODE (SET_DEST (pat)) == REG
6476 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6477 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6478 == MODE_FLOAT)
6479 && GET_CODE (goal) == CONST_INT
6480 && 0 != (goaltry
6481 = operand_subword (XEXP (tem, 0), 0, 0,
6482 VOIDmode))
6483 && rtx_equal_p (goal, goaltry)
6484 && (valtry
6485 = operand_subword (SET_DEST (pat), 0, 0,
6486 VOIDmode))
6487 && (valueno = true_regnum (valtry)) >= 0)))
6488 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6489 NULL_RTX))
6490 && GET_CODE (SET_DEST (pat)) == REG
6491 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6492 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6493 == MODE_FLOAT)
6494 && GET_CODE (goal) == CONST_INT
6495 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6496 VOIDmode))
6497 && rtx_equal_p (goal, goaltry)
6498 && (valtry
6499 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6500 && (valueno = true_regnum (valtry)) >= 0)))
6501 {
6502 if (other >= 0)
6503 {
6504 if (valueno != other)
6505 continue;
6506 }
6507 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6508 continue;
6509 else
6510 {
6511 int i;
6512
6513 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6514 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6515 valueno + i))
6516 break;
6517 if (i >= 0)
6518 continue;
6519 }
6520 value = valtry;
6521 where = p;
6522 break;
6523 }
6524 }
6525 }
6526
6527 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6528 (or copying VALUE into GOAL, if GOAL is also a register).
6529 Now verify that VALUE is really valid. */
6530
6531 /* VALUENO is the register number of VALUE; a hard register. */
6532
6533 /* Don't try to re-use something that is killed in this insn. We want
6534 to be able to trust REG_UNUSED notes. */
6535 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6536 return 0;
6537
6538 /* If we propose to get the value from the stack pointer or if GOAL is
6539 a MEM based on the stack pointer, we need a stable SP. */
6540 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6541 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6542 goal)))
6543 need_stable_sp = 1;
6544
6545 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6546 if (GET_MODE (value) != mode)
6547 return 0;
6548
6549 /* Reject VALUE if it was loaded from GOAL
6550 and is also a register that appears in the address of GOAL. */
6551
6552 if (goal_mem && value == SET_DEST (single_set (where))
6553 && refers_to_regno_for_reload_p (valueno,
6554 (valueno
6555 + HARD_REGNO_NREGS (valueno, mode)),
6556 goal, (rtx*) 0))
6557 return 0;
6558
6559 /* Reject registers that overlap GOAL. */
6560
6561 if (!goal_mem && !goal_const
6562 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6563 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6564 return 0;
6565
6566 nregs = HARD_REGNO_NREGS (regno, mode);
6567 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6568
6569 /* Reject VALUE if it is one of the regs reserved for reloads.
6570 Reload1 knows how to reuse them anyway, and it would get
6571 confused if we allocated one without its knowledge.
6572 (Now that insns introduced by reload are ignored above,
6573 this case shouldn't happen, but I'm not positive.) */
6574
6575 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6576 {
6577 int i;
6578 for (i = 0; i < valuenregs; ++i)
6579 if (reload_reg_p[valueno + i] >= 0)
6580 return 0;
6581 }
6582
6583 /* Reject VALUE if it is a register being used for an input reload
6584 even if it is not one of those reserved. */
6585
6586 if (reload_reg_p != 0)
6587 {
6588 int i;
6589 for (i = 0; i < n_reloads; i++)
6590 if (rld[i].reg_rtx != 0 && rld[i].in)
6591 {
6592 int regno1 = REGNO (rld[i].reg_rtx);
6593 int nregs1 = HARD_REGNO_NREGS (regno1,
6594 GET_MODE (rld[i].reg_rtx));
6595 if (regno1 < valueno + valuenregs
6596 && regno1 + nregs1 > valueno)
6597 return 0;
6598 }
6599 }
6600
6601 if (goal_mem)
6602 /* We must treat frame pointer as varying here,
6603 since it can vary--in a nonlocal goto as generated by expand_goto. */
6604 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6605
6606 /* Now verify that the values of GOAL and VALUE remain unaltered
6607 until INSN is reached. */
6608
6609 p = insn;
6610 while (1)
6611 {
6612 p = PREV_INSN (p);
6613 if (p == where)
6614 return value;
6615
6616 /* Don't trust the conversion past a function call
6617 if either of the two is in a call-clobbered register, or memory. */
6618 if (GET_CODE (p) == CALL_INSN)
6619 {
6620 int i;
6621
6622 if (goal_mem || need_stable_sp)
6623 return 0;
6624
6625 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6626 for (i = 0; i < nregs; ++i)
6627 if (call_used_regs[regno + i])
6628 return 0;
6629
6630 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6631 for (i = 0; i < valuenregs; ++i)
6632 if (call_used_regs[valueno + i])
6633 return 0;
6634#ifdef NON_SAVING_SETJMP
6635 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6636 return 0;
6637#endif
6638 }
6639
6640 if (INSN_P (p))
6641 {
6642 pat = PATTERN (p);
6643
6644 /* Watch out for unspec_volatile, and volatile asms. */
6645 if (volatile_insn_p (pat))
6646 return 0;
6647
6648 /* If this insn P stores in either GOAL or VALUE, return 0.
6649 If GOAL is a memory ref and this insn writes memory, return 0.
6650 If GOAL is a memory ref and its address is not constant,
6651 and this insn P changes a register used in GOAL, return 0. */
6652
6653 if (GET_CODE (pat) == COND_EXEC)
6654 pat = COND_EXEC_CODE (pat);
6655 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6656 {
6657 rtx dest = SET_DEST (pat);
6658 while (GET_CODE (dest) == SUBREG
6659 || GET_CODE (dest) == ZERO_EXTRACT
6660 || GET_CODE (dest) == SIGN_EXTRACT
6661 || GET_CODE (dest) == STRICT_LOW_PART)
6662 dest = XEXP (dest, 0);
6663 if (GET_CODE (dest) == REG)
6664 {
6665 int xregno = REGNO (dest);
6666 int xnregs;
6667 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6668 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6669 else
6670 xnregs = 1;
6671 if (xregno < regno + nregs && xregno + xnregs > regno)
6672 return 0;
6673 if (xregno < valueno + valuenregs
6674 && xregno + xnregs > valueno)
6675 return 0;
6676 if (goal_mem_addr_varies
6677 && reg_overlap_mentioned_for_reload_p (dest, goal))
6678 return 0;
6679 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6680 return 0;
6681 }
6682 else if (goal_mem && GET_CODE (dest) == MEM
6683 && ! push_operand (dest, GET_MODE (dest)))
6684 return 0;
6685 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6686 && reg_equiv_memory_loc[regno] != 0)
6687 return 0;
6688 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6689 return 0;
6690 }
6691 else if (GET_CODE (pat) == PARALLEL)
6692 {
6693 int i;
6694 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6695 {
6696 rtx v1 = XVECEXP (pat, 0, i);
6697 if (GET_CODE (v1) == COND_EXEC)
6698 v1 = COND_EXEC_CODE (v1);
6699 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6700 {
6701 rtx dest = SET_DEST (v1);
6702 while (GET_CODE (dest) == SUBREG
6703 || GET_CODE (dest) == ZERO_EXTRACT
6704 || GET_CODE (dest) == SIGN_EXTRACT
6705 || GET_CODE (dest) == STRICT_LOW_PART)
6706 dest = XEXP (dest, 0);
6707 if (GET_CODE (dest) == REG)
6708 {
6709 int xregno = REGNO (dest);
6710 int xnregs;
6711 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6712 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6713 else
6714 xnregs = 1;
6715 if (xregno < regno + nregs
6716 && xregno + xnregs > regno)
6717 return 0;
6718 if (xregno < valueno + valuenregs
6719 && xregno + xnregs > valueno)
6720 return 0;
6721 if (goal_mem_addr_varies
6722 && reg_overlap_mentioned_for_reload_p (dest,
6723 goal))
6724 return 0;
6725 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6726 return 0;
6727 }
6728 else if (goal_mem && GET_CODE (dest) == MEM
6729 && ! push_operand (dest, GET_MODE (dest)))
6730 return 0;
6731 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6732 && reg_equiv_memory_loc[regno] != 0)
6733 return 0;
6734 else if (need_stable_sp
6735 && push_operand (dest, GET_MODE (dest)))
6736 return 0;
6737 }
6738 }
6739 }
6740
6741 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6742 {
6743 rtx link;
6744
6745 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6746 link = XEXP (link, 1))
6747 {
6748 pat = XEXP (link, 0);
6749 if (GET_CODE (pat) == CLOBBER)
6750 {
6751 rtx dest = SET_DEST (pat);
6752
6753 if (GET_CODE (dest) == REG)
6754 {
6755 int xregno = REGNO (dest);
6756 int xnregs
6757 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6758
6759 if (xregno < regno + nregs
6760 && xregno + xnregs > regno)
6761 return 0;
6762 else if (xregno < valueno + valuenregs
6763 && xregno + xnregs > valueno)
6764 return 0;
6765 else if (goal_mem_addr_varies
6766 && reg_overlap_mentioned_for_reload_p (dest,
6767 goal))
6768 return 0;
6769 }
6770
6771 else if (goal_mem && GET_CODE (dest) == MEM
6772 && ! push_operand (dest, GET_MODE (dest)))
6773 return 0;
6774 else if (need_stable_sp
6775 && push_operand (dest, GET_MODE (dest)))
6776 return 0;
6777 }
6778 }
6779 }
6780
6781#ifdef AUTO_INC_DEC
6782 /* If this insn auto-increments or auto-decrements
6783 either regno or valueno, return 0 now.
6784 If GOAL is a memory ref and its address is not constant,
6785 and this insn P increments a register used in GOAL, return 0. */
6786 {
6787 rtx link;
6788
6789 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6790 if (REG_NOTE_KIND (link) == REG_INC
6791 && GET_CODE (XEXP (link, 0)) == REG)
6792 {
6793 int incno = REGNO (XEXP (link, 0));
6794 if (incno < regno + nregs && incno >= regno)
6795 return 0;
6796 if (incno < valueno + valuenregs && incno >= valueno)
6797 return 0;
6798 if (goal_mem_addr_varies
6799 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6800 goal))
6801 return 0;
6802 }
6803 }
6804#endif
6805 }
6806 }
6807}
6808
6809/* Find a place where INCED appears in an increment or decrement operator
6810 within X, and return the amount INCED is incremented or decremented by.
6811 The value is always positive. */
6812
6813static int
6814find_inc_amount (x, inced)
6815 rtx x, inced;
6816{
6817 enum rtx_code code = GET_CODE (x);
6818 const char *fmt;
6819 int i;
6820
6821 if (code == MEM)
6822 {
6823 rtx addr = XEXP (x, 0);
6824 if ((GET_CODE (addr) == PRE_DEC
6825 || GET_CODE (addr) == POST_DEC
6826 || GET_CODE (addr) == PRE_INC
6827 || GET_CODE (addr) == POST_INC)
6828 && XEXP (addr, 0) == inced)
6829 return GET_MODE_SIZE (GET_MODE (x));
6830 else if ((GET_CODE (addr) == PRE_MODIFY
6831 || GET_CODE (addr) == POST_MODIFY)
6832 && GET_CODE (XEXP (addr, 1)) == PLUS
6833 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6834 && XEXP (addr, 0) == inced
6835 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6836 {
6837 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6838 return i < 0 ? -i : i;
6839 }
6840 }
6841
6842 fmt = GET_RTX_FORMAT (code);
6843 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6844 {
6845 if (fmt[i] == 'e')
6846 {
6847 int tem = find_inc_amount (XEXP (x, i), inced);
6848 if (tem != 0)
6849 return tem;
6850 }
6851 if (fmt[i] == 'E')
6852 {
6853 int j;
6854 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6855 {
6856 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6857 if (tem != 0)
6858 return tem;
6859 }
6860 }
6861 }
6862
6863 return 0;
6864}
6865
6866/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6867 If SETS is nonzero, also consider SETs. */
6868
6869int
6870regno_clobbered_p (regno, insn, mode, sets)
6871 unsigned int regno;
6872 rtx insn;
6873 enum machine_mode mode;
6874 int sets;
6875{
6876 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6877 unsigned int endregno = regno + nregs;
6878
6879 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6880 || (sets && GET_CODE (PATTERN (insn)) == SET))
6881 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6882 {
6883 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6884
6885 return test >= regno && test < endregno;
6886 }
6887
6888 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6889 {
6890 int i = XVECLEN (PATTERN (insn), 0) - 1;
6891
6892 for (; i >= 0; i--)
6893 {
6894 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6895 if ((GET_CODE (elt) == CLOBBER
6896 || (sets && GET_CODE (PATTERN (insn)) == SET))
6897 && GET_CODE (XEXP (elt, 0)) == REG)
6898 {
6899 unsigned int test = REGNO (XEXP (elt, 0));
|
6862
| 6900
|
6863 if (test >= regno && test < endregno)
6864 return 1;
6865 }
6866 }
6867 }
6868
6869 return 0;
6870}
6871
6872static const char *const reload_when_needed_name[] =
6873{
6874 "RELOAD_FOR_INPUT",
6875 "RELOAD_FOR_OUTPUT",
6876 "RELOAD_FOR_INSN",
6877 "RELOAD_FOR_INPUT_ADDRESS",
6878 "RELOAD_FOR_INPADDR_ADDRESS",
6879 "RELOAD_FOR_OUTPUT_ADDRESS",
6880 "RELOAD_FOR_OUTADDR_ADDRESS",
6881 "RELOAD_FOR_OPERAND_ADDRESS",
6882 "RELOAD_FOR_OPADDR_ADDR",
6883 "RELOAD_OTHER",
6884 "RELOAD_FOR_OTHER_ADDRESS"
6885};
6886
6887static const char * const reg_class_names[] = REG_CLASS_NAMES;
6888
6889/* These functions are used to print the variables set by 'find_reloads' */
6890
6891void
6892debug_reload_to_stream (f)
6893 FILE *f;
6894{
6895 int r;
6896 const char *prefix;
6897
6898 if (! f)
6899 f = stderr;
6900 for (r = 0; r < n_reloads; r++)
6901 {
6902 fprintf (f, "Reload %d: ", r);
6903
6904 if (rld[r].in != 0)
6905 {
6906 fprintf (f, "reload_in (%s) = ",
6907 GET_MODE_NAME (rld[r].inmode));
6908 print_inline_rtx (f, rld[r].in, 24);
6909 fprintf (f, "\n\t");
6910 }
6911
6912 if (rld[r].out != 0)
6913 {
6914 fprintf (f, "reload_out (%s) = ",
6915 GET_MODE_NAME (rld[r].outmode));
6916 print_inline_rtx (f, rld[r].out, 24);
6917 fprintf (f, "\n\t");
6918 }
6919
6920 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6921
6922 fprintf (f, "%s (opnum = %d)",
6923 reload_when_needed_name[(int) rld[r].when_needed],
6924 rld[r].opnum);
6925
6926 if (rld[r].optional)
6927 fprintf (f, ", optional");
6928
6929 if (rld[r].nongroup)
6930 fprintf (f, ", nongroup");
6931
6932 if (rld[r].inc != 0)
6933 fprintf (f, ", inc by %d", rld[r].inc);
6934
6935 if (rld[r].nocombine)
6936 fprintf (f, ", can't combine");
6937
6938 if (rld[r].secondary_p)
6939 fprintf (f, ", secondary_reload_p");
6940
6941 if (rld[r].in_reg != 0)
6942 {
6943 fprintf (f, "\n\treload_in_reg: ");
6944 print_inline_rtx (f, rld[r].in_reg, 24);
6945 }
6946
6947 if (rld[r].out_reg != 0)
6948 {
6949 fprintf (f, "\n\treload_out_reg: ");
6950 print_inline_rtx (f, rld[r].out_reg, 24);
6951 }
6952
6953 if (rld[r].reg_rtx != 0)
6954 {
6955 fprintf (f, "\n\treload_reg_rtx: ");
6956 print_inline_rtx (f, rld[r].reg_rtx, 24);
6957 }
6958
6959 prefix = "\n\t";
6960 if (rld[r].secondary_in_reload != -1)
6961 {
6962 fprintf (f, "%ssecondary_in_reload = %d",
6963 prefix, rld[r].secondary_in_reload);
6964 prefix = ", ";
6965 }
6966
6967 if (rld[r].secondary_out_reload != -1)
6968 fprintf (f, "%ssecondary_out_reload = %d\n",
6969 prefix, rld[r].secondary_out_reload);
6970
6971 prefix = "\n\t";
6972 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6973 {
6974 fprintf (f, "%ssecondary_in_icode = %s", prefix,
6975 insn_data[rld[r].secondary_in_icode].name);
6976 prefix = ", ";
6977 }
6978
6979 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6980 fprintf (f, "%ssecondary_out_icode = %s", prefix,
6981 insn_data[rld[r].secondary_out_icode].name);
6982
6983 fprintf (f, "\n");
6984 }
6985}
6986
6987void
6988debug_reload ()
6989{
6990 debug_reload_to_stream (stderr);
6991}
| 6901 if (test >= regno && test < endregno)
6902 return 1;
6903 }
6904 }
6905 }
6906
6907 return 0;
6908}
6909
6910static const char *const reload_when_needed_name[] =
6911{
6912 "RELOAD_FOR_INPUT",
6913 "RELOAD_FOR_OUTPUT",
6914 "RELOAD_FOR_INSN",
6915 "RELOAD_FOR_INPUT_ADDRESS",
6916 "RELOAD_FOR_INPADDR_ADDRESS",
6917 "RELOAD_FOR_OUTPUT_ADDRESS",
6918 "RELOAD_FOR_OUTADDR_ADDRESS",
6919 "RELOAD_FOR_OPERAND_ADDRESS",
6920 "RELOAD_FOR_OPADDR_ADDR",
6921 "RELOAD_OTHER",
6922 "RELOAD_FOR_OTHER_ADDRESS"
6923};
6924
6925static const char * const reg_class_names[] = REG_CLASS_NAMES;
6926
6927/* These functions are used to print the variables set by 'find_reloads' */
6928
6929void
6930debug_reload_to_stream (f)
6931 FILE *f;
6932{
6933 int r;
6934 const char *prefix;
6935
6936 if (! f)
6937 f = stderr;
6938 for (r = 0; r < n_reloads; r++)
6939 {
6940 fprintf (f, "Reload %d: ", r);
6941
6942 if (rld[r].in != 0)
6943 {
6944 fprintf (f, "reload_in (%s) = ",
6945 GET_MODE_NAME (rld[r].inmode));
6946 print_inline_rtx (f, rld[r].in, 24);
6947 fprintf (f, "\n\t");
6948 }
6949
6950 if (rld[r].out != 0)
6951 {
6952 fprintf (f, "reload_out (%s) = ",
6953 GET_MODE_NAME (rld[r].outmode));
6954 print_inline_rtx (f, rld[r].out, 24);
6955 fprintf (f, "\n\t");
6956 }
6957
6958 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6959
6960 fprintf (f, "%s (opnum = %d)",
6961 reload_when_needed_name[(int) rld[r].when_needed],
6962 rld[r].opnum);
6963
6964 if (rld[r].optional)
6965 fprintf (f, ", optional");
6966
6967 if (rld[r].nongroup)
6968 fprintf (f, ", nongroup");
6969
6970 if (rld[r].inc != 0)
6971 fprintf (f, ", inc by %d", rld[r].inc);
6972
6973 if (rld[r].nocombine)
6974 fprintf (f, ", can't combine");
6975
6976 if (rld[r].secondary_p)
6977 fprintf (f, ", secondary_reload_p");
6978
6979 if (rld[r].in_reg != 0)
6980 {
6981 fprintf (f, "\n\treload_in_reg: ");
6982 print_inline_rtx (f, rld[r].in_reg, 24);
6983 }
6984
6985 if (rld[r].out_reg != 0)
6986 {
6987 fprintf (f, "\n\treload_out_reg: ");
6988 print_inline_rtx (f, rld[r].out_reg, 24);
6989 }
6990
6991 if (rld[r].reg_rtx != 0)
6992 {
6993 fprintf (f, "\n\treload_reg_rtx: ");
6994 print_inline_rtx (f, rld[r].reg_rtx, 24);
6995 }
6996
6997 prefix = "\n\t";
6998 if (rld[r].secondary_in_reload != -1)
6999 {
7000 fprintf (f, "%ssecondary_in_reload = %d",
7001 prefix, rld[r].secondary_in_reload);
7002 prefix = ", ";
7003 }
7004
7005 if (rld[r].secondary_out_reload != -1)
7006 fprintf (f, "%ssecondary_out_reload = %d\n",
7007 prefix, rld[r].secondary_out_reload);
7008
7009 prefix = "\n\t";
7010 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7011 {
7012 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7013 insn_data[rld[r].secondary_in_icode].name);
7014 prefix = ", ";
7015 }
7016
7017 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7018 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7019 insn_data[rld[r].secondary_out_icode].name);
7020
7021 fprintf (f, "\n");
7022 }
7023}
7024
7025void
7026debug_reload ()
7027{
7028 debug_reload_to_stream (stderr);
7029}
|