1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
--- 230 unchanged lines hidden (view full) ---
239static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
241 enum insn_code *));
242#endif
243static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
244 unsigned int));
245static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
246static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
247static void dup_replacements PARAMS ((rtx *, rtx *));
248static void combine_reloads PARAMS ((void));
249static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
250 enum reload_type, int, int));
251static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
252 enum machine_mode, enum machine_mode,
253 enum reg_class, int, int));
254static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
255static struct decomposition decompose PARAMS ((rtx));
256static int immune_p PARAMS ((rtx, rtx, struct decomposition));
257static int alternative_allows_memconst PARAMS ((const char *, int));
258static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
259 int, rtx, int *));
260static rtx make_memloc PARAMS ((rtx, int));
261static int maybe_memory_address_p PARAMS ((enum machine_mode, rtx, rtx *));
262static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
263 int, enum reload_type, int, rtx));
264static rtx subst_reg_equivs PARAMS ((rtx, rtx));
265static rtx subst_indexed_address PARAMS ((rtx));
266static void update_auto_inc_notes PARAMS ((rtx, int, int));
267static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
268 int, enum reload_type,int, rtx));
269static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
270 enum machine_mode, int,
271 enum reload_type, int));
272static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
273 enum reload_type, int, rtx));
274static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
275static int find_inc_amount PARAMS ((rtx, rtx));
276
277#ifdef HAVE_SECONDARY_RELOADS
278
279/* Determine if any secondary reloads are needed for loading (if IN_P is
280 nonzero) or storing (if IN_P is zero) X to or from a reload register of
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
283
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
287
288static int
--- 75 unchanged lines hidden (view full) ---
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
368 register. */
369
370 if (icode != CODE_FOR_nothing)
371 {
372 /* If IN_P is nonzero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
375 skip. */
376
377 enum reg_class insn_class;
378
379 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
380 insn_class = ALL_REGS;
--- 260 unchanged lines hidden (view full) ---
641 don't save it. */
642
643 if (! mem_valid)
644 {
645 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
646 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
647 : RELOAD_OTHER);
648
649 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
650 opnum, type, 0, 0);
651 }
652
653 secondary_memlocs_elim[(int) mode][opnum] = loc;
654 return loc;
655}
656
657/* Clear any secondary memory locations we've made. */
--- 156 unchanged lines hidden (view full) ---
814 return 1;
815
816 /* If INNER is not a hard register, then INNER will not need to
817 be reloaded. */
818 if (GET_CODE (inner) != REG
819 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
820 return 0;
821
822 if (!subreg_offset_representable_p
823 (REGNO (SUBREG_REG (x)),
824 GET_MODE (SUBREG_REG (x)),
825 SUBREG_BYTE (x),
826 GET_MODE (x)))
827 return 1;
828
829 /* If INNER is not ok for MODE, then INNER will need reloading. */
830 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
831 return 1;
832
833 /* If the outer part is a word or smaller, INNER larger than a
834 word and the number of regs for INNER is not the same as the
835 number of words in INNER, then INNER will need reloading. */
836 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
837 && output
838 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
839 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
840 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
841}
842
843/* Record one reload that needs to be performed.
844 IN is an rtx saying where the data are to be found before this instruction.
845 OUT says where they must be stored after the instruction.
846 (IN is zero for data not read, and OUT is zero for data not written.)
847 INLOC and OUTLOC point to the places in the instructions where
848 IN and OUT were found.
849 If IN and OUT are both nonzero, it means the same register must be used
850 to reload both IN and OUT.
851
852 CLASS is a register class required for the reloaded data.
853 INMODE is the machine mode that the instruction requires
854 for the reg that replaces IN and OUTMODE is likewise for OUT.
855
856 If IN is zero, then OUT's location and mode should be passed as
857 INLOC and INMODE.
--- 112 unchanged lines hidden (view full) ---
970 the class whose registers cannot be referenced in a different size
971 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
972 cannot reload just the inside since we might end up with the wrong
973 register class. But if it is inside a STRICT_LOW_PART, we have
974 no choice, so we hope we do get the right register class there. */
975
976 if (in != 0 && GET_CODE (in) == SUBREG
977 && (subreg_lowpart_p (in) || strict_low)
978#ifdef CANNOT_CHANGE_MODE_CLASS
979 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
980#endif
981 && (CONSTANT_P (SUBREG_REG (in))
982 || GET_CODE (SUBREG_REG (in)) == PLUS
983 || strict_low
984 || (((GET_CODE (SUBREG_REG (in)) == REG
985 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
986 || GET_CODE (SUBREG_REG (in)) == MEM)
987 && ((GET_MODE_SIZE (inmode)
--- 20 unchanged lines hidden (view full) ---
1008 /* The case where out is nonzero
1009 is handled differently in the following statement. */
1010 && (out == 0 || subreg_lowpart_p (in))
1011 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1013 > UNITS_PER_WORD)
1014 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1015 / UNITS_PER_WORD)
1016 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1017 GET_MODE (SUBREG_REG (in)))))
1018 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1019#ifdef SECONDARY_INPUT_RELOAD_CLASS
1020 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1021 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1022 GET_MODE (SUBREG_REG (in)),
1023 SUBREG_REG (in))
1024 == NO_REGS))
1025#endif
1026#ifdef CANNOT_CHANGE_MODE_CLASS
1027 || (GET_CODE (SUBREG_REG (in)) == REG
1028 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1029 && REG_CANNOT_CHANGE_MODE_P
1030 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1031#endif
1032 ))
1033 {
1034 in_subreg_loc = inloc;
1035 inloc = &SUBREG_REG (in);
1036 in = *inloc;
1037#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1038 if (GET_CODE (in) == MEM)
--- 41 unchanged lines hidden (view full) ---
1080 /* Similarly for paradoxical and problematical SUBREGs on the output.
1081 Note that there is no reason we need worry about the previous value
1082 of SUBREG_REG (out); even if wider than out,
1083 storing in a subreg is entitled to clobber it all
1084 (except in the case of STRICT_LOW_PART,
1085 and in that case the constraint should label it input-output.) */
1086 if (out != 0 && GET_CODE (out) == SUBREG
1087 && (subreg_lowpart_p (out) || strict_low)
1088#ifdef CANNOT_CHANGE_MODE_CLASS
1089 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1090#endif
1091 && (CONSTANT_P (SUBREG_REG (out))
1092 || strict_low
1093 || (((GET_CODE (SUBREG_REG (out)) == REG
1094 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1095 || GET_CODE (SUBREG_REG (out)) == MEM)
1096 && ((GET_MODE_SIZE (outmode)
1097 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
--- 7 unchanged lines hidden (view full) ---
1105 ))
1106 || (GET_CODE (SUBREG_REG (out)) == REG
1107 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1108 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1109 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1110 > UNITS_PER_WORD)
1111 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1112 / UNITS_PER_WORD)
1113 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1114 GET_MODE (SUBREG_REG (out)))))
1115 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1116#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1117 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1118 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1119 GET_MODE (SUBREG_REG (out)),
1120 SUBREG_REG (out))
1121 == NO_REGS))
1122#endif
1123#ifdef CANNOT_CHANGE_MODE_CLASS
1124 || (GET_CODE (SUBREG_REG (out)) == REG
1125 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1126 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1127 GET_MODE (SUBREG_REG (out)),
1128 outmode))
1129#endif
1130 ))
1131 {
1132 out_subreg_loc = outloc;
1133 outloc = &SUBREG_REG (out);
1134 out = *outloc;
1135#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1136 if (GET_CODE (out) == MEM
--- 144 unchanged lines hidden (view full) ---
1281 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1282 type, &secondary_out_icode);
1283#endif
1284
1285 /* We found no existing reload suitable for re-use.
1286 So add an additional reload. */
1287
1288#ifdef SECONDARY_MEMORY_NEEDED
1289 /* If a memory location is needed for the copy, make one. */
1290 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1291 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1292 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1293 class, inmode))
1294 get_secondary_mem (in, inmode, opnum, type);
1295#endif
1296
1297 i = n_reloads;
1298 rld[i].in = in;
1299 rld[i].out = out;
1300 rld[i].class = class;
1301 rld[i].inmode = inmode;
1302 rld[i].outmode = outmode;
--- 9 unchanged lines hidden (view full) ---
1312 rld[i].secondary_out_reload = secondary_out_reload;
1313 rld[i].secondary_in_icode = secondary_in_icode;
1314 rld[i].secondary_out_icode = secondary_out_icode;
1315 rld[i].secondary_p = 0;
1316
1317 n_reloads++;
1318
1319#ifdef SECONDARY_MEMORY_NEEDED
1320 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1321 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (class,
1323 REGNO_REG_CLASS (reg_or_subregno (out)),
1324 outmode))
1325 get_secondary_mem (out, outmode, opnum, type);
1326#endif
1327 }
1328 else
1329 {
1330 /* We are reusing an existing reload,
1331 but we may have additional information for it.
1332 For example, we may now have both IN and OUT
1333 while the old one may have just one of them. */
--- 228 unchanged lines hidden (view full) ---
1562 {
1563 struct replacement *r = &replacements[n_replacements++];
1564 r->what = reloadnum;
1565 r->where = loc;
1566 r->subreg_loc = 0;
1567 r->mode = mode;
1568 }
1569}
1570
1571/* Duplicate any replacement we have recorded to apply at
1572 location ORIG_LOC to also be performed at DUP_LOC.
1573 This is used in insn patterns that use match_dup. */
1574
1575static void
1576dup_replacements (dup_loc, orig_loc)
1577 rtx *dup_loc;
1578 rtx *orig_loc;
1579{
1580 int i, n = n_replacements;
1581
1582 for (i = 0; i < n; i++)
1583 {
1584 struct replacement *r = &replacements[i];
1585 if (r->where == orig_loc)
1586 push_replacement (dup_loc, r->what, r->mode);
1587 }
1588}
1589
1590/* Transfer all replacements that used to be in reload FROM to be in
1591 reload TO. */
1592
1593void
1594transfer_replacements (to, from)
1595 int to, from;
1596{
1597 int i;
1598
1599 for (i = 0; i < n_replacements; i++)
1600 if (replacements[i].what == from)
1601 replacements[i].what = to;
1602}
1603
1604/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1605 or a subpart of it. If we have any replacements registered for IN_RTX,
1606 cancel the reloads that were supposed to load them.
1607 Return nonzero if we canceled any reloads. */
1608int
1609remove_address_replacements (in_rtx)
1610 rtx in_rtx;
1611{
1612 int i, j;
1613 char reload_flags[MAX_RELOADS];
1614 int something_changed = 0;
1615
--- 223 unchanged lines hidden (view full) ---
1839
1840 If FOR_REAL is >= 0, it is the number of the reload,
1841 and in some cases when it can be discovered that OUT doesn't need
1842 to be computed, clear out rld[FOR_REAL].out.
1843
1844 If FOR_REAL is -1, this should not be done, because this call
1845 is just to see if a register can be found, not to find and install it.
1846
1847 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1848 puts an additional constraint on being able to use IN for OUT since
1849 IN must not appear elsewhere in the insn (it is assumed that IN itself
1850 is safe from the earlyclobber). */
1851
1852static rtx
1853find_dummy_reload (real_in, real_out, inloc, outloc,
1854 inmode, outmode, class, for_real, earlyclobber)
1855 rtx real_in, real_out;
--- 286 unchanged lines hidden (view full) ---
2142 && j < FIRST_PSEUDO_REGISTER)
2143 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2144
2145 return i == j;
2146 }
2147 /* If two operands must match, because they are really a single
2148 operand of an assembler insn, then two postincrements are invalid
2149 because the assembler insn would increment only once.
2150 On the other hand, a postincrement matches ordinary indexing
2151 if the postincrement is the output operand. */
2152 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2153 return operands_match_p (XEXP (x, 0), y);
2154 /* Two preincrements are invalid
2155 because the assembler insn would increment only once.
2156 On the other hand, a preincrement matches ordinary indexing
2157 if the preincrement is the input operand.
2158 In this case, return 2, since some callers need to do special
2159 things when this happens. */
2160 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2161 || GET_CODE (y) == PRE_MODIFY)
2162 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2163
2164 slow:
--- 306 unchanged lines hidden (view full) ---
2471 and they are chewed up as we consider alternatives. */
2472 char *constraints[MAX_RECOG_OPERANDS];
2473 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2474 a register. */
2475 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2476 char pref_or_nothing[MAX_RECOG_OPERANDS];
2477 /* Nonzero for a MEM operand whose entire address needs a reload. */
2478 int address_reloaded[MAX_RECOG_OPERANDS];
2479 /* Nonzero for an address operand that needs to be completely reloaded. */
2480 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2481 /* Value of enum reload_type to use for operand. */
2482 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2483 /* Value of enum reload_type to use within address of operand. */
2484 enum reload_type address_type[MAX_RECOG_OPERANDS];
2485 /* Save the usage of each operand. */
2486 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2487 int no_input_reloads = 0, no_output_reloads = 0;
2488 int n_alternatives;
--- 162 unchanged lines hidden (view full) ---
2651
2652 Finally, set up the preferred classes of each operand. */
2653
2654 for (i = 0; i < noperands; i++)
2655 {
2656 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2657
2658 address_reloaded[i] = 0;
2659 address_operand_reloaded[i] = 0;
2660 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2661 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2662 : RELOAD_OTHER);
2663 address_type[i]
2664 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2665 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2666 : RELOAD_OTHER);
2667
2668 if (*constraints[i] == 0)
2669 /* Ignore things like match_operator operands. */
2670 ;
2671 else if (constraints[i][0] == 'p'
2672 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0]))
2673 {
2674 address_operand_reloaded[i]
2675 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2676 recog_data.operand[i],
2677 recog_data.operand_loc[i],
2678 i, operand_type[i], ind_levels, insn);
2679
2680 /* If we now have a simple operand where we used to have a
2681 PLUS or MULT, re-recognize and try again. */
2682 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2683 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2684 && (GET_CODE (recog_data.operand[i]) == MULT
2685 || GET_CODE (recog_data.operand[i]) == PLUS))
2686 {
2687 INSN_CODE (insn) = -1;
2688 retval = find_reloads (insn, replace, ind_levels, live_known,
2689 reload_reg_p);
2690 return retval;
2691 }
2692
2693 recog_data.operand[i] = *recog_data.operand_loc[i];
2694 substed_operand[i] = recog_data.operand[i];
2695
2696 /* Address operands are reloaded in their existing mode,
2697 no matter what is specified in the machine description. */
2698 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2699 }
2700 else if (code == MEM)
2701 {
2702 address_reloaded[i]
2703 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2704 recog_data.operand_loc[i],
2705 XEXP (recog_data.operand[i], 0),
2706 &XEXP (recog_data.operand[i], 0),
--- 164 unchanged lines hidden (view full) ---
2871 {
2872 /* Offset only matters when operand is a REG and
2873 it is a hard reg. This is because it is passed
2874 to reg_fits_class_p if it is a REG and all pseudos
2875 return 0 from that function. */
2876 if (GET_CODE (SUBREG_REG (operand)) == REG
2877 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2878 {
2879 if (!subreg_offset_representable_p
2880 (REGNO (SUBREG_REG (operand)),
2881 GET_MODE (SUBREG_REG (operand)),
2882 SUBREG_BYTE (operand),
2883 GET_MODE (operand)))
2884 force_reload = 1;
2885 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2886 GET_MODE (SUBREG_REG (operand)),
2887 SUBREG_BYTE (operand),
2888 GET_MODE (operand));
2889 }
2890 operand = SUBREG_REG (operand);
2891 /* Force reload if this is a constant or PLUS or if there may
2892 be a problem accessing OPERAND in the outer mode. */
--- 39 unchanged lines hidden (view full) ---
2932 && (GET_MODE_SIZE (operand_mode[i])
2933 > GET_MODE_SIZE (GET_MODE (operand)))
2934 && INTEGRAL_MODE_P (GET_MODE (operand))
2935 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2936#endif
2937 )
2938#endif
2939 )
2940 )
2941 force_reload = 1;
2942 }
2943
2944 this_alternative[i] = (int) NO_REGS;
2945 this_alternative_win[i] = 0;
2946 this_alternative_match_win[i] = 0;
2947 this_alternative_offmemok[i] = 0;
--- 207 unchanged lines hidden (view full) ---
3155
3156 case '&':
3157 /* Output operand that is stored before the need for the
3158 input operands (and their index registers) is over. */
3159 earlyclobber = 1, this_earlyclobber = 1;
3160 break;
3161
3162 case 'E':
3163 case 'F':
3164 if (GET_CODE (operand) == CONST_DOUBLE
3165 || (GET_CODE (operand) == CONST_VECTOR
3166 && (GET_MODE_CLASS (GET_MODE (operand))
3167 == MODE_VECTOR_FLOAT)))
3168 win = 1;
3169 break;
3170
3171 case 'G':
3172 case 'H':
3173 if (GET_CODE (operand) == CONST_DOUBLE
3174 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3175 win = 1;
--- 60 unchanged lines hidden (view full) ---
3236 this_alternative[i]
3237 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3238 goto reg;
3239
3240 default:
3241 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3242 {
3243#ifdef EXTRA_CONSTRAINT
3244 if (EXTRA_MEMORY_CONSTRAINT (c))
3245 {
3246 if (force_reload)
3247 break;
3248 if (EXTRA_CONSTRAINT (operand, c))
3249 win = 1;
3250 /* If the address was already reloaded,
3251 we win as well. */
3252 if (GET_CODE (operand) == MEM && address_reloaded[i])
3253 win = 1;
3254 /* Likewise if the address will be reloaded because
3255 reg_equiv_address is nonzero. For reg_equiv_mem
3256 we have to check. */
3257 if (GET_CODE (operand) == REG
3258 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3259 && reg_renumber[REGNO (operand)] < 0
3260 && ((reg_equiv_mem[REGNO (operand)] != 0
3261 && EXTRA_CONSTRAINT (reg_equiv_mem[REGNO (operand)], c))
3262 || (reg_equiv_address[REGNO (operand)] != 0)))
3263 win = 1;
3264
3265 /* If we didn't already win, we can reload
3266 constants via force_const_mem, and other
3267 MEMs by reloading the address like for 'o'. */
3268 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3269 || GET_CODE (operand) == MEM)
3270 badop = 0;
3271 constmemok = 1;
3272 offmemok = 1;
3273 break;
3274 }
3275 if (EXTRA_ADDRESS_CONSTRAINT (c))
3276 {
3277 if (EXTRA_CONSTRAINT (operand, c))
3278 win = 1;
3279
3280 /* If we didn't already win, we can reload
3281 the address into a base register. */
3282 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3283 badop = 0;
3284 break;
3285 }
3286
3287 if (EXTRA_CONSTRAINT (operand, c))
3288 win = 1;
3289#endif
3290 break;
3291 }
3292
3293 this_alternative[i]
3294 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
--- 346 unchanged lines hidden (view full) ---
3641 /* Right now, for any pair of operands I and J that are required to match,
3642 with I < J,
3643 goal_alternative_matches[J] is I.
3644 Set up goal_alternative_matched as the inverse function:
3645 goal_alternative_matched[I] = J. */
3646
3647 for (i = 0; i < noperands; i++)
3648 goal_alternative_matched[i] = -1;
3649
3650 for (i = 0; i < noperands; i++)
3651 if (! goal_alternative_win[i]
3652 && goal_alternative_matches[i] >= 0)
3653 goal_alternative_matched[goal_alternative_matches[i]] = i;
3654
3655 for (i = 0; i < noperands; i++)
3656 goal_alternative_win[i] |= goal_alternative_match_win[i];
3657
--- 187 unchanged lines hidden (view full) ---
3845 /* Avoid further trouble with this insn. */
3846 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3847 n_reloads = 0;
3848 return 0;
3849 }
3850 }
3851 else if (goal_alternative_matched[i] < 0
3852 && goal_alternative_matches[i] < 0
3853 && !address_operand_reloaded[i]
3854 && optimize)
3855 {
3856 /* For each non-matching operand that's a MEM or a pseudo-register
3857 that didn't get a hard register, make an optional reload.
3858 This may get done even if the insn needs no reloads otherwise. */
3859
3860 rtx operand = recog_data.operand[i];
3861
--- 131 unchanged lines hidden (view full) ---
3993 propagating things allocated by frame pointer elimination into places
3994 it doesn't expect. */
3995
3996 if (insn_code_number >= 0 && replace)
3997 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3998 {
3999 int opno = recog_data.dup_num[i];
4000 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4001 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4002 }
4003
4004#if 0
4005 /* This loses because reloading of prior insns can invalidate the equivalence
4006 (or at least find_equiv_reg isn't smart enough to find it any more),
4007 causing this insn to need more reload regs than it needed before.
4008 It may be too late to make the reload regs available.
4009 Now this optimization is done safely in choose_reload_regs. */
--- 337 unchanged lines hidden (view full) ---
4347 while (altnum > 0)
4348 {
4349 while (*constraint++ != ',');
4350 altnum--;
4351 }
4352 /* Scan the requested alternative for 'm' or 'o'.
4353 If one of them is present, this alternative accepts memory constants. */
4354 while ((c = *constraint++) && c != ',' && c != '#')
4355 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c))
4356 return 1;
4357 return 0;
4358}
4359
4360/* Scan X for memory references and scan the addresses for reloading.
4361 Also checks for references to "constant" regs that we want to eliminate
4362 and replaces them with the values they stand for.
4363 We may alter X destructively if it contains a reference to such.
--- 108 unchanged lines hidden (view full) ---
4472 tem =
4473 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4474 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4475 if (!tem)
4476 abort ();
4477 return tem;
4478 }
4479
4480 /* If the subreg contains a reg that will be converted to a mem,
4481 convert the subreg to a narrower memref now.
4482 Otherwise, we would get (subreg (mem ...) ...),
4483 which would force reload of the mem.
4484
4485 We also need to do this if there is an equivalent MEM that is
4486 not offsettable. In that case, alter_subreg would produce an
4487 invalid address on big-endian machines.
--- 63 unchanged lines hidden (view full) ---
4551
4552 /* Copy the result if it's still the same as the equivalence, to avoid
4553 modifying it when we do the substitution for the reload. */
4554 if (tem == reg_equiv_memory_loc[regno])
4555 tem = copy_rtx (tem);
4556 return tem;
4557}
4558
4559/* Returns true if AD could be turned into a valid memory reference
4560 to mode MODE by reloading the part pointed to by PART into a
4561 register. */
4562
4563static int
4564maybe_memory_address_p (mode, ad, part)
4565 enum machine_mode mode;
4566 rtx ad;
4567 rtx *part;
4568{
4569 int retv;
4570 rtx tem = *part;
4571 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4572
4573 *part = reg;
4574 retv = memory_address_p (mode, ad);
4575 *part = tem;
4576
4577 return retv;
4578}
4579
4580/* Record all reloads needed for handling memory address AD
4581 which appears in *LOC in a memory reference to mode MODE
4582 which itself is found in location *MEMREFLOC.
4583 Note that we take shortcuts assuming that no multi-reg machine mode
4584 occurs as part of an address.
4585
4586 OPNUM and TYPE specify the purpose of this reload.
4587
--- 50 unchanged lines hidden (view full) ---
4638 tem = reg_equiv_memory_loc[regno];
4639 if (tem != 0)
4640 {
4641 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4642 {
4643 tem = make_memloc (ad, regno);
4644 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4645 {
4646 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4647 &XEXP (tem, 0), opnum,
4648 ADDR_TYPE (type), ind_levels, insn);
4649 }
4650 /* We can avoid a reload if the register's equivalent memory
4651 expression is valid as an indirect memory address.
4652 But not all addresses are valid in a mem used as an indirect
4653 address: only reg or reg+constant. */
4654
4655 if (ind_levels > 0
4656 && strict_memory_address_p (mode, tem)
--- 195 unchanged lines hidden (view full) ---
4852
4853 We can easily check for an index needing reload, but even if that is the
4854 case, we might also have an invalid constant. To avoid making the
4855 conservative assumption and requiring two reloads, we see if this address
4856 is valid when not interpreted strictly. If it is, the only problem is
4857 that the index needs a reload and find_reloads_address_1 will take care
4858 of it.
4859
4860 Handle all base registers here, not just fp/ap/sp, because on some
4861 targets (namely Sparc) we can also get invalid addresses from preventive
4862 subreg big-endian corrections made by find_reloads_toplev.
4863
4864 If we decide to do something, it must be that `double_reg_address_ok'
4865 is true. We generate a reload of the base register + constant and
4866 rework the sum so that the reload register will be added to the index.
4867 This is safe because we know the address isn't shared.
4868
4869 We check for the base register as both the first and second operand of
4870 the innermost PLUS. */
4871
4872 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4873 && GET_CODE (XEXP (ad, 0)) == PLUS
4874 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4875 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4876 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4877 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4878 {
4879 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4880 plus_constant (XEXP (XEXP (ad, 0), 0),
4881 INTVAL (XEXP (ad, 1))),
4882 XEXP (XEXP (ad, 0), 1));
4883 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4884 MODE_BASE_REG_CLASS (mode),
4885 GET_MODE (ad), opnum, type, ind_levels);
4886 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4887 type, 0, insn);
4888
4889 return 0;
4890 }
4891
4892 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4893 && GET_CODE (XEXP (ad, 0)) == PLUS
4894 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4895 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4896 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4897 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4898 {
4899 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4900 XEXP (XEXP (ad, 0), 0),
4901 plus_constant (XEXP (XEXP (ad, 0), 1),
4902 INTVAL (XEXP (ad, 1))));
4903 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4904 MODE_BASE_REG_CLASS (mode),
4905 GET_MODE (ad), opnum, type, ind_levels);
--- 328 unchanged lines hidden (view full) ---
5234 ??? op0 SUBREGs we use word_mode? */
5235 op1 = gen_rtx_REG (GET_MODE (op1),
5236 (REGNO (op1) +
5237 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5238 GET_MODE (SUBREG_REG (orig_op1)),
5239 SUBREG_BYTE (orig_op1),
5240 GET_MODE (orig_op1))));
5241 }
5242 /* Plus in the index register may be created only as a result of
5243 register remateralization for expresion like &localvar*4. Reload it.
5244 It may be possible to combine the displacement on the outer level,
5245 but it is probably not worthwhile to do so. */
5246 if (context)
5247 {
5248 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5249 opnum, ADDR_TYPE (type), ind_levels, insn);
5250 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5251 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5252 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5253 return 1;
5254 }
5255
5256 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5257 || code0 == ZERO_EXTEND || code1 == MEM)
5258 {
5259 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5260 type, ind_levels, insn);
5261 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5262 type, ind_levels, insn);
--- 111 unchanged lines hidden (view full) ---
5374
5375 if (reg_equiv_address[regno]
5376 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5377 {
5378 /* First reload the memory location's address.
5379 We can't use ADDR_TYPE (type) here, because we need to
5380 write back the value after reading it, hence we actually
5381 need two registers. */
5382 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5383 &XEXP (tem, 0), opnum,
5384 RELOAD_OTHER,
5385 ind_levels, insn);
5386
5387 /* Then reload the memory location into a base
5388 register. */
5389 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5390 &XEXP (op1, 0),
--- 286 unchanged lines hidden (view full) ---
5677 }
5678 }
5679 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5680 is larger than the class size, then reload the whole SUBREG. */
5681 else
5682 {
5683 enum reg_class class = (context ? INDEX_REG_CLASS
5684 : MODE_BASE_REG_CLASS (mode));
5685 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5686 > reg_class_size[class])
5687 {
5688 x = find_reloads_subreg_address (x, 0, opnum, type,
5689 ind_levels, insn);
5690 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5691 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5692 return 1;
5693 }
--- 327 unchanged lines hidden (view full) ---
6021 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6022 else if (fmt[i] == 'E')
6023 for (j = XVECLEN (x, i); --j >= 0; )
6024 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6025 orig_replacements);
6026 }
6027}
6028
6029/* Change any replacements being done to *X to be done to *Y. */
6030
6031void
6032move_replacements (x, y)
6033 rtx *x;
6034 rtx *y;
6035{
6036 int i;
6037
--- 854 unchanged lines hidden (view full) ---
6892 for (; i >= 0; i--)
6893 {
6894 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6895 if ((GET_CODE (elt) == CLOBBER
6896 || (sets && GET_CODE (PATTERN (insn)) == SET))
6897 && GET_CODE (XEXP (elt, 0)) == REG)
6898 {
6899 unsigned int test = REGNO (XEXP (elt, 0));
6900
6901 if (test >= regno && test < endregno)
6902 return 1;
6903 }
6904 }
6905 }
6906
6907 return 0;
6908}
--- 121 unchanged lines hidden ---
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
--- 230 unchanged lines hidden (view full) ---
239static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
241 enum insn_code *));
242#endif
243static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
244 unsigned int));
245static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
246static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
247static void dup_replacements PARAMS ((rtx *, rtx *));
248static void combine_reloads PARAMS ((void));
249static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
250 enum reload_type, int, int));
251static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
252 enum machine_mode, enum machine_mode,
253 enum reg_class, int, int));
254static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
255static struct decomposition decompose PARAMS ((rtx));
256static int immune_p PARAMS ((rtx, rtx, struct decomposition));
257static int alternative_allows_memconst PARAMS ((const char *, int));
258static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
259 int, rtx, int *));
260static rtx make_memloc PARAMS ((rtx, int));
261static int maybe_memory_address_p PARAMS ((enum machine_mode, rtx, rtx *));
262static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
263 int, enum reload_type, int, rtx));
264static rtx subst_reg_equivs PARAMS ((rtx, rtx));
265static rtx subst_indexed_address PARAMS ((rtx));
266static void update_auto_inc_notes PARAMS ((rtx, int, int));
267static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
268 int, enum reload_type,int, rtx));
269static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
270 enum machine_mode, int,
271 enum reload_type, int));
272static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
273 enum reload_type, int, rtx));
274static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
275static int find_inc_amount PARAMS ((rtx, rtx));
276
277#ifdef HAVE_SECONDARY_RELOADS
278
279/* Determine if any secondary reloads are needed for loading (if IN_P is
280 nonzero) or storing (if IN_P is zero) X to or from a reload register of
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
283
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
287
288static int
--- 75 unchanged lines hidden (view full) ---
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
368 register. */
369
370 if (icode != CODE_FOR_nothing)
371 {
372 /* If IN_P is nonzero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
375 skip. */
376
377 enum reg_class insn_class;
378
379 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
380 insn_class = ALL_REGS;
--- 260 unchanged lines hidden (view full) ---
641 don't save it. */
642
643 if (! mem_valid)
644 {
645 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
646 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
647 : RELOAD_OTHER);
648
649 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
650 opnum, type, 0, 0);
651 }
652
653 secondary_memlocs_elim[(int) mode][opnum] = loc;
654 return loc;
655}
656
657/* Clear any secondary memory locations we've made. */
--- 156 unchanged lines hidden (view full) ---
814 return 1;
815
816 /* If INNER is not a hard register, then INNER will not need to
817 be reloaded. */
818 if (GET_CODE (inner) != REG
819 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
820 return 0;
821
822 if (!subreg_offset_representable_p
823 (REGNO (SUBREG_REG (x)),
824 GET_MODE (SUBREG_REG (x)),
825 SUBREG_BYTE (x),
826 GET_MODE (x)))
827 return 1;
828
829 /* If INNER is not ok for MODE, then INNER will need reloading. */
830 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
831 return 1;
832
833 /* If the outer part is a word or smaller, INNER larger than a
834 word and the number of regs for INNER is not the same as the
835 number of words in INNER, then INNER will need reloading. */
836 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
837 && output
838 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
839 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
840 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
841}
842
843/* Record one reload that needs to be performed.
844 IN is an rtx saying where the data are to be found before this instruction.
845 OUT says where they must be stored after the instruction.
846 (IN is zero for data not read, and OUT is zero for data not written.)
847 INLOC and OUTLOC point to the places in the instructions where
848 IN and OUT were found.
849 If IN and OUT are both nonzero, it means the same register must be used
850 to reload both IN and OUT.
851
852 CLASS is a register class required for the reloaded data.
853 INMODE is the machine mode that the instruction requires
854 for the reg that replaces IN and OUTMODE is likewise for OUT.
855
856 If IN is zero, then OUT's location and mode should be passed as
857 INLOC and INMODE.
--- 112 unchanged lines hidden (view full) ---
970 the class whose registers cannot be referenced in a different size
971 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
972 cannot reload just the inside since we might end up with the wrong
973 register class. But if it is inside a STRICT_LOW_PART, we have
974 no choice, so we hope we do get the right register class there. */
975
976 if (in != 0 && GET_CODE (in) == SUBREG
977 && (subreg_lowpart_p (in) || strict_low)
978#ifdef CANNOT_CHANGE_MODE_CLASS
979 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
980#endif
981 && (CONSTANT_P (SUBREG_REG (in))
982 || GET_CODE (SUBREG_REG (in)) == PLUS
983 || strict_low
984 || (((GET_CODE (SUBREG_REG (in)) == REG
985 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
986 || GET_CODE (SUBREG_REG (in)) == MEM)
987 && ((GET_MODE_SIZE (inmode)
--- 20 unchanged lines hidden (view full) ---
1008 /* The case where out is nonzero
1009 is handled differently in the following statement. */
1010 && (out == 0 || subreg_lowpart_p (in))
1011 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1013 > UNITS_PER_WORD)
1014 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1015 / UNITS_PER_WORD)
1016 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1017 GET_MODE (SUBREG_REG (in)))))
1018 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1019#ifdef SECONDARY_INPUT_RELOAD_CLASS
1020 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1021 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1022 GET_MODE (SUBREG_REG (in)),
1023 SUBREG_REG (in))
1024 == NO_REGS))
1025#endif
1026#ifdef CANNOT_CHANGE_MODE_CLASS
1027 || (GET_CODE (SUBREG_REG (in)) == REG
1028 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1029 && REG_CANNOT_CHANGE_MODE_P
1030 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1031#endif
1032 ))
1033 {
1034 in_subreg_loc = inloc;
1035 inloc = &SUBREG_REG (in);
1036 in = *inloc;
1037#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1038 if (GET_CODE (in) == MEM)
--- 41 unchanged lines hidden (view full) ---
1080 /* Similarly for paradoxical and problematical SUBREGs on the output.
1081 Note that there is no reason we need worry about the previous value
1082 of SUBREG_REG (out); even if wider than out,
1083 storing in a subreg is entitled to clobber it all
1084 (except in the case of STRICT_LOW_PART,
1085 and in that case the constraint should label it input-output.) */
1086 if (out != 0 && GET_CODE (out) == SUBREG
1087 && (subreg_lowpart_p (out) || strict_low)
1088#ifdef CANNOT_CHANGE_MODE_CLASS
1089 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1090#endif
1091 && (CONSTANT_P (SUBREG_REG (out))
1092 || strict_low
1093 || (((GET_CODE (SUBREG_REG (out)) == REG
1094 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1095 || GET_CODE (SUBREG_REG (out)) == MEM)
1096 && ((GET_MODE_SIZE (outmode)
1097 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
--- 7 unchanged lines hidden (view full) ---
1105 ))
1106 || (GET_CODE (SUBREG_REG (out)) == REG
1107 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1108 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1109 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1110 > UNITS_PER_WORD)
1111 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1112 / UNITS_PER_WORD)
1113 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1114 GET_MODE (SUBREG_REG (out)))))
1115 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1116#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1117 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1118 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1119 GET_MODE (SUBREG_REG (out)),
1120 SUBREG_REG (out))
1121 == NO_REGS))
1122#endif
1123#ifdef CANNOT_CHANGE_MODE_CLASS
1124 || (GET_CODE (SUBREG_REG (out)) == REG
1125 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1126 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1127 GET_MODE (SUBREG_REG (out)),
1128 outmode))
1129#endif
1130 ))
1131 {
1132 out_subreg_loc = outloc;
1133 outloc = &SUBREG_REG (out);
1134 out = *outloc;
1135#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1136 if (GET_CODE (out) == MEM
--- 144 unchanged lines hidden (view full) ---
1281 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1282 type, &secondary_out_icode);
1283#endif
1284
1285 /* We found no existing reload suitable for re-use.
1286 So add an additional reload. */
1287
1288#ifdef SECONDARY_MEMORY_NEEDED
1289 /* If a memory location is needed for the copy, make one. */
1290 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1291 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1292 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1293 class, inmode))
1294 get_secondary_mem (in, inmode, opnum, type);
1295#endif
1296
1297 i = n_reloads;
1298 rld[i].in = in;
1299 rld[i].out = out;
1300 rld[i].class = class;
1301 rld[i].inmode = inmode;
1302 rld[i].outmode = outmode;
--- 9 unchanged lines hidden (view full) ---
1312 rld[i].secondary_out_reload = secondary_out_reload;
1313 rld[i].secondary_in_icode = secondary_in_icode;
1314 rld[i].secondary_out_icode = secondary_out_icode;
1315 rld[i].secondary_p = 0;
1316
1317 n_reloads++;
1318
1319#ifdef SECONDARY_MEMORY_NEEDED
1320 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1321 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (class,
1323 REGNO_REG_CLASS (reg_or_subregno (out)),
1324 outmode))
1325 get_secondary_mem (out, outmode, opnum, type);
1326#endif
1327 }
1328 else
1329 {
1330 /* We are reusing an existing reload,
1331 but we may have additional information for it.
1332 For example, we may now have both IN and OUT
1333 while the old one may have just one of them. */
--- 228 unchanged lines hidden (view full) ---
1562 {
1563 struct replacement *r = &replacements[n_replacements++];
1564 r->what = reloadnum;
1565 r->where = loc;
1566 r->subreg_loc = 0;
1567 r->mode = mode;
1568 }
1569}
1570
1571/* Duplicate any replacement we have recorded to apply at
1572 location ORIG_LOC to also be performed at DUP_LOC.
1573 This is used in insn patterns that use match_dup. */
1574
1575static void
1576dup_replacements (dup_loc, orig_loc)
1577 rtx *dup_loc;
1578 rtx *orig_loc;
1579{
1580 int i, n = n_replacements;
1581
1582 for (i = 0; i < n; i++)
1583 {
1584 struct replacement *r = &replacements[i];
1585 if (r->where == orig_loc)
1586 push_replacement (dup_loc, r->what, r->mode);
1587 }
1588}
1589
1590/* Transfer all replacements that used to be in reload FROM to be in
1591 reload TO. */
1592
1593void
1594transfer_replacements (to, from)
1595 int to, from;
1596{
1597 int i;
1598
1599 for (i = 0; i < n_replacements; i++)
1600 if (replacements[i].what == from)
1601 replacements[i].what = to;
1602}
1603
1604/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1605 or a subpart of it. If we have any replacements registered for IN_RTX,
1606 cancel the reloads that were supposed to load them.
1607 Return nonzero if we canceled any reloads. */
1608int
1609remove_address_replacements (in_rtx)
1610 rtx in_rtx;
1611{
1612 int i, j;
1613 char reload_flags[MAX_RELOADS];
1614 int something_changed = 0;
1615
--- 223 unchanged lines hidden (view full) ---
1839
1840 If FOR_REAL is >= 0, it is the number of the reload,
1841 and in some cases when it can be discovered that OUT doesn't need
1842 to be computed, clear out rld[FOR_REAL].out.
1843
1844 If FOR_REAL is -1, this should not be done, because this call
1845 is just to see if a register can be found, not to find and install it.
1846
1847 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1848 puts an additional constraint on being able to use IN for OUT since
1849 IN must not appear elsewhere in the insn (it is assumed that IN itself
1850 is safe from the earlyclobber). */
1851
1852static rtx
1853find_dummy_reload (real_in, real_out, inloc, outloc,
1854 inmode, outmode, class, for_real, earlyclobber)
1855 rtx real_in, real_out;
--- 286 unchanged lines hidden (view full) ---
2142 && j < FIRST_PSEUDO_REGISTER)
2143 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2144
2145 return i == j;
2146 }
2147 /* If two operands must match, because they are really a single
2148 operand of an assembler insn, then two postincrements are invalid
2149 because the assembler insn would increment only once.
2150 On the other hand, a postincrement matches ordinary indexing
2151 if the postincrement is the output operand. */
2152 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2153 return operands_match_p (XEXP (x, 0), y);
2154 /* Two preincrements are invalid
2155 because the assembler insn would increment only once.
2156 On the other hand, a preincrement matches ordinary indexing
2157 if the preincrement is the input operand.
2158 In this case, return 2, since some callers need to do special
2159 things when this happens. */
2160 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2161 || GET_CODE (y) == PRE_MODIFY)
2162 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2163
2164 slow:
--- 306 unchanged lines hidden (view full) ---
2471 and they are chewed up as we consider alternatives. */
2472 char *constraints[MAX_RECOG_OPERANDS];
2473 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2474 a register. */
2475 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2476 char pref_or_nothing[MAX_RECOG_OPERANDS];
2477 /* Nonzero for a MEM operand whose entire address needs a reload. */
2478 int address_reloaded[MAX_RECOG_OPERANDS];
2479 /* Nonzero for an address operand that needs to be completely reloaded. */
2480 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2481 /* Value of enum reload_type to use for operand. */
2482 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2483 /* Value of enum reload_type to use within address of operand. */
2484 enum reload_type address_type[MAX_RECOG_OPERANDS];
2485 /* Save the usage of each operand. */
2486 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2487 int no_input_reloads = 0, no_output_reloads = 0;
2488 int n_alternatives;
--- 162 unchanged lines hidden (view full) ---
2651
2652 Finally, set up the preferred classes of each operand. */
2653
2654 for (i = 0; i < noperands; i++)
2655 {
2656 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2657
2658 address_reloaded[i] = 0;
2659 address_operand_reloaded[i] = 0;
2660 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2661 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2662 : RELOAD_OTHER);
2663 address_type[i]
2664 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2665 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2666 : RELOAD_OTHER);
2667
2668 if (*constraints[i] == 0)
2669 /* Ignore things like match_operator operands. */
2670 ;
2671 else if (constraints[i][0] == 'p'
2672 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0]))
2673 {
2674 address_operand_reloaded[i]
2675 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2676 recog_data.operand[i],
2677 recog_data.operand_loc[i],
2678 i, operand_type[i], ind_levels, insn);
2679
2680 /* If we now have a simple operand where we used to have a
2681 PLUS or MULT, re-recognize and try again. */
2682 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2683 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2684 && (GET_CODE (recog_data.operand[i]) == MULT
2685 || GET_CODE (recog_data.operand[i]) == PLUS))
2686 {
2687 INSN_CODE (insn) = -1;
2688 retval = find_reloads (insn, replace, ind_levels, live_known,
2689 reload_reg_p);
2690 return retval;
2691 }
2692
2693 recog_data.operand[i] = *recog_data.operand_loc[i];
2694 substed_operand[i] = recog_data.operand[i];
2695
2696 /* Address operands are reloaded in their existing mode,
2697 no matter what is specified in the machine description. */
2698 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2699 }
2700 else if (code == MEM)
2701 {
2702 address_reloaded[i]
2703 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2704 recog_data.operand_loc[i],
2705 XEXP (recog_data.operand[i], 0),
2706 &XEXP (recog_data.operand[i], 0),
--- 164 unchanged lines hidden (view full) ---
2871 {
2872 /* Offset only matters when operand is a REG and
2873 it is a hard reg. This is because it is passed
2874 to reg_fits_class_p if it is a REG and all pseudos
2875 return 0 from that function. */
2876 if (GET_CODE (SUBREG_REG (operand)) == REG
2877 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2878 {
2879 if (!subreg_offset_representable_p
2880 (REGNO (SUBREG_REG (operand)),
2881 GET_MODE (SUBREG_REG (operand)),
2882 SUBREG_BYTE (operand),
2883 GET_MODE (operand)))
2884 force_reload = 1;
2885 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2886 GET_MODE (SUBREG_REG (operand)),
2887 SUBREG_BYTE (operand),
2888 GET_MODE (operand));
2889 }
2890 operand = SUBREG_REG (operand);
2891 /* Force reload if this is a constant or PLUS or if there may
2892 be a problem accessing OPERAND in the outer mode. */
--- 39 unchanged lines hidden (view full) ---
2932 && (GET_MODE_SIZE (operand_mode[i])
2933 > GET_MODE_SIZE (GET_MODE (operand)))
2934 && INTEGRAL_MODE_P (GET_MODE (operand))
2935 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2936#endif
2937 )
2938#endif
2939 )
2940 )
2941 force_reload = 1;
2942 }
2943
2944 this_alternative[i] = (int) NO_REGS;
2945 this_alternative_win[i] = 0;
2946 this_alternative_match_win[i] = 0;
2947 this_alternative_offmemok[i] = 0;
--- 207 unchanged lines hidden (view full) ---
3155
3156 case '&':
3157 /* Output operand that is stored before the need for the
3158 input operands (and their index registers) is over. */
3159 earlyclobber = 1, this_earlyclobber = 1;
3160 break;
3161
3162 case 'E':
3163 case 'F':
3164 if (GET_CODE (operand) == CONST_DOUBLE
3165 || (GET_CODE (operand) == CONST_VECTOR
3166 && (GET_MODE_CLASS (GET_MODE (operand))
3167 == MODE_VECTOR_FLOAT)))
3168 win = 1;
3169 break;
3170
3171 case 'G':
3172 case 'H':
3173 if (GET_CODE (operand) == CONST_DOUBLE
3174 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3175 win = 1;
--- 60 unchanged lines hidden (view full) ---
3236 this_alternative[i]
3237 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3238 goto reg;
3239
3240 default:
3241 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3242 {
3243#ifdef EXTRA_CONSTRAINT
3244 if (EXTRA_MEMORY_CONSTRAINT (c))
3245 {
3246 if (force_reload)
3247 break;
3248 if (EXTRA_CONSTRAINT (operand, c))
3249 win = 1;
3250 /* If the address was already reloaded,
3251 we win as well. */
3252 if (GET_CODE (operand) == MEM && address_reloaded[i])
3253 win = 1;
3254 /* Likewise if the address will be reloaded because
3255 reg_equiv_address is nonzero. For reg_equiv_mem
3256 we have to check. */
3257 if (GET_CODE (operand) == REG
3258 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3259 && reg_renumber[REGNO (operand)] < 0
3260 && ((reg_equiv_mem[REGNO (operand)] != 0
3261 && EXTRA_CONSTRAINT (reg_equiv_mem[REGNO (operand)], c))
3262 || (reg_equiv_address[REGNO (operand)] != 0)))
3263 win = 1;
3264
3265 /* If we didn't already win, we can reload
3266 constants via force_const_mem, and other
3267 MEMs by reloading the address like for 'o'. */
3268 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3269 || GET_CODE (operand) == MEM)
3270 badop = 0;
3271 constmemok = 1;
3272 offmemok = 1;
3273 break;
3274 }
3275 if (EXTRA_ADDRESS_CONSTRAINT (c))
3276 {
3277 if (EXTRA_CONSTRAINT (operand, c))
3278 win = 1;
3279
3280 /* If we didn't already win, we can reload
3281 the address into a base register. */
3282 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3283 badop = 0;
3284 break;
3285 }
3286
3287 if (EXTRA_CONSTRAINT (operand, c))
3288 win = 1;
3289#endif
3290 break;
3291 }
3292
3293 this_alternative[i]
3294 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
--- 346 unchanged lines hidden (view full) ---
3641 /* Right now, for any pair of operands I and J that are required to match,
3642 with I < J,
3643 goal_alternative_matches[J] is I.
3644 Set up goal_alternative_matched as the inverse function:
3645 goal_alternative_matched[I] = J. */
3646
3647 for (i = 0; i < noperands; i++)
3648 goal_alternative_matched[i] = -1;
3649
3650 for (i = 0; i < noperands; i++)
3651 if (! goal_alternative_win[i]
3652 && goal_alternative_matches[i] >= 0)
3653 goal_alternative_matched[goal_alternative_matches[i]] = i;
3654
3655 for (i = 0; i < noperands; i++)
3656 goal_alternative_win[i] |= goal_alternative_match_win[i];
3657
--- 187 unchanged lines hidden (view full) ---
3845 /* Avoid further trouble with this insn. */
3846 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3847 n_reloads = 0;
3848 return 0;
3849 }
3850 }
3851 else if (goal_alternative_matched[i] < 0
3852 && goal_alternative_matches[i] < 0
3853 && !address_operand_reloaded[i]
3854 && optimize)
3855 {
3856 /* For each non-matching operand that's a MEM or a pseudo-register
3857 that didn't get a hard register, make an optional reload.
3858 This may get done even if the insn needs no reloads otherwise. */
3859
3860 rtx operand = recog_data.operand[i];
3861
--- 131 unchanged lines hidden (view full) ---
3993 propagating things allocated by frame pointer elimination into places
3994 it doesn't expect. */
3995
3996 if (insn_code_number >= 0 && replace)
3997 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3998 {
3999 int opno = recog_data.dup_num[i];
4000 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4001 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4002 }
4003
4004#if 0
4005 /* This loses because reloading of prior insns can invalidate the equivalence
4006 (or at least find_equiv_reg isn't smart enough to find it any more),
4007 causing this insn to need more reload regs than it needed before.
4008 It may be too late to make the reload regs available.
4009 Now this optimization is done safely in choose_reload_regs. */
--- 337 unchanged lines hidden (view full) ---
4347 while (altnum > 0)
4348 {
4349 while (*constraint++ != ',');
4350 altnum--;
4351 }
4352 /* Scan the requested alternative for 'm' or 'o'.
4353 If one of them is present, this alternative accepts memory constants. */
4354 while ((c = *constraint++) && c != ',' && c != '#')
4355 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c))
4356 return 1;
4357 return 0;
4358}
4359
4360/* Scan X for memory references and scan the addresses for reloading.
4361 Also checks for references to "constant" regs that we want to eliminate
4362 and replaces them with the values they stand for.
4363 We may alter X destructively if it contains a reference to such.
--- 108 unchanged lines hidden (view full) ---
4472 tem =
4473 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4474 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4475 if (!tem)
4476 abort ();
4477 return tem;
4478 }
4479
4480 /* If the subreg contains a reg that will be converted to a mem,
4481 convert the subreg to a narrower memref now.
4482 Otherwise, we would get (subreg (mem ...) ...),
4483 which would force reload of the mem.
4484
4485 We also need to do this if there is an equivalent MEM that is
4486 not offsettable. In that case, alter_subreg would produce an
4487 invalid address on big-endian machines.
--- 63 unchanged lines hidden (view full) ---
4551
4552 /* Copy the result if it's still the same as the equivalence, to avoid
4553 modifying it when we do the substitution for the reload. */
4554 if (tem == reg_equiv_memory_loc[regno])
4555 tem = copy_rtx (tem);
4556 return tem;
4557}
4558
4559/* Returns true if AD could be turned into a valid memory reference
4560 to mode MODE by reloading the part pointed to by PART into a
4561 register. */
4562
4563static int
4564maybe_memory_address_p (mode, ad, part)
4565 enum machine_mode mode;
4566 rtx ad;
4567 rtx *part;
4568{
4569 int retv;
4570 rtx tem = *part;
4571 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4572
4573 *part = reg;
4574 retv = memory_address_p (mode, ad);
4575 *part = tem;
4576
4577 return retv;
4578}
4579
4580/* Record all reloads needed for handling memory address AD
4581 which appears in *LOC in a memory reference to mode MODE
4582 which itself is found in location *MEMREFLOC.
4583 Note that we take shortcuts assuming that no multi-reg machine mode
4584 occurs as part of an address.
4585
4586 OPNUM and TYPE specify the purpose of this reload.
4587
--- 50 unchanged lines hidden (view full) ---
4638 tem = reg_equiv_memory_loc[regno];
4639 if (tem != 0)
4640 {
4641 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4642 {
4643 tem = make_memloc (ad, regno);
4644 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4645 {
4646 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4647 &XEXP (tem, 0), opnum,
4648 ADDR_TYPE (type), ind_levels, insn);
4649 }
4650 /* We can avoid a reload if the register's equivalent memory
4651 expression is valid as an indirect memory address.
4652 But not all addresses are valid in a mem used as an indirect
4653 address: only reg or reg+constant. */
4654
4655 if (ind_levels > 0
4656 && strict_memory_address_p (mode, tem)
--- 195 unchanged lines hidden (view full) ---
4852
4853 We can easily check for an index needing reload, but even if that is the
4854 case, we might also have an invalid constant. To avoid making the
4855 conservative assumption and requiring two reloads, we see if this address
4856 is valid when not interpreted strictly. If it is, the only problem is
4857 that the index needs a reload and find_reloads_address_1 will take care
4858 of it.
4859
4860 Handle all base registers here, not just fp/ap/sp, because on some
4861 targets (namely Sparc) we can also get invalid addresses from preventive
4862 subreg big-endian corrections made by find_reloads_toplev.
4863
4864 If we decide to do something, it must be that `double_reg_address_ok'
4865 is true. We generate a reload of the base register + constant and
4866 rework the sum so that the reload register will be added to the index.
4867 This is safe because we know the address isn't shared.
4868
4869 We check for the base register as both the first and second operand of
4870 the innermost PLUS. */
4871
4872 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4873 && GET_CODE (XEXP (ad, 0)) == PLUS
4874 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4875 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4876 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4877 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4878 {
4879 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4880 plus_constant (XEXP (XEXP (ad, 0), 0),
4881 INTVAL (XEXP (ad, 1))),
4882 XEXP (XEXP (ad, 0), 1));
4883 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4884 MODE_BASE_REG_CLASS (mode),
4885 GET_MODE (ad), opnum, type, ind_levels);
4886 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4887 type, 0, insn);
4888
4889 return 0;
4890 }
4891
4892 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4893 && GET_CODE (XEXP (ad, 0)) == PLUS
4894 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4895 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4896 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4897 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4898 {
4899 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4900 XEXP (XEXP (ad, 0), 0),
4901 plus_constant (XEXP (XEXP (ad, 0), 1),
4902 INTVAL (XEXP (ad, 1))));
4903 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4904 MODE_BASE_REG_CLASS (mode),
4905 GET_MODE (ad), opnum, type, ind_levels);
--- 328 unchanged lines hidden (view full) ---
5234 ??? op0 SUBREGs we use word_mode? */
5235 op1 = gen_rtx_REG (GET_MODE (op1),
5236 (REGNO (op1) +
5237 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5238 GET_MODE (SUBREG_REG (orig_op1)),
5239 SUBREG_BYTE (orig_op1),
5240 GET_MODE (orig_op1))));
5241 }
5242 /* Plus in the index register may be created only as a result of
5243 register remateralization for expresion like &localvar*4. Reload it.
5244 It may be possible to combine the displacement on the outer level,
5245 but it is probably not worthwhile to do so. */
5246 if (context)
5247 {
5248 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5249 opnum, ADDR_TYPE (type), ind_levels, insn);
5250 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5251 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5252 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5253 return 1;
5254 }
5255
5256 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5257 || code0 == ZERO_EXTEND || code1 == MEM)
5258 {
5259 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5260 type, ind_levels, insn);
5261 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5262 type, ind_levels, insn);
--- 111 unchanged lines hidden (view full) ---
5374
5375 if (reg_equiv_address[regno]
5376 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5377 {
5378 /* First reload the memory location's address.
5379 We can't use ADDR_TYPE (type) here, because we need to
5380 write back the value after reading it, hence we actually
5381 need two registers. */
5382 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5383 &XEXP (tem, 0), opnum,
5384 RELOAD_OTHER,
5385 ind_levels, insn);
5386
5387 /* Then reload the memory location into a base
5388 register. */
5389 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5390 &XEXP (op1, 0),
--- 286 unchanged lines hidden (view full) ---
5677 }
5678 }
5679 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5680 is larger than the class size, then reload the whole SUBREG. */
5681 else
5682 {
5683 enum reg_class class = (context ? INDEX_REG_CLASS
5684 : MODE_BASE_REG_CLASS (mode));
5685 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5686 > reg_class_size[class])
5687 {
5688 x = find_reloads_subreg_address (x, 0, opnum, type,
5689 ind_levels, insn);
5690 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5691 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5692 return 1;
5693 }
--- 327 unchanged lines hidden (view full) ---
6021 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6022 else if (fmt[i] == 'E')
6023 for (j = XVECLEN (x, i); --j >= 0; )
6024 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6025 orig_replacements);
6026 }
6027}
6028
6029/* Change any replacements being done to *X to be done to *Y. */
6030
6031void
6032move_replacements (x, y)
6033 rtx *x;
6034 rtx *y;
6035{
6036 int i;
6037
--- 854 unchanged lines hidden (view full) ---
6892 for (; i >= 0; i--)
6893 {
6894 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6895 if ((GET_CODE (elt) == CLOBBER
6896 || (sets && GET_CODE (PATTERN (insn)) == SET))
6897 && GET_CODE (XEXP (elt, 0)) == REG)
6898 {
6899 unsigned int test = REGNO (XEXP (elt, 0));
6900
6901 if (test >= regno && test < endregno)
6902 return 1;
6903 }
6904 }
6905 }
6906
6907 return 0;
6908}
--- 121 unchanged lines hidden ---