| 1/* Subroutines used by or related to instruction recognition. 2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5This file is part of GCC. 6 7GCC is free software; you can redistribute it and/or modify it under 8the terms of the GNU General Public License as published by the Free --- 147 unchanged lines hidden (view full) --- 156 { 157 const char *c = constraints[i]; 158 if (c[0] == '%') 159 c++; 160 if (ISDIGIT ((unsigned char) c[0]) && c[1] == '\0') 161 c = constraints[c[0] - '0']; 162 163 if (! asm_operand_ok (operands[i], c)) |
| 164 return 0; |
| 165 } 166 167 return 1; 168} 169 170/* Static data for the next two routines. */ 171 172typedef struct change_t --- 13 unchanged lines hidden (view full) --- 186 at which NEW will be placed. If OBJECT is zero, no validation is done, 187 the change is simply made. 188 189 Two types of objects are supported: If OBJECT is a MEM, memory_address_p 190 will be called with the address and mode as parameters. If OBJECT is 191 an INSN, CALL_INSN, or JUMP_INSN, the insn will be re-recognized with 192 the change in place. 193 |
| 194 IN_GROUP is nonzero if this is part of a group of changes that must be |
| 195 performed as a group. In that case, the changes will be stored. The 196 function `apply_change_group' will validate and apply the changes. 197 198 If IN_GROUP is zero, this is a single change. Try to recognize the insn 199 or validate the memory reference with the change applied. If the result 200 is not valid for the machine, suppress the change and return zero. 201 Otherwise, perform the change and return 1. */ 202 --- 19 unchanged lines hidden (view full) --- 222 { 223 if (changes_allocated == 0) 224 /* This value allows for repeated substitutions inside complex 225 indexed addresses, or changes in up to 5 insns. */ 226 changes_allocated = MAX_RECOG_OPERANDS * 5; 227 else 228 changes_allocated *= 2; 229 |
| 230 changes = 231 (change_t*) xrealloc (changes, 232 sizeof (change_t) * changes_allocated); |
| 233 } |
| 234 |
| 235 changes[num_changes].object = object; 236 changes[num_changes].loc = loc; 237 changes[num_changes].old = old; 238 239 if (object && GET_CODE (object) != MEM) 240 { 241 /* Set INSN_CODE to force rerecognition of insn. Save old code in 242 case invalid. */ --- 24 unchanged lines hidden (view full) --- 267 /* If we are before reload and the pattern is a SET, see if we can add 268 clobbers. */ 269 int icode = recog (pat, insn, 270 (GET_CODE (pat) == SET 271 && ! reload_completed && ! reload_in_progress) 272 ? &num_clobbers : 0); 273 int is_asm = icode < 0 && asm_noperands (PATTERN (insn)) >= 0; 274 |
| 275 |
| 276 /* If this is an asm and the operand aren't legal, then fail. Likewise if 277 this is not an asm and the insn wasn't recognized. */ 278 if ((is_asm && ! check_asm_operands (PATTERN (insn))) 279 || (!is_asm && icode < 0)) 280 return 1; 281 282 /* If we have to add CLOBBERs, fail if we have to add ones that reference 283 hard registers since our callers can't know if they are live or not. --- 19 unchanged lines hidden (view full) --- 303 if (! constrain_operands (1)) 304 return 1; 305 } 306 307 INSN_CODE (insn) = icode; 308 return 0; 309} 310 |
| 311/* Return number of changes made and not validated yet. */ 312int 313num_changes_pending () 314{ 315 return num_changes; 316} 317 |
| 318/* Apply a group of changes previously issued with `validate_change'. 319 Return 1 if all changes are valid, zero otherwise. */ 320 321int 322apply_change_group () 323{ 324 int i; 325 rtx last_validated = NULL_RTX; --- 38 unchanged lines hidden (view full) --- 364 365 if (XVECLEN (pat, 0) == 2) 366 newpat = XVECEXP (pat, 0, 0); 367 else 368 { 369 int j; 370 371 newpat |
| 372 = gen_rtx_PARALLEL (VOIDmode, |
| 373 rtvec_alloc (XVECLEN (pat, 0) - 1)); 374 for (j = 0; j < XVECLEN (newpat, 0); j++) 375 XVECEXP (newpat, 0, j) = XVECEXP (pat, 0, j); 376 } 377 378 /* Add a new change to this group to replace the pattern 379 with this new pattern. Then consider this change 380 as having succeeded. The change we added will --- 13 unchanged lines hidden (view full) --- 394 else 395 break; 396 } 397 last_validated = object; 398 } 399 400 if (i == num_changes) 401 { |
| 402 basic_block bb; 403 404 for (i = 0; i < num_changes; i++) 405 if (changes[i].object 406 && INSN_P (changes[i].object) 407 && (bb = BLOCK_FOR_INSN (changes[i].object))) 408 bb->flags |= BB_DIRTY; 409 |
| 410 num_changes = 0; 411 return 1; 412 } 413 else 414 { 415 cancel_changes (0); 416 return 0; 417 } --- 255 unchanged lines hidden (view full) --- 673{ 674 struct validate_replace_src_data *d 675 = (struct validate_replace_src_data *) data; 676 677 validate_replace_rtx_1 (x, d->from, d->to, d->insn); 678} 679 680/* Try replacing every occurrence of FROM in INSN with TO, avoiding |
| 681 SET_DESTs. */ |
| 682 |
| 683void 684validate_replace_src_group (from, to, insn) |
| 685 rtx from, to, insn; 686{ 687 struct validate_replace_src_data d; 688 689 d.from = from; 690 d.to = to; 691 d.insn = insn; 692 note_uses (&PATTERN (insn), validate_replace_src_1, &d); |
| 693} 694 695/* Same as validate_repalace_src_group, but validate by seeing if 696 INSN is still valid. */ 697int 698validate_replace_src (from, to, insn) 699 rtx from, to, insn; 700{ 701 validate_replace_src_group (from, to, insn); |
| 702 return apply_change_group (); 703} 704 705#ifdef HAVE_cc0 706/* Return 1 if the insn using CC0 set by INSN does not contain 707 any ordered tests applied to the condition codes. 708 EQ and NE tests do not count. */ 709 --- 86 unchanged lines hidden (view full) --- 796 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 797 break; 798 799 return find_single_use_1 (dest, &SET_SRC (x)); 800 801 case MEM: 802 case SUBREG: 803 return find_single_use_1 (dest, &XEXP (x, 0)); |
| 804 |
| 805 default: 806 break; 807 } 808 809 /* If it wasn't one of the common cases above, check each expression and 810 vector of this code. Look for a unique usage of DEST. */ 811 812 fmt = GET_RTX_FORMAT (code); --- 38 unchanged lines hidden (view full) --- 851 852 return result; 853} 854 855/* See if DEST, produced in INSN, is used only a single time in the 856 sequel. If so, return a pointer to the innermost rtx expression in which 857 it is used. 858 |
| 859 If PLOC is nonzero, *PLOC is set to the insn containing the single use. |
| 860 861 This routine will return usually zero either before flow is called (because 862 there will be no LOG_LINKS notes) or after reload (because the REG_DEAD 863 note can't be trusted). 864 865 If DEST is cc0_rtx, we look only at the next insn. In that case, we don't 866 care about REG_DEAD notes or LOG_LINKS. 867 --- 81 unchanged lines hidden (view full) --- 949 /* Don't accept CONST_INT or anything similar 950 if the caller wants something floating. */ 951 if (GET_MODE (op) == VOIDmode && mode != VOIDmode 952 && GET_MODE_CLASS (mode) != MODE_INT 953 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT) 954 return 0; 955 956 if (GET_CODE (op) == CONST_INT |
| 957 && mode != VOIDmode |
| 958 && trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op)) 959 return 0; 960 961 if (CONSTANT_P (op)) 962 return ((GET_MODE (op) == VOIDmode || GET_MODE (op) == mode 963 || mode == VOIDmode) 964#ifdef LEGITIMATE_PIC_OPERAND_P 965 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)) --- 15 unchanged lines hidden (view full) --- 981 reference to be explicit, so outlaw paradoxical SUBREGs. */ 982 if (GET_CODE (sub) == MEM 983 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (sub))) 984 return 0; 985#endif 986 /* Avoid memories with nonzero SUBREG_BYTE, as offsetting the memory 987 may result in incorrect reference. We should simplify all valid 988 subregs of MEM anyway. But allow this after reload because we |
| 989 might be called from cleanup_subreg_operands. |
| 990 991 ??? This is a kludge. */ 992 if (!reload_completed && SUBREG_BYTE (op) != 0 993 && GET_CODE (sub) == MEM) |
| 994 return 0; |
| 995 996 /* FLOAT_MODE subregs can't be paradoxical. Combine will occasionally |
| 997 create such rtl, and we must reject it. */ |
| 998 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT 999 && GET_MODE_SIZE (GET_MODE (op)) > GET_MODE_SIZE (GET_MODE (sub))) 1000 return 0; 1001 1002 op = sub; 1003 code = GET_CODE (op); 1004 } 1005 --- 72 unchanged lines hidden (view full) --- 1078 because it is guaranteed to be reloaded into one. 1079 Just make sure the MEM is valid in itself. 1080 (Ideally, (SUBREG (MEM)...) should not exist after reload, 1081 but currently it does result from (SUBREG (REG)...) where the 1082 reg went on the stack.) */ 1083 if (! reload_completed && GET_CODE (sub) == MEM) 1084 return general_operand (op, mode); 1085 |
| 1086#ifdef CANNOT_CHANGE_MODE_CLASS |
| 1087 if (GET_CODE (sub) == REG 1088 && REGNO (sub) < FIRST_PSEUDO_REGISTER |
| 1089 && REG_CANNOT_CHANGE_MODE_P (REGNO (sub), GET_MODE (sub), mode) |
| 1090 && GET_MODE_CLASS (GET_MODE (sub)) != MODE_COMPLEX_INT 1091 && GET_MODE_CLASS (GET_MODE (sub)) != MODE_COMPLEX_FLOAT) 1092 return 0; 1093#endif 1094 1095 /* FLOAT_MODE subregs can't be paradoxical. Combine will occasionally 1096 create such rtl, and we must reject it. */ 1097 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT --- 54 unchanged lines hidden (view full) --- 1152 /* Don't accept CONST_INT or anything similar 1153 if the caller wants something floating. */ 1154 if (GET_MODE (op) == VOIDmode && mode != VOIDmode 1155 && GET_MODE_CLASS (mode) != MODE_INT 1156 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT) 1157 return 0; 1158 1159 if (GET_CODE (op) == CONST_INT |
| 1160 && mode != VOIDmode |
| 1161 && trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op)) 1162 return 0; 1163 1164 /* Accept CONSTANT_P_RTX, since it will be gone by CSE1 and 1165 result in 0/1. It seems a safe assumption that this is 1166 in range for everyone. */ 1167 if (GET_CODE (op) == CONSTANT_P_RTX) 1168 return 1; --- 66 unchanged lines hidden (view full) --- 1235 /* Don't accept CONST_INT or anything similar 1236 if the caller wants something floating. */ 1237 if (GET_MODE (op) == VOIDmode && mode != VOIDmode 1238 && GET_MODE_CLASS (mode) != MODE_INT 1239 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT) 1240 return 0; 1241 1242 if (GET_CODE (op) == CONST_INT |
| 1243 && mode != VOIDmode |
| 1244 && trunc_int_for_mode (INTVAL (op), mode) != INTVAL (op)) 1245 return 0; 1246 1247 return ((GET_MODE (op) == VOIDmode || GET_MODE (op) == mode 1248 || mode == VOIDmode) 1249#ifdef LEGITIMATE_PIC_OPERAND_P 1250 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)) 1251#endif --- 100 unchanged lines hidden (view full) --- 1352 1353int 1354memory_address_p (mode, addr) 1355 enum machine_mode mode ATTRIBUTE_UNUSED; 1356 rtx addr; 1357{ 1358 if (GET_CODE (addr) == ADDRESSOF) 1359 return 1; |
| 1360 |
| 1361 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 1362 return 0; 1363 1364 win: 1365 return 1; 1366} 1367 1368/* Return 1 if OP is a valid memory reference with mode MODE, --- 237 unchanged lines hidden (view full) --- 1606 /* At least one output, plus some CLOBBERs. */ 1607 1608 /* The outputs are in the SETs. 1609 Their constraints are in the ASM_OPERANDS itself. */ 1610 for (i = 0; i < nparallel; i++) 1611 { 1612 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 1613 break; /* Past last SET */ |
| 1614 |
| 1615 if (operands) 1616 operands[i] = SET_DEST (XVECEXP (body, 0, i)); 1617 if (operand_locs) 1618 operand_locs[i] = &SET_DEST (XVECEXP (body, 0, i)); 1619 if (constraints) 1620 constraints[i] = XSTR (SET_SRC (XVECEXP (body, 0, i)), 1); 1621 if (modes) 1622 modes[i] = GET_MODE (SET_DEST (XVECEXP (body, 0, i))); --- 35 unchanged lines hidden (view full) --- 1658 } 1659 1660 template = ASM_OPERANDS_TEMPLATE (asmop); 1661 } 1662 1663 return template; 1664} 1665 |
| 1666/* Check if an asm_operand matches it's constraints. |
| 1667 Return > 0 if ok, = 0 if bad, < 0 if inconclusive. */ 1668 1669int 1670asm_operand_ok (op, constraint) 1671 rtx op; 1672 const char *constraint; 1673{ 1674 int result = 0; --- 51 unchanged lines hidden (view full) --- 1726 machines which do not have generalized auto inc/dec, an inc/dec 1727 is not a memory_operand. 1728 1729 Match any memory and hope things are resolved after reload. */ 1730 1731 if (GET_CODE (op) == MEM 1732 && (1 1733 || GET_CODE (XEXP (op, 0)) == PRE_DEC |
| 1734 || GET_CODE (XEXP (op, 0)) == POST_DEC)) |
| 1735 return 1; 1736 break; 1737 1738 case '>': 1739 if (GET_CODE (op) == MEM 1740 && (1 1741 || GET_CODE (XEXP (op, 0)) == PRE_INC |
| 1742 || GET_CODE (XEXP (op, 0)) == POST_INC)) |
| 1743 return 1; 1744 break; 1745 1746 case 'E': |
| 1747 case 'F': |
| 1748 if (GET_CODE (op) == CONST_DOUBLE 1749 || (GET_CODE (op) == CONST_VECTOR 1750 && GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_FLOAT)) |
| 1751 return 1; 1752 break; 1753 1754 case 'G': 1755 if (GET_CODE (op) == CONST_DOUBLE 1756 && CONST_DOUBLE_OK_FOR_LETTER_P (op, 'G')) 1757 return 1; 1758 break; --- 84 unchanged lines hidden (view full) --- 1843 if (GET_MODE (op) == BLKmode) 1844 break; 1845 if (register_operand (op, VOIDmode)) 1846 return 1; 1847 } 1848#ifdef EXTRA_CONSTRAINT 1849 if (EXTRA_CONSTRAINT (op, c)) 1850 return 1; |
| 1851 if (EXTRA_MEMORY_CONSTRAINT (c)) 1852 { 1853 /* Every memory operand can be reloaded to fit. */ 1854 if (memory_operand (op, VOIDmode)) 1855 return 1; 1856 } 1857 if (EXTRA_ADDRESS_CONSTRAINT (c)) 1858 { 1859 /* Every address operand can be reloaded to fit. */ 1860 if (address_operand (op, VOIDmode)) 1861 return 1; 1862 } |
| 1863#endif 1864 break; 1865 } 1866 } 1867 1868 return result; 1869} 1870 --- 381 unchanged lines hidden (view full) --- 2252 case '?': 2253 op_alt[j].reject += 6; 2254 break; 2255 case '!': 2256 op_alt[j].reject += 600; 2257 break; 2258 case '&': 2259 op_alt[j].earlyclobber = 1; |
| 2260 break; |
| 2261 2262 case '0': case '1': case '2': case '3': case '4': 2263 case '5': case '6': case '7': case '8': case '9': 2264 { 2265 char *end; 2266 op_alt[j].matches = strtoul (p - 1, &end, 10); 2267 recog_op_alt[op_alt[j].matches][j].matched = i; 2268 p = end; --- 25 unchanged lines hidden (view full) --- 2294 [(int) MODE_BASE_REG_CLASS (VOIDmode)]; 2295 break; 2296 2297 case 'g': case 'r': 2298 op_alt[j].class = reg_class_subunion[(int) op_alt[j].class][(int) GENERAL_REGS]; 2299 break; 2300 2301 default: |
| 2302 if (EXTRA_MEMORY_CONSTRAINT (c)) 2303 { 2304 op_alt[j].memory_ok = 1; 2305 break; 2306 } 2307 if (EXTRA_ADDRESS_CONSTRAINT (c)) 2308 { 2309 op_alt[j].is_address = 1; 2310 op_alt[j].class = reg_class_subunion[(int) op_alt[j].class] 2311 [(int) MODE_BASE_REG_CLASS (VOIDmode)]; 2312 break; 2313 } 2314 |
| 2315 op_alt[j].class = reg_class_subunion[(int) op_alt[j].class][(int) REG_CLASS_FROM_LETTER ((unsigned char) c)]; 2316 break; 2317 } 2318 } 2319 } 2320 } 2321} |
| 2322 |
| 2323/* Check the operands of an insn against the insn's operand constraints 2324 and return 1 if they are valid. 2325 The information about the insn's operands, constraints, operand modes 2326 etc. is obtained from the global variables set up by extract_insn. 2327 2328 WHICH_ALTERNATIVE is set to a number which indicates which 2329 alternative of constraints was matched: 0 for the first alternative, 2330 1 for the next, etc. 2331 2332 In addition, when two operands are match 2333 and it happens that the output operand is (reg) while the 2334 input operand is --(reg) or ++(reg) (a pre-inc or pre-dec), 2335 make the output operand look like the input. 2336 This is because the output operand is the one the template will print. 2337 2338 This is used in final, just before printing the assembler code and by 2339 the routines that determine an insn's attribute. 2340 |
| 2341 If STRICT is a positive nonzero value, it means that we have been |
| 2342 called after reload has been completed. In that case, we must 2343 do all checks strictly. If it is zero, it means that we have been called 2344 before reload has completed. In that case, we first try to see if we can 2345 find an alternative that matches strictly. If not, we try again, this 2346 time assuming that reload will fix up the insn. This provides a "best 2347 guess" for the alternative and is used to compute attributes of insns prior 2348 to reload. A negative value of STRICT is used for this internal call. */ 2349 --- 184 unchanged lines hidden (view full) --- 2534 case '>': 2535 if (GET_CODE (op) == MEM 2536 && (GET_CODE (XEXP (op, 0)) == PRE_INC 2537 || GET_CODE (XEXP (op, 0)) == POST_INC)) 2538 win = 1; 2539 break; 2540 2541 case 'E': |
| 2542 case 'F': |
| 2543 if (GET_CODE (op) == CONST_DOUBLE 2544 || (GET_CODE (op) == CONST_VECTOR 2545 && GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_FLOAT)) |
| 2546 win = 1; 2547 break; 2548 2549 case 'G': 2550 case 'H': 2551 if (GET_CODE (op) == CONST_DOUBLE 2552 && CONST_DOUBLE_OK_FOR_LETTER_P (op, c)) 2553 win = 1; --- 66 unchanged lines hidden (view full) --- 2620 || (strict == 0 && GET_CODE (op) == SCRATCH) 2621 || (GET_CODE (op) == REG 2622 && reg_fits_class_p (op, class, offset, mode))) 2623 win = 1; 2624 } 2625#ifdef EXTRA_CONSTRAINT 2626 else if (EXTRA_CONSTRAINT (op, c)) 2627 win = 1; |
| 2628 2629 if (EXTRA_MEMORY_CONSTRAINT (c)) 2630 { 2631 /* Every memory operand can be reloaded to fit. */ 2632 if (strict < 0 && GET_CODE (op) == MEM) 2633 win = 1; 2634 2635 /* Before reload, accept what reload can turn into mem. */ 2636 if (strict < 0 && CONSTANT_P (op)) 2637 win = 1; 2638 2639 /* During reload, accept a pseudo */ 2640 if (reload_in_progress && GET_CODE (op) == REG 2641 && REGNO (op) >= FIRST_PSEUDO_REGISTER) 2642 win = 1; 2643 } 2644 if (EXTRA_ADDRESS_CONSTRAINT (c)) 2645 { 2646 /* Every address operand can be reloaded to fit. */ 2647 if (strict < 0) 2648 win = 1; 2649 } |
| 2650#endif 2651 break; 2652 } 2653 } 2654 2655 constraints[opno] = p; 2656 /* If this operand did not win somehow, 2657 this alternative loses. */ --- 100 unchanged lines hidden (view full) --- 2758 else if ((set = single_set (insn)) != NULL && set_noop_p (set)) 2759 { 2760 /* Nops get in the way while scheduling, so delete them 2761 now if register allocation has already been done. It 2762 is too risky to try to do this before register 2763 allocation, and there are unlikely to be very many 2764 nops then anyways. */ 2765 if (reload_completed) |
| 2766 delete_insn_and_edges (insn); |
| 2767 } 2768 else 2769 { 2770 /* Split insns here to get max fine-grain parallelism. */ 2771 rtx first = PREV_INSN (insn); 2772 rtx last = try_split (PATTERN (insn), insn, 1); 2773 2774 if (last != insn) 2775 { 2776 /* try_split returns the NOTE that INSN became. */ 2777 PUT_CODE (insn, NOTE); 2778 NOTE_SOURCE_FILE (insn) = 0; 2779 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; 2780 2781 /* ??? Coddle to md files that generate subregs in post- |
| 2782 reload splitters instead of computing the proper |
| 2783 hard register. */ 2784 if (reload_completed && first != last) 2785 { 2786 first = NEXT_INSN (first); 2787 while (1) 2788 { 2789 if (INSN_P (first)) 2790 cleanup_subreg_operands (first); --- 9 unchanged lines hidden (view full) --- 2800} 2801/* Split all insns in the function. If UPD_LIFE, update life info after. */ 2802 2803void 2804split_all_insns (upd_life) 2805 int upd_life; 2806{ 2807 sbitmap blocks; |
| 2808 bool changed; 2809 basic_block bb; |
| 2810 |
| 2811 blocks = sbitmap_alloc (last_basic_block); |
| 2812 sbitmap_zero (blocks); |
| 2813 changed = false; |
| 2814 |
| 2815 FOR_EACH_BB_REVERSE (bb) |
| 2816 { |
| 2817 rtx insn, next; |
| 2818 bool finish = false; |
| 2819 |
| 2820 for (insn = bb->head; !finish ; insn = next) |
| 2821 { 2822 rtx last; 2823 2824 /* Can't use `next_real_insn' because that might go across 2825 CODE_LABELS and short-out basic blocks. */ 2826 next = NEXT_INSN (insn); |
| 2827 finish = (insn == bb->end); |
| 2828 last = split_insn (insn); 2829 if (last) 2830 { 2831 /* The split sequence may include barrier, but the 2832 BB boundary we are interested in will be set to previous 2833 one. */ 2834 2835 while (GET_CODE (last) == BARRIER) 2836 last = PREV_INSN (last); |
| 2837 SET_BIT (blocks, bb->index); 2838 changed = true; |
| 2839 insn = last; 2840 } |
| 2841 } |
| 2842 } 2843 2844 if (changed) 2845 { |
| 2846 int old_last_basic_block = last_basic_block; 2847 |
| 2848 find_many_sub_basic_blocks (blocks); |
| 2849 2850 if (old_last_basic_block != last_basic_block && upd_life) 2851 blocks = sbitmap_resize (blocks, last_basic_block, 1); |
| 2852 } 2853 2854 if (changed && upd_life) |
| 2855 update_life_info (blocks, UPDATE_LIFE_GLOBAL_RM_NOTES, 2856 PROP_DEATH_NOTES | PROP_REG_INFO); 2857 |
| 2858#ifdef ENABLE_CHECKING 2859 verify_flow_info (); 2860#endif 2861 2862 sbitmap_free (blocks); 2863} 2864 |
| 2865/* Same as split_all_insns, but do not expect CFG to be available. |
| 2866 Used by machine depedent reorg passes. */ 2867 2868void 2869split_all_insns_noflow () 2870{ 2871 rtx next, insn; 2872 2873 for (insn = get_insns (); insn; insn = next) --- 202 unchanged lines hidden (view full) --- 3076 3077void 3078peephole2_optimize (dump_file) 3079 FILE *dump_file ATTRIBUTE_UNUSED; 3080{ 3081 regset_head rs_heads[MAX_INSNS_PER_PEEP2 + 2]; 3082 rtx insn, prev; 3083 regset live; |
| 3084 int i; 3085 basic_block bb; |
| 3086#ifdef HAVE_conditional_execution 3087 sbitmap blocks; 3088 bool changed; 3089#endif 3090 bool do_cleanup_cfg = false; 3091 bool do_rebuild_jump_labels = false; 3092 3093 /* Initialize the regsets we're going to use. */ 3094 for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i) 3095 peep2_insn_data[i].live_before = INITIALIZE_REG_SET (rs_heads[i]); 3096 live = INITIALIZE_REG_SET (rs_heads[i]); 3097 3098#ifdef HAVE_conditional_execution |
| 3099 blocks = sbitmap_alloc (last_basic_block); |
| 3100 sbitmap_zero (blocks); 3101 changed = false; 3102#else 3103 count_or_remove_death_notes (NULL, 1); 3104#endif 3105 |
| 3106 FOR_EACH_BB_REVERSE (bb) |
| 3107 { |
| 3108 struct propagate_block_info *pbi; 3109 3110 /* Indicate that all slots except the last holds invalid data. */ 3111 for (i = 0; i < MAX_INSNS_PER_PEEP2; ++i) 3112 peep2_insn_data[i].insn = NULL_RTX; 3113 3114 /* Indicate that the last slot contains live_after data. */ 3115 peep2_insn_data[MAX_INSNS_PER_PEEP2].insn = PEEP2_EOB; --- 12 unchanged lines hidden (view full) --- 3128 for (insn = bb->end; ; insn = prev) 3129 { 3130 prev = PREV_INSN (insn); 3131 if (INSN_P (insn)) 3132 { 3133 rtx try, before_try, x; 3134 int match_len; 3135 rtx note; |
| 3136 bool was_call = false; |
| 3137 3138 /* Record this insn. */ 3139 if (--peep2_current < 0) 3140 peep2_current = MAX_INSNS_PER_PEEP2; 3141 peep2_insn_data[peep2_current].insn = insn; 3142 propagate_one_insn (pbi, insn); 3143 COPY_REG_SET (peep2_insn_data[peep2_current].live_before, live); 3144 3145 /* Match the peephole. */ 3146 try = peephole2_insns (PATTERN (insn), insn, &match_len); 3147 if (try != NULL) 3148 { 3149 /* If we are splitting a CALL_INSN, look for the CALL_INSN 3150 in SEQ and copy our CALL_INSN_FUNCTION_USAGE and other 3151 cfg-related call notes. */ 3152 for (i = 0; i <= match_len; ++i) 3153 { |
| 3154 int j; |
| 3155 rtx old_insn, new_insn, note; 3156 3157 j = i + peep2_current; 3158 if (j >= MAX_INSNS_PER_PEEP2 + 1) 3159 j -= MAX_INSNS_PER_PEEP2 + 1; 3160 old_insn = peep2_insn_data[j].insn; 3161 if (GET_CODE (old_insn) != CALL_INSN) 3162 continue; |
| 3163 was_call = true; |
| 3164 |
| 3165 new_insn = try; 3166 while (new_insn != NULL_RTX) 3167 { 3168 if (GET_CODE (new_insn) == CALL_INSN) 3169 break; 3170 new_insn = NEXT_INSN (new_insn); 3171 } 3172 3173 if (new_insn == NULL_RTX) |
| 3174 abort (); 3175 3176 CALL_INSN_FUNCTION_USAGE (new_insn) 3177 = CALL_INSN_FUNCTION_USAGE (old_insn); 3178 3179 for (note = REG_NOTES (old_insn); 3180 note; 3181 note = XEXP (note, 1)) --- 23 unchanged lines hidden (view full) --- 3205 } 3206 break; 3207 } 3208 3209 i = match_len + peep2_current; 3210 if (i >= MAX_INSNS_PER_PEEP2 + 1) 3211 i -= MAX_INSNS_PER_PEEP2 + 1; 3212 |
| 3213 note = find_reg_note (peep2_insn_data[i].insn, |
| 3214 REG_EH_REGION, NULL_RTX); 3215 3216 /* Replace the old sequence with the new. */ |
| 3217 try = emit_insn_after_scope (try, peep2_insn_data[i].insn, 3218 INSN_SCOPE (peep2_insn_data[i].insn)); |
| 3219 before_try = PREV_INSN (insn); 3220 delete_insn_chain (insn, peep2_insn_data[i].insn); 3221 3222 /* Re-insert the EH_REGION notes. */ |
| 3223 if (note || (was_call && nonlocal_goto_handler_labels)) |
| 3224 { 3225 edge eh_edge; 3226 3227 for (eh_edge = bb->succ; eh_edge 3228 ; eh_edge = eh_edge->succ_next) |
| 3229 if (eh_edge->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) |
| 3230 break; 3231 3232 for (x = try ; x != before_try ; x = PREV_INSN (x)) 3233 if (GET_CODE (x) == CALL_INSN 3234 || (flag_non_call_exceptions 3235 && may_trap_p (PATTERN (x)) 3236 && !find_reg_note (x, REG_EH_REGION, NULL))) 3237 { |
| 3238 if (note) 3239 REG_NOTES (x) 3240 = gen_rtx_EXPR_LIST (REG_EH_REGION, 3241 XEXP (note, 0), 3242 REG_NOTES (x)); |
| 3243 3244 if (x != bb->end && eh_edge) 3245 { 3246 edge nfte, nehe; 3247 int flags; 3248 3249 nfte = split_block (bb, x); |
| 3250 flags = (eh_edge->flags 3251 & (EDGE_EH | EDGE_ABNORMAL)); |
| 3252 if (GET_CODE (x) == CALL_INSN) 3253 flags |= EDGE_ABNORMAL_CALL; 3254 nehe = make_edge (nfte->src, eh_edge->dest, 3255 flags); 3256 3257 nehe->probability = eh_edge->probability; 3258 nfte->probability 3259 = REG_BR_PROB_BASE - nehe->probability; --- 14 unchanged lines hidden (view full) --- 3274 } 3275 3276#ifdef HAVE_conditional_execution 3277 /* With conditional execution, we cannot back up the 3278 live information so easily, since the conditional 3279 death data structures are not so self-contained. 3280 So record that we've made a modification to this 3281 block and update life information at the end. */ |
| 3282 SET_BIT (blocks, bb->index); |
| 3283 changed = true; 3284 3285 for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i) 3286 peep2_insn_data[i].insn = NULL_RTX; 3287 peep2_insn_data[peep2_current].insn = PEEP2_EOB; 3288#else 3289 /* Back up lifetime information past the end of the 3290 newly created sequence. */ --- 61 unchanged lines hidden (view full) --- 3352 { 3353 count_or_remove_death_notes (blocks, 1); 3354 update_life_info (blocks, UPDATE_LIFE_LOCAL, PROP_DEATH_NOTES); 3355 } 3356 sbitmap_free (blocks); 3357#endif 3358} 3359#endif /* HAVE_peephole2 */ |
| 3360 3361/* Common predicates for use with define_bypass. */ 3362 3363/* True if the dependency between OUT_INSN and IN_INSN is on the store 3364 data not the address operand(s) of the store. IN_INSN must be 3365 single_set. OUT_INSN must be either a single_set or a PARALLEL with 3366 SETs inside. */ 3367 3368int 3369store_data_bypass_p (out_insn, in_insn) 3370 rtx out_insn, in_insn; 3371{ 3372 rtx out_set, in_set; 3373 3374 in_set = single_set (in_insn); 3375 if (! in_set) 3376 abort (); 3377 3378 if (GET_CODE (SET_DEST (in_set)) != MEM) 3379 return false; 3380 3381 out_set = single_set (out_insn); 3382 if (out_set) 3383 { 3384 if (reg_mentioned_p (SET_DEST (out_set), SET_DEST (in_set))) 3385 return false; 3386 } 3387 else 3388 { 3389 rtx out_pat; 3390 int i; 3391 3392 out_pat = PATTERN (out_insn); 3393 if (GET_CODE (out_pat) != PARALLEL) 3394 abort (); 3395 3396 for (i = 0; i < XVECLEN (out_pat, 0); i++) 3397 { 3398 rtx exp = XVECEXP (out_pat, 0, i); 3399 3400 if (GET_CODE (exp) == CLOBBER) 3401 continue; 3402 3403 if (GET_CODE (exp) != SET) 3404 abort (); 3405 3406 if (reg_mentioned_p (SET_DEST (exp), SET_DEST (in_set))) 3407 return false; 3408 } 3409 } 3410 3411 return true; 3412} 3413 3414/* True if the dependency between OUT_INSN and IN_INSN is in the IF_THEN_ELSE 3415 condition, and not the THEN or ELSE branch. OUT_INSN may be either a single 3416 or multiple set; IN_INSN should be single_set for truth, but for convenience 3417 of insn categorization may be any JUMP or CALL insn. */ 3418 3419int 3420if_test_bypass_p (out_insn, in_insn) 3421 rtx out_insn, in_insn; 3422{ 3423 rtx out_set, in_set; 3424 3425 in_set = single_set (in_insn); 3426 if (! in_set) 3427 { 3428 if (GET_CODE (in_insn) == JUMP_INSN || GET_CODE (in_insn) == CALL_INSN) 3429 return false; 3430 abort (); 3431 } 3432 3433 if (GET_CODE (SET_SRC (in_set)) != IF_THEN_ELSE) 3434 return false; 3435 in_set = SET_SRC (in_set); 3436 3437 out_set = single_set (out_insn); 3438 if (out_set) 3439 { 3440 if (reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 1)) 3441 || reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 2))) 3442 return false; 3443 } 3444 else 3445 { 3446 rtx out_pat; 3447 int i; 3448 3449 out_pat = PATTERN (out_insn); 3450 if (GET_CODE (out_pat) != PARALLEL) 3451 abort (); 3452 3453 for (i = 0; i < XVECLEN (out_pat, 0); i++) 3454 { 3455 rtx exp = XVECEXP (out_pat, 0, i); 3456 3457 if (GET_CODE (exp) == CLOBBER) 3458 continue; 3459 3460 if (GET_CODE (exp) != SET) 3461 abort (); 3462 3463 if (reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 1)) 3464 || reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 2))) 3465 return false; 3466 } 3467 } 3468 3469 return true; 3470} |