1/* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
| 1/* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
|
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
| 3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
|
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
| 5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING. If not, write to the Free
|
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
| 20Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
2102110-1301, USA. */
|
21
22/* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
24
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
30
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
35
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
38
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
46
47#include "config.h"
48#include "system.h"
49#include "coretypes.h"
50#include "tm.h"
51
52#include "tree.h"
53#include "rtl.h"
54#include "tm_p.h"
55#include "regs.h"
56#include "insn-config.h"
57#include "insn-attr.h"
58#include "recog.h"
59#include "conditions.h"
60#include "flags.h"
61#include "real.h"
62#include "hard-reg-set.h"
63#include "output.h"
64#include "except.h"
65#include "function.h"
66#include "toplev.h"
67#include "reload.h"
68#include "intl.h"
69#include "basic-block.h"
70#include "target.h"
71#include "debug.h"
72#include "expr.h"
73#include "cfglayout.h"
| 22
23/* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
47
48#include "config.h"
49#include "system.h"
50#include "coretypes.h"
51#include "tm.h"
52
53#include "tree.h"
54#include "rtl.h"
55#include "tm_p.h"
56#include "regs.h"
57#include "insn-config.h"
58#include "insn-attr.h"
59#include "recog.h"
60#include "conditions.h"
61#include "flags.h"
62#include "real.h"
63#include "hard-reg-set.h"
64#include "output.h"
65#include "except.h"
66#include "function.h"
67#include "toplev.h"
68#include "reload.h"
69#include "intl.h"
70#include "basic-block.h"
71#include "target.h"
72#include "debug.h"
73#include "expr.h"
74#include "cfglayout.h"
|
| 75#include "tree-pass.h"
76#include "timevar.h"
77#include "cgraph.h"
78#include "coverage.h"
|
74
75#ifdef XCOFF_DEBUGGING_INFO
76#include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
78#endif
79
80#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81#include "dwarf2out.h"
82#endif
83
84#ifdef DBX_DEBUGGING_INFO
85#include "dbxout.h"
86#endif
87
| 79
80#ifdef XCOFF_DEBUGGING_INFO
81#include "xcoffout.h" /* Needed for external data
82 declarations for e.g. AIX 4.x. */
83#endif
84
85#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
86#include "dwarf2out.h"
87#endif
88
89#ifdef DBX_DEBUGGING_INFO
90#include "dbxout.h"
91#endif
92
|
| 93#ifdef SDB_DEBUGGING_INFO
94#include "sdbout.h"
95#endif
96
|
88/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90#ifndef CC_STATUS_INIT
91#define CC_STATUS_INIT
92#endif
93
94/* How to start an assembler comment. */
95#ifndef ASM_COMMENT_START
96#define ASM_COMMENT_START ";#"
97#endif
98
99/* Is the given character a logical line separator for the assembler? */
100#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
102#endif
103
104#ifndef JUMP_TABLES_IN_TEXT_SECTION
105#define JUMP_TABLES_IN_TEXT_SECTION 0
106#endif
107
| 97/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
98 null default for it to save conditionalization later. */
99#ifndef CC_STATUS_INIT
100#define CC_STATUS_INIT
101#endif
102
103/* How to start an assembler comment. */
104#ifndef ASM_COMMENT_START
105#define ASM_COMMENT_START ";#"
106#endif
107
108/* Is the given character a logical line separator for the assembler? */
109#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
110#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
111#endif
112
113#ifndef JUMP_TABLES_IN_TEXT_SECTION
114#define JUMP_TABLES_IN_TEXT_SECTION 0
115#endif
116
|
108#if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109#define HAVE_READONLY_DATA_SECTION 1
110#else
111#define HAVE_READONLY_DATA_SECTION 0
112#endif
113
| |
114/* Bitflags used by final_scan_insn. */
115#define SEEN_BB 1
116#define SEEN_NOTE 2
117#define SEEN_EMITTED 4
118
119/* Last insn processed by final_scan_insn. */
120static rtx debug_insn;
121rtx current_output_insn;
122
123/* Line number of last NOTE. */
124static int last_linenum;
125
126/* Highest line number in current block. */
127static int high_block_linenum;
128
129/* Likewise for function. */
130static int high_function_linenum;
131
132/* Filename of last NOTE. */
133static const char *last_filename;
134
| 117/* Bitflags used by final_scan_insn. */
118#define SEEN_BB 1
119#define SEEN_NOTE 2
120#define SEEN_EMITTED 4
121
122/* Last insn processed by final_scan_insn. */
123static rtx debug_insn;
124rtx current_output_insn;
125
126/* Line number of last NOTE. */
127static int last_linenum;
128
129/* Highest line number in current block. */
130static int high_block_linenum;
131
132/* Likewise for function. */
133static int high_function_linenum;
134
135/* Filename of last NOTE. */
136static const char *last_filename;
137
|
135extern int length_unit_log; /* This is defined in insn-attrtab.c. */
| 138/* Whether to force emission of a line note before the next insn. */
139static bool force_source_line = false;
|
136
| 140
|
| 141extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
142
|
137/* Nonzero while outputting an `asm' with operands.
| 143/* Nonzero while outputting an `asm' with operands.
|
138 This means that inconsistencies are the user's fault, so don't abort.
| 144 This means that inconsistencies are the user's fault, so don't die.
|
139 The precise value is the insn being output, to pass to error_for_asm. */
140rtx this_is_asm_operands;
141
142/* Number of operands of this insn, for an `asm' with operands. */
143static unsigned int insn_noperands;
144
145/* Compare optimization flag. */
146
147static rtx last_ignored_compare = 0;
148
149/* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
151
152static int insn_counter = 0;
153
154#ifdef HAVE_cc0
155/* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
157 that describe how to interpret the condition codes properly. */
158
159CC_STATUS cc_status;
160
161/* During output of an insn, this contains a copy of cc_status
162 from before the insn. */
163
164CC_STATUS cc_prev_status;
165#endif
166
167/* Indexed by hardware reg number, is 1 if that register is ever
168 used in the current function.
169
170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
175
176char regs_ever_live[FIRST_PSEUDO_REGISTER];
177
178/* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
181
182char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
183
184/* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
187
188int frame_pointer_needed;
189
190/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
191
192static int block_depth;
193
194/* Nonzero if have enabled APP processing of our assembler output. */
195
196static int app_on;
197
198/* If we are outputting an insn sequence, this contains the sequence rtx.
199 Zero otherwise. */
200
201rtx final_sequence;
202
203#ifdef ASSEMBLER_DIALECT
204
205/* Number of the assembler dialect to use, starting at 0. */
206static int dialect_number;
207#endif
208
209#ifdef HAVE_conditional_execution
210/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
211rtx current_insn_predicate;
212#endif
213
214#ifdef HAVE_ATTR_length
215static int asm_insn_count (rtx);
216#endif
217static void profile_function (FILE *);
218static void profile_after_prologue (FILE *);
219static bool notice_source_line (rtx);
220static rtx walk_alter_subreg (rtx *);
221static void output_asm_name (void);
222static void output_alternate_entry_point (FILE *, rtx);
223static tree get_mem_expr_from_op (rtx, int *);
224static void output_asm_operand_names (rtx *, int *, int);
225static void output_operand (rtx, int);
226#ifdef LEAF_REGISTERS
227static void leaf_renumber_regs (rtx);
228#endif
229#ifdef HAVE_cc0
230static int alter_cond (rtx);
231#endif
232#ifndef ADDR_VEC_ALIGN
233static int final_addr_vec_align (rtx);
234#endif
235#ifdef HAVE_ATTR_length
236static int align_fuzz (rtx, rtx, int, unsigned);
237#endif
238
239/* Initialize data in final at the beginning of a compilation. */
240
241void
242init_final (const char *filename ATTRIBUTE_UNUSED)
243{
244 app_on = 0;
245 final_sequence = 0;
246
247#ifdef ASSEMBLER_DIALECT
248 dialect_number = ASSEMBLER_DIALECT;
249#endif
250}
251
252/* Default target function prologue and epilogue assembler output.
253
254 If not overridden for epilogue code, then the function body itself
255 contains return instructions wherever needed. */
256void
257default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
258 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
259{
260}
261
262/* Default target hook that outputs nothing to a stream. */
263void
264no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
265{
266}
267
268/* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
270
271void
272app_enable (void)
273{
274 if (! app_on)
275 {
276 fputs (ASM_APP_ON, asm_out_file);
277 app_on = 1;
278 }
279}
280
281/* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
283
284void
285app_disable (void)
286{
287 if (app_on)
288 {
289 fputs (ASM_APP_OFF, asm_out_file);
290 app_on = 0;
291 }
292}
293
294/* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
297
298#ifdef DELAY_SLOTS
299int
300dbr_sequence_length (void)
301{
302 if (final_sequence != 0)
303 return XVECLEN (final_sequence, 0) - 1;
304 else
305 return 0;
306}
307#endif
308
309/* The next two pages contain routines used to compute the length of an insn
310 and to shorten branches. */
311
312/* Arrays for insn lengths, and addresses. The latter is referenced by
313 `insn_current_length'. */
314
315static int *insn_lengths;
316
317varray_type insn_addresses_;
318
319/* Max uid for which the above arrays are valid. */
320static int insn_lengths_max_uid;
321
322/* Address of insn being processed. Used by `insn_current_length'. */
323int insn_current_address;
324
325/* Address of insn being processed in previous iteration. */
326int insn_last_address;
327
328/* known invariant alignment of insn being processed. */
329int insn_current_align;
330
331/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
332 gives the next following alignment insn that increases the known
333 alignment, or NULL_RTX if there is no such insn.
334 For any alignment obtained this way, we can again index uid_align with
335 its uid to obtain the next following align that in turn increases the
336 alignment, till we reach NULL_RTX; the sequence obtained this way
337 for each insn we'll call the alignment chain of this insn in the following
338 comments. */
339
340struct label_alignment
341{
342 short alignment;
343 short max_skip;
344};
345
346static rtx *uid_align;
347static int *uid_shuid;
348static struct label_alignment *label_align;
349
350/* Indicate that branch shortening hasn't yet been done. */
351
352void
353init_insn_lengths (void)
354{
355 if (uid_shuid)
356 {
357 free (uid_shuid);
358 uid_shuid = 0;
359 }
360 if (insn_lengths)
361 {
362 free (insn_lengths);
363 insn_lengths = 0;
364 insn_lengths_max_uid = 0;
365 }
366#ifdef HAVE_ATTR_length
367 INSN_ADDRESSES_FREE ();
368#endif
369 if (uid_align)
370 {
371 free (uid_align);
372 uid_align = 0;
373 }
374}
375
376/* Obtain the current length of an insn. If branch shortening has been done,
| 145 The precise value is the insn being output, to pass to error_for_asm. */
146rtx this_is_asm_operands;
147
148/* Number of operands of this insn, for an `asm' with operands. */
149static unsigned int insn_noperands;
150
151/* Compare optimization flag. */
152
153static rtx last_ignored_compare = 0;
154
155/* Assign a unique number to each insn that is output.
156 This can be used to generate unique local labels. */
157
158static int insn_counter = 0;
159
160#ifdef HAVE_cc0
161/* This variable contains machine-dependent flags (defined in tm.h)
162 set and examined by output routines
163 that describe how to interpret the condition codes properly. */
164
165CC_STATUS cc_status;
166
167/* During output of an insn, this contains a copy of cc_status
168 from before the insn. */
169
170CC_STATUS cc_prev_status;
171#endif
172
173/* Indexed by hardware reg number, is 1 if that register is ever
174 used in the current function.
175
176 In life_analysis, or in stupid_life_analysis, this is set
177 up to record the hard regs used explicitly. Reload adds
178 in the hard regs used for holding pseudo regs. Final uses
179 it to generate the code in the function prologue and epilogue
180 to save and restore registers as needed. */
181
182char regs_ever_live[FIRST_PSEUDO_REGISTER];
183
184/* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
185 Unlike regs_ever_live, elements of this array corresponding to
186 eliminable regs like the frame pointer are set if an asm sets them. */
187
188char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
189
190/* Nonzero means current function must be given a frame pointer.
191 Initialized in function.c to 0. Set only in reload1.c as per
192 the needs of the function. */
193
194int frame_pointer_needed;
195
196/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
197
198static int block_depth;
199
200/* Nonzero if have enabled APP processing of our assembler output. */
201
202static int app_on;
203
204/* If we are outputting an insn sequence, this contains the sequence rtx.
205 Zero otherwise. */
206
207rtx final_sequence;
208
209#ifdef ASSEMBLER_DIALECT
210
211/* Number of the assembler dialect to use, starting at 0. */
212static int dialect_number;
213#endif
214
215#ifdef HAVE_conditional_execution
216/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
217rtx current_insn_predicate;
218#endif
219
220#ifdef HAVE_ATTR_length
221static int asm_insn_count (rtx);
222#endif
223static void profile_function (FILE *);
224static void profile_after_prologue (FILE *);
225static bool notice_source_line (rtx);
226static rtx walk_alter_subreg (rtx *);
227static void output_asm_name (void);
228static void output_alternate_entry_point (FILE *, rtx);
229static tree get_mem_expr_from_op (rtx, int *);
230static void output_asm_operand_names (rtx *, int *, int);
231static void output_operand (rtx, int);
232#ifdef LEAF_REGISTERS
233static void leaf_renumber_regs (rtx);
234#endif
235#ifdef HAVE_cc0
236static int alter_cond (rtx);
237#endif
238#ifndef ADDR_VEC_ALIGN
239static int final_addr_vec_align (rtx);
240#endif
241#ifdef HAVE_ATTR_length
242static int align_fuzz (rtx, rtx, int, unsigned);
243#endif
244
245/* Initialize data in final at the beginning of a compilation. */
246
247void
248init_final (const char *filename ATTRIBUTE_UNUSED)
249{
250 app_on = 0;
251 final_sequence = 0;
252
253#ifdef ASSEMBLER_DIALECT
254 dialect_number = ASSEMBLER_DIALECT;
255#endif
256}
257
258/* Default target function prologue and epilogue assembler output.
259
260 If not overridden for epilogue code, then the function body itself
261 contains return instructions wherever needed. */
262void
263default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
264 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
265{
266}
267
268/* Default target hook that outputs nothing to a stream. */
269void
270no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
271{
272}
273
274/* Enable APP processing of subsequent output.
275 Used before the output from an `asm' statement. */
276
277void
278app_enable (void)
279{
280 if (! app_on)
281 {
282 fputs (ASM_APP_ON, asm_out_file);
283 app_on = 1;
284 }
285}
286
287/* Disable APP processing of subsequent output.
288 Called from varasm.c before most kinds of output. */
289
290void
291app_disable (void)
292{
293 if (app_on)
294 {
295 fputs (ASM_APP_OFF, asm_out_file);
296 app_on = 0;
297 }
298}
299
300/* Return the number of slots filled in the current
301 delayed branch sequence (we don't count the insn needing the
302 delay slot). Zero if not in a delayed branch sequence. */
303
304#ifdef DELAY_SLOTS
305int
306dbr_sequence_length (void)
307{
308 if (final_sequence != 0)
309 return XVECLEN (final_sequence, 0) - 1;
310 else
311 return 0;
312}
313#endif
314
315/* The next two pages contain routines used to compute the length of an insn
316 and to shorten branches. */
317
318/* Arrays for insn lengths, and addresses. The latter is referenced by
319 `insn_current_length'. */
320
321static int *insn_lengths;
322
323varray_type insn_addresses_;
324
325/* Max uid for which the above arrays are valid. */
326static int insn_lengths_max_uid;
327
328/* Address of insn being processed. Used by `insn_current_length'. */
329int insn_current_address;
330
331/* Address of insn being processed in previous iteration. */
332int insn_last_address;
333
334/* known invariant alignment of insn being processed. */
335int insn_current_align;
336
337/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
338 gives the next following alignment insn that increases the known
339 alignment, or NULL_RTX if there is no such insn.
340 For any alignment obtained this way, we can again index uid_align with
341 its uid to obtain the next following align that in turn increases the
342 alignment, till we reach NULL_RTX; the sequence obtained this way
343 for each insn we'll call the alignment chain of this insn in the following
344 comments. */
345
346struct label_alignment
347{
348 short alignment;
349 short max_skip;
350};
351
352static rtx *uid_align;
353static int *uid_shuid;
354static struct label_alignment *label_align;
355
356/* Indicate that branch shortening hasn't yet been done. */
357
358void
359init_insn_lengths (void)
360{
361 if (uid_shuid)
362 {
363 free (uid_shuid);
364 uid_shuid = 0;
365 }
366 if (insn_lengths)
367 {
368 free (insn_lengths);
369 insn_lengths = 0;
370 insn_lengths_max_uid = 0;
371 }
372#ifdef HAVE_ATTR_length
373 INSN_ADDRESSES_FREE ();
374#endif
375 if (uid_align)
376 {
377 free (uid_align);
378 uid_align = 0;
379 }
380}
381
382/* Obtain the current length of an insn. If branch shortening has been done,
|
377 get its actual length. Otherwise, get its maximum length. */
378
379int
380get_attr_length (rtx insn ATTRIBUTE_UNUSED)
| 383 get its actual length. Otherwise, use FALLBACK_FN to calculate the
384 length. */
385static inline int
386get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
387 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
|
381{
382#ifdef HAVE_ATTR_length
383 rtx body;
384 int i;
385 int length = 0;
386
387 if (insn_lengths_max_uid > INSN_UID (insn))
388 return insn_lengths[INSN_UID (insn)];
389 else
390 switch (GET_CODE (insn))
391 {
392 case NOTE:
393 case BARRIER:
394 case CODE_LABEL:
395 return 0;
396
397 case CALL_INSN:
| 388{
389#ifdef HAVE_ATTR_length
390 rtx body;
391 int i;
392 int length = 0;
393
394 if (insn_lengths_max_uid > INSN_UID (insn))
395 return insn_lengths[INSN_UID (insn)];
396 else
397 switch (GET_CODE (insn))
398 {
399 case NOTE:
400 case BARRIER:
401 case CODE_LABEL:
402 return 0;
403
404 case CALL_INSN:
|
398 length = insn_default_length (insn);
| 405 length = fallback_fn (insn);
|
399 break;
400
401 case JUMP_INSN:
402 body = PATTERN (insn);
403 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
404 {
405 /* Alignment is machine-dependent and should be handled by
406 ADDR_VEC_ALIGN. */
407 }
408 else
| 406 break;
407
408 case JUMP_INSN:
409 body = PATTERN (insn);
410 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
411 {
412 /* Alignment is machine-dependent and should be handled by
413 ADDR_VEC_ALIGN. */
414 }
415 else
|
409 length = insn_default_length (insn);
| 416 length = fallback_fn (insn);
|
410 break;
411
412 case INSN:
413 body = PATTERN (insn);
414 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
415 return 0;
416
417 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
| 417 break;
418
419 case INSN:
420 body = PATTERN (insn);
421 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
422 return 0;
423
424 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
|
418 length = asm_insn_count (body) * insn_default_length (insn);
| 425 length = asm_insn_count (body) * fallback_fn (insn);
|
419 else if (GET_CODE (body) == SEQUENCE)
420 for (i = 0; i < XVECLEN (body, 0); i++)
421 length += get_attr_length (XVECEXP (body, 0, i));
422 else
| 426 else if (GET_CODE (body) == SEQUENCE)
427 for (i = 0; i < XVECLEN (body, 0); i++)
428 length += get_attr_length (XVECEXP (body, 0, i));
429 else
|
423 length = insn_default_length (insn);
| 430 length = fallback_fn (insn);
|
424 break;
425
426 default:
427 break;
428 }
429
430#ifdef ADJUST_INSN_LENGTH
431 ADJUST_INSN_LENGTH (insn, length);
432#endif
433 return length;
434#else /* not HAVE_ATTR_length */
435 return 0;
| 431 break;
432
433 default:
434 break;
435 }
436
437#ifdef ADJUST_INSN_LENGTH
438 ADJUST_INSN_LENGTH (insn, length);
439#endif
440 return length;
441#else /* not HAVE_ATTR_length */
442 return 0;
|
| 443#define insn_default_length 0
444#define insn_min_length 0
|
436#endif /* not HAVE_ATTR_length */
437}
| 445#endif /* not HAVE_ATTR_length */
446}
|
| 447
448/* Obtain the current length of an insn. If branch shortening has been done,
449 get its actual length. Otherwise, get its maximum length. */
450int
451get_attr_length (rtx insn)
452{
453 return get_attr_length_1 (insn, insn_default_length);
454}
455
456/* Obtain the current length of an insn. If branch shortening has been done,
457 get its actual length. Otherwise, get its minimum length. */
458int
459get_attr_min_length (rtx insn)
460{
461 return get_attr_length_1 (insn, insn_min_length);
462}
|
438
439/* Code to handle alignment inside shorten_branches. */
440
441/* Here is an explanation how the algorithm in align_fuzz can give
442 proper results:
443
444 Call a sequence of instructions beginning with alignment point X
445 and continuing until the next alignment point `block X'. When `X'
446 is used in an expression, it means the alignment value of the
447 alignment point.
448
449 Call the distance between the start of the first insn of block X, and
450 the end of the last insn of block X `IX', for the `inner size of X'.
451 This is clearly the sum of the instruction lengths.
452
453 Likewise with the next alignment-delimited block following X, which we
454 shall call block Y.
455
456 Call the distance between the start of the first insn of block X, and
457 the start of the first insn of block Y `OX', for the `outer size of X'.
458
459 The estimated padding is then OX - IX.
460
461 OX can be safely estimated as
462
463 if (X >= Y)
464 OX = round_up(IX, Y)
465 else
466 OX = round_up(IX, X) + Y - X
467
468 Clearly est(IX) >= real(IX), because that only depends on the
469 instruction lengths, and those being overestimated is a given.
470
471 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
472 we needn't worry about that when thinking about OX.
473
474 When X >= Y, the alignment provided by Y adds no uncertainty factor
475 for branch ranges starting before X, so we can just round what we have.
476 But when X < Y, we don't know anything about the, so to speak,
477 `middle bits', so we have to assume the worst when aligning up from an
478 address mod X to one mod Y, which is Y - X. */
479
480#ifndef LABEL_ALIGN
481#define LABEL_ALIGN(LABEL) align_labels_log
482#endif
483
484#ifndef LABEL_ALIGN_MAX_SKIP
485#define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
486#endif
487
488#ifndef LOOP_ALIGN
489#define LOOP_ALIGN(LABEL) align_loops_log
490#endif
491
492#ifndef LOOP_ALIGN_MAX_SKIP
493#define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
494#endif
495
496#ifndef LABEL_ALIGN_AFTER_BARRIER
497#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
498#endif
499
500#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
501#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
502#endif
503
504#ifndef JUMP_ALIGN
505#define JUMP_ALIGN(LABEL) align_jumps_log
506#endif
507
508#ifndef JUMP_ALIGN_MAX_SKIP
509#define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
510#endif
511
512#ifndef ADDR_VEC_ALIGN
513static int
514final_addr_vec_align (rtx addr_vec)
515{
516 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
517
518 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
519 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
520 return exact_log2 (align);
521
522}
523
524#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
525#endif
526
527#ifndef INSN_LENGTH_ALIGNMENT
528#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
529#endif
530
531#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
532
533static int min_labelno, max_labelno;
534
535#define LABEL_TO_ALIGNMENT(LABEL) \
536 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
537
538#define LABEL_TO_MAX_SKIP(LABEL) \
539 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
540
541/* For the benefit of port specific code do this also as a function. */
542
543int
544label_to_alignment (rtx label)
545{
546 return LABEL_TO_ALIGNMENT (label);
547}
548
549#ifdef HAVE_ATTR_length
550/* The differences in addresses
551 between a branch and its target might grow or shrink depending on
552 the alignment the start insn of the range (the branch for a forward
553 branch or the label for a backward branch) starts out on; if these
554 differences are used naively, they can even oscillate infinitely.
555 We therefore want to compute a 'worst case' address difference that
556 is independent of the alignment the start insn of the range end
557 up on, and that is at least as large as the actual difference.
558 The function align_fuzz calculates the amount we have to add to the
559 naively computed difference, by traversing the part of the alignment
560 chain of the start insn of the range that is in front of the end insn
561 of the range, and considering for each alignment the maximum amount
562 that it might contribute to a size increase.
563
564 For casesi tables, we also want to know worst case minimum amounts of
565 address difference, in case a machine description wants to introduce
566 some common offset that is added to all offsets in a table.
567 For this purpose, align_fuzz with a growth argument of 0 computes the
568 appropriate adjustment. */
569
570/* Compute the maximum delta by which the difference of the addresses of
571 START and END might grow / shrink due to a different address for start
572 which changes the size of alignment insns between START and END.
573 KNOWN_ALIGN_LOG is the alignment known for START.
574 GROWTH should be ~0 if the objective is to compute potential code size
575 increase, and 0 if the objective is to compute potential shrink.
576 The return value is undefined for any other value of GROWTH. */
577
578static int
579align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
580{
581 int uid = INSN_UID (start);
582 rtx align_label;
583 int known_align = 1 << known_align_log;
584 int end_shuid = INSN_SHUID (end);
585 int fuzz = 0;
586
587 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
588 {
589 int align_addr, new_align;
590
591 uid = INSN_UID (align_label);
592 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
593 if (uid_shuid[uid] > end_shuid)
594 break;
595 known_align_log = LABEL_TO_ALIGNMENT (align_label);
596 new_align = 1 << known_align_log;
597 if (new_align < known_align)
598 continue;
599 fuzz += (-align_addr ^ growth) & (new_align - known_align);
600 known_align = new_align;
601 }
602 return fuzz;
603}
604
605/* Compute a worst-case reference address of a branch so that it
606 can be safely used in the presence of aligned labels. Since the
607 size of the branch itself is unknown, the size of the branch is
608 not included in the range. I.e. for a forward branch, the reference
609 address is the end address of the branch as known from the previous
610 branch shortening pass, minus a value to account for possible size
611 increase due to alignment. For a backward branch, it is the start
612 address of the branch as known from the current pass, plus a value
613 to account for possible size increase due to alignment.
614 NB.: Therefore, the maximum offset allowed for backward branches needs
615 to exclude the branch size. */
616
617int
618insn_current_reference_address (rtx branch)
619{
620 rtx dest, seq;
621 int seq_uid;
622
623 if (! INSN_ADDRESSES_SET_P ())
624 return 0;
625
626 seq = NEXT_INSN (PREV_INSN (branch));
627 seq_uid = INSN_UID (seq);
| 463
464/* Code to handle alignment inside shorten_branches. */
465
466/* Here is an explanation how the algorithm in align_fuzz can give
467 proper results:
468
469 Call a sequence of instructions beginning with alignment point X
470 and continuing until the next alignment point `block X'. When `X'
471 is used in an expression, it means the alignment value of the
472 alignment point.
473
474 Call the distance between the start of the first insn of block X, and
475 the end of the last insn of block X `IX', for the `inner size of X'.
476 This is clearly the sum of the instruction lengths.
477
478 Likewise with the next alignment-delimited block following X, which we
479 shall call block Y.
480
481 Call the distance between the start of the first insn of block X, and
482 the start of the first insn of block Y `OX', for the `outer size of X'.
483
484 The estimated padding is then OX - IX.
485
486 OX can be safely estimated as
487
488 if (X >= Y)
489 OX = round_up(IX, Y)
490 else
491 OX = round_up(IX, X) + Y - X
492
493 Clearly est(IX) >= real(IX), because that only depends on the
494 instruction lengths, and those being overestimated is a given.
495
496 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
497 we needn't worry about that when thinking about OX.
498
499 When X >= Y, the alignment provided by Y adds no uncertainty factor
500 for branch ranges starting before X, so we can just round what we have.
501 But when X < Y, we don't know anything about the, so to speak,
502 `middle bits', so we have to assume the worst when aligning up from an
503 address mod X to one mod Y, which is Y - X. */
504
505#ifndef LABEL_ALIGN
506#define LABEL_ALIGN(LABEL) align_labels_log
507#endif
508
509#ifndef LABEL_ALIGN_MAX_SKIP
510#define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
511#endif
512
513#ifndef LOOP_ALIGN
514#define LOOP_ALIGN(LABEL) align_loops_log
515#endif
516
517#ifndef LOOP_ALIGN_MAX_SKIP
518#define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
519#endif
520
521#ifndef LABEL_ALIGN_AFTER_BARRIER
522#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
523#endif
524
525#ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
526#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
527#endif
528
529#ifndef JUMP_ALIGN
530#define JUMP_ALIGN(LABEL) align_jumps_log
531#endif
532
533#ifndef JUMP_ALIGN_MAX_SKIP
534#define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
535#endif
536
537#ifndef ADDR_VEC_ALIGN
538static int
539final_addr_vec_align (rtx addr_vec)
540{
541 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
542
543 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
544 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
545 return exact_log2 (align);
546
547}
548
549#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
550#endif
551
552#ifndef INSN_LENGTH_ALIGNMENT
553#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
554#endif
555
556#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
557
558static int min_labelno, max_labelno;
559
560#define LABEL_TO_ALIGNMENT(LABEL) \
561 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
562
563#define LABEL_TO_MAX_SKIP(LABEL) \
564 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
565
566/* For the benefit of port specific code do this also as a function. */
567
568int
569label_to_alignment (rtx label)
570{
571 return LABEL_TO_ALIGNMENT (label);
572}
573
574#ifdef HAVE_ATTR_length
575/* The differences in addresses
576 between a branch and its target might grow or shrink depending on
577 the alignment the start insn of the range (the branch for a forward
578 branch or the label for a backward branch) starts out on; if these
579 differences are used naively, they can even oscillate infinitely.
580 We therefore want to compute a 'worst case' address difference that
581 is independent of the alignment the start insn of the range end
582 up on, and that is at least as large as the actual difference.
583 The function align_fuzz calculates the amount we have to add to the
584 naively computed difference, by traversing the part of the alignment
585 chain of the start insn of the range that is in front of the end insn
586 of the range, and considering for each alignment the maximum amount
587 that it might contribute to a size increase.
588
589 For casesi tables, we also want to know worst case minimum amounts of
590 address difference, in case a machine description wants to introduce
591 some common offset that is added to all offsets in a table.
592 For this purpose, align_fuzz with a growth argument of 0 computes the
593 appropriate adjustment. */
594
595/* Compute the maximum delta by which the difference of the addresses of
596 START and END might grow / shrink due to a different address for start
597 which changes the size of alignment insns between START and END.
598 KNOWN_ALIGN_LOG is the alignment known for START.
599 GROWTH should be ~0 if the objective is to compute potential code size
600 increase, and 0 if the objective is to compute potential shrink.
601 The return value is undefined for any other value of GROWTH. */
602
603static int
604align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
605{
606 int uid = INSN_UID (start);
607 rtx align_label;
608 int known_align = 1 << known_align_log;
609 int end_shuid = INSN_SHUID (end);
610 int fuzz = 0;
611
612 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
613 {
614 int align_addr, new_align;
615
616 uid = INSN_UID (align_label);
617 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
618 if (uid_shuid[uid] > end_shuid)
619 break;
620 known_align_log = LABEL_TO_ALIGNMENT (align_label);
621 new_align = 1 << known_align_log;
622 if (new_align < known_align)
623 continue;
624 fuzz += (-align_addr ^ growth) & (new_align - known_align);
625 known_align = new_align;
626 }
627 return fuzz;
628}
629
630/* Compute a worst-case reference address of a branch so that it
631 can be safely used in the presence of aligned labels. Since the
632 size of the branch itself is unknown, the size of the branch is
633 not included in the range. I.e. for a forward branch, the reference
634 address is the end address of the branch as known from the previous
635 branch shortening pass, minus a value to account for possible size
636 increase due to alignment. For a backward branch, it is the start
637 address of the branch as known from the current pass, plus a value
638 to account for possible size increase due to alignment.
639 NB.: Therefore, the maximum offset allowed for backward branches needs
640 to exclude the branch size. */
641
642int
643insn_current_reference_address (rtx branch)
644{
645 rtx dest, seq;
646 int seq_uid;
647
648 if (! INSN_ADDRESSES_SET_P ())
649 return 0;
650
651 seq = NEXT_INSN (PREV_INSN (branch));
652 seq_uid = INSN_UID (seq);
|
628 if (GET_CODE (branch) != JUMP_INSN)
| 653 if (!JUMP_P (branch))
|
629 /* This can happen for example on the PA; the objective is to know the
630 offset to address something in front of the start of the function.
631 Thus, we can treat it like a backward branch.
632 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
633 any alignment we'd encounter, so we skip the call to align_fuzz. */
634 return insn_current_address;
635 dest = JUMP_LABEL (branch);
636
637 /* BRANCH has no proper alignment chain set, so use SEQ.
638 BRANCH also has no INSN_SHUID. */
639 if (INSN_SHUID (seq) < INSN_SHUID (dest))
640 {
641 /* Forward branch. */
642 return (insn_last_address + insn_lengths[seq_uid]
643 - align_fuzz (seq, dest, length_unit_log, ~0));
644 }
645 else
646 {
647 /* Backward branch. */
648 return (insn_current_address
649 + align_fuzz (dest, seq, length_unit_log, ~0));
650 }
651}
652#endif /* HAVE_ATTR_length */
653
| 654 /* This can happen for example on the PA; the objective is to know the
655 offset to address something in front of the start of the function.
656 Thus, we can treat it like a backward branch.
657 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
658 any alignment we'd encounter, so we skip the call to align_fuzz. */
659 return insn_current_address;
660 dest = JUMP_LABEL (branch);
661
662 /* BRANCH has no proper alignment chain set, so use SEQ.
663 BRANCH also has no INSN_SHUID. */
664 if (INSN_SHUID (seq) < INSN_SHUID (dest))
665 {
666 /* Forward branch. */
667 return (insn_last_address + insn_lengths[seq_uid]
668 - align_fuzz (seq, dest, length_unit_log, ~0));
669 }
670 else
671 {
672 /* Backward branch. */
673 return (insn_current_address
674 + align_fuzz (dest, seq, length_unit_log, ~0));
675 }
676}
677#endif /* HAVE_ATTR_length */
678
|
654void
| 679/* Compute branch alignments based on frequency information in the
680 CFG. */
681
682static unsigned int
|
655compute_alignments (void)
656{
657 int log, max_skip, max_log;
658 basic_block bb;
659
660 if (label_align)
661 {
662 free (label_align);
663 label_align = 0;
664 }
665
666 max_labelno = max_label_num ();
667 min_labelno = get_first_label_num ();
| 683compute_alignments (void)
684{
685 int log, max_skip, max_log;
686 basic_block bb;
687
688 if (label_align)
689 {
690 free (label_align);
691 label_align = 0;
692 }
693
694 max_labelno = max_label_num ();
695 min_labelno = get_first_label_num ();
|
668 label_align = xcalloc (max_labelno - min_labelno + 1,
669 sizeof (struct label_alignment));
| 696 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
|
670
671 /* If not optimizing or optimizing for size, don't assign any alignments. */
672 if (! optimize || optimize_size)
| 697
698 /* If not optimizing or optimizing for size, don't assign any alignments. */
699 if (! optimize || optimize_size)
|
673 return;
| 700 return 0;
|
674
675 FOR_EACH_BB (bb)
676 {
677 rtx label = BB_HEAD (bb);
678 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
679 edge e;
| 701
702 FOR_EACH_BB (bb)
703 {
704 rtx label = BB_HEAD (bb);
705 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
706 edge e;
|
| 707 edge_iterator ei;
|
680
| 708
|
681 if (GET_CODE (label) != CODE_LABEL
| 709 if (!LABEL_P (label)
|
682 || probably_never_executed_bb_p (bb))
683 continue;
684 max_log = LABEL_ALIGN (label);
685 max_skip = LABEL_ALIGN_MAX_SKIP;
686
| 710 || probably_never_executed_bb_p (bb))
711 continue;
712 max_log = LABEL_ALIGN (label);
713 max_skip = LABEL_ALIGN_MAX_SKIP;
714
|
687 for (e = bb->pred; e; e = e->pred_next)
| 715 FOR_EACH_EDGE (e, ei, bb->preds)
|
688 {
689 if (e->flags & EDGE_FALLTHRU)
690 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
691 else
692 branch_frequency += EDGE_FREQUENCY (e);
693 }
694
695 /* There are two purposes to align block with no fallthru incoming edge:
696 1) to avoid fetch stalls when branch destination is near cache boundary
697 2) to improve cache efficiency in case the previous block is not executed
698 (so it does not need to be in the cache).
699
700 We to catch first case, we align frequently executed blocks.
701 To catch the second, we align blocks that are executed more frequently
702 than the predecessor and the predecessor is likely to not be executed
703 when function is called. */
704
705 if (!has_fallthru
706 && (branch_frequency > BB_FREQ_MAX / 10
707 || (bb->frequency > bb->prev_bb->frequency * 10
708 && (bb->prev_bb->frequency
709 <= ENTRY_BLOCK_PTR->frequency / 2))))
710 {
711 log = JUMP_ALIGN (label);
712 if (max_log < log)
713 {
714 max_log = log;
715 max_skip = JUMP_ALIGN_MAX_SKIP;
716 }
717 }
718 /* In case block is frequent and reached mostly by non-fallthru edge,
719 align it. It is most likely a first block of loop. */
720 if (has_fallthru
721 && maybe_hot_bb_p (bb)
722 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
723 && branch_frequency > fallthru_frequency * 2)
724 {
725 log = LOOP_ALIGN (label);
726 if (max_log < log)
727 {
728 max_log = log;
729 max_skip = LOOP_ALIGN_MAX_SKIP;
730 }
731 }
732 LABEL_TO_ALIGNMENT (label) = max_log;
733 LABEL_TO_MAX_SKIP (label) = max_skip;
734 }
| 716 {
717 if (e->flags & EDGE_FALLTHRU)
718 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
719 else
720 branch_frequency += EDGE_FREQUENCY (e);
721 }
722
723 /* There are two purposes to align block with no fallthru incoming edge:
724 1) to avoid fetch stalls when branch destination is near cache boundary
725 2) to improve cache efficiency in case the previous block is not executed
726 (so it does not need to be in the cache).
727
728 We to catch first case, we align frequently executed blocks.
729 To catch the second, we align blocks that are executed more frequently
730 than the predecessor and the predecessor is likely to not be executed
731 when function is called. */
732
733 if (!has_fallthru
734 && (branch_frequency > BB_FREQ_MAX / 10
735 || (bb->frequency > bb->prev_bb->frequency * 10
736 && (bb->prev_bb->frequency
737 <= ENTRY_BLOCK_PTR->frequency / 2))))
738 {
739 log = JUMP_ALIGN (label);
740 if (max_log < log)
741 {
742 max_log = log;
743 max_skip = JUMP_ALIGN_MAX_SKIP;
744 }
745 }
746 /* In case block is frequent and reached mostly by non-fallthru edge,
747 align it. It is most likely a first block of loop. */
748 if (has_fallthru
749 && maybe_hot_bb_p (bb)
750 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
751 && branch_frequency > fallthru_frequency * 2)
752 {
753 log = LOOP_ALIGN (label);
754 if (max_log < log)
755 {
756 max_log = log;
757 max_skip = LOOP_ALIGN_MAX_SKIP;
758 }
759 }
760 LABEL_TO_ALIGNMENT (label) = max_log;
761 LABEL_TO_MAX_SKIP (label) = max_skip;
762 }
|
| 763 return 0;
|
735}
| 764}
|
| 765
766struct tree_opt_pass pass_compute_alignments =
767{
768 NULL, /* name */
769 NULL, /* gate */
770 compute_alignments, /* execute */
771 NULL, /* sub */
772 NULL, /* next */
773 0, /* static_pass_number */
774 0, /* tv_id */
775 0, /* properties_required */
776 0, /* properties_provided */
777 0, /* properties_destroyed */
778 0, /* todo_flags_start */
779 0, /* todo_flags_finish */
780 0 /* letter */
781};
782
|
736
737/* Make a pass over all insns and compute their actual lengths by shortening
738 any branches of variable length if possible. */
739
740/* shorten_branches might be called multiple times: for example, the SH
741 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
742 In order to do this, it needs proper length information, which it obtains
743 by calling shorten_branches. This cannot be collapsed with
744 shorten_branches itself into a single pass unless we also want to integrate
745 reorg.c, since the branch splitting exposes new instructions with delay
746 slots. */
747
748void
749shorten_branches (rtx first ATTRIBUTE_UNUSED)
750{
751 rtx insn;
752 int max_uid;
753 int i;
754 int max_log;
755 int max_skip;
756#ifdef HAVE_ATTR_length
757#define MAX_CODE_ALIGN 16
758 rtx seq;
759 int something_changed = 1;
760 char *varying_length;
761 rtx body;
762 int uid;
763 rtx align_tab[MAX_CODE_ALIGN];
764
765#endif
766
767 /* Compute maximum UID and allocate label_align / uid_shuid. */
768 max_uid = get_max_uid ();
769
| 783
784/* Make a pass over all insns and compute their actual lengths by shortening
785 any branches of variable length if possible. */
786
787/* shorten_branches might be called multiple times: for example, the SH
788 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
789 In order to do this, it needs proper length information, which it obtains
790 by calling shorten_branches. This cannot be collapsed with
791 shorten_branches itself into a single pass unless we also want to integrate
792 reorg.c, since the branch splitting exposes new instructions with delay
793 slots. */
794
795void
796shorten_branches (rtx first ATTRIBUTE_UNUSED)
797{
798 rtx insn;
799 int max_uid;
800 int i;
801 int max_log;
802 int max_skip;
803#ifdef HAVE_ATTR_length
804#define MAX_CODE_ALIGN 16
805 rtx seq;
806 int something_changed = 1;
807 char *varying_length;
808 rtx body;
809 int uid;
810 rtx align_tab[MAX_CODE_ALIGN];
811
812#endif
813
814 /* Compute maximum UID and allocate label_align / uid_shuid. */
815 max_uid = get_max_uid ();
816
|
770 uid_shuid = xmalloc (max_uid * sizeof *uid_shuid);
| 817 /* Free uid_shuid before reallocating it. */
818 free (uid_shuid);
|
771
| 819
|
| 820 uid_shuid = XNEWVEC (int, max_uid);
821
|
772 if (max_labelno != max_label_num ())
773 {
774 int old = max_labelno;
775 int n_labels;
776 int n_old_labels;
777
778 max_labelno = max_label_num ();
779
780 n_labels = max_labelno - min_labelno + 1;
781 n_old_labels = old - min_labelno + 1;
782
783 label_align = xrealloc (label_align,
784 n_labels * sizeof (struct label_alignment));
785
| 822 if (max_labelno != max_label_num ())
823 {
824 int old = max_labelno;
825 int n_labels;
826 int n_old_labels;
827
828 max_labelno = max_label_num ();
829
830 n_labels = max_labelno - min_labelno + 1;
831 n_old_labels = old - min_labelno + 1;
832
833 label_align = xrealloc (label_align,
834 n_labels * sizeof (struct label_alignment));
835
|
786 /* Range of labels grows monotonically in the function. Abort here
| 836 /* Range of labels grows monotonically in the function. Failing here
|
787 means that the initialization of array got lost. */
| 837 means that the initialization of array got lost. */
|
788 if (n_old_labels > n_labels)
789 abort ();
| 838 gcc_assert (n_old_labels <= n_labels);
|
790
791 memset (label_align + n_old_labels, 0,
792 (n_labels - n_old_labels) * sizeof (struct label_alignment));
793 }
794
795 /* Initialize label_align and set up uid_shuid to be strictly
796 monotonically rising with insn order. */
797 /* We use max_log here to keep track of the maximum alignment we want to
798 impose on the next CODE_LABEL (or the current one if we are processing
799 the CODE_LABEL itself). */
800
801 max_log = 0;
802 max_skip = 0;
803
804 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
805 {
806 int log;
807
808 INSN_SHUID (insn) = i++;
809 if (INSN_P (insn))
| 839
840 memset (label_align + n_old_labels, 0,
841 (n_labels - n_old_labels) * sizeof (struct label_alignment));
842 }
843
844 /* Initialize label_align and set up uid_shuid to be strictly
845 monotonically rising with insn order. */
846 /* We use max_log here to keep track of the maximum alignment we want to
847 impose on the next CODE_LABEL (or the current one if we are processing
848 the CODE_LABEL itself). */
849
850 max_log = 0;
851 max_skip = 0;
852
853 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
854 {
855 int log;
856
857 INSN_SHUID (insn) = i++;
858 if (INSN_P (insn))
|
| 859 continue;
860
861 if (LABEL_P (insn))
|
810 {
| 862 {
|
811 /* reorg might make the first insn of a loop being run once only,
812 and delete the label in front of it. Then we want to apply
813 the loop alignment to the new label created by reorg, which
814 is separated by the former loop start insn from the
815 NOTE_INSN_LOOP_BEG. */
816 }
817 else if (GET_CODE (insn) == CODE_LABEL)
818 {
| |
819 rtx next;
820
821 /* Merge in alignments computed by compute_alignments. */
822 log = LABEL_TO_ALIGNMENT (insn);
823 if (max_log < log)
824 {
825 max_log = log;
826 max_skip = LABEL_TO_MAX_SKIP (insn);
827 }
828
829 log = LABEL_ALIGN (insn);
830 if (max_log < log)
831 {
832 max_log = log;
833 max_skip = LABEL_ALIGN_MAX_SKIP;
834 }
| 863 rtx next;
864
865 /* Merge in alignments computed by compute_alignments. */
866 log = LABEL_TO_ALIGNMENT (insn);
867 if (max_log < log)
868 {
869 max_log = log;
870 max_skip = LABEL_TO_MAX_SKIP (insn);
871 }
872
873 log = LABEL_ALIGN (insn);
874 if (max_log < log)
875 {
876 max_log = log;
877 max_skip = LABEL_ALIGN_MAX_SKIP;
878 }
|
835 next = NEXT_INSN (insn);
| 879 next = next_nonnote_insn (insn);
|
836 /* ADDR_VECs only take room if read-only data goes into the text
837 section. */
| 880 /* ADDR_VECs only take room if read-only data goes into the text
881 section. */
|
838 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
839 if (next && GET_CODE (next) == JUMP_INSN)
| 882 if (JUMP_TABLES_IN_TEXT_SECTION
883 || readonly_data_section == text_section)
884 if (next && JUMP_P (next))
|
840 {
841 rtx nextbody = PATTERN (next);
842 if (GET_CODE (nextbody) == ADDR_VEC
843 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
844 {
845 log = ADDR_VEC_ALIGN (next);
846 if (max_log < log)
847 {
848 max_log = log;
849 max_skip = LABEL_ALIGN_MAX_SKIP;
850 }
851 }
852 }
853 LABEL_TO_ALIGNMENT (insn) = max_log;
854 LABEL_TO_MAX_SKIP (insn) = max_skip;
855 max_log = 0;
856 max_skip = 0;
857 }
| 885 {
886 rtx nextbody = PATTERN (next);
887 if (GET_CODE (nextbody) == ADDR_VEC
888 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
889 {
890 log = ADDR_VEC_ALIGN (next);
891 if (max_log < log)
892 {
893 max_log = log;
894 max_skip = LABEL_ALIGN_MAX_SKIP;
895 }
896 }
897 }
898 LABEL_TO_ALIGNMENT (insn) = max_log;
899 LABEL_TO_MAX_SKIP (insn) = max_skip;
900 max_log = 0;
901 max_skip = 0;
902 }
|
858 else if (GET_CODE (insn) == BARRIER)
| 903 else if (BARRIER_P (insn))
|
859 {
860 rtx label;
861
862 for (label = insn; label && ! INSN_P (label);
863 label = NEXT_INSN (label))
| 904 {
905 rtx label;
906
907 for (label = insn; label && ! INSN_P (label);
908 label = NEXT_INSN (label))
|
864 if (GET_CODE (label) == CODE_LABEL)
| 909 if (LABEL_P (label))
|
865 {
866 log = LABEL_ALIGN_AFTER_BARRIER (insn);
867 if (max_log < log)
868 {
869 max_log = log;
870 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
871 }
872 break;
873 }
874 }
875 }
876#ifdef HAVE_ATTR_length
877
878 /* Allocate the rest of the arrays. */
| 910 {
911 log = LABEL_ALIGN_AFTER_BARRIER (insn);
912 if (max_log < log)
913 {
914 max_log = log;
915 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
916 }
917 break;
918 }
919 }
920 }
921#ifdef HAVE_ATTR_length
922
923 /* Allocate the rest of the arrays. */
|
879 insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths));
| 924 insn_lengths = XNEWVEC (int, max_uid);
|
880 insn_lengths_max_uid = max_uid;
881 /* Syntax errors can lead to labels being outside of the main insn stream.
882 Initialize insn_addresses, so that we get reproducible results. */
883 INSN_ADDRESSES_ALLOC (max_uid);
884
| 925 insn_lengths_max_uid = max_uid;
926 /* Syntax errors can lead to labels being outside of the main insn stream.
927 Initialize insn_addresses, so that we get reproducible results. */
928 INSN_ADDRESSES_ALLOC (max_uid);
929
|
885 varying_length = xcalloc (max_uid, sizeof (char));
| 930 varying_length = XCNEWVEC (char, max_uid);
|
886
887 /* Initialize uid_align. We scan instructions
888 from end to start, and keep in align_tab[n] the last seen insn
889 that does an alignment of at least n+1, i.e. the successor
890 in the alignment chain for an insn that does / has a known
891 alignment of n. */
| 931
932 /* Initialize uid_align. We scan instructions
933 from end to start, and keep in align_tab[n] the last seen insn
934 that does an alignment of at least n+1, i.e. the successor
935 in the alignment chain for an insn that does / has a known
936 alignment of n. */
|
892 uid_align = xcalloc (max_uid, sizeof *uid_align);
| 937 uid_align = XCNEWVEC (rtx, max_uid);
|
893
894 for (i = MAX_CODE_ALIGN; --i >= 0;)
895 align_tab[i] = NULL_RTX;
896 seq = get_last_insn ();
897 for (; seq; seq = PREV_INSN (seq))
898 {
899 int uid = INSN_UID (seq);
900 int log;
| 938
939 for (i = MAX_CODE_ALIGN; --i >= 0;)
940 align_tab[i] = NULL_RTX;
941 seq = get_last_insn ();
942 for (; seq; seq = PREV_INSN (seq))
943 {
944 int uid = INSN_UID (seq);
945 int log;
|
901 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
| 946 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
|
902 uid_align[uid] = align_tab[0];
903 if (log)
904 {
905 /* Found an alignment label. */
906 uid_align[uid] = align_tab[log];
907 for (i = log - 1; i >= 0; i--)
908 align_tab[i] = seq;
909 }
910 }
911#ifdef CASE_VECTOR_SHORTEN_MODE
912 if (optimize)
913 {
914 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
915 label fields. */
916
917 int min_shuid = INSN_SHUID (get_insns ()) - 1;
918 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
919 int rel;
920
921 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
922 {
923 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
924 int len, i, min, max, insn_shuid;
925 int min_align;
926 addr_diff_vec_flags flags;
927
| 947 uid_align[uid] = align_tab[0];
948 if (log)
949 {
950 /* Found an alignment label. */
951 uid_align[uid] = align_tab[log];
952 for (i = log - 1; i >= 0; i--)
953 align_tab[i] = seq;
954 }
955 }
956#ifdef CASE_VECTOR_SHORTEN_MODE
957 if (optimize)
958 {
959 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
960 label fields. */
961
962 int min_shuid = INSN_SHUID (get_insns ()) - 1;
963 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
964 int rel;
965
966 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
967 {
968 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
969 int len, i, min, max, insn_shuid;
970 int min_align;
971 addr_diff_vec_flags flags;
972
|
928 if (GET_CODE (insn) != JUMP_INSN
| 973 if (!JUMP_P (insn)
|
929 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
930 continue;
931 pat = PATTERN (insn);
932 len = XVECLEN (pat, 1);
| 974 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
975 continue;
976 pat = PATTERN (insn);
977 len = XVECLEN (pat, 1);
|
933 if (len <= 0)
934 abort ();
| 978 gcc_assert (len > 0);
|
935 min_align = MAX_CODE_ALIGN;
936 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
937 {
938 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
939 int shuid = INSN_SHUID (lab);
940 if (shuid < min)
941 {
942 min = shuid;
943 min_lab = lab;
944 }
945 if (shuid > max)
946 {
947 max = shuid;
948 max_lab = lab;
949 }
950 if (min_align > LABEL_TO_ALIGNMENT (lab))
951 min_align = LABEL_TO_ALIGNMENT (lab);
952 }
| 979 min_align = MAX_CODE_ALIGN;
980 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
981 {
982 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
983 int shuid = INSN_SHUID (lab);
984 if (shuid < min)
985 {
986 min = shuid;
987 min_lab = lab;
988 }
989 if (shuid > max)
990 {
991 max = shuid;
992 max_lab = lab;
993 }
994 if (min_align > LABEL_TO_ALIGNMENT (lab))
995 min_align = LABEL_TO_ALIGNMENT (lab);
996 }
|
953 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
954 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
| 997 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
998 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
|
955 insn_shuid = INSN_SHUID (insn);
956 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
| 999 insn_shuid = INSN_SHUID (insn);
1000 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
|
| 1001 memset (&flags, 0, sizeof (flags));
|
957 flags.min_align = min_align;
958 flags.base_after_vec = rel > insn_shuid;
959 flags.min_after_vec = min > insn_shuid;
960 flags.max_after_vec = max > insn_shuid;
961 flags.min_after_base = min > rel;
962 flags.max_after_base = max > rel;
963 ADDR_DIFF_VEC_FLAGS (pat) = flags;
964 }
965 }
966#endif /* CASE_VECTOR_SHORTEN_MODE */
967
968 /* Compute initial lengths, addresses, and varying flags for each insn. */
969 for (insn_current_address = 0, insn = first;
970 insn != 0;
971 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
972 {
973 uid = INSN_UID (insn);
974
975 insn_lengths[uid] = 0;
976
| 1002 flags.min_align = min_align;
1003 flags.base_after_vec = rel > insn_shuid;
1004 flags.min_after_vec = min > insn_shuid;
1005 flags.max_after_vec = max > insn_shuid;
1006 flags.min_after_base = min > rel;
1007 flags.max_after_base = max > rel;
1008 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1009 }
1010 }
1011#endif /* CASE_VECTOR_SHORTEN_MODE */
1012
1013 /* Compute initial lengths, addresses, and varying flags for each insn. */
1014 for (insn_current_address = 0, insn = first;
1015 insn != 0;
1016 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1017 {
1018 uid = INSN_UID (insn);
1019
1020 insn_lengths[uid] = 0;
1021
|
977 if (GET_CODE (insn) == CODE_LABEL)
| 1022 if (LABEL_P (insn))
|
978 {
979 int log = LABEL_TO_ALIGNMENT (insn);
980 if (log)
981 {
982 int align = 1 << log;
983 int new_address = (insn_current_address + align - 1) & -align;
984 insn_lengths[uid] = new_address - insn_current_address;
985 }
986 }
987
988 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
989
| 1023 {
1024 int log = LABEL_TO_ALIGNMENT (insn);
1025 if (log)
1026 {
1027 int align = 1 << log;
1028 int new_address = (insn_current_address + align - 1) & -align;
1029 insn_lengths[uid] = new_address - insn_current_address;
1030 }
1031 }
1032
1033 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1034
|
990 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
991 || GET_CODE (insn) == CODE_LABEL)
| 1035 if (NOTE_P (insn) || BARRIER_P (insn)
1036 || LABEL_P (insn))
|
992 continue;
993 if (INSN_DELETED_P (insn))
994 continue;
995
996 body = PATTERN (insn);
997 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
998 {
999 /* This only takes room if read-only data goes into the text
1000 section. */
| 1037 continue;
1038 if (INSN_DELETED_P (insn))
1039 continue;
1040
1041 body = PATTERN (insn);
1042 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1043 {
1044 /* This only takes room if read-only data goes into the text
1045 section. */
|
1001 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
| 1046 if (JUMP_TABLES_IN_TEXT_SECTION
1047 || readonly_data_section == text_section)
|
1002 insn_lengths[uid] = (XVECLEN (body,
1003 GET_CODE (body) == ADDR_DIFF_VEC)
1004 * GET_MODE_SIZE (GET_MODE (body)));
1005 /* Alignment is handled by ADDR_VEC_ALIGN. */
1006 }
1007 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1008 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1009 else if (GET_CODE (body) == SEQUENCE)
1010 {
1011 int i;
1012 int const_delay_slots;
1013#ifdef DELAY_SLOTS
1014 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1015#else
1016 const_delay_slots = 0;
1017#endif
1018 /* Inside a delay slot sequence, we do not do any branch shortening
1019 if the shortening could change the number of delay slots
1020 of the branch. */
1021 for (i = 0; i < XVECLEN (body, 0); i++)
1022 {
1023 rtx inner_insn = XVECEXP (body, 0, i);
1024 int inner_uid = INSN_UID (inner_insn);
1025 int inner_length;
1026
1027 if (GET_CODE (body) == ASM_INPUT
1028 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1029 inner_length = (asm_insn_count (PATTERN (inner_insn))
1030 * insn_default_length (inner_insn));
1031 else
1032 inner_length = insn_default_length (inner_insn);
1033
1034 insn_lengths[inner_uid] = inner_length;
1035 if (const_delay_slots)
1036 {
1037 if ((varying_length[inner_uid]
1038 = insn_variable_length_p (inner_insn)) != 0)
1039 varying_length[uid] = 1;
1040 INSN_ADDRESSES (inner_uid) = (insn_current_address
1041 + insn_lengths[uid]);
1042 }
1043 else
1044 varying_length[inner_uid] = 0;
1045 insn_lengths[uid] += inner_length;
1046 }
1047 }
1048 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1049 {
1050 insn_lengths[uid] = insn_default_length (insn);
1051 varying_length[uid] = insn_variable_length_p (insn);
1052 }
1053
1054 /* If needed, do any adjustment. */
1055#ifdef ADJUST_INSN_LENGTH
1056 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1057 if (insn_lengths[uid] < 0)
1058 fatal_insn ("negative insn length", insn);
1059#endif
1060 }
1061
1062 /* Now loop over all the insns finding varying length insns. For each,
1063 get the current insn length. If it has changed, reflect the change.
1064 When nothing changes for a full pass, we are done. */
1065
1066 while (something_changed)
1067 {
1068 something_changed = 0;
1069 insn_current_align = MAX_CODE_ALIGN - 1;
1070 for (insn_current_address = 0, insn = first;
1071 insn != 0;
1072 insn = NEXT_INSN (insn))
1073 {
1074 int new_length;
1075#ifdef ADJUST_INSN_LENGTH
1076 int tmp_length;
1077#endif
1078 int length_align;
1079
1080 uid = INSN_UID (insn);
1081
| 1048 insn_lengths[uid] = (XVECLEN (body,
1049 GET_CODE (body) == ADDR_DIFF_VEC)
1050 * GET_MODE_SIZE (GET_MODE (body)));
1051 /* Alignment is handled by ADDR_VEC_ALIGN. */
1052 }
1053 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1054 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1055 else if (GET_CODE (body) == SEQUENCE)
1056 {
1057 int i;
1058 int const_delay_slots;
1059#ifdef DELAY_SLOTS
1060 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1061#else
1062 const_delay_slots = 0;
1063#endif
1064 /* Inside a delay slot sequence, we do not do any branch shortening
1065 if the shortening could change the number of delay slots
1066 of the branch. */
1067 for (i = 0; i < XVECLEN (body, 0); i++)
1068 {
1069 rtx inner_insn = XVECEXP (body, 0, i);
1070 int inner_uid = INSN_UID (inner_insn);
1071 int inner_length;
1072
1073 if (GET_CODE (body) == ASM_INPUT
1074 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1075 inner_length = (asm_insn_count (PATTERN (inner_insn))
1076 * insn_default_length (inner_insn));
1077 else
1078 inner_length = insn_default_length (inner_insn);
1079
1080 insn_lengths[inner_uid] = inner_length;
1081 if (const_delay_slots)
1082 {
1083 if ((varying_length[inner_uid]
1084 = insn_variable_length_p (inner_insn)) != 0)
1085 varying_length[uid] = 1;
1086 INSN_ADDRESSES (inner_uid) = (insn_current_address
1087 + insn_lengths[uid]);
1088 }
1089 else
1090 varying_length[inner_uid] = 0;
1091 insn_lengths[uid] += inner_length;
1092 }
1093 }
1094 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1095 {
1096 insn_lengths[uid] = insn_default_length (insn);
1097 varying_length[uid] = insn_variable_length_p (insn);
1098 }
1099
1100 /* If needed, do any adjustment. */
1101#ifdef ADJUST_INSN_LENGTH
1102 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1103 if (insn_lengths[uid] < 0)
1104 fatal_insn ("negative insn length", insn);
1105#endif
1106 }
1107
1108 /* Now loop over all the insns finding varying length insns. For each,
1109 get the current insn length. If it has changed, reflect the change.
1110 When nothing changes for a full pass, we are done. */
1111
1112 while (something_changed)
1113 {
1114 something_changed = 0;
1115 insn_current_align = MAX_CODE_ALIGN - 1;
1116 for (insn_current_address = 0, insn = first;
1117 insn != 0;
1118 insn = NEXT_INSN (insn))
1119 {
1120 int new_length;
1121#ifdef ADJUST_INSN_LENGTH
1122 int tmp_length;
1123#endif
1124 int length_align;
1125
1126 uid = INSN_UID (insn);
1127
|
1082 if (GET_CODE (insn) == CODE_LABEL)
| 1128 if (LABEL_P (insn))
|
1083 {
1084 int log = LABEL_TO_ALIGNMENT (insn);
1085 if (log > insn_current_align)
1086 {
1087 int align = 1 << log;
1088 int new_address= (insn_current_address + align - 1) & -align;
1089 insn_lengths[uid] = new_address - insn_current_address;
1090 insn_current_align = log;
1091 insn_current_address = new_address;
1092 }
1093 else
1094 insn_lengths[uid] = 0;
1095 INSN_ADDRESSES (uid) = insn_current_address;
1096 continue;
1097 }
1098
1099 length_align = INSN_LENGTH_ALIGNMENT (insn);
1100 if (length_align < insn_current_align)
1101 insn_current_align = length_align;
1102
1103 insn_last_address = INSN_ADDRESSES (uid);
1104 INSN_ADDRESSES (uid) = insn_current_address;
1105
1106#ifdef CASE_VECTOR_SHORTEN_MODE
| 1129 {
1130 int log = LABEL_TO_ALIGNMENT (insn);
1131 if (log > insn_current_align)
1132 {
1133 int align = 1 << log;
1134 int new_address= (insn_current_address + align - 1) & -align;
1135 insn_lengths[uid] = new_address - insn_current_address;
1136 insn_current_align = log;
1137 insn_current_address = new_address;
1138 }
1139 else
1140 insn_lengths[uid] = 0;
1141 INSN_ADDRESSES (uid) = insn_current_address;
1142 continue;
1143 }
1144
1145 length_align = INSN_LENGTH_ALIGNMENT (insn);
1146 if (length_align < insn_current_align)
1147 insn_current_align = length_align;
1148
1149 insn_last_address = INSN_ADDRESSES (uid);
1150 INSN_ADDRESSES (uid) = insn_current_address;
1151
1152#ifdef CASE_VECTOR_SHORTEN_MODE
|
1107 if (optimize && GET_CODE (insn) == JUMP_INSN
| 1153 if (optimize && JUMP_P (insn)
|
1108 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1109 {
1110 rtx body = PATTERN (insn);
1111 int old_length = insn_lengths[uid];
1112 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1113 rtx min_lab = XEXP (XEXP (body, 2), 0);
1114 rtx max_lab = XEXP (XEXP (body, 3), 0);
1115 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1116 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1117 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1118 rtx prev;
1119 int rel_align = 0;
1120 addr_diff_vec_flags flags;
1121
1122 /* Avoid automatic aggregate initialization. */
1123 flags = ADDR_DIFF_VEC_FLAGS (body);
1124
1125 /* Try to find a known alignment for rel_lab. */
1126 for (prev = rel_lab;
1127 prev
1128 && ! insn_lengths[INSN_UID (prev)]
1129 && ! (varying_length[INSN_UID (prev)] & 1);
1130 prev = PREV_INSN (prev))
1131 if (varying_length[INSN_UID (prev)] & 2)
1132 {
1133 rel_align = LABEL_TO_ALIGNMENT (prev);
1134 break;
1135 }
1136
1137 /* See the comment on addr_diff_vec_flags in rtl.h for the
1138 meaning of the flags values. base: REL_LAB vec: INSN */
1139 /* Anything after INSN has still addresses from the last
1140 pass; adjust these so that they reflect our current
1141 estimate for this pass. */
1142 if (flags.base_after_vec)
1143 rel_addr += insn_current_address - insn_last_address;
1144 if (flags.min_after_vec)
1145 min_addr += insn_current_address - insn_last_address;
1146 if (flags.max_after_vec)
1147 max_addr += insn_current_address - insn_last_address;
1148 /* We want to know the worst case, i.e. lowest possible value
1149 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1150 its offset is positive, and we have to be wary of code shrink;
1151 otherwise, it is negative, and we have to be vary of code
1152 size increase. */
1153 if (flags.min_after_base)
1154 {
1155 /* If INSN is between REL_LAB and MIN_LAB, the size
1156 changes we are about to make can change the alignment
1157 within the observed offset, therefore we have to break
1158 it up into two parts that are independent. */
1159 if (! flags.base_after_vec && flags.min_after_vec)
1160 {
1161 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1162 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1163 }
1164 else
1165 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1166 }
1167 else
1168 {
1169 if (flags.base_after_vec && ! flags.min_after_vec)
1170 {
1171 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1172 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1173 }
1174 else
1175 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1176 }
1177 /* Likewise, determine the highest lowest possible value
1178 for the offset of MAX_LAB. */
1179 if (flags.max_after_base)
1180 {
1181 if (! flags.base_after_vec && flags.max_after_vec)
1182 {
1183 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1184 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1185 }
1186 else
1187 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1188 }
1189 else
1190 {
1191 if (flags.base_after_vec && ! flags.max_after_vec)
1192 {
1193 max_addr += align_fuzz (max_lab, insn, 0, 0);
1194 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1195 }
1196 else
1197 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1198 }
1199 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1200 max_addr - rel_addr,
1201 body));
| 1154 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1155 {
1156 rtx body = PATTERN (insn);
1157 int old_length = insn_lengths[uid];
1158 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1159 rtx min_lab = XEXP (XEXP (body, 2), 0);
1160 rtx max_lab = XEXP (XEXP (body, 3), 0);
1161 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1162 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1163 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1164 rtx prev;
1165 int rel_align = 0;
1166 addr_diff_vec_flags flags;
1167
1168 /* Avoid automatic aggregate initialization. */
1169 flags = ADDR_DIFF_VEC_FLAGS (body);
1170
1171 /* Try to find a known alignment for rel_lab. */
1172 for (prev = rel_lab;
1173 prev
1174 && ! insn_lengths[INSN_UID (prev)]
1175 && ! (varying_length[INSN_UID (prev)] & 1);
1176 prev = PREV_INSN (prev))
1177 if (varying_length[INSN_UID (prev)] & 2)
1178 {
1179 rel_align = LABEL_TO_ALIGNMENT (prev);
1180 break;
1181 }
1182
1183 /* See the comment on addr_diff_vec_flags in rtl.h for the
1184 meaning of the flags values. base: REL_LAB vec: INSN */
1185 /* Anything after INSN has still addresses from the last
1186 pass; adjust these so that they reflect our current
1187 estimate for this pass. */
1188 if (flags.base_after_vec)
1189 rel_addr += insn_current_address - insn_last_address;
1190 if (flags.min_after_vec)
1191 min_addr += insn_current_address - insn_last_address;
1192 if (flags.max_after_vec)
1193 max_addr += insn_current_address - insn_last_address;
1194 /* We want to know the worst case, i.e. lowest possible value
1195 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1196 its offset is positive, and we have to be wary of code shrink;
1197 otherwise, it is negative, and we have to be vary of code
1198 size increase. */
1199 if (flags.min_after_base)
1200 {
1201 /* If INSN is between REL_LAB and MIN_LAB, the size
1202 changes we are about to make can change the alignment
1203 within the observed offset, therefore we have to break
1204 it up into two parts that are independent. */
1205 if (! flags.base_after_vec && flags.min_after_vec)
1206 {
1207 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1208 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1209 }
1210 else
1211 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1212 }
1213 else
1214 {
1215 if (flags.base_after_vec && ! flags.min_after_vec)
1216 {
1217 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1218 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1219 }
1220 else
1221 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1222 }
1223 /* Likewise, determine the highest lowest possible value
1224 for the offset of MAX_LAB. */
1225 if (flags.max_after_base)
1226 {
1227 if (! flags.base_after_vec && flags.max_after_vec)
1228 {
1229 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1230 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1231 }
1232 else
1233 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1234 }
1235 else
1236 {
1237 if (flags.base_after_vec && ! flags.max_after_vec)
1238 {
1239 max_addr += align_fuzz (max_lab, insn, 0, 0);
1240 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1241 }
1242 else
1243 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1244 }
1245 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1246 max_addr - rel_addr,
1247 body));
|
1202 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
| 1248 if (JUMP_TABLES_IN_TEXT_SECTION
1249 || readonly_data_section == text_section)
|
1203 {
1204 insn_lengths[uid]
1205 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1206 insn_current_address += insn_lengths[uid];
1207 if (insn_lengths[uid] != old_length)
1208 something_changed = 1;
1209 }
1210
1211 continue;
1212 }
1213#endif /* CASE_VECTOR_SHORTEN_MODE */
1214
1215 if (! (varying_length[uid]))
1216 {
| 1250 {
1251 insn_lengths[uid]
1252 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1253 insn_current_address += insn_lengths[uid];
1254 if (insn_lengths[uid] != old_length)
1255 something_changed = 1;
1256 }
1257
1258 continue;
1259 }
1260#endif /* CASE_VECTOR_SHORTEN_MODE */
1261
1262 if (! (varying_length[uid]))
1263 {
|
1217 if (GET_CODE (insn) == INSN
| 1264 if (NONJUMP_INSN_P (insn)
|
1218 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1219 {
1220 int i;
1221
1222 body = PATTERN (insn);
1223 for (i = 0; i < XVECLEN (body, 0); i++)
1224 {
1225 rtx inner_insn = XVECEXP (body, 0, i);
1226 int inner_uid = INSN_UID (inner_insn);
1227
1228 INSN_ADDRESSES (inner_uid) = insn_current_address;
1229
1230 insn_current_address += insn_lengths[inner_uid];
1231 }
1232 }
1233 else
1234 insn_current_address += insn_lengths[uid];
1235
1236 continue;
1237 }
1238
| 1265 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1266 {
1267 int i;
1268
1269 body = PATTERN (insn);
1270 for (i = 0; i < XVECLEN (body, 0); i++)
1271 {
1272 rtx inner_insn = XVECEXP (body, 0, i);
1273 int inner_uid = INSN_UID (inner_insn);
1274
1275 INSN_ADDRESSES (inner_uid) = insn_current_address;
1276
1277 insn_current_address += insn_lengths[inner_uid];
1278 }
1279 }
1280 else
1281 insn_current_address += insn_lengths[uid];
1282
1283 continue;
1284 }
1285
|
1239 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
| 1286 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
|
1240 {
1241 int i;
1242
1243 body = PATTERN (insn);
1244 new_length = 0;
1245 for (i = 0; i < XVECLEN (body, 0); i++)
1246 {
1247 rtx inner_insn = XVECEXP (body, 0, i);
1248 int inner_uid = INSN_UID (inner_insn);
1249 int inner_length;
1250
1251 INSN_ADDRESSES (inner_uid) = insn_current_address;
1252
1253 /* insn_current_length returns 0 for insns with a
1254 non-varying length. */
1255 if (! varying_length[inner_uid])
1256 inner_length = insn_lengths[inner_uid];
1257 else
1258 inner_length = insn_current_length (inner_insn);
1259
1260 if (inner_length != insn_lengths[inner_uid])
1261 {
1262 insn_lengths[inner_uid] = inner_length;
1263 something_changed = 1;
1264 }
1265 insn_current_address += insn_lengths[inner_uid];
1266 new_length += inner_length;
1267 }
1268 }
1269 else
1270 {
1271 new_length = insn_current_length (insn);
1272 insn_current_address += new_length;
1273 }
1274
1275#ifdef ADJUST_INSN_LENGTH
1276 /* If needed, do any adjustment. */
1277 tmp_length = new_length;
1278 ADJUST_INSN_LENGTH (insn, new_length);
1279 insn_current_address += (new_length - tmp_length);
1280#endif
1281
1282 if (new_length != insn_lengths[uid])
1283 {
1284 insn_lengths[uid] = new_length;
1285 something_changed = 1;
1286 }
1287 }
1288 /* For a non-optimizing compile, do only a single pass. */
1289 if (!optimize)
1290 break;
1291 }
1292
1293 free (varying_length);
1294
1295#endif /* HAVE_ATTR_length */
1296}
1297
1298#ifdef HAVE_ATTR_length
1299/* Given the body of an INSN known to be generated by an ASM statement, return
1300 the number of machine instructions likely to be generated for this insn.
1301 This is used to compute its length. */
1302
1303static int
1304asm_insn_count (rtx body)
1305{
1306 const char *template;
1307 int count = 1;
1308
1309 if (GET_CODE (body) == ASM_INPUT)
1310 template = XSTR (body, 0);
1311 else
1312 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1313
1314 for (; *template; template++)
1315 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1316 count++;
1317
1318 return count;
1319}
1320#endif
1321
1322/* Output assembler code for the start of a function,
1323 and initialize some of the variables in this file
1324 for the new function. The label for the function and associated
1325 assembler pseudo-ops have already been output in `assemble_start_function'.
1326
1327 FIRST is the first insn of the rtl for the function being compiled.
1328 FILE is the file to write assembler code to.
1329 OPTIMIZE is nonzero if we should eliminate redundant
1330 test and compare insns. */
1331
1332void
1333final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1334 int optimize ATTRIBUTE_UNUSED)
1335{
1336 block_depth = 0;
1337
1338 this_is_asm_operands = 0;
1339
1340 last_filename = locator_file (prologue_locator);
1341 last_linenum = locator_line (prologue_locator);
1342
1343 high_block_linenum = high_function_linenum = last_linenum;
1344
1345 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1346
| 1287 {
1288 int i;
1289
1290 body = PATTERN (insn);
1291 new_length = 0;
1292 for (i = 0; i < XVECLEN (body, 0); i++)
1293 {
1294 rtx inner_insn = XVECEXP (body, 0, i);
1295 int inner_uid = INSN_UID (inner_insn);
1296 int inner_length;
1297
1298 INSN_ADDRESSES (inner_uid) = insn_current_address;
1299
1300 /* insn_current_length returns 0 for insns with a
1301 non-varying length. */
1302 if (! varying_length[inner_uid])
1303 inner_length = insn_lengths[inner_uid];
1304 else
1305 inner_length = insn_current_length (inner_insn);
1306
1307 if (inner_length != insn_lengths[inner_uid])
1308 {
1309 insn_lengths[inner_uid] = inner_length;
1310 something_changed = 1;
1311 }
1312 insn_current_address += insn_lengths[inner_uid];
1313 new_length += inner_length;
1314 }
1315 }
1316 else
1317 {
1318 new_length = insn_current_length (insn);
1319 insn_current_address += new_length;
1320 }
1321
1322#ifdef ADJUST_INSN_LENGTH
1323 /* If needed, do any adjustment. */
1324 tmp_length = new_length;
1325 ADJUST_INSN_LENGTH (insn, new_length);
1326 insn_current_address += (new_length - tmp_length);
1327#endif
1328
1329 if (new_length != insn_lengths[uid])
1330 {
1331 insn_lengths[uid] = new_length;
1332 something_changed = 1;
1333 }
1334 }
1335 /* For a non-optimizing compile, do only a single pass. */
1336 if (!optimize)
1337 break;
1338 }
1339
1340 free (varying_length);
1341
1342#endif /* HAVE_ATTR_length */
1343}
1344
1345#ifdef HAVE_ATTR_length
1346/* Given the body of an INSN known to be generated by an ASM statement, return
1347 the number of machine instructions likely to be generated for this insn.
1348 This is used to compute its length. */
1349
1350static int
1351asm_insn_count (rtx body)
1352{
1353 const char *template;
1354 int count = 1;
1355
1356 if (GET_CODE (body) == ASM_INPUT)
1357 template = XSTR (body, 0);
1358 else
1359 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1360
1361 for (; *template; template++)
1362 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1363 count++;
1364
1365 return count;
1366}
1367#endif
1368
1369/* Output assembler code for the start of a function,
1370 and initialize some of the variables in this file
1371 for the new function. The label for the function and associated
1372 assembler pseudo-ops have already been output in `assemble_start_function'.
1373
1374 FIRST is the first insn of the rtl for the function being compiled.
1375 FILE is the file to write assembler code to.
1376 OPTIMIZE is nonzero if we should eliminate redundant
1377 test and compare insns. */
1378
1379void
1380final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1381 int optimize ATTRIBUTE_UNUSED)
1382{
1383 block_depth = 0;
1384
1385 this_is_asm_operands = 0;
1386
1387 last_filename = locator_file (prologue_locator);
1388 last_linenum = locator_line (prologue_locator);
1389
1390 high_block_linenum = high_function_linenum = last_linenum;
1391
1392 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1393
|
1347#if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
| 1394#if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
|
1348 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1349 dwarf2out_begin_prologue (0, NULL);
1350#endif
1351
1352#ifdef LEAF_REG_REMAP
1353 if (current_function_uses_only_leaf_regs)
1354 leaf_renumber_regs (first);
1355#endif
1356
1357 /* The Sun386i and perhaps other machines don't work right
1358 if the profiling code comes after the prologue. */
1359#ifdef PROFILE_BEFORE_PROLOGUE
1360 if (current_function_profile)
1361 profile_function (file);
1362#endif /* PROFILE_BEFORE_PROLOGUE */
1363
1364#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1365 if (dwarf2out_do_frame ())
| 1395 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1396 dwarf2out_begin_prologue (0, NULL);
1397#endif
1398
1399#ifdef LEAF_REG_REMAP
1400 if (current_function_uses_only_leaf_regs)
1401 leaf_renumber_regs (first);
1402#endif
1403
1404 /* The Sun386i and perhaps other machines don't work right
1405 if the profiling code comes after the prologue. */
1406#ifdef PROFILE_BEFORE_PROLOGUE
1407 if (current_function_profile)
1408 profile_function (file);
1409#endif /* PROFILE_BEFORE_PROLOGUE */
1410
1411#if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1412 if (dwarf2out_do_frame ())
|
1366 dwarf2out_frame_debug (NULL_RTX);
| 1413 dwarf2out_frame_debug (NULL_RTX, false);
|
1367#endif
1368
1369 /* If debugging, assign block numbers to all of the blocks in this
1370 function. */
1371 if (write_symbols)
1372 {
| 1414#endif
1415
1416 /* If debugging, assign block numbers to all of the blocks in this
1417 function. */
1418 if (write_symbols)
1419 {
|
1373 remove_unnecessary_notes ();
| |
1374 reemit_insn_block_notes ();
1375 number_blocks (current_function_decl);
1376 /* We never actually put out begin/end notes for the top-level
1377 block in the function. But, conceptually, that block is
1378 always needed. */
1379 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1380 }
1381
1382 /* First output the function prologue: code to set up the stack frame. */
| 1420 reemit_insn_block_notes ();
1421 number_blocks (current_function_decl);
1422 /* We never actually put out begin/end notes for the top-level
1423 block in the function. But, conceptually, that block is
1424 always needed. */
1425 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1426 }
1427
1428 /* First output the function prologue: code to set up the stack frame. */
|
1383 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
| 1429 targetm.asm_out.function_prologue (file, get_frame_size ());
|
1384
1385 /* If the machine represents the prologue as RTL, the profiling code must
1386 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1387#ifdef HAVE_prologue
1388 if (! HAVE_prologue)
1389#endif
1390 profile_after_prologue (file);
1391}
1392
1393static void
1394profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1395{
1396#ifndef PROFILE_BEFORE_PROLOGUE
1397 if (current_function_profile)
1398 profile_function (file);
1399#endif /* not PROFILE_BEFORE_PROLOGUE */
1400}
1401
1402static void
1403profile_function (FILE *file ATTRIBUTE_UNUSED)
1404{
1405#ifndef NO_PROFILE_COUNTERS
1406# define NO_PROFILE_COUNTERS 0
1407#endif
1408#if defined(ASM_OUTPUT_REG_PUSH)
1409 int sval = current_function_returns_struct;
1410 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1411#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
| 1430
1431 /* If the machine represents the prologue as RTL, the profiling code must
1432 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1433#ifdef HAVE_prologue
1434 if (! HAVE_prologue)
1435#endif
1436 profile_after_prologue (file);
1437}
1438
1439static void
1440profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1441{
1442#ifndef PROFILE_BEFORE_PROLOGUE
1443 if (current_function_profile)
1444 profile_function (file);
1445#endif /* not PROFILE_BEFORE_PROLOGUE */
1446}
1447
1448static void
1449profile_function (FILE *file ATTRIBUTE_UNUSED)
1450{
1451#ifndef NO_PROFILE_COUNTERS
1452# define NO_PROFILE_COUNTERS 0
1453#endif
1454#if defined(ASM_OUTPUT_REG_PUSH)
1455 int sval = current_function_returns_struct;
1456 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1457#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
|
1412 int cxt = current_function_needs_context;
| 1458 int cxt = cfun->static_chain_decl != NULL;
|
1413#endif
1414#endif /* ASM_OUTPUT_REG_PUSH */
1415
1416 if (! NO_PROFILE_COUNTERS)
1417 {
1418 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
| 1459#endif
1460#endif /* ASM_OUTPUT_REG_PUSH */
1461
1462 if (! NO_PROFILE_COUNTERS)
1463 {
1464 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
|
1419 data_section ();
| 1465 switch_to_section (data_section);
|
1420 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
| 1466 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
|
1421 (*targetm.asm_out.internal_label) (file, "LP", current_function_funcdef_no);
| 1467 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
|
1422 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1423 }
1424
| 1468 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1469 }
1470
|
1425 function_section (current_function_decl);
| 1471 switch_to_section (current_function_section ());
|
1426
1427#if defined(ASM_OUTPUT_REG_PUSH)
| 1472
1473#if defined(ASM_OUTPUT_REG_PUSH)
|
1428 if (sval && svrtx != NULL_RTX && GET_CODE (svrtx) == REG)
| 1474 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
|
1429 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1430#endif
1431
1432#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1433 if (cxt)
1434 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1435#else
1436#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1437 if (cxt)
1438 {
1439 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1440 }
1441#endif
1442#endif
1443
1444 FUNCTION_PROFILER (file, current_function_funcdef_no);
1445
1446#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1447 if (cxt)
1448 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1449#else
1450#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1451 if (cxt)
1452 {
1453 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1454 }
1455#endif
1456#endif
1457
1458#if defined(ASM_OUTPUT_REG_PUSH)
| 1475 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1476#endif
1477
1478#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1479 if (cxt)
1480 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1481#else
1482#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1483 if (cxt)
1484 {
1485 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1486 }
1487#endif
1488#endif
1489
1490 FUNCTION_PROFILER (file, current_function_funcdef_no);
1491
1492#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1493 if (cxt)
1494 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1495#else
1496#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1497 if (cxt)
1498 {
1499 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1500 }
1501#endif
1502#endif
1503
1504#if defined(ASM_OUTPUT_REG_PUSH)
|
1459 if (sval && svrtx != NULL_RTX && GET_CODE (svrtx) == REG)
| 1505 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
|
1460 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1461#endif
1462}
1463
1464/* Output assembler code for the end of a function.
1465 For clarity, args are same as those of `final_start_function'
1466 even though not all of them are needed. */
1467
1468void
1469final_end_function (void)
1470{
1471 app_disable ();
1472
1473 (*debug_hooks->end_function) (high_function_linenum);
1474
1475 /* Finally, output the function epilogue:
1476 code to restore the stack frame and return to the caller. */
| 1506 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1507#endif
1508}
1509
1510/* Output assembler code for the end of a function.
1511 For clarity, args are same as those of `final_start_function'
1512 even though not all of them are needed. */
1513
1514void
1515final_end_function (void)
1516{
1517 app_disable ();
1518
1519 (*debug_hooks->end_function) (high_function_linenum);
1520
1521 /* Finally, output the function epilogue:
1522 code to restore the stack frame and return to the caller. */
|
1477 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
| 1523 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
|
1478
1479 /* And debug output. */
1480 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1481
1482#if defined (DWARF2_UNWIND_INFO)
1483 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1484 && dwarf2out_do_frame ())
1485 dwarf2out_end_epilogue (last_linenum, last_filename);
1486#endif
1487}
1488
1489/* Output assembler code for some insns: all or part of a function.
| 1524
1525 /* And debug output. */
1526 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1527
1528#if defined (DWARF2_UNWIND_INFO)
1529 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1530 && dwarf2out_do_frame ())
1531 dwarf2out_end_epilogue (last_linenum, last_filename);
1532#endif
1533}
1534
1535/* Output assembler code for some insns: all or part of a function.
|
1490 For description of args, see `final_start_function', above.
| 1536 For description of args, see `final_start_function', above. */
|
1491
| 1537
|
1492 PRESCAN is 1 if we are not really outputting,
1493 just scanning as if we were outputting.
1494 Prescanning deletes and rearranges insns just like ordinary output.
1495 PRESCAN is -2 if we are outputting after having prescanned.
1496 In this case, don't try to delete or rearrange insns
1497 because that has already been done.
1498 Prescanning is done only on certain machines. */
1499
| |
1500void
| 1538void
|
1501final (rtx first, FILE *file, int optimize, int prescan)
| 1539final (rtx first, FILE *file, int optimize)
|
1502{
1503 rtx insn;
1504 int max_uid = 0;
1505 int seen = 0;
1506
1507 last_ignored_compare = 0;
1508
1509#ifdef SDB_DEBUGGING_INFO
1510 /* When producing SDB debugging info, delete troublesome line number
1511 notes from inlined functions in other files as well as duplicate
1512 line number notes. */
1513 if (write_symbols == SDB_DEBUG)
1514 {
1515 rtx last = 0;
1516 for (insn = first; insn; insn = NEXT_INSN (insn))
| 1540{
1541 rtx insn;
1542 int max_uid = 0;
1543 int seen = 0;
1544
1545 last_ignored_compare = 0;
1546
1547#ifdef SDB_DEBUGGING_INFO
1548 /* When producing SDB debugging info, delete troublesome line number
1549 notes from inlined functions in other files as well as duplicate
1550 line number notes. */
1551 if (write_symbols == SDB_DEBUG)
1552 {
1553 rtx last = 0;
1554 for (insn = first; insn; insn = NEXT_INSN (insn))
|
1517 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
| 1555 if (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) > 0)
|
1518 {
| 1556 {
|
1519 if ((RTX_INTEGRATED_P (insn)
1520 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1521 || (last != 0
1522 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1523 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
| 1557 if (last != 0
1558#ifdef USE_MAPPED_LOCATION
1559 && NOTE_SOURCE_LOCATION (insn) == NOTE_SOURCE_LOCATION (last)
1560#else
1561 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1562 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)
1563#endif
1564 )
|
1524 {
1525 delete_insn (insn); /* Use delete_note. */
1526 continue;
1527 }
1528 last = insn;
1529 }
1530 }
1531#endif
1532
1533 for (insn = first; insn; insn = NEXT_INSN (insn))
1534 {
1535 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1536 max_uid = INSN_UID (insn);
1537#ifdef HAVE_cc0
1538 /* If CC tracking across branches is enabled, record the insn which
1539 jumps to each branch only reached from one place. */
| 1565 {
1566 delete_insn (insn); /* Use delete_note. */
1567 continue;
1568 }
1569 last = insn;
1570 }
1571 }
1572#endif
1573
1574 for (insn = first; insn; insn = NEXT_INSN (insn))
1575 {
1576 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1577 max_uid = INSN_UID (insn);
1578#ifdef HAVE_cc0
1579 /* If CC tracking across branches is enabled, record the insn which
1580 jumps to each branch only reached from one place. */
|
1540 if (optimize && GET_CODE (insn) == JUMP_INSN)
| 1581 if (optimize && JUMP_P (insn))
|
1541 {
1542 rtx lab = JUMP_LABEL (insn);
1543 if (lab && LABEL_NUSES (lab) == 1)
1544 {
1545 LABEL_REFS (lab) = insn;
1546 }
1547 }
1548#endif
1549 }
1550
1551 init_recog ();
1552
1553 CC_STATUS_INIT;
1554
1555 /* Output the insns. */
1556 for (insn = NEXT_INSN (first); insn;)
1557 {
1558#ifdef HAVE_ATTR_length
1559 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1560 {
1561 /* This can be triggered by bugs elsewhere in the compiler if
1562 new insns are created after init_insn_lengths is called. */
| 1582 {
1583 rtx lab = JUMP_LABEL (insn);
1584 if (lab && LABEL_NUSES (lab) == 1)
1585 {
1586 LABEL_REFS (lab) = insn;
1587 }
1588 }
1589#endif
1590 }
1591
1592 init_recog ();
1593
1594 CC_STATUS_INIT;
1595
1596 /* Output the insns. */
1597 for (insn = NEXT_INSN (first); insn;)
1598 {
1599#ifdef HAVE_ATTR_length
1600 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1601 {
1602 /* This can be triggered by bugs elsewhere in the compiler if
1603 new insns are created after init_insn_lengths is called. */
|
1563 if (GET_CODE (insn) == NOTE)
1564 insn_current_address = -1;
1565 else
1566 abort ();
| 1604 gcc_assert (NOTE_P (insn));
1605 insn_current_address = -1;
|
1567 }
1568 else
1569 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1570#endif /* HAVE_ATTR_length */
1571
| 1606 }
1607 else
1608 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1609#endif /* HAVE_ATTR_length */
1610
|
1572 insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen);
| 1611 insn = final_scan_insn (insn, file, optimize, 0, &seen);
|
1573 }
1574}
1575
1576const char *
1577get_insn_template (int code, rtx insn)
1578{
1579 switch (insn_data[code].output_format)
1580 {
1581 case INSN_OUTPUT_FORMAT_SINGLE:
1582 return insn_data[code].output.single;
1583 case INSN_OUTPUT_FORMAT_MULTI:
1584 return insn_data[code].output.multi[which_alternative];
1585 case INSN_OUTPUT_FORMAT_FUNCTION:
| 1612 }
1613}
1614
1615const char *
1616get_insn_template (int code, rtx insn)
1617{
1618 switch (insn_data[code].output_format)
1619 {
1620 case INSN_OUTPUT_FORMAT_SINGLE:
1621 return insn_data[code].output.single;
1622 case INSN_OUTPUT_FORMAT_MULTI:
1623 return insn_data[code].output.multi[which_alternative];
1624 case INSN_OUTPUT_FORMAT_FUNCTION:
|
1586 if (insn == NULL)
1587 abort ();
| 1625 gcc_assert (insn);
|
1588 return (*insn_data[code].output.function) (recog_data.operand, insn);
1589
1590 default:
| 1626 return (*insn_data[code].output.function) (recog_data.operand, insn);
1627
1628 default:
|
1591 abort ();
| 1629 gcc_unreachable ();
|
1592 }
1593}
1594
1595/* Emit the appropriate declaration for an alternate-entry-point
1596 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1597 LABEL_KIND != LABEL_NORMAL.
1598
1599 The case fall-through in this function is intentional. */
1600static void
1601output_alternate_entry_point (FILE *file, rtx insn)
1602{
1603 const char *name = LABEL_NAME (insn);
1604
1605 switch (LABEL_KIND (insn))
1606 {
1607 case LABEL_WEAK_ENTRY:
1608#ifdef ASM_WEAKEN_LABEL
1609 ASM_WEAKEN_LABEL (file, name);
1610#endif
1611 case LABEL_GLOBAL_ENTRY:
| 1630 }
1631}
1632
1633/* Emit the appropriate declaration for an alternate-entry-point
1634 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1635 LABEL_KIND != LABEL_NORMAL.
1636
1637 The case fall-through in this function is intentional. */
1638static void
1639output_alternate_entry_point (FILE *file, rtx insn)
1640{
1641 const char *name = LABEL_NAME (insn);
1642
1643 switch (LABEL_KIND (insn))
1644 {
1645 case LABEL_WEAK_ENTRY:
1646#ifdef ASM_WEAKEN_LABEL
1647 ASM_WEAKEN_LABEL (file, name);
1648#endif
1649 case LABEL_GLOBAL_ENTRY:
|
1612 (*targetm.asm_out.globalize_label) (file, name);
| 1650 targetm.asm_out.globalize_label (file, name);
|
1613 case LABEL_STATIC_ENTRY:
1614#ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1615 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1616#endif
1617 ASM_OUTPUT_LABEL (file, name);
1618 break;
1619
1620 case LABEL_NORMAL:
1621 default:
| 1651 case LABEL_STATIC_ENTRY:
1652#ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1653 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1654#endif
1655 ASM_OUTPUT_LABEL (file, name);
1656 break;
1657
1658 case LABEL_NORMAL:
1659 default:
|
1622 abort ();
| 1660 gcc_unreachable ();
|
1623 }
1624}
1625
1626/* The final scan for one insn, INSN.
1627 Args are same as in `final', except that INSN
1628 is the insn being scanned.
1629 Value returned is the next insn to be scanned.
1630
1631 NOPEEPHOLES is the flag to disallow peephole processing (currently
1632 used for within delayed branch sequence output).
1633
1634 SEEN is used to track the end of the prologue, for emitting
1635 debug information. We force the emission of a line note after
1636 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1637 at the beginning of the second basic block, whichever comes
1638 first. */
1639
1640rtx
1641final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
| 1661 }
1662}
1663
1664/* The final scan for one insn, INSN.
1665 Args are same as in `final', except that INSN
1666 is the insn being scanned.
1667 Value returned is the next insn to be scanned.
1668
1669 NOPEEPHOLES is the flag to disallow peephole processing (currently
1670 used for within delayed branch sequence output).
1671
1672 SEEN is used to track the end of the prologue, for emitting
1673 debug information. We force the emission of a line note after
1674 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1675 at the beginning of the second basic block, whichever comes
1676 first. */
1677
1678rtx
1679final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
|
1642 int prescan, int nopeepholes ATTRIBUTE_UNUSED,
1643 int *seen)
| 1680 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
|
1644{
1645#ifdef HAVE_cc0
1646 rtx set;
1647#endif
| 1681{
1682#ifdef HAVE_cc0
1683 rtx set;
1684#endif
|
| 1685 rtx next;
|
1648
1649 insn_counter++;
1650
1651 /* Ignore deleted insns. These can occur when we split insns (due to a
1652 template of "#") while not optimizing. */
1653 if (INSN_DELETED_P (insn))
1654 return NEXT_INSN (insn);
1655
1656 switch (GET_CODE (insn))
1657 {
1658 case NOTE:
| 1686
1687 insn_counter++;
1688
1689 /* Ignore deleted insns. These can occur when we split insns (due to a
1690 template of "#") while not optimizing. */
1691 if (INSN_DELETED_P (insn))
1692 return NEXT_INSN (insn);
1693
1694 switch (GET_CODE (insn))
1695 {
1696 case NOTE:
|
1659 if (prescan > 0)
1660 break;
1661
| |
1662 switch (NOTE_LINE_NUMBER (insn))
1663 {
1664 case NOTE_INSN_DELETED:
| 1697 switch (NOTE_LINE_NUMBER (insn))
1698 {
1699 case NOTE_INSN_DELETED:
|
1665 case NOTE_INSN_LOOP_BEG:
1666 case NOTE_INSN_LOOP_END:
1667 case NOTE_INSN_LOOP_END_TOP_COND:
1668 case NOTE_INSN_LOOP_CONT:
1669 case NOTE_INSN_LOOP_VTOP:
| |
1670 case NOTE_INSN_FUNCTION_END:
1671 case NOTE_INSN_REPEATED_LINE_NUMBER:
1672 case NOTE_INSN_EXPECTED_VALUE:
1673 break;
1674
| 1700 case NOTE_INSN_FUNCTION_END:
1701 case NOTE_INSN_REPEATED_LINE_NUMBER:
1702 case NOTE_INSN_EXPECTED_VALUE:
1703 break;
1704
|
| 1705 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1706 in_cold_section_p = !in_cold_section_p;
1707 (*debug_hooks->switch_text_section) ();
1708 switch_to_section (current_function_section ());
1709 break;
1710
|
1675 case NOTE_INSN_BASIC_BLOCK:
| 1711 case NOTE_INSN_BASIC_BLOCK:
|
1676#ifdef IA64_UNWIND_INFO
1677 IA64_UNWIND_EMIT (asm_out_file, insn);
| 1712#ifdef TARGET_UNWIND_INFO
1713 targetm.asm_out.unwind_emit (asm_out_file, insn);
|
1678#endif
| 1714#endif
|
| 1715
|
1679 if (flag_debug_asm)
1680 fprintf (asm_out_file, "\t%s basic block %d\n",
1681 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1682
1683 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1684 {
1685 *seen |= SEEN_EMITTED;
| 1716 if (flag_debug_asm)
1717 fprintf (asm_out_file, "\t%s basic block %d\n",
1718 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1719
1720 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1721 {
1722 *seen |= SEEN_EMITTED;
|
1686 last_filename = NULL;
| 1723 force_source_line = true;
|
1687 }
1688 else
1689 *seen |= SEEN_BB;
1690
1691 break;
1692
1693 case NOTE_INSN_EH_REGION_BEG:
1694 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1695 NOTE_EH_HANDLER (insn));
1696 break;
1697
1698 case NOTE_INSN_EH_REGION_END:
1699 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1700 NOTE_EH_HANDLER (insn));
1701 break;
1702
1703 case NOTE_INSN_PROLOGUE_END:
| 1724 }
1725 else
1726 *seen |= SEEN_BB;
1727
1728 break;
1729
1730 case NOTE_INSN_EH_REGION_BEG:
1731 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1732 NOTE_EH_HANDLER (insn));
1733 break;
1734
1735 case NOTE_INSN_EH_REGION_END:
1736 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1737 NOTE_EH_HANDLER (insn));
1738 break;
1739
1740 case NOTE_INSN_PROLOGUE_END:
|
1704 (*targetm.asm_out.function_end_prologue) (file);
| 1741 targetm.asm_out.function_end_prologue (file);
|
1705 profile_after_prologue (file);
1706
1707 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1708 {
1709 *seen |= SEEN_EMITTED;
| 1742 profile_after_prologue (file);
1743
1744 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1745 {
1746 *seen |= SEEN_EMITTED;
|
1710 last_filename = NULL;
| 1747 force_source_line = true;
|
1711 }
1712 else
1713 *seen |= SEEN_NOTE;
1714
1715 break;
1716
1717 case NOTE_INSN_EPILOGUE_BEG:
| 1748 }
1749 else
1750 *seen |= SEEN_NOTE;
1751
1752 break;
1753
1754 case NOTE_INSN_EPILOGUE_BEG:
|
1718 (*targetm.asm_out.function_begin_epilogue) (file);
| 1755 targetm.asm_out.function_begin_epilogue (file);
|
1719 break;
1720
1721 case NOTE_INSN_FUNCTION_BEG:
1722 app_disable ();
1723 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1724
1725 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1726 {
1727 *seen |= SEEN_EMITTED;
| 1756 break;
1757
1758 case NOTE_INSN_FUNCTION_BEG:
1759 app_disable ();
1760 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1761
1762 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1763 {
1764 *seen |= SEEN_EMITTED;
|
1728 last_filename = NULL;
| 1765 force_source_line = true;
|
1729 }
1730 else
1731 *seen |= SEEN_NOTE;
1732
1733 break;
1734
1735 case NOTE_INSN_BLOCK_BEG:
1736 if (debug_info_level == DINFO_LEVEL_NORMAL
1737 || debug_info_level == DINFO_LEVEL_VERBOSE
| 1766 }
1767 else
1768 *seen |= SEEN_NOTE;
1769
1770 break;
1771
1772 case NOTE_INSN_BLOCK_BEG:
1773 if (debug_info_level == DINFO_LEVEL_NORMAL
1774 || debug_info_level == DINFO_LEVEL_VERBOSE
|
1738 || write_symbols == DWARF_DEBUG
| |
1739 || write_symbols == DWARF2_DEBUG
1740 || write_symbols == VMS_AND_DWARF2_DEBUG
1741 || write_symbols == VMS_DEBUG)
1742 {
1743 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1744
1745 app_disable ();
1746 ++block_depth;
1747 high_block_linenum = last_linenum;
1748
1749 /* Output debugging info about the symbol-block beginning. */
1750 (*debug_hooks->begin_block) (last_linenum, n);
1751
1752 /* Mark this block as output. */
1753 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1754 }
1755 break;
1756
1757 case NOTE_INSN_BLOCK_END:
1758 if (debug_info_level == DINFO_LEVEL_NORMAL
1759 || debug_info_level == DINFO_LEVEL_VERBOSE
| 1775 || write_symbols == DWARF2_DEBUG
1776 || write_symbols == VMS_AND_DWARF2_DEBUG
1777 || write_symbols == VMS_DEBUG)
1778 {
1779 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1780
1781 app_disable ();
1782 ++block_depth;
1783 high_block_linenum = last_linenum;
1784
1785 /* Output debugging info about the symbol-block beginning. */
1786 (*debug_hooks->begin_block) (last_linenum, n);
1787
1788 /* Mark this block as output. */
1789 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1790 }
1791 break;
1792
1793 case NOTE_INSN_BLOCK_END:
1794 if (debug_info_level == DINFO_LEVEL_NORMAL
1795 || debug_info_level == DINFO_LEVEL_VERBOSE
|
1760 || write_symbols == DWARF_DEBUG
| |
1761 || write_symbols == DWARF2_DEBUG
1762 || write_symbols == VMS_AND_DWARF2_DEBUG
1763 || write_symbols == VMS_DEBUG)
1764 {
1765 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1766
1767 app_disable ();
1768
1769 /* End of a symbol-block. */
1770 --block_depth;
| 1796 || write_symbols == DWARF2_DEBUG
1797 || write_symbols == VMS_AND_DWARF2_DEBUG
1798 || write_symbols == VMS_DEBUG)
1799 {
1800 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1801
1802 app_disable ();
1803
1804 /* End of a symbol-block. */
1805 --block_depth;
|
1771 if (block_depth < 0)
1772 abort ();
| 1806 gcc_assert (block_depth >= 0);
|
1773
1774 (*debug_hooks->end_block) (high_block_linenum, n);
1775 }
1776 break;
1777
1778 case NOTE_INSN_DELETED_LABEL:
1779 /* Emit the label. We may have deleted the CODE_LABEL because
1780 the label could be proved to be unreachable, though still
1781 referenced (in the form of having its address taken. */
1782 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1783 break;
1784
| 1807
1808 (*debug_hooks->end_block) (high_block_linenum, n);
1809 }
1810 break;
1811
1812 case NOTE_INSN_DELETED_LABEL:
1813 /* Emit the label. We may have deleted the CODE_LABEL because
1814 the label could be proved to be unreachable, though still
1815 referenced (in the form of having its address taken. */
1816 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1817 break;
1818
|
| 1819 case NOTE_INSN_VAR_LOCATION:
1820 (*debug_hooks->var_location) (insn);
1821 break;
1822
|
1785 case 0:
1786 break;
1787
1788 default:
| 1823 case 0:
1824 break;
1825
1826 default:
|
1789 if (NOTE_LINE_NUMBER (insn) <= 0)
1790 abort ();
| 1827 gcc_assert (NOTE_LINE_NUMBER (insn) > 0);
|
1791 break;
1792 }
1793 break;
1794
1795 case BARRIER:
1796#if defined (DWARF2_UNWIND_INFO)
1797 if (dwarf2out_do_frame ())
| 1828 break;
1829 }
1830 break;
1831
1832 case BARRIER:
1833#if defined (DWARF2_UNWIND_INFO)
1834 if (dwarf2out_do_frame ())
|
1798 dwarf2out_frame_debug (insn);
| 1835 dwarf2out_frame_debug (insn, false);
|
1799#endif
1800 break;
1801
1802 case CODE_LABEL:
1803 /* The target port might emit labels in the output function for
1804 some insn, e.g. sh.c output_branchy_insn. */
1805 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1806 {
1807 int align = LABEL_TO_ALIGNMENT (insn);
1808#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1809 int max_skip = LABEL_TO_MAX_SKIP (insn);
1810#endif
1811
1812 if (align && NEXT_INSN (insn))
1813 {
1814#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1815 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1816#else
1817#ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1818 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1819#else
1820 ASM_OUTPUT_ALIGN (file, align);
1821#endif
1822#endif
1823 }
1824 }
1825#ifdef HAVE_cc0
1826 CC_STATUS_INIT;
1827 /* If this label is reached from only one place, set the condition
1828 codes from the instruction just before the branch. */
1829
1830 /* Disabled because some insns set cc_status in the C output code
1831 and NOTICE_UPDATE_CC alone can set incorrect status. */
1832 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1833 {
1834 rtx jump = LABEL_REFS (insn);
1835 rtx barrier = prev_nonnote_insn (insn);
1836 rtx prev;
1837 /* If the LABEL_REFS field of this label has been set to point
1838 at a branch, the predecessor of the branch is a regular
1839 insn, and that branch is the only way to reach this label,
1840 set the condition codes based on the branch and its
1841 predecessor. */
| 1836#endif
1837 break;
1838
1839 case CODE_LABEL:
1840 /* The target port might emit labels in the output function for
1841 some insn, e.g. sh.c output_branchy_insn. */
1842 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1843 {
1844 int align = LABEL_TO_ALIGNMENT (insn);
1845#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1846 int max_skip = LABEL_TO_MAX_SKIP (insn);
1847#endif
1848
1849 if (align && NEXT_INSN (insn))
1850 {
1851#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1852 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1853#else
1854#ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1855 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1856#else
1857 ASM_OUTPUT_ALIGN (file, align);
1858#endif
1859#endif
1860 }
1861 }
1862#ifdef HAVE_cc0
1863 CC_STATUS_INIT;
1864 /* If this label is reached from only one place, set the condition
1865 codes from the instruction just before the branch. */
1866
1867 /* Disabled because some insns set cc_status in the C output code
1868 and NOTICE_UPDATE_CC alone can set incorrect status. */
1869 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1870 {
1871 rtx jump = LABEL_REFS (insn);
1872 rtx barrier = prev_nonnote_insn (insn);
1873 rtx prev;
1874 /* If the LABEL_REFS field of this label has been set to point
1875 at a branch, the predecessor of the branch is a regular
1876 insn, and that branch is the only way to reach this label,
1877 set the condition codes based on the branch and its
1878 predecessor. */
|
1842 if (barrier && GET_CODE (barrier) == BARRIER
1843 && jump && GET_CODE (jump) == JUMP_INSN
| 1879 if (barrier && BARRIER_P (barrier)
1880 && jump && JUMP_P (jump)
|
1844 && (prev = prev_nonnote_insn (jump))
| 1881 && (prev = prev_nonnote_insn (jump))
|
1845 && GET_CODE (prev) == INSN)
| 1882 && NONJUMP_INSN_P (prev))
|
1846 {
1847 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1848 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1849 }
1850 }
1851#endif
| 1883 {
1884 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1885 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1886 }
1887 }
1888#endif
|
1852 if (prescan > 0)
1853 break;
| |
1854
1855 if (LABEL_NAME (insn))
1856 (*debug_hooks->label) (insn);
1857
1858 if (app_on)
1859 {
1860 fputs (ASM_APP_OFF, file);
1861 app_on = 0;
1862 }
| 1889
1890 if (LABEL_NAME (insn))
1891 (*debug_hooks->label) (insn);
1892
1893 if (app_on)
1894 {
1895 fputs (ASM_APP_OFF, file);
1896 app_on = 0;
1897 }
|
1863 if (NEXT_INSN (insn) != 0
1864 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
| 1898
1899 next = next_nonnote_insn (insn);
1900 if (next != 0 && JUMP_P (next))
|
1865 {
| 1901 {
|
1866 rtx nextbody = PATTERN (NEXT_INSN (insn));
| 1902 rtx nextbody = PATTERN (next);
|
1867
1868 /* If this label is followed by a jump-table,
1869 make sure we put the label in the read-only section. Also
1870 possibly write the label and jump table together. */
1871
1872 if (GET_CODE (nextbody) == ADDR_VEC
1873 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1874 {
1875#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1876 /* In this case, the case vector is being moved by the
1877 target, so don't output the label at all. Leave that
1878 to the back end macros. */
1879#else
1880 if (! JUMP_TABLES_IN_TEXT_SECTION)
1881 {
1882 int log_align;
1883
| 1903
1904 /* If this label is followed by a jump-table,
1905 make sure we put the label in the read-only section. Also
1906 possibly write the label and jump table together. */
1907
1908 if (GET_CODE (nextbody) == ADDR_VEC
1909 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1910 {
1911#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1912 /* In this case, the case vector is being moved by the
1913 target, so don't output the label at all. Leave that
1914 to the back end macros. */
1915#else
1916 if (! JUMP_TABLES_IN_TEXT_SECTION)
1917 {
1918 int log_align;
1919
|
1884 readonly_data_section ();
| 1920 switch_to_section (targetm.asm_out.function_rodata_section
1921 (current_function_decl));
|
1885
1886#ifdef ADDR_VEC_ALIGN
| 1922
1923#ifdef ADDR_VEC_ALIGN
|
1887 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
| 1924 log_align = ADDR_VEC_ALIGN (next);
|
1888#else
1889 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
1890#endif
1891 ASM_OUTPUT_ALIGN (file, log_align);
1892 }
1893 else
| 1925#else
1926 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
1927#endif
1928 ASM_OUTPUT_ALIGN (file, log_align);
1929 }
1930 else
|
1894 function_section (current_function_decl);
| 1931 switch_to_section (current_function_section ());
|
1895
1896#ifdef ASM_OUTPUT_CASE_LABEL
1897 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
| 1932
1933#ifdef ASM_OUTPUT_CASE_LABEL
1934 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
|
1898 NEXT_INSN (insn));
| 1935 next);
|
1899#else
| 1936#else
|
1900 (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn));
| 1937 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
|
1901#endif
1902#endif
1903 break;
1904 }
1905 }
1906 if (LABEL_ALT_ENTRY_P (insn))
1907 output_alternate_entry_point (file, insn);
1908 else
| 1938#endif
1939#endif
1940 break;
1941 }
1942 }
1943 if (LABEL_ALT_ENTRY_P (insn))
1944 output_alternate_entry_point (file, insn);
1945 else
|
1909 (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn));
| 1946 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
|
1910 break;
1911
1912 default:
1913 {
1914 rtx body = PATTERN (insn);
1915 int insn_code_number;
1916 const char *template;
| 1947 break;
1948
1949 default:
1950 {
1951 rtx body = PATTERN (insn);
1952 int insn_code_number;
1953 const char *template;
|
1917 rtx note;
| |
1918
| 1954
|
| 1955#ifdef HAVE_conditional_execution
1956 /* Reset this early so it is correct for ASM statements. */
1957 current_insn_predicate = NULL_RTX;
1958#endif
|
1919 /* An INSN, JUMP_INSN or CALL_INSN.
1920 First check for special kinds that recog doesn't recognize. */
1921
1922 if (GET_CODE (body) == USE /* These are just declarations. */
1923 || GET_CODE (body) == CLOBBER)
1924 break;
1925
1926#ifdef HAVE_cc0
| 1959 /* An INSN, JUMP_INSN or CALL_INSN.
1960 First check for special kinds that recog doesn't recognize. */
1961
1962 if (GET_CODE (body) == USE /* These are just declarations. */
1963 || GET_CODE (body) == CLOBBER)
1964 break;
1965
1966#ifdef HAVE_cc0
|
1927 /* If there is a REG_CC_SETTER note on this insn, it means that
1928 the setting of the condition code was done in the delay slot
1929 of the insn that branched here. So recover the cc status
1930 from the insn that set it. */
| 1967 {
1968 /* If there is a REG_CC_SETTER note on this insn, it means that
1969 the setting of the condition code was done in the delay slot
1970 of the insn that branched here. So recover the cc status
1971 from the insn that set it. */
|
1931
| 1972
|
1932 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1933 if (note)
1934 {
1935 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
1936 cc_prev_status = cc_status;
1937 }
| 1973 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1974 if (note)
1975 {
1976 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
1977 cc_prev_status = cc_status;
1978 }
1979 }
|
1938#endif
1939
1940 /* Detect insns that are really jump-tables
1941 and output them as such. */
1942
1943 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1944 {
1945#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1946 int vlen, idx;
1947#endif
1948
| 1980#endif
1981
1982 /* Detect insns that are really jump-tables
1983 and output them as such. */
1984
1985 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1986 {
1987#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1988 int vlen, idx;
1989#endif
1990
|
1949 if (prescan > 0)
1950 break;
| 1991 if (! JUMP_TABLES_IN_TEXT_SECTION)
1992 switch_to_section (targetm.asm_out.function_rodata_section
1993 (current_function_decl));
1994 else
1995 switch_to_section (current_function_section ());
|
1951
1952 if (app_on)
1953 {
1954 fputs (ASM_APP_OFF, file);
1955 app_on = 0;
1956 }
1957
1958#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1959 if (GET_CODE (body) == ADDR_VEC)
1960 {
1961#ifdef ASM_OUTPUT_ADDR_VEC
1962 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
1963#else
| 1996
1997 if (app_on)
1998 {
1999 fputs (ASM_APP_OFF, file);
2000 app_on = 0;
2001 }
2002
2003#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2004 if (GET_CODE (body) == ADDR_VEC)
2005 {
2006#ifdef ASM_OUTPUT_ADDR_VEC
2007 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2008#else
|
1964 abort ();
| 2009 gcc_unreachable ();
|
1965#endif
1966 }
1967 else
1968 {
1969#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
1970 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
1971#else
| 2010#endif
2011 }
2012 else
2013 {
2014#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2015 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2016#else
|
1972 abort ();
| 2017 gcc_unreachable ();
|
1973#endif
1974 }
1975#else
1976 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
1977 for (idx = 0; idx < vlen; idx++)
1978 {
1979 if (GET_CODE (body) == ADDR_VEC)
1980 {
1981#ifdef ASM_OUTPUT_ADDR_VEC_ELT
1982 ASM_OUTPUT_ADDR_VEC_ELT
1983 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
1984#else
| 2018#endif
2019 }
2020#else
2021 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2022 for (idx = 0; idx < vlen; idx++)
2023 {
2024 if (GET_CODE (body) == ADDR_VEC)
2025 {
2026#ifdef ASM_OUTPUT_ADDR_VEC_ELT
2027 ASM_OUTPUT_ADDR_VEC_ELT
2028 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2029#else
|
1985 abort ();
| 2030 gcc_unreachable ();
|
1986#endif
1987 }
1988 else
1989 {
1990#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
1991 ASM_OUTPUT_ADDR_DIFF_ELT
1992 (file,
1993 body,
1994 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
1995 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
1996#else
| 2031#endif
2032 }
2033 else
2034 {
2035#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2036 ASM_OUTPUT_ADDR_DIFF_ELT
2037 (file,
2038 body,
2039 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2040 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2041#else
|
1997 abort ();
| 2042 gcc_unreachable ();
|
1998#endif
1999 }
2000 }
2001#ifdef ASM_OUTPUT_CASE_END
2002 ASM_OUTPUT_CASE_END (file,
2003 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2004 insn);
2005#endif
2006#endif
2007
| 2043#endif
2044 }
2045 }
2046#ifdef ASM_OUTPUT_CASE_END
2047 ASM_OUTPUT_CASE_END (file,
2048 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2049 insn);
2050#endif
2051#endif
2052
|
2008 function_section (current_function_decl);
| 2053 switch_to_section (current_function_section ());
|
2009
2010 break;
2011 }
2012 /* Output this line note if it is the first or the last line
2013 note in a row. */
2014 if (notice_source_line (insn))
2015 {
2016 (*debug_hooks->source_line) (last_linenum, last_filename);
2017 }
2018
2019 if (GET_CODE (body) == ASM_INPUT)
2020 {
2021 const char *string = XSTR (body, 0);
2022
2023 /* There's no telling what that did to the condition codes. */
2024 CC_STATUS_INIT;
| 2054
2055 break;
2056 }
2057 /* Output this line note if it is the first or the last line
2058 note in a row. */
2059 if (notice_source_line (insn))
2060 {
2061 (*debug_hooks->source_line) (last_linenum, last_filename);
2062 }
2063
2064 if (GET_CODE (body) == ASM_INPUT)
2065 {
2066 const char *string = XSTR (body, 0);
2067
2068 /* There's no telling what that did to the condition codes. */
2069 CC_STATUS_INIT;
|
2025 if (prescan > 0)
2026 break;
| |
2027
2028 if (string[0])
2029 {
2030 if (! app_on)
2031 {
2032 fputs (ASM_APP_ON, file);
2033 app_on = 1;
2034 }
2035 fprintf (asm_out_file, "\t%s\n", string);
2036 }
2037 break;
2038 }
2039
2040 /* Detect `asm' construct with operands. */
2041 if (asm_noperands (body) >= 0)
2042 {
2043 unsigned int noperands = asm_noperands (body);
2044 rtx *ops = alloca (noperands * sizeof (rtx));
2045 const char *string;
2046
2047 /* There's no telling what that did to the condition codes. */
2048 CC_STATUS_INIT;
| 2070
2071 if (string[0])
2072 {
2073 if (! app_on)
2074 {
2075 fputs (ASM_APP_ON, file);
2076 app_on = 1;
2077 }
2078 fprintf (asm_out_file, "\t%s\n", string);
2079 }
2080 break;
2081 }
2082
2083 /* Detect `asm' construct with operands. */
2084 if (asm_noperands (body) >= 0)
2085 {
2086 unsigned int noperands = asm_noperands (body);
2087 rtx *ops = alloca (noperands * sizeof (rtx));
2088 const char *string;
2089
2090 /* There's no telling what that did to the condition codes. */
2091 CC_STATUS_INIT;
|
2049 if (prescan > 0)
2050 break;
| |
2051
2052 /* Get out the operand values. */
2053 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
| 2092
2093 /* Get out the operand values. */
2094 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
|
2054 /* Inhibit aborts on what would otherwise be compiler bugs. */
| 2095 /* Inhibit dieing on what would otherwise be compiler bugs. */
|
2055 insn_noperands = noperands;
2056 this_is_asm_operands = insn;
2057
2058#ifdef FINAL_PRESCAN_INSN
2059 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2060#endif
2061
2062 /* Output the insn using them. */
2063 if (string[0])
2064 {
2065 if (! app_on)
2066 {
2067 fputs (ASM_APP_ON, file);
2068 app_on = 1;
2069 }
2070 output_asm_insn (string, ops);
2071 }
2072
2073 this_is_asm_operands = 0;
2074 break;
2075 }
2076
| 2096 insn_noperands = noperands;
2097 this_is_asm_operands = insn;
2098
2099#ifdef FINAL_PRESCAN_INSN
2100 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2101#endif
2102
2103 /* Output the insn using them. */
2104 if (string[0])
2105 {
2106 if (! app_on)
2107 {
2108 fputs (ASM_APP_ON, file);
2109 app_on = 1;
2110 }
2111 output_asm_insn (string, ops);
2112 }
2113
2114 this_is_asm_operands = 0;
2115 break;
2116 }
2117
|
2077 if (prescan <= 0 && app_on)
| 2118 if (app_on)
|
2078 {
2079 fputs (ASM_APP_OFF, file);
2080 app_on = 0;
2081 }
2082
2083 if (GET_CODE (body) == SEQUENCE)
2084 {
2085 /* A delayed-branch sequence */
2086 int i;
| 2119 {
2120 fputs (ASM_APP_OFF, file);
2121 app_on = 0;
2122 }
2123
2124 if (GET_CODE (body) == SEQUENCE)
2125 {
2126 /* A delayed-branch sequence */
2127 int i;
|
2087 rtx next;
| |
2088
| 2128
|
2089 if (prescan > 0)
2090 break;
| |
2091 final_sequence = body;
2092
2093 /* Record the delay slots' frame information before the branch.
2094 This is needed for delayed calls: see execute_cfa_program(). */
2095#if defined (DWARF2_UNWIND_INFO)
2096 if (dwarf2out_do_frame ())
2097 for (i = 1; i < XVECLEN (body, 0); i++)
| 2129 final_sequence = body;
2130
2131 /* Record the delay slots' frame information before the branch.
2132 This is needed for delayed calls: see execute_cfa_program(). */
2133#if defined (DWARF2_UNWIND_INFO)
2134 if (dwarf2out_do_frame ())
2135 for (i = 1; i < XVECLEN (body, 0); i++)
|
2098 dwarf2out_frame_debug (XVECEXP (body, 0, i));
| 2136 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
|
2099#endif
2100
2101 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2102 force the restoration of a comparison that was previously
2103 thought unnecessary. If that happens, cancel this sequence
2104 and cause that insn to be restored. */
2105
| 2137#endif
2138
2139 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2140 force the restoration of a comparison that was previously
2141 thought unnecessary. If that happens, cancel this sequence
2142 and cause that insn to be restored. */
2143
|
2106 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1, seen);
| 2144 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
|
2107 if (next != XVECEXP (body, 0, 1))
2108 {
2109 final_sequence = 0;
2110 return next;
2111 }
2112
2113 for (i = 1; i < XVECLEN (body, 0); i++)
2114 {
2115 rtx insn = XVECEXP (body, 0, i);
2116 rtx next = NEXT_INSN (insn);
2117 /* We loop in case any instruction in a delay slot gets
2118 split. */
2119 do
| 2145 if (next != XVECEXP (body, 0, 1))
2146 {
2147 final_sequence = 0;
2148 return next;
2149 }
2150
2151 for (i = 1; i < XVECLEN (body, 0); i++)
2152 {
2153 rtx insn = XVECEXP (body, 0, i);
2154 rtx next = NEXT_INSN (insn);
2155 /* We loop in case any instruction in a delay slot gets
2156 split. */
2157 do
|
2120 insn = final_scan_insn (insn, file, 0, prescan, 1, seen);
| 2158 insn = final_scan_insn (insn, file, 0, 1, seen);
|
2121 while (insn != next);
2122 }
2123#ifdef DBR_OUTPUT_SEQEND
2124 DBR_OUTPUT_SEQEND (file);
2125#endif
2126 final_sequence = 0;
2127
2128 /* If the insn requiring the delay slot was a CALL_INSN, the
2129 insns in the delay slot are actually executed before the
2130 called function. Hence we don't preserve any CC-setting
2131 actions in these insns and the CC must be marked as being
2132 clobbered by the function. */
| 2159 while (insn != next);
2160 }
2161#ifdef DBR_OUTPUT_SEQEND
2162 DBR_OUTPUT_SEQEND (file);
2163#endif
2164 final_sequence = 0;
2165
2166 /* If the insn requiring the delay slot was a CALL_INSN, the
2167 insns in the delay slot are actually executed before the
2168 called function. Hence we don't preserve any CC-setting
2169 actions in these insns and the CC must be marked as being
2170 clobbered by the function. */
|
2133 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
| 2171 if (CALL_P (XVECEXP (body, 0, 0)))
|
2134 {
2135 CC_STATUS_INIT;
2136 }
2137 break;
2138 }
2139
2140 /* We have a real machine instruction as rtl. */
2141
2142 body = PATTERN (insn);
2143
2144#ifdef HAVE_cc0
2145 set = single_set (insn);
2146
2147 /* Check for redundant test and compare instructions
2148 (when the condition codes are already set up as desired).
2149 This is done only when optimizing; if not optimizing,
2150 it should be possible for the user to alter a variable
2151 with the debugger in between statements
2152 and the next statement should reexamine the variable
2153 to compute the condition codes. */
2154
2155 if (optimize)
2156 {
2157 if (set
2158 && GET_CODE (SET_DEST (set)) == CC0
2159 && insn != last_ignored_compare)
2160 {
2161 if (GET_CODE (SET_SRC (set)) == SUBREG)
2162 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2163 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2164 {
2165 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2166 XEXP (SET_SRC (set), 0)
2167 = alter_subreg (&XEXP (SET_SRC (set), 0));
2168 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2169 XEXP (SET_SRC (set), 1)
2170 = alter_subreg (&XEXP (SET_SRC (set), 1));
2171 }
2172 if ((cc_status.value1 != 0
2173 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2174 || (cc_status.value2 != 0
2175 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2176 {
2177 /* Don't delete insn if it has an addressing side-effect. */
2178 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2179 /* or if anything in it is volatile. */
2180 && ! volatile_refs_p (PATTERN (insn)))
2181 {
2182 /* We don't really delete the insn; just ignore it. */
2183 last_ignored_compare = insn;
2184 break;
2185 }
2186 }
2187 }
2188 }
2189#endif
2190
| 2172 {
2173 CC_STATUS_INIT;
2174 }
2175 break;
2176 }
2177
2178 /* We have a real machine instruction as rtl. */
2179
2180 body = PATTERN (insn);
2181
2182#ifdef HAVE_cc0
2183 set = single_set (insn);
2184
2185 /* Check for redundant test and compare instructions
2186 (when the condition codes are already set up as desired).
2187 This is done only when optimizing; if not optimizing,
2188 it should be possible for the user to alter a variable
2189 with the debugger in between statements
2190 and the next statement should reexamine the variable
2191 to compute the condition codes. */
2192
2193 if (optimize)
2194 {
2195 if (set
2196 && GET_CODE (SET_DEST (set)) == CC0
2197 && insn != last_ignored_compare)
2198 {
2199 if (GET_CODE (SET_SRC (set)) == SUBREG)
2200 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2201 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2202 {
2203 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2204 XEXP (SET_SRC (set), 0)
2205 = alter_subreg (&XEXP (SET_SRC (set), 0));
2206 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2207 XEXP (SET_SRC (set), 1)
2208 = alter_subreg (&XEXP (SET_SRC (set), 1));
2209 }
2210 if ((cc_status.value1 != 0
2211 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2212 || (cc_status.value2 != 0
2213 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2214 {
2215 /* Don't delete insn if it has an addressing side-effect. */
2216 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2217 /* or if anything in it is volatile. */
2218 && ! volatile_refs_p (PATTERN (insn)))
2219 {
2220 /* We don't really delete the insn; just ignore it. */
2221 last_ignored_compare = insn;
2222 break;
2223 }
2224 }
2225 }
2226 }
2227#endif
2228
|
2191#ifndef STACK_REGS
2192 /* Don't bother outputting obvious no-ops, even without -O.
2193 This optimization is fast and doesn't interfere with debugging.
2194 Don't do this if the insn is in a delay slot, since this
2195 will cause an improper number of delay insns to be written. */
2196 if (final_sequence == 0
2197 && prescan >= 0
2198 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2199 && GET_CODE (SET_SRC (body)) == REG
2200 && GET_CODE (SET_DEST (body)) == REG
2201 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2202 break;
2203#endif
2204
| |
2205#ifdef HAVE_cc0
2206 /* If this is a conditional branch, maybe modify it
2207 if the cc's are in a nonstandard state
2208 so that it accomplishes the same thing that it would
2209 do straightforwardly if the cc's were set up normally. */
2210
2211 if (cc_status.flags != 0
| 2229#ifdef HAVE_cc0
2230 /* If this is a conditional branch, maybe modify it
2231 if the cc's are in a nonstandard state
2232 so that it accomplishes the same thing that it would
2233 do straightforwardly if the cc's were set up normally. */
2234
2235 if (cc_status.flags != 0
|
2212 && GET_CODE (insn) == JUMP_INSN
| 2236 && JUMP_P (insn)
|
2213 && GET_CODE (body) == SET
2214 && SET_DEST (body) == pc_rtx
2215 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
| 2237 && GET_CODE (body) == SET
2238 && SET_DEST (body) == pc_rtx
2239 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
|
2216 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2217 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2218 /* This is done during prescan; it is not done again
2219 in final scan when prescan has been done. */
2220 && prescan >= 0)
| 2240 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2241 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
|
2221 {
2222 /* This function may alter the contents of its argument
2223 and clear some of the cc_status.flags bits.
2224 It may also return 1 meaning condition now always true
2225 or -1 meaning condition now always false
2226 or 2 meaning condition nontrivial but altered. */
2227 int result = alter_cond (XEXP (SET_SRC (body), 0));
2228 /* If condition now has fixed value, replace the IF_THEN_ELSE
2229 with its then-operand or its else-operand. */
2230 if (result == 1)
2231 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2232 if (result == -1)
2233 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2234
2235 /* The jump is now either unconditional or a no-op.
2236 If it has become a no-op, don't try to output it.
2237 (It would not be recognized.) */
2238 if (SET_SRC (body) == pc_rtx)
2239 {
2240 delete_insn (insn);
2241 break;
2242 }
2243 else if (GET_CODE (SET_SRC (body)) == RETURN)
2244 /* Replace (set (pc) (return)) with (return). */
2245 PATTERN (insn) = body = SET_SRC (body);
2246
2247 /* Rerecognize the instruction if it has changed. */
2248 if (result != 0)
2249 INSN_CODE (insn) = -1;
2250 }
2251
2252 /* Make same adjustments to instructions that examine the
2253 condition codes without jumping and instructions that
2254 handle conditional moves (if this machine has either one). */
2255
2256 if (cc_status.flags != 0
2257 && set != 0)
2258 {
2259 rtx cond_rtx, then_rtx, else_rtx;
2260
| 2242 {
2243 /* This function may alter the contents of its argument
2244 and clear some of the cc_status.flags bits.
2245 It may also return 1 meaning condition now always true
2246 or -1 meaning condition now always false
2247 or 2 meaning condition nontrivial but altered. */
2248 int result = alter_cond (XEXP (SET_SRC (body), 0));
2249 /* If condition now has fixed value, replace the IF_THEN_ELSE
2250 with its then-operand or its else-operand. */
2251 if (result == 1)
2252 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2253 if (result == -1)
2254 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2255
2256 /* The jump is now either unconditional or a no-op.
2257 If it has become a no-op, don't try to output it.
2258 (It would not be recognized.) */
2259 if (SET_SRC (body) == pc_rtx)
2260 {
2261 delete_insn (insn);
2262 break;
2263 }
2264 else if (GET_CODE (SET_SRC (body)) == RETURN)
2265 /* Replace (set (pc) (return)) with (return). */
2266 PATTERN (insn) = body = SET_SRC (body);
2267
2268 /* Rerecognize the instruction if it has changed. */
2269 if (result != 0)
2270 INSN_CODE (insn) = -1;
2271 }
2272
2273 /* Make same adjustments to instructions that examine the
2274 condition codes without jumping and instructions that
2275 handle conditional moves (if this machine has either one). */
2276
2277 if (cc_status.flags != 0
2278 && set != 0)
2279 {
2280 rtx cond_rtx, then_rtx, else_rtx;
2281
|
2261 if (GET_CODE (insn) != JUMP_INSN
| 2282 if (!JUMP_P (insn)
|
2262 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2263 {
2264 cond_rtx = XEXP (SET_SRC (set), 0);
2265 then_rtx = XEXP (SET_SRC (set), 1);
2266 else_rtx = XEXP (SET_SRC (set), 2);
2267 }
2268 else
2269 {
2270 cond_rtx = SET_SRC (set);
2271 then_rtx = const_true_rtx;
2272 else_rtx = const0_rtx;
2273 }
2274
2275 switch (GET_CODE (cond_rtx))
2276 {
2277 case GTU:
2278 case GT:
2279 case LTU:
2280 case LT:
2281 case GEU:
2282 case GE:
2283 case LEU:
2284 case LE:
2285 case EQ:
2286 case NE:
2287 {
2288 int result;
2289 if (XEXP (cond_rtx, 0) != cc0_rtx)
2290 break;
2291 result = alter_cond (cond_rtx);
2292 if (result == 1)
2293 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2294 else if (result == -1)
2295 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2296 else if (result == 2)
2297 INSN_CODE (insn) = -1;
2298 if (SET_DEST (set) == SET_SRC (set))
2299 delete_insn (insn);
2300 }
2301 break;
2302
2303 default:
2304 break;
2305 }
2306 }
2307
2308#endif
2309
2310#ifdef HAVE_peephole
2311 /* Do machine-specific peephole optimizations if desired. */
2312
2313 if (optimize && !flag_no_peephole && !nopeepholes)
2314 {
2315 rtx next = peephole (insn);
2316 /* When peepholing, if there were notes within the peephole,
2317 emit them before the peephole. */
2318 if (next != 0 && next != NEXT_INSN (insn))
2319 {
| 2283 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2284 {
2285 cond_rtx = XEXP (SET_SRC (set), 0);
2286 then_rtx = XEXP (SET_SRC (set), 1);
2287 else_rtx = XEXP (SET_SRC (set), 2);
2288 }
2289 else
2290 {
2291 cond_rtx = SET_SRC (set);
2292 then_rtx = const_true_rtx;
2293 else_rtx = const0_rtx;
2294 }
2295
2296 switch (GET_CODE (cond_rtx))
2297 {
2298 case GTU:
2299 case GT:
2300 case LTU:
2301 case LT:
2302 case GEU:
2303 case GE:
2304 case LEU:
2305 case LE:
2306 case EQ:
2307 case NE:
2308 {
2309 int result;
2310 if (XEXP (cond_rtx, 0) != cc0_rtx)
2311 break;
2312 result = alter_cond (cond_rtx);
2313 if (result == 1)
2314 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2315 else if (result == -1)
2316 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2317 else if (result == 2)
2318 INSN_CODE (insn) = -1;
2319 if (SET_DEST (set) == SET_SRC (set))
2320 delete_insn (insn);
2321 }
2322 break;
2323
2324 default:
2325 break;
2326 }
2327 }
2328
2329#endif
2330
2331#ifdef HAVE_peephole
2332 /* Do machine-specific peephole optimizations if desired. */
2333
2334 if (optimize && !flag_no_peephole && !nopeepholes)
2335 {
2336 rtx next = peephole (insn);
2337 /* When peepholing, if there were notes within the peephole,
2338 emit them before the peephole. */
2339 if (next != 0 && next != NEXT_INSN (insn))
2340 {
|
2320 rtx prev = PREV_INSN (insn);
| 2341 rtx note, prev = PREV_INSN (insn);
|
2321
2322 for (note = NEXT_INSN (insn); note != next;
2323 note = NEXT_INSN (note))
| 2342
2343 for (note = NEXT_INSN (insn); note != next;
2344 note = NEXT_INSN (note))
|
2324 final_scan_insn (note, file, optimize, prescan, nopeepholes, seen);
| 2345 final_scan_insn (note, file, optimize, nopeepholes, seen);
|
2325
| 2346
|
2326 /* In case this is prescan, put the notes
2327 in proper position for later rescan. */
| 2347 /* Put the notes in the proper position for a later
2348 rescan. For example, the SH target can do this
2349 when generating a far jump in a delayed branch
2350 sequence. */
|
2328 note = NEXT_INSN (insn);
2329 PREV_INSN (note) = prev;
2330 NEXT_INSN (prev) = note;
2331 NEXT_INSN (PREV_INSN (next)) = insn;
2332 PREV_INSN (insn) = PREV_INSN (next);
2333 NEXT_INSN (insn) = next;
2334 PREV_INSN (next) = insn;
2335 }
2336
2337 /* PEEPHOLE might have changed this. */
2338 body = PATTERN (insn);
2339 }
2340#endif
2341
2342 /* Try to recognize the instruction.
2343 If successful, verify that the operands satisfy the
2344 constraints for the instruction. Crash if they don't,
2345 since `reload' should have changed them so that they do. */
2346
2347 insn_code_number = recog_memoized (insn);
2348 cleanup_subreg_operands (insn);
2349
2350 /* Dump the insn in the assembly for debugging. */
2351 if (flag_dump_rtl_in_asm)
2352 {
2353 print_rtx_head = ASM_COMMENT_START;
2354 print_rtl_single (asm_out_file, insn);
2355 print_rtx_head = "";
2356 }
2357
2358 if (! constrain_operands_cached (1))
2359 fatal_insn_not_found (insn);
2360
2361 /* Some target machines need to prescan each insn before
2362 it is output. */
2363
2364#ifdef FINAL_PRESCAN_INSN
2365 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2366#endif
2367
2368#ifdef HAVE_conditional_execution
2369 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2370 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
| 2351 note = NEXT_INSN (insn);
2352 PREV_INSN (note) = prev;
2353 NEXT_INSN (prev) = note;
2354 NEXT_INSN (PREV_INSN (next)) = insn;
2355 PREV_INSN (insn) = PREV_INSN (next);
2356 NEXT_INSN (insn) = next;
2357 PREV_INSN (next) = insn;
2358 }
2359
2360 /* PEEPHOLE might have changed this. */
2361 body = PATTERN (insn);
2362 }
2363#endif
2364
2365 /* Try to recognize the instruction.
2366 If successful, verify that the operands satisfy the
2367 constraints for the instruction. Crash if they don't,
2368 since `reload' should have changed them so that they do. */
2369
2370 insn_code_number = recog_memoized (insn);
2371 cleanup_subreg_operands (insn);
2372
2373 /* Dump the insn in the assembly for debugging. */
2374 if (flag_dump_rtl_in_asm)
2375 {
2376 print_rtx_head = ASM_COMMENT_START;
2377 print_rtl_single (asm_out_file, insn);
2378 print_rtx_head = "";
2379 }
2380
2381 if (! constrain_operands_cached (1))
2382 fatal_insn_not_found (insn);
2383
2384 /* Some target machines need to prescan each insn before
2385 it is output. */
2386
2387#ifdef FINAL_PRESCAN_INSN
2388 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2389#endif
2390
2391#ifdef HAVE_conditional_execution
2392 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2393 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
|
2371 else
2372 current_insn_predicate = NULL_RTX;
| |
2373#endif
2374
2375#ifdef HAVE_cc0
2376 cc_prev_status = cc_status;
2377
2378 /* Update `cc_status' for this instruction.
2379 The instruction's output routine may change it further.
2380 If the output routine for a jump insn needs to depend
2381 on the cc status, it should look at cc_prev_status. */
2382
2383 NOTICE_UPDATE_CC (body, insn);
2384#endif
2385
2386 current_output_insn = debug_insn = insn;
2387
2388#if defined (DWARF2_UNWIND_INFO)
| 2394#endif
2395
2396#ifdef HAVE_cc0
2397 cc_prev_status = cc_status;
2398
2399 /* Update `cc_status' for this instruction.
2400 The instruction's output routine may change it further.
2401 If the output routine for a jump insn needs to depend
2402 on the cc status, it should look at cc_prev_status. */
2403
2404 NOTICE_UPDATE_CC (body, insn);
2405#endif
2406
2407 current_output_insn = debug_insn = insn;
2408
2409#if defined (DWARF2_UNWIND_INFO)
|
2389 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2390 dwarf2out_frame_debug (insn);
| 2410 if (CALL_P (insn) && dwarf2out_do_frame ())
2411 dwarf2out_frame_debug (insn, false);
|
2391#endif
2392
2393 /* Find the proper template for this insn. */
2394 template = get_insn_template (insn_code_number, insn);
2395
2396 /* If the C code returns 0, it means that it is a jump insn
2397 which follows a deleted test insn, and that test insn
2398 needs to be reinserted. */
2399 if (template == 0)
2400 {
2401 rtx prev;
2402
| 2412#endif
2413
2414 /* Find the proper template for this insn. */
2415 template = get_insn_template (insn_code_number, insn);
2416
2417 /* If the C code returns 0, it means that it is a jump insn
2418 which follows a deleted test insn, and that test insn
2419 needs to be reinserted. */
2420 if (template == 0)
2421 {
2422 rtx prev;
2423
|
2403 if (prev_nonnote_insn (insn) != last_ignored_compare)
2404 abort ();
| 2424 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
|
2405
2406 /* We have already processed the notes between the setter and
2407 the user. Make sure we don't process them again, this is
2408 particularly important if one of the notes is a block
2409 scope note or an EH note. */
2410 for (prev = insn;
2411 prev != last_ignored_compare;
2412 prev = PREV_INSN (prev))
2413 {
| 2425
2426 /* We have already processed the notes between the setter and
2427 the user. Make sure we don't process them again, this is
2428 particularly important if one of the notes is a block
2429 scope note or an EH note. */
2430 for (prev = insn;
2431 prev != last_ignored_compare;
2432 prev = PREV_INSN (prev))
2433 {
|
2414 if (GET_CODE (prev) == NOTE)
| 2434 if (NOTE_P (prev))
|
2415 delete_insn (prev); /* Use delete_note. */
2416 }
2417
2418 return prev;
2419 }
2420
2421 /* If the template is the string "#", it means that this insn must
2422 be split. */
2423 if (template[0] == '#' && template[1] == '\0')
2424 {
2425 rtx new = try_split (body, insn, 0);
2426
2427 /* If we didn't split the insn, go away. */
2428 if (new == insn && PATTERN (new) == body)
2429 fatal_insn ("could not split insn", insn);
2430
2431#ifdef HAVE_ATTR_length
2432 /* This instruction should have been split in shorten_branches,
2433 to ensure that we would have valid length info for the
2434 splitees. */
| 2435 delete_insn (prev); /* Use delete_note. */
2436 }
2437
2438 return prev;
2439 }
2440
2441 /* If the template is the string "#", it means that this insn must
2442 be split. */
2443 if (template[0] == '#' && template[1] == '\0')
2444 {
2445 rtx new = try_split (body, insn, 0);
2446
2447 /* If we didn't split the insn, go away. */
2448 if (new == insn && PATTERN (new) == body)
2449 fatal_insn ("could not split insn", insn);
2450
2451#ifdef HAVE_ATTR_length
2452 /* This instruction should have been split in shorten_branches,
2453 to ensure that we would have valid length info for the
2454 splitees. */
|
2435 abort ();
| 2455 gcc_unreachable ();
|
2436#endif
2437
2438 return new;
2439 }
2440
| 2456#endif
2457
2458 return new;
2459 }
2460
|
2441 if (prescan > 0)
2442 break;
2443
2444#ifdef IA64_UNWIND_INFO
2445 IA64_UNWIND_EMIT (asm_out_file, insn);
| 2461#ifdef TARGET_UNWIND_INFO
2462 /* ??? This will put the directives in the wrong place if
2463 get_insn_template outputs assembly directly. However calling it
2464 before get_insn_template breaks if the insns is split. */
2465 targetm.asm_out.unwind_emit (asm_out_file, insn);
|
2446#endif
| 2466#endif
|
2447 /* Output assembler code from the template. */
| |
2448
| 2467
|
| 2468 /* Output assembler code from the template. */
|
2449 output_asm_insn (template, recog_data.operand);
2450
2451 /* If necessary, report the effect that the instruction has on
2452 the unwind info. We've already done this for delay slots
2453 and call instructions. */
2454#if defined (DWARF2_UNWIND_INFO)
| 2469 output_asm_insn (template, recog_data.operand);
2470
2471 /* If necessary, report the effect that the instruction has on
2472 the unwind info. We've already done this for delay slots
2473 and call instructions. */
2474#if defined (DWARF2_UNWIND_INFO)
|
2455 if (GET_CODE (insn) == INSN
| 2475 if (final_sequence == 0
|
2456#if !defined (HAVE_prologue)
2457 && !ACCUMULATE_OUTGOING_ARGS
2458#endif
| 2476#if !defined (HAVE_prologue)
2477 && !ACCUMULATE_OUTGOING_ARGS
2478#endif
|
2459 && final_sequence == 0
| |
2460 && dwarf2out_do_frame ())
| 2479 && dwarf2out_do_frame ())
|
2461 dwarf2out_frame_debug (insn);
| 2480 dwarf2out_frame_debug (insn, true);
|
2462#endif
2463
| 2481#endif
2482
|
2464#if 0
2465 /* It's not at all clear why we did this and doing so used to
2466 interfere with tests that used REG_WAS_0 notes, which are
2467 now gone, so let's try with this out. */
2468
2469 /* Mark this insn as having been output. */
2470 INSN_DELETED_P (insn) = 1;
2471#endif
2472
2473 /* Emit information for vtable gc. */
2474 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2475
| |
2476 current_output_insn = debug_insn = 0;
2477 }
2478 }
2479 return NEXT_INSN (insn);
2480}
2481
| 2483 current_output_insn = debug_insn = 0;
2484 }
2485 }
2486 return NEXT_INSN (insn);
2487}
2488
|
2482/* Output debugging info to the assembler file FILE
2483 based on the NOTE-insn INSN, assumed to be a line number. */
| 2489/* Return whether a source line note needs to be emitted before INSN. */
|
2484
2485static bool
2486notice_source_line (rtx insn)
2487{
2488 const char *filename = insn_file (insn);
2489 int linenum = insn_line (insn);
2490
| 2490
2491static bool
2492notice_source_line (rtx insn)
2493{
2494 const char *filename = insn_file (insn);
2495 int linenum = insn_line (insn);
2496
|
2491 if (filename && (filename != last_filename || last_linenum != linenum))
| 2497 if (filename
2498 && (force_source_line
2499 || filename != last_filename
2500 || last_linenum != linenum))
|
2492 {
| 2501 {
|
| 2502 force_source_line = false;
|
2493 last_filename = filename;
2494 last_linenum = linenum;
2495 high_block_linenum = MAX (last_linenum, high_block_linenum);
2496 high_function_linenum = MAX (last_linenum, high_function_linenum);
2497 return true;
2498 }
2499 return false;
2500}
2501
2502/* For each operand in INSN, simplify (subreg (reg)) so that it refers
2503 directly to the desired hard register. */
2504
2505void
2506cleanup_subreg_operands (rtx insn)
2507{
2508 int i;
2509 extract_insn_cached (insn);
2510 for (i = 0; i < recog_data.n_operands; i++)
2511 {
2512 /* The following test cannot use recog_data.operand when testing
2513 for a SUBREG: the underlying object might have been changed
2514 already if we are inside a match_operator expression that
2515 matches the else clause. Instead we test the underlying
2516 expression directly. */
2517 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2518 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2519 else if (GET_CODE (recog_data.operand[i]) == PLUS
2520 || GET_CODE (recog_data.operand[i]) == MULT
| 2503 last_filename = filename;
2504 last_linenum = linenum;
2505 high_block_linenum = MAX (last_linenum, high_block_linenum);
2506 high_function_linenum = MAX (last_linenum, high_function_linenum);
2507 return true;
2508 }
2509 return false;
2510}
2511
2512/* For each operand in INSN, simplify (subreg (reg)) so that it refers
2513 directly to the desired hard register. */
2514
2515void
2516cleanup_subreg_operands (rtx insn)
2517{
2518 int i;
2519 extract_insn_cached (insn);
2520 for (i = 0; i < recog_data.n_operands; i++)
2521 {
2522 /* The following test cannot use recog_data.operand when testing
2523 for a SUBREG: the underlying object might have been changed
2524 already if we are inside a match_operator expression that
2525 matches the else clause. Instead we test the underlying
2526 expression directly. */
2527 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2528 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2529 else if (GET_CODE (recog_data.operand[i]) == PLUS
2530 || GET_CODE (recog_data.operand[i]) == MULT
|
2521 || GET_CODE (recog_data.operand[i]) == MEM)
| 2531 || MEM_P (recog_data.operand[i]))
|
2522 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2523 }
2524
2525 for (i = 0; i < recog_data.n_dups; i++)
2526 {
2527 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2528 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2529 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2530 || GET_CODE (*recog_data.dup_loc[i]) == MULT
| 2532 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2533 }
2534
2535 for (i = 0; i < recog_data.n_dups; i++)
2536 {
2537 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2538 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2539 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2540 || GET_CODE (*recog_data.dup_loc[i]) == MULT
|
2531 || GET_CODE (*recog_data.dup_loc[i]) == MEM)
| 2541 || MEM_P (*recog_data.dup_loc[i]))
|
2532 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2533 }
2534}
2535
2536/* If X is a SUBREG, replace it with a REG or a MEM,
2537 based on the thing it is a subreg of. */
2538
2539rtx
2540alter_subreg (rtx *xp)
2541{
2542 rtx x = *xp;
2543 rtx y = SUBREG_REG (x);
2544
2545 /* simplify_subreg does not remove subreg from volatile references.
2546 We are required to. */
| 2542 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2543 }
2544}
2545
2546/* If X is a SUBREG, replace it with a REG or a MEM,
2547 based on the thing it is a subreg of. */
2548
2549rtx
2550alter_subreg (rtx *xp)
2551{
2552 rtx x = *xp;
2553 rtx y = SUBREG_REG (x);
2554
2555 /* simplify_subreg does not remove subreg from volatile references.
2556 We are required to. */
|
2547 if (GET_CODE (y) == MEM)
2548 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
| 2557 if (MEM_P (y))
2558 {
2559 int offset = SUBREG_BYTE (x);
2560
2561 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2562 contains 0 instead of the proper offset. See simplify_subreg. */
2563 if (offset == 0
2564 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2565 {
2566 int difference = GET_MODE_SIZE (GET_MODE (y))
2567 - GET_MODE_SIZE (GET_MODE (x));
2568 if (WORDS_BIG_ENDIAN)
2569 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2570 if (BYTES_BIG_ENDIAN)
2571 offset += difference % UNITS_PER_WORD;
2572 }
2573
2574 *xp = adjust_address (y, GET_MODE (x), offset);
2575 }
|
2549 else
2550 {
2551 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2552 SUBREG_BYTE (x));
2553
2554 if (new != 0)
2555 *xp = new;
| 2576 else
2577 {
2578 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2579 SUBREG_BYTE (x));
2580
2581 if (new != 0)
2582 *xp = new;
|
2556 /* Simplify_subreg can't handle some REG cases, but we have to. */
2557 else if (GET_CODE (y) == REG)
| 2583 else if (REG_P (y))
|
2558 {
| 2584 {
|
2559 unsigned int regno = subreg_hard_regno (x, 1);
| 2585 /* Simplify_subreg can't handle some REG cases, but we have to. */
2586 unsigned int regno = subreg_regno (x);
|
2560 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2561 }
| 2587 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2588 }
|
2562 else
2563 abort ();
| |
2564 }
2565
2566 return *xp;
2567}
2568
2569/* Do alter_subreg on all the SUBREGs contained in X. */
2570
2571static rtx
2572walk_alter_subreg (rtx *xp)
2573{
2574 rtx x = *xp;
2575 switch (GET_CODE (x))
2576 {
2577 case PLUS:
2578 case MULT:
| 2589 }
2590
2591 return *xp;
2592}
2593
2594/* Do alter_subreg on all the SUBREGs contained in X. */
2595
2596static rtx
2597walk_alter_subreg (rtx *xp)
2598{
2599 rtx x = *xp;
2600 switch (GET_CODE (x))
2601 {
2602 case PLUS:
2603 case MULT:
|
| 2604 case AND:
|
2579 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2580 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2581 break;
2582
2583 case MEM:
| 2605 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2606 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2607 break;
2608
2609 case MEM:
|
| 2610 case ZERO_EXTEND:
|
2584 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2585 break;
2586
2587 case SUBREG:
2588 return alter_subreg (xp);
2589
2590 default:
2591 break;
2592 }
2593
2594 return *xp;
2595}
2596
2597#ifdef HAVE_cc0
2598
2599/* Given BODY, the body of a jump instruction, alter the jump condition
2600 as required by the bits that are set in cc_status.flags.
2601 Not all of the bits there can be handled at this level in all cases.
2602
2603 The value is normally 0.
2604 1 means that the condition has become always true.
2605 -1 means that the condition has become always false.
2606 2 means that COND has been altered. */
2607
2608static int
2609alter_cond (rtx cond)
2610{
2611 int value = 0;
2612
2613 if (cc_status.flags & CC_REVERSED)
2614 {
2615 value = 2;
2616 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2617 }
2618
2619 if (cc_status.flags & CC_INVERTED)
2620 {
2621 value = 2;
2622 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2623 }
2624
2625 if (cc_status.flags & CC_NOT_POSITIVE)
2626 switch (GET_CODE (cond))
2627 {
2628 case LE:
2629 case LEU:
2630 case GEU:
2631 /* Jump becomes unconditional. */
2632 return 1;
2633
2634 case GT:
2635 case GTU:
2636 case LTU:
2637 /* Jump becomes no-op. */
2638 return -1;
2639
2640 case GE:
2641 PUT_CODE (cond, EQ);
2642 value = 2;
2643 break;
2644
2645 case LT:
2646 PUT_CODE (cond, NE);
2647 value = 2;
2648 break;
2649
2650 default:
2651 break;
2652 }
2653
2654 if (cc_status.flags & CC_NOT_NEGATIVE)
2655 switch (GET_CODE (cond))
2656 {
2657 case GE:
2658 case GEU:
2659 /* Jump becomes unconditional. */
2660 return 1;
2661
2662 case LT:
2663 case LTU:
2664 /* Jump becomes no-op. */
2665 return -1;
2666
2667 case LE:
2668 case LEU:
2669 PUT_CODE (cond, EQ);
2670 value = 2;
2671 break;
2672
2673 case GT:
2674 case GTU:
2675 PUT_CODE (cond, NE);
2676 value = 2;
2677 break;
2678
2679 default:
2680 break;
2681 }
2682
2683 if (cc_status.flags & CC_NO_OVERFLOW)
2684 switch (GET_CODE (cond))
2685 {
2686 case GEU:
2687 /* Jump becomes unconditional. */
2688 return 1;
2689
2690 case LEU:
2691 PUT_CODE (cond, EQ);
2692 value = 2;
2693 break;
2694
2695 case GTU:
2696 PUT_CODE (cond, NE);
2697 value = 2;
2698 break;
2699
2700 case LTU:
2701 /* Jump becomes no-op. */
2702 return -1;
2703
2704 default:
2705 break;
2706 }
2707
2708 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2709 switch (GET_CODE (cond))
2710 {
2711 default:
| 2611 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2612 break;
2613
2614 case SUBREG:
2615 return alter_subreg (xp);
2616
2617 default:
2618 break;
2619 }
2620
2621 return *xp;
2622}
2623
2624#ifdef HAVE_cc0
2625
2626/* Given BODY, the body of a jump instruction, alter the jump condition
2627 as required by the bits that are set in cc_status.flags.
2628 Not all of the bits there can be handled at this level in all cases.
2629
2630 The value is normally 0.
2631 1 means that the condition has become always true.
2632 -1 means that the condition has become always false.
2633 2 means that COND has been altered. */
2634
2635static int
2636alter_cond (rtx cond)
2637{
2638 int value = 0;
2639
2640 if (cc_status.flags & CC_REVERSED)
2641 {
2642 value = 2;
2643 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2644 }
2645
2646 if (cc_status.flags & CC_INVERTED)
2647 {
2648 value = 2;
2649 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2650 }
2651
2652 if (cc_status.flags & CC_NOT_POSITIVE)
2653 switch (GET_CODE (cond))
2654 {
2655 case LE:
2656 case LEU:
2657 case GEU:
2658 /* Jump becomes unconditional. */
2659 return 1;
2660
2661 case GT:
2662 case GTU:
2663 case LTU:
2664 /* Jump becomes no-op. */
2665 return -1;
2666
2667 case GE:
2668 PUT_CODE (cond, EQ);
2669 value = 2;
2670 break;
2671
2672 case LT:
2673 PUT_CODE (cond, NE);
2674 value = 2;
2675 break;
2676
2677 default:
2678 break;
2679 }
2680
2681 if (cc_status.flags & CC_NOT_NEGATIVE)
2682 switch (GET_CODE (cond))
2683 {
2684 case GE:
2685 case GEU:
2686 /* Jump becomes unconditional. */
2687 return 1;
2688
2689 case LT:
2690 case LTU:
2691 /* Jump becomes no-op. */
2692 return -1;
2693
2694 case LE:
2695 case LEU:
2696 PUT_CODE (cond, EQ);
2697 value = 2;
2698 break;
2699
2700 case GT:
2701 case GTU:
2702 PUT_CODE (cond, NE);
2703 value = 2;
2704 break;
2705
2706 default:
2707 break;
2708 }
2709
2710 if (cc_status.flags & CC_NO_OVERFLOW)
2711 switch (GET_CODE (cond))
2712 {
2713 case GEU:
2714 /* Jump becomes unconditional. */
2715 return 1;
2716
2717 case LEU:
2718 PUT_CODE (cond, EQ);
2719 value = 2;
2720 break;
2721
2722 case GTU:
2723 PUT_CODE (cond, NE);
2724 value = 2;
2725 break;
2726
2727 case LTU:
2728 /* Jump becomes no-op. */
2729 return -1;
2730
2731 default:
2732 break;
2733 }
2734
2735 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2736 switch (GET_CODE (cond))
2737 {
2738 default:
|
2712 abort ();
| 2739 gcc_unreachable ();
|
2713
2714 case NE:
2715 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2716 value = 2;
2717 break;
2718
2719 case EQ:
2720 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2721 value = 2;
2722 break;
2723 }
2724
2725 if (cc_status.flags & CC_NOT_SIGNED)
2726 /* The flags are valid if signed condition operators are converted
2727 to unsigned. */
2728 switch (GET_CODE (cond))
2729 {
2730 case LE:
2731 PUT_CODE (cond, LEU);
2732 value = 2;
2733 break;
2734
2735 case LT:
2736 PUT_CODE (cond, LTU);
2737 value = 2;
2738 break;
2739
2740 case GT:
2741 PUT_CODE (cond, GTU);
2742 value = 2;
2743 break;
2744
2745 case GE:
2746 PUT_CODE (cond, GEU);
2747 value = 2;
2748 break;
2749
2750 default:
2751 break;
2752 }
2753
2754 return value;
2755}
2756#endif
2757
2758/* Report inconsistency between the assembler template and the operands.
2759 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2760
2761void
| 2740
2741 case NE:
2742 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2743 value = 2;
2744 break;
2745
2746 case EQ:
2747 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2748 value = 2;
2749 break;
2750 }
2751
2752 if (cc_status.flags & CC_NOT_SIGNED)
2753 /* The flags are valid if signed condition operators are converted
2754 to unsigned. */
2755 switch (GET_CODE (cond))
2756 {
2757 case LE:
2758 PUT_CODE (cond, LEU);
2759 value = 2;
2760 break;
2761
2762 case LT:
2763 PUT_CODE (cond, LTU);
2764 value = 2;
2765 break;
2766
2767 case GT:
2768 PUT_CODE (cond, GTU);
2769 value = 2;
2770 break;
2771
2772 case GE:
2773 PUT_CODE (cond, GEU);
2774 value = 2;
2775 break;
2776
2777 default:
2778 break;
2779 }
2780
2781 return value;
2782}
2783#endif
2784
2785/* Report inconsistency between the assembler template and the operands.
2786 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2787
2788void
|
2762output_operand_lossage (const char *msgid, ...)
| 2789output_operand_lossage (const char *cmsgid, ...)
|
2763{
2764 char *fmt_string;
2765 char *new_message;
2766 const char *pfx_str;
2767 va_list ap;
2768
| 2790{
2791 char *fmt_string;
2792 char *new_message;
2793 const char *pfx_str;
2794 va_list ap;
2795
|
2769 va_start (ap, msgid);
| 2796 va_start (ap, cmsgid);
|
2770
| 2797
|
2771 pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: ";
2772 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
| 2798 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
2799 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
|
2773 vasprintf (&new_message, fmt_string, ap);
2774
2775 if (this_is_asm_operands)
2776 error_for_asm (this_is_asm_operands, "%s", new_message);
2777 else
2778 internal_error ("%s", new_message);
2779
2780 free (fmt_string);
2781 free (new_message);
2782 va_end (ap);
2783}
2784
2785/* Output of assembler code from a template, and its subroutines. */
2786
2787/* Annotate the assembly with a comment describing the pattern and
2788 alternative used. */
2789
2790static void
2791output_asm_name (void)
2792{
2793 if (debug_insn)
2794 {
2795 int num = INSN_CODE (debug_insn);
2796 fprintf (asm_out_file, "\t%s %d\t%s",
2797 ASM_COMMENT_START, INSN_UID (debug_insn),
2798 insn_data[num].name);
2799 if (insn_data[num].n_alternatives > 1)
2800 fprintf (asm_out_file, "/%d", which_alternative + 1);
2801#ifdef HAVE_ATTR_length
2802 fprintf (asm_out_file, "\t[length = %d]",
2803 get_attr_length (debug_insn));
2804#endif
2805 /* Clear this so only the first assembler insn
2806 of any rtl insn will get the special comment for -dp. */
2807 debug_insn = 0;
2808 }
2809}
2810
2811/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2812 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2813 corresponds to the address of the object and 0 if to the object. */
2814
2815static tree
2816get_mem_expr_from_op (rtx op, int *paddressp)
2817{
2818 tree expr;
2819 int inner_addressp;
2820
2821 *paddressp = 0;
2822
| 2800 vasprintf (&new_message, fmt_string, ap);
2801
2802 if (this_is_asm_operands)
2803 error_for_asm (this_is_asm_operands, "%s", new_message);
2804 else
2805 internal_error ("%s", new_message);
2806
2807 free (fmt_string);
2808 free (new_message);
2809 va_end (ap);
2810}
2811
2812/* Output of assembler code from a template, and its subroutines. */
2813
2814/* Annotate the assembly with a comment describing the pattern and
2815 alternative used. */
2816
2817static void
2818output_asm_name (void)
2819{
2820 if (debug_insn)
2821 {
2822 int num = INSN_CODE (debug_insn);
2823 fprintf (asm_out_file, "\t%s %d\t%s",
2824 ASM_COMMENT_START, INSN_UID (debug_insn),
2825 insn_data[num].name);
2826 if (insn_data[num].n_alternatives > 1)
2827 fprintf (asm_out_file, "/%d", which_alternative + 1);
2828#ifdef HAVE_ATTR_length
2829 fprintf (asm_out_file, "\t[length = %d]",
2830 get_attr_length (debug_insn));
2831#endif
2832 /* Clear this so only the first assembler insn
2833 of any rtl insn will get the special comment for -dp. */
2834 debug_insn = 0;
2835 }
2836}
2837
2838/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2839 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2840 corresponds to the address of the object and 0 if to the object. */
2841
2842static tree
2843get_mem_expr_from_op (rtx op, int *paddressp)
2844{
2845 tree expr;
2846 int inner_addressp;
2847
2848 *paddressp = 0;
2849
|
2823 if (GET_CODE (op) == REG)
| 2850 if (REG_P (op))
|
2824 return REG_EXPR (op);
| 2851 return REG_EXPR (op);
|
2825 else if (GET_CODE (op) != MEM)
| 2852 else if (!MEM_P (op))
|
2826 return 0;
2827
2828 if (MEM_EXPR (op) != 0)
2829 return MEM_EXPR (op);
2830
2831 /* Otherwise we have an address, so indicate it and look at the address. */
2832 *paddressp = 1;
2833 op = XEXP (op, 0);
2834
2835 /* First check if we have a decl for the address, then look at the right side
2836 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2837 But don't allow the address to itself be indirect. */
2838 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
2839 return expr;
2840 else if (GET_CODE (op) == PLUS
2841 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
2842 return expr;
2843
| 2853 return 0;
2854
2855 if (MEM_EXPR (op) != 0)
2856 return MEM_EXPR (op);
2857
2858 /* Otherwise we have an address, so indicate it and look at the address. */
2859 *paddressp = 1;
2860 op = XEXP (op, 0);
2861
2862 /* First check if we have a decl for the address, then look at the right side
2863 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2864 But don't allow the address to itself be indirect. */
2865 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
2866 return expr;
2867 else if (GET_CODE (op) == PLUS
2868 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
2869 return expr;
2870
|
2844 while (GET_RTX_CLASS (GET_CODE (op)) == '1'
2845 || GET_RTX_CLASS (GET_CODE (op)) == '2')
| 2871 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
2872 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
|
2846 op = XEXP (op, 0);
2847
2848 expr = get_mem_expr_from_op (op, &inner_addressp);
2849 return inner_addressp ? 0 : expr;
2850}
2851
2852/* Output operand names for assembler instructions. OPERANDS is the
2853 operand vector, OPORDER is the order to write the operands, and NOPS
2854 is the number of operands to write. */
2855
2856static void
2857output_asm_operand_names (rtx *operands, int *oporder, int nops)
2858{
2859 int wrote = 0;
2860 int i;
2861
2862 for (i = 0; i < nops; i++)
2863 {
2864 int addressp;
2865 rtx op = operands[oporder[i]];
2866 tree expr = get_mem_expr_from_op (op, &addressp);
2867
2868 fprintf (asm_out_file, "%c%s",
2869 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2870 wrote = 1;
2871 if (expr)
2872 {
2873 fprintf (asm_out_file, "%s",
2874 addressp ? "*" : "");
2875 print_mem_expr (asm_out_file, expr);
2876 wrote = 1;
2877 }
2878 else if (REG_P (op) && ORIGINAL_REGNO (op)
2879 && ORIGINAL_REGNO (op) != REGNO (op))
2880 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2881 }
2882}
2883
2884/* Output text from TEMPLATE to the assembler output file,
2885 obeying %-directions to substitute operands taken from
2886 the vector OPERANDS.
2887
2888 %N (for N a digit) means print operand N in usual manner.
2889 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2890 and print the label name with no punctuation.
2891 %cN means require operand N to be a constant
2892 and print the constant expression with no punctuation.
2893 %aN means expect operand N to be a memory address
2894 (not a memory reference!) and print a reference
2895 to that address.
2896 %nN means expect operand N to be a constant
2897 and print a constant expression for minus the value
2898 of the operand, with no other punctuation. */
2899
2900void
2901output_asm_insn (const char *template, rtx *operands)
2902{
2903 const char *p;
2904 int c;
2905#ifdef ASSEMBLER_DIALECT
2906 int dialect = 0;
2907#endif
2908 int oporder[MAX_RECOG_OPERANDS];
2909 char opoutput[MAX_RECOG_OPERANDS];
2910 int ops = 0;
2911
2912 /* An insn may return a null string template
2913 in a case where no assembler code is needed. */
2914 if (*template == 0)
2915 return;
2916
2917 memset (opoutput, 0, sizeof opoutput);
2918 p = template;
2919 putc ('\t', asm_out_file);
2920
2921#ifdef ASM_OUTPUT_OPCODE
2922 ASM_OUTPUT_OPCODE (asm_out_file, p);
2923#endif
2924
2925 while ((c = *p++))
2926 switch (c)
2927 {
2928 case '\n':
2929 if (flag_verbose_asm)
2930 output_asm_operand_names (operands, oporder, ops);
2931 if (flag_print_asm_name)
2932 output_asm_name ();
2933
2934 ops = 0;
2935 memset (opoutput, 0, sizeof opoutput);
2936
2937 putc (c, asm_out_file);
2938#ifdef ASM_OUTPUT_OPCODE
2939 while ((c = *p) == '\t')
2940 {
2941 putc (c, asm_out_file);
2942 p++;
2943 }
2944 ASM_OUTPUT_OPCODE (asm_out_file, p);
2945#endif
2946 break;
2947
2948#ifdef ASSEMBLER_DIALECT
2949 case '{':
2950 {
2951 int i;
2952
2953 if (dialect)
2954 output_operand_lossage ("nested assembly dialect alternatives");
2955 else
2956 dialect = 1;
2957
2958 /* If we want the first dialect, do nothing. Otherwise, skip
2959 DIALECT_NUMBER of strings ending with '|'. */
2960 for (i = 0; i < dialect_number; i++)
2961 {
2962 while (*p && *p != '}' && *p++ != '|')
2963 ;
2964 if (*p == '}')
2965 break;
2966 if (*p == '|')
2967 p++;
2968 }
2969
2970 if (*p == '\0')
2971 output_operand_lossage ("unterminated assembly dialect alternative");
2972 }
2973 break;
2974
2975 case '|':
2976 if (dialect)
2977 {
2978 /* Skip to close brace. */
2979 do
2980 {
2981 if (*p == '\0')
2982 {
2983 output_operand_lossage ("unterminated assembly dialect alternative");
2984 break;
2985 }
2986 }
2987 while (*p++ != '}');
2988 dialect = 0;
2989 }
2990 else
2991 putc (c, asm_out_file);
2992 break;
2993
2994 case '}':
2995 if (! dialect)
2996 putc (c, asm_out_file);
2997 dialect = 0;
2998 break;
2999#endif
3000
3001 case '%':
3002 /* %% outputs a single %. */
3003 if (*p == '%')
3004 {
3005 p++;
3006 putc (c, asm_out_file);
3007 }
3008 /* %= outputs a number which is unique to each insn in the entire
3009 compilation. This is useful for making local labels that are
3010 referred to more than once in a given insn. */
3011 else if (*p == '=')
3012 {
3013 p++;
3014 fprintf (asm_out_file, "%d", insn_counter);
3015 }
3016 /* % followed by a letter and some digits
3017 outputs an operand in a special way depending on the letter.
3018 Letters `acln' are implemented directly.
3019 Other letters are passed to `output_operand' so that
3020 the PRINT_OPERAND macro can define them. */
3021 else if (ISALPHA (*p))
3022 {
3023 int letter = *p++;
| 2873 op = XEXP (op, 0);
2874
2875 expr = get_mem_expr_from_op (op, &inner_addressp);
2876 return inner_addressp ? 0 : expr;
2877}
2878
2879/* Output operand names for assembler instructions. OPERANDS is the
2880 operand vector, OPORDER is the order to write the operands, and NOPS
2881 is the number of operands to write. */
2882
2883static void
2884output_asm_operand_names (rtx *operands, int *oporder, int nops)
2885{
2886 int wrote = 0;
2887 int i;
2888
2889 for (i = 0; i < nops; i++)
2890 {
2891 int addressp;
2892 rtx op = operands[oporder[i]];
2893 tree expr = get_mem_expr_from_op (op, &addressp);
2894
2895 fprintf (asm_out_file, "%c%s",
2896 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2897 wrote = 1;
2898 if (expr)
2899 {
2900 fprintf (asm_out_file, "%s",
2901 addressp ? "*" : "");
2902 print_mem_expr (asm_out_file, expr);
2903 wrote = 1;
2904 }
2905 else if (REG_P (op) && ORIGINAL_REGNO (op)
2906 && ORIGINAL_REGNO (op) != REGNO (op))
2907 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2908 }
2909}
2910
2911/* Output text from TEMPLATE to the assembler output file,
2912 obeying %-directions to substitute operands taken from
2913 the vector OPERANDS.
2914
2915 %N (for N a digit) means print operand N in usual manner.
2916 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2917 and print the label name with no punctuation.
2918 %cN means require operand N to be a constant
2919 and print the constant expression with no punctuation.
2920 %aN means expect operand N to be a memory address
2921 (not a memory reference!) and print a reference
2922 to that address.
2923 %nN means expect operand N to be a constant
2924 and print a constant expression for minus the value
2925 of the operand, with no other punctuation. */
2926
2927void
2928output_asm_insn (const char *template, rtx *operands)
2929{
2930 const char *p;
2931 int c;
2932#ifdef ASSEMBLER_DIALECT
2933 int dialect = 0;
2934#endif
2935 int oporder[MAX_RECOG_OPERANDS];
2936 char opoutput[MAX_RECOG_OPERANDS];
2937 int ops = 0;
2938
2939 /* An insn may return a null string template
2940 in a case where no assembler code is needed. */
2941 if (*template == 0)
2942 return;
2943
2944 memset (opoutput, 0, sizeof opoutput);
2945 p = template;
2946 putc ('\t', asm_out_file);
2947
2948#ifdef ASM_OUTPUT_OPCODE
2949 ASM_OUTPUT_OPCODE (asm_out_file, p);
2950#endif
2951
2952 while ((c = *p++))
2953 switch (c)
2954 {
2955 case '\n':
2956 if (flag_verbose_asm)
2957 output_asm_operand_names (operands, oporder, ops);
2958 if (flag_print_asm_name)
2959 output_asm_name ();
2960
2961 ops = 0;
2962 memset (opoutput, 0, sizeof opoutput);
2963
2964 putc (c, asm_out_file);
2965#ifdef ASM_OUTPUT_OPCODE
2966 while ((c = *p) == '\t')
2967 {
2968 putc (c, asm_out_file);
2969 p++;
2970 }
2971 ASM_OUTPUT_OPCODE (asm_out_file, p);
2972#endif
2973 break;
2974
2975#ifdef ASSEMBLER_DIALECT
2976 case '{':
2977 {
2978 int i;
2979
2980 if (dialect)
2981 output_operand_lossage ("nested assembly dialect alternatives");
2982 else
2983 dialect = 1;
2984
2985 /* If we want the first dialect, do nothing. Otherwise, skip
2986 DIALECT_NUMBER of strings ending with '|'. */
2987 for (i = 0; i < dialect_number; i++)
2988 {
2989 while (*p && *p != '}' && *p++ != '|')
2990 ;
2991 if (*p == '}')
2992 break;
2993 if (*p == '|')
2994 p++;
2995 }
2996
2997 if (*p == '\0')
2998 output_operand_lossage ("unterminated assembly dialect alternative");
2999 }
3000 break;
3001
3002 case '|':
3003 if (dialect)
3004 {
3005 /* Skip to close brace. */
3006 do
3007 {
3008 if (*p == '\0')
3009 {
3010 output_operand_lossage ("unterminated assembly dialect alternative");
3011 break;
3012 }
3013 }
3014 while (*p++ != '}');
3015 dialect = 0;
3016 }
3017 else
3018 putc (c, asm_out_file);
3019 break;
3020
3021 case '}':
3022 if (! dialect)
3023 putc (c, asm_out_file);
3024 dialect = 0;
3025 break;
3026#endif
3027
3028 case '%':
3029 /* %% outputs a single %. */
3030 if (*p == '%')
3031 {
3032 p++;
3033 putc (c, asm_out_file);
3034 }
3035 /* %= outputs a number which is unique to each insn in the entire
3036 compilation. This is useful for making local labels that are
3037 referred to more than once in a given insn. */
3038 else if (*p == '=')
3039 {
3040 p++;
3041 fprintf (asm_out_file, "%d", insn_counter);
3042 }
3043 /* % followed by a letter and some digits
3044 outputs an operand in a special way depending on the letter.
3045 Letters `acln' are implemented directly.
3046 Other letters are passed to `output_operand' so that
3047 the PRINT_OPERAND macro can define them. */
3048 else if (ISALPHA (*p))
3049 {
3050 int letter = *p++;
|
3024 c = atoi (p);
| 3051 unsigned long opnum;
3052 char *endptr;
|
3025
| 3053
|
3026 if (! ISDIGIT (*p))
3027 output_operand_lossage ("operand number missing after %%-letter");
3028 else if (this_is_asm_operands
3029 && (c < 0 || (unsigned int) c >= insn_noperands))
| 3054 opnum = strtoul (p, &endptr, 10);
3055
3056 if (endptr == p)
3057 output_operand_lossage ("operand number missing "
3058 "after %%-letter");
3059 else if (this_is_asm_operands && opnum >= insn_noperands)
|
3030 output_operand_lossage ("operand number out of range");
3031 else if (letter == 'l')
| 3060 output_operand_lossage ("operand number out of range");
3061 else if (letter == 'l')
|
3032 output_asm_label (operands[c]);
| 3062 output_asm_label (operands[opnum]);
|
3033 else if (letter == 'a')
| 3063 else if (letter == 'a')
|
3034 output_address (operands[c]);
| 3064 output_address (operands[opnum]);
|
3035 else if (letter == 'c')
3036 {
| 3065 else if (letter == 'c')
3066 {
|
3037 if (CONSTANT_ADDRESS_P (operands[c]))
3038 output_addr_const (asm_out_file, operands[c]);
| 3067 if (CONSTANT_ADDRESS_P (operands[opnum]))
3068 output_addr_const (asm_out_file, operands[opnum]);
|
3039 else
| 3069 else
|
3040 output_operand (operands[c], 'c');
| 3070 output_operand (operands[opnum], 'c');
|
3041 }
3042 else if (letter == 'n')
3043 {
| 3071 }
3072 else if (letter == 'n')
3073 {
|
3044 if (GET_CODE (operands[c]) == CONST_INT)
| 3074 if (GET_CODE (operands[opnum]) == CONST_INT)
|
3045 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
| 3075 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
|
3046 - INTVAL (operands[c]));
| 3076 - INTVAL (operands[opnum]));
|
3047 else
3048 {
3049 putc ('-', asm_out_file);
| 3077 else
3078 {
3079 putc ('-', asm_out_file);
|
3050 output_addr_const (asm_out_file, operands[c]);
| 3080 output_addr_const (asm_out_file, operands[opnum]);
|
3051 }
3052 }
3053 else
| 3081 }
3082 }
3083 else
|
3054 output_operand (operands[c], letter);
| 3084 output_operand (operands[opnum], letter);
|
3055
| 3085
|
3056 if (!opoutput[c])
3057 oporder[ops++] = c;
3058 opoutput[c] = 1;
| 3086 if (!opoutput[opnum])
3087 oporder[ops++] = opnum;
3088 opoutput[opnum] = 1;
|
3059
| 3089
|
3060 while (ISDIGIT (c = *p))
3061 p++;
| 3090 p = endptr;
3091 c = *p;
|
3062 }
3063 /* % followed by a digit outputs an operand the default way. */
3064 else if (ISDIGIT (*p))
3065 {
| 3092 }
3093 /* % followed by a digit outputs an operand the default way. */
3094 else if (ISDIGIT (*p))
3095 {
|
3066 c = atoi (p);
3067 if (this_is_asm_operands
3068 && (c < 0 || (unsigned int) c >= insn_noperands))
| 3096 unsigned long opnum;
3097 char *endptr;
3098
3099 opnum = strtoul (p, &endptr, 10);
3100 if (this_is_asm_operands && opnum >= insn_noperands)
|
3069 output_operand_lossage ("operand number out of range");
3070 else
| 3101 output_operand_lossage ("operand number out of range");
3102 else
|
3071 output_operand (operands[c], 0);
| 3103 output_operand (operands[opnum], 0);
|
3072
| 3104
|
3073 if (!opoutput[c])
3074 oporder[ops++] = c;
3075 opoutput[c] = 1;
| 3105 if (!opoutput[opnum])
3106 oporder[ops++] = opnum;
3107 opoutput[opnum] = 1;
|
3076
| 3108
|
3077 while (ISDIGIT (c = *p))
3078 p++;
| 3109 p = endptr;
3110 c = *p;
|
3079 }
3080 /* % followed by punctuation: output something for that
3081 punctuation character alone, with no operand.
3082 The PRINT_OPERAND macro decides what is actually done. */
3083#ifdef PRINT_OPERAND_PUNCT_VALID_P
3084 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3085 output_operand (NULL_RTX, *p++);
3086#endif
3087 else
3088 output_operand_lossage ("invalid %%-code");
3089 break;
3090
3091 default:
3092 putc (c, asm_out_file);
3093 }
3094
3095 /* Write out the variable names for operands, if we know them. */
3096 if (flag_verbose_asm)
3097 output_asm_operand_names (operands, oporder, ops);
3098 if (flag_print_asm_name)
3099 output_asm_name ();
3100
3101 putc ('\n', asm_out_file);
3102}
3103
3104/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3105
3106void
3107output_asm_label (rtx x)
3108{
3109 char buf[256];
3110
3111 if (GET_CODE (x) == LABEL_REF)
3112 x = XEXP (x, 0);
| 3111 }
3112 /* % followed by punctuation: output something for that
3113 punctuation character alone, with no operand.
3114 The PRINT_OPERAND macro decides what is actually done. */
3115#ifdef PRINT_OPERAND_PUNCT_VALID_P
3116 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3117 output_operand (NULL_RTX, *p++);
3118#endif
3119 else
3120 output_operand_lossage ("invalid %%-code");
3121 break;
3122
3123 default:
3124 putc (c, asm_out_file);
3125 }
3126
3127 /* Write out the variable names for operands, if we know them. */
3128 if (flag_verbose_asm)
3129 output_asm_operand_names (operands, oporder, ops);
3130 if (flag_print_asm_name)
3131 output_asm_name ();
3132
3133 putc ('\n', asm_out_file);
3134}
3135
3136/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3137
3138void
3139output_asm_label (rtx x)
3140{
3141 char buf[256];
3142
3143 if (GET_CODE (x) == LABEL_REF)
3144 x = XEXP (x, 0);
|
3113 if (GET_CODE (x) == CODE_LABEL
3114 || (GET_CODE (x) == NOTE
| 3145 if (LABEL_P (x)
3146 || (NOTE_P (x)
|
3115 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3116 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3117 else
| 3147 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3148 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3149 else
|
3118 output_operand_lossage ("`%%l' operand isn't a label");
| 3150 output_operand_lossage ("'%%l' operand isn't a label");
|
3119
3120 assemble_name (asm_out_file, buf);
3121}
3122
3123/* Print operand X using machine-dependent assembler syntax.
3124 The macro PRINT_OPERAND is defined just to control this function.
3125 CODE is a non-digit that preceded the operand-number in the % spec,
3126 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3127 between the % and the digits.
3128 When CODE is a non-letter, X is 0.
3129
3130 The meanings of the letters are machine-dependent and controlled
3131 by PRINT_OPERAND. */
3132
3133static void
3134output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3135{
3136 if (x && GET_CODE (x) == SUBREG)
3137 x = alter_subreg (&x);
3138
| 3151
3152 assemble_name (asm_out_file, buf);
3153}
3154
3155/* Print operand X using machine-dependent assembler syntax.
3156 The macro PRINT_OPERAND is defined just to control this function.
3157 CODE is a non-digit that preceded the operand-number in the % spec,
3158 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3159 between the % and the digits.
3160 When CODE is a non-letter, X is 0.
3161
3162 The meanings of the letters are machine-dependent and controlled
3163 by PRINT_OPERAND. */
3164
3165static void
3166output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3167{
3168 if (x && GET_CODE (x) == SUBREG)
3169 x = alter_subreg (&x);
3170
|
3139 /* If X is a pseudo-register, abort now rather than writing trash to the
3140 assembler file. */
| 3171 /* X must not be a pseudo reg. */
3172 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
|
3141
| 3173
|
3142 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3143 abort ();
3144
| |
3145 PRINT_OPERAND (asm_out_file, x, code);
3146}
3147
3148/* Print a memory reference operand for address X
3149 using machine-dependent assembler syntax.
3150 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3151
3152void
3153output_address (rtx x)
3154{
3155 walk_alter_subreg (&x);
3156 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3157}
3158
3159/* Print an integer constant expression in assembler syntax.
3160 Addition and subtraction are the only arithmetic
3161 that may appear in these expressions. */
3162
3163void
3164output_addr_const (FILE *file, rtx x)
3165{
3166 char buf[256];
3167
3168 restart:
3169 switch (GET_CODE (x))
3170 {
3171 case PC:
3172 putc ('.', file);
3173 break;
3174
3175 case SYMBOL_REF:
| 3174 PRINT_OPERAND (asm_out_file, x, code);
3175}
3176
3177/* Print a memory reference operand for address X
3178 using machine-dependent assembler syntax.
3179 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3180
3181void
3182output_address (rtx x)
3183{
3184 walk_alter_subreg (&x);
3185 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3186}
3187
3188/* Print an integer constant expression in assembler syntax.
3189 Addition and subtraction are the only arithmetic
3190 that may appear in these expressions. */
3191
3192void
3193output_addr_const (FILE *file, rtx x)
3194{
3195 char buf[256];
3196
3197 restart:
3198 switch (GET_CODE (x))
3199 {
3200 case PC:
3201 putc ('.', file);
3202 break;
3203
3204 case SYMBOL_REF:
|
| 3205 if (SYMBOL_REF_DECL (x))
3206 mark_decl_referenced (SYMBOL_REF_DECL (x));
|
3176#ifdef ASM_OUTPUT_SYMBOL_REF
3177 ASM_OUTPUT_SYMBOL_REF (file, x);
3178#else
3179 assemble_name (file, XSTR (x, 0));
3180#endif
3181 break;
3182
3183 case LABEL_REF:
3184 x = XEXP (x, 0);
3185 /* Fall through. */
3186 case CODE_LABEL:
3187 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3188#ifdef ASM_OUTPUT_LABEL_REF
3189 ASM_OUTPUT_LABEL_REF (file, buf);
3190#else
3191 assemble_name (file, buf);
3192#endif
3193 break;
3194
3195 case CONST_INT:
3196 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3197 break;
3198
3199 case CONST:
3200 /* This used to output parentheses around the expression,
3201 but that does not work on the 386 (either ATT or BSD assembler). */
3202 output_addr_const (file, XEXP (x, 0));
3203 break;
3204
3205 case CONST_DOUBLE:
3206 if (GET_MODE (x) == VOIDmode)
3207 {
3208 /* We can use %d if the number is one word and positive. */
3209 if (CONST_DOUBLE_HIGH (x))
3210 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3211 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3212 else if (CONST_DOUBLE_LOW (x) < 0)
3213 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3214 else
3215 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3216 }
3217 else
3218 /* We can't handle floating point constants;
3219 PRINT_OPERAND must handle them. */
3220 output_operand_lossage ("floating constant misused");
3221 break;
3222
3223 case PLUS:
3224 /* Some assemblers need integer constants to appear last (eg masm). */
3225 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3226 {
3227 output_addr_const (file, XEXP (x, 1));
3228 if (INTVAL (XEXP (x, 0)) >= 0)
3229 fprintf (file, "+");
3230 output_addr_const (file, XEXP (x, 0));
3231 }
3232 else
3233 {
3234 output_addr_const (file, XEXP (x, 0));
3235 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3236 || INTVAL (XEXP (x, 1)) >= 0)
3237 fprintf (file, "+");
3238 output_addr_const (file, XEXP (x, 1));
3239 }
3240 break;
3241
3242 case MINUS:
3243 /* Avoid outputting things like x-x or x+5-x,
3244 since some assemblers can't handle that. */
3245 x = simplify_subtraction (x);
3246 if (GET_CODE (x) != MINUS)
3247 goto restart;
3248
3249 output_addr_const (file, XEXP (x, 0));
3250 fprintf (file, "-");
3251 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3252 || GET_CODE (XEXP (x, 1)) == PC
3253 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3254 output_addr_const (file, XEXP (x, 1));
3255 else
3256 {
3257 fputs (targetm.asm_out.open_paren, file);
3258 output_addr_const (file, XEXP (x, 1));
3259 fputs (targetm.asm_out.close_paren, file);
3260 }
3261 break;
3262
3263 case ZERO_EXTEND:
3264 case SIGN_EXTEND:
3265 case SUBREG:
3266 output_addr_const (file, XEXP (x, 0));
3267 break;
3268
3269 default:
3270#ifdef OUTPUT_ADDR_CONST_EXTRA
3271 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3272 break;
3273
3274 fail:
3275#endif
3276 output_operand_lossage ("invalid expression as operand");
3277 }
3278}
3279
3280/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3281 %R prints the value of REGISTER_PREFIX.
3282 %L prints the value of LOCAL_LABEL_PREFIX.
3283 %U prints the value of USER_LABEL_PREFIX.
3284 %I prints the value of IMMEDIATE_PREFIX.
3285 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3286 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3287
3288 We handle alternate assembler dialects here, just like output_asm_insn. */
3289
3290void
3291asm_fprintf (FILE *file, const char *p, ...)
3292{
3293 char buf[10];
3294 char *q, c;
3295 va_list argptr;
3296
3297 va_start (argptr, p);
3298
3299 buf[0] = '%';
3300
3301 while ((c = *p++))
3302 switch (c)
3303 {
3304#ifdef ASSEMBLER_DIALECT
3305 case '{':
3306 {
3307 int i;
3308
3309 /* If we want the first dialect, do nothing. Otherwise, skip
3310 DIALECT_NUMBER of strings ending with '|'. */
3311 for (i = 0; i < dialect_number; i++)
3312 {
3313 while (*p && *p++ != '|')
3314 ;
3315
3316 if (*p == '|')
3317 p++;
3318 }
3319 }
3320 break;
3321
3322 case '|':
3323 /* Skip to close brace. */
3324 while (*p && *p++ != '}')
3325 ;
3326 break;
3327
3328 case '}':
3329 break;
3330#endif
3331
3332 case '%':
3333 c = *p++;
3334 q = &buf[1];
3335 while (strchr ("-+ #0", c))
3336 {
3337 *q++ = c;
3338 c = *p++;
3339 }
3340 while (ISDIGIT (c) || c == '.')
3341 {
3342 *q++ = c;
3343 c = *p++;
3344 }
3345 switch (c)
3346 {
3347 case '%':
3348 putc ('%', file);
3349 break;
3350
3351 case 'd': case 'i': case 'u':
3352 case 'x': case 'X': case 'o':
3353 case 'c':
3354 *q++ = c;
3355 *q = 0;
3356 fprintf (file, buf, va_arg (argptr, int));
3357 break;
3358
3359 case 'w':
3360 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3361 'o' cases, but we do not check for those cases. It
3362 means that the value is a HOST_WIDE_INT, which may be
3363 either `long' or `long long'. */
3364 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3365 q += strlen (HOST_WIDE_INT_PRINT);
3366 *q++ = *p++;
3367 *q = 0;
3368 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3369 break;
3370
3371 case 'l':
3372 *q++ = c;
3373#ifdef HAVE_LONG_LONG
3374 if (*p == 'l')
3375 {
3376 *q++ = *p++;
3377 *q++ = *p++;
3378 *q = 0;
3379 fprintf (file, buf, va_arg (argptr, long long));
3380 }
3381 else
3382#endif
3383 {
3384 *q++ = *p++;
3385 *q = 0;
3386 fprintf (file, buf, va_arg (argptr, long));
3387 }
3388
3389 break;
3390
3391 case 's':
3392 *q++ = c;
3393 *q = 0;
3394 fprintf (file, buf, va_arg (argptr, char *));
3395 break;
3396
3397 case 'O':
3398#ifdef ASM_OUTPUT_OPCODE
3399 ASM_OUTPUT_OPCODE (asm_out_file, p);
3400#endif
3401 break;
3402
3403 case 'R':
3404#ifdef REGISTER_PREFIX
3405 fprintf (file, "%s", REGISTER_PREFIX);
3406#endif
3407 break;
3408
3409 case 'I':
3410#ifdef IMMEDIATE_PREFIX
3411 fprintf (file, "%s", IMMEDIATE_PREFIX);
3412#endif
3413 break;
3414
3415 case 'L':
3416#ifdef LOCAL_LABEL_PREFIX
3417 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3418#endif
3419 break;
3420
3421 case 'U':
3422 fputs (user_label_prefix, file);
3423 break;
3424
3425#ifdef ASM_FPRINTF_EXTENSIONS
3426 /* Uppercase letters are reserved for general use by asm_fprintf
3427 and so are not available to target specific code. In order to
3428 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3429 they are defined here. As they get turned into real extensions
3430 to asm_fprintf they should be removed from this list. */
3431 case 'A': case 'B': case 'C': case 'D': case 'E':
3432 case 'F': case 'G': case 'H': case 'J': case 'K':
3433 case 'M': case 'N': case 'P': case 'Q': case 'S':
3434 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3435 break;
3436
3437 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3438#endif
3439 default:
| 3207#ifdef ASM_OUTPUT_SYMBOL_REF
3208 ASM_OUTPUT_SYMBOL_REF (file, x);
3209#else
3210 assemble_name (file, XSTR (x, 0));
3211#endif
3212 break;
3213
3214 case LABEL_REF:
3215 x = XEXP (x, 0);
3216 /* Fall through. */
3217 case CODE_LABEL:
3218 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3219#ifdef ASM_OUTPUT_LABEL_REF
3220 ASM_OUTPUT_LABEL_REF (file, buf);
3221#else
3222 assemble_name (file, buf);
3223#endif
3224 break;
3225
3226 case CONST_INT:
3227 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3228 break;
3229
3230 case CONST:
3231 /* This used to output parentheses around the expression,
3232 but that does not work on the 386 (either ATT or BSD assembler). */
3233 output_addr_const (file, XEXP (x, 0));
3234 break;
3235
3236 case CONST_DOUBLE:
3237 if (GET_MODE (x) == VOIDmode)
3238 {
3239 /* We can use %d if the number is one word and positive. */
3240 if (CONST_DOUBLE_HIGH (x))
3241 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3242 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3243 else if (CONST_DOUBLE_LOW (x) < 0)
3244 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3245 else
3246 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3247 }
3248 else
3249 /* We can't handle floating point constants;
3250 PRINT_OPERAND must handle them. */
3251 output_operand_lossage ("floating constant misused");
3252 break;
3253
3254 case PLUS:
3255 /* Some assemblers need integer constants to appear last (eg masm). */
3256 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3257 {
3258 output_addr_const (file, XEXP (x, 1));
3259 if (INTVAL (XEXP (x, 0)) >= 0)
3260 fprintf (file, "+");
3261 output_addr_const (file, XEXP (x, 0));
3262 }
3263 else
3264 {
3265 output_addr_const (file, XEXP (x, 0));
3266 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3267 || INTVAL (XEXP (x, 1)) >= 0)
3268 fprintf (file, "+");
3269 output_addr_const (file, XEXP (x, 1));
3270 }
3271 break;
3272
3273 case MINUS:
3274 /* Avoid outputting things like x-x or x+5-x,
3275 since some assemblers can't handle that. */
3276 x = simplify_subtraction (x);
3277 if (GET_CODE (x) != MINUS)
3278 goto restart;
3279
3280 output_addr_const (file, XEXP (x, 0));
3281 fprintf (file, "-");
3282 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3283 || GET_CODE (XEXP (x, 1)) == PC
3284 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3285 output_addr_const (file, XEXP (x, 1));
3286 else
3287 {
3288 fputs (targetm.asm_out.open_paren, file);
3289 output_addr_const (file, XEXP (x, 1));
3290 fputs (targetm.asm_out.close_paren, file);
3291 }
3292 break;
3293
3294 case ZERO_EXTEND:
3295 case SIGN_EXTEND:
3296 case SUBREG:
3297 output_addr_const (file, XEXP (x, 0));
3298 break;
3299
3300 default:
3301#ifdef OUTPUT_ADDR_CONST_EXTRA
3302 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3303 break;
3304
3305 fail:
3306#endif
3307 output_operand_lossage ("invalid expression as operand");
3308 }
3309}
3310
3311/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3312 %R prints the value of REGISTER_PREFIX.
3313 %L prints the value of LOCAL_LABEL_PREFIX.
3314 %U prints the value of USER_LABEL_PREFIX.
3315 %I prints the value of IMMEDIATE_PREFIX.
3316 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3317 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3318
3319 We handle alternate assembler dialects here, just like output_asm_insn. */
3320
3321void
3322asm_fprintf (FILE *file, const char *p, ...)
3323{
3324 char buf[10];
3325 char *q, c;
3326 va_list argptr;
3327
3328 va_start (argptr, p);
3329
3330 buf[0] = '%';
3331
3332 while ((c = *p++))
3333 switch (c)
3334 {
3335#ifdef ASSEMBLER_DIALECT
3336 case '{':
3337 {
3338 int i;
3339
3340 /* If we want the first dialect, do nothing. Otherwise, skip
3341 DIALECT_NUMBER of strings ending with '|'. */
3342 for (i = 0; i < dialect_number; i++)
3343 {
3344 while (*p && *p++ != '|')
3345 ;
3346
3347 if (*p == '|')
3348 p++;
3349 }
3350 }
3351 break;
3352
3353 case '|':
3354 /* Skip to close brace. */
3355 while (*p && *p++ != '}')
3356 ;
3357 break;
3358
3359 case '}':
3360 break;
3361#endif
3362
3363 case '%':
3364 c = *p++;
3365 q = &buf[1];
3366 while (strchr ("-+ #0", c))
3367 {
3368 *q++ = c;
3369 c = *p++;
3370 }
3371 while (ISDIGIT (c) || c == '.')
3372 {
3373 *q++ = c;
3374 c = *p++;
3375 }
3376 switch (c)
3377 {
3378 case '%':
3379 putc ('%', file);
3380 break;
3381
3382 case 'd': case 'i': case 'u':
3383 case 'x': case 'X': case 'o':
3384 case 'c':
3385 *q++ = c;
3386 *q = 0;
3387 fprintf (file, buf, va_arg (argptr, int));
3388 break;
3389
3390 case 'w':
3391 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3392 'o' cases, but we do not check for those cases. It
3393 means that the value is a HOST_WIDE_INT, which may be
3394 either `long' or `long long'. */
3395 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3396 q += strlen (HOST_WIDE_INT_PRINT);
3397 *q++ = *p++;
3398 *q = 0;
3399 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3400 break;
3401
3402 case 'l':
3403 *q++ = c;
3404#ifdef HAVE_LONG_LONG
3405 if (*p == 'l')
3406 {
3407 *q++ = *p++;
3408 *q++ = *p++;
3409 *q = 0;
3410 fprintf (file, buf, va_arg (argptr, long long));
3411 }
3412 else
3413#endif
3414 {
3415 *q++ = *p++;
3416 *q = 0;
3417 fprintf (file, buf, va_arg (argptr, long));
3418 }
3419
3420 break;
3421
3422 case 's':
3423 *q++ = c;
3424 *q = 0;
3425 fprintf (file, buf, va_arg (argptr, char *));
3426 break;
3427
3428 case 'O':
3429#ifdef ASM_OUTPUT_OPCODE
3430 ASM_OUTPUT_OPCODE (asm_out_file, p);
3431#endif
3432 break;
3433
3434 case 'R':
3435#ifdef REGISTER_PREFIX
3436 fprintf (file, "%s", REGISTER_PREFIX);
3437#endif
3438 break;
3439
3440 case 'I':
3441#ifdef IMMEDIATE_PREFIX
3442 fprintf (file, "%s", IMMEDIATE_PREFIX);
3443#endif
3444 break;
3445
3446 case 'L':
3447#ifdef LOCAL_LABEL_PREFIX
3448 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3449#endif
3450 break;
3451
3452 case 'U':
3453 fputs (user_label_prefix, file);
3454 break;
3455
3456#ifdef ASM_FPRINTF_EXTENSIONS
3457 /* Uppercase letters are reserved for general use by asm_fprintf
3458 and so are not available to target specific code. In order to
3459 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3460 they are defined here. As they get turned into real extensions
3461 to asm_fprintf they should be removed from this list. */
3462 case 'A': case 'B': case 'C': case 'D': case 'E':
3463 case 'F': case 'G': case 'H': case 'J': case 'K':
3464 case 'M': case 'N': case 'P': case 'Q': case 'S':
3465 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3466 break;
3467
3468 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3469#endif
3470 default:
|
3440 abort ();
| 3471 gcc_unreachable ();
|
3441 }
3442 break;
3443
3444 default:
3445 putc (c, file);
3446 }
3447 va_end (argptr);
3448}
3449
3450/* Split up a CONST_DOUBLE or integer constant rtx
3451 into two rtx's for single words,
3452 storing in *FIRST the word that comes first in memory in the target
3453 and in *SECOND the other. */
3454
3455void
3456split_double (rtx value, rtx *first, rtx *second)
3457{
3458 if (GET_CODE (value) == CONST_INT)
3459 {
3460 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3461 {
3462 /* In this case the CONST_INT holds both target words.
3463 Extract the bits from it into two word-sized pieces.
3464 Sign extend each half to HOST_WIDE_INT. */
3465 unsigned HOST_WIDE_INT low, high;
3466 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3467
3468 /* Set sign_bit to the most significant bit of a word. */
3469 sign_bit = 1;
3470 sign_bit <<= BITS_PER_WORD - 1;
3471
3472 /* Set mask so that all bits of the word are set. We could
3473 have used 1 << BITS_PER_WORD instead of basing the
3474 calculation on sign_bit. However, on machines where
3475 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3476 compiler warning, even though the code would never be
3477 executed. */
3478 mask = sign_bit << 1;
3479 mask--;
3480
3481 /* Set sign_extend as any remaining bits. */
3482 sign_extend = ~mask;
3483
3484 /* Pick the lower word and sign-extend it. */
3485 low = INTVAL (value);
3486 low &= mask;
3487 if (low & sign_bit)
3488 low |= sign_extend;
3489
3490 /* Pick the higher word, shifted to the least significant
3491 bits, and sign-extend it. */
3492 high = INTVAL (value);
3493 high >>= BITS_PER_WORD - 1;
3494 high >>= 1;
3495 high &= mask;
3496 if (high & sign_bit)
3497 high |= sign_extend;
3498
3499 /* Store the words in the target machine order. */
3500 if (WORDS_BIG_ENDIAN)
3501 {
3502 *first = GEN_INT (high);
3503 *second = GEN_INT (low);
3504 }
3505 else
3506 {
3507 *first = GEN_INT (low);
3508 *second = GEN_INT (high);
3509 }
3510 }
3511 else
3512 {
3513 /* The rule for using CONST_INT for a wider mode
3514 is that we regard the value as signed.
3515 So sign-extend it. */
3516 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3517 if (WORDS_BIG_ENDIAN)
3518 {
3519 *first = high;
3520 *second = value;
3521 }
3522 else
3523 {
3524 *first = value;
3525 *second = high;
3526 }
3527 }
3528 }
3529 else if (GET_CODE (value) != CONST_DOUBLE)
3530 {
3531 if (WORDS_BIG_ENDIAN)
3532 {
3533 *first = const0_rtx;
3534 *second = value;
3535 }
3536 else
3537 {
3538 *first = value;
3539 *second = const0_rtx;
3540 }
3541 }
3542 else if (GET_MODE (value) == VOIDmode
3543 /* This is the old way we did CONST_DOUBLE integers. */
3544 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3545 {
3546 /* In an integer, the words are defined as most and least significant.
3547 So order them by the target's convention. */
3548 if (WORDS_BIG_ENDIAN)
3549 {
3550 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3551 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3552 }
3553 else
3554 {
3555 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3556 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3557 }
3558 }
3559 else
3560 {
3561 REAL_VALUE_TYPE r;
3562 long l[2];
3563 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3564
3565 /* Note, this converts the REAL_VALUE_TYPE to the target's
3566 format, splits up the floating point double and outputs
3567 exactly 32 bits of it into each of l[0] and l[1] --
3568 not necessarily BITS_PER_WORD bits. */
3569 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3570
3571 /* If 32 bits is an entire word for the target, but not for the host,
3572 then sign-extend on the host so that the number will look the same
3573 way on the host that it would on the target. See for instance
3574 simplify_unary_operation. The #if is needed to avoid compiler
3575 warnings. */
3576
3577#if HOST_BITS_PER_LONG > 32
3578 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3579 {
3580 if (l[0] & ((long) 1 << 31))
3581 l[0] |= ((long) (-1) << 32);
3582 if (l[1] & ((long) 1 << 31))
3583 l[1] |= ((long) (-1) << 32);
3584 }
3585#endif
3586
| 3472 }
3473 break;
3474
3475 default:
3476 putc (c, file);
3477 }
3478 va_end (argptr);
3479}
3480
3481/* Split up a CONST_DOUBLE or integer constant rtx
3482 into two rtx's for single words,
3483 storing in *FIRST the word that comes first in memory in the target
3484 and in *SECOND the other. */
3485
3486void
3487split_double (rtx value, rtx *first, rtx *second)
3488{
3489 if (GET_CODE (value) == CONST_INT)
3490 {
3491 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3492 {
3493 /* In this case the CONST_INT holds both target words.
3494 Extract the bits from it into two word-sized pieces.
3495 Sign extend each half to HOST_WIDE_INT. */
3496 unsigned HOST_WIDE_INT low, high;
3497 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3498
3499 /* Set sign_bit to the most significant bit of a word. */
3500 sign_bit = 1;
3501 sign_bit <<= BITS_PER_WORD - 1;
3502
3503 /* Set mask so that all bits of the word are set. We could
3504 have used 1 << BITS_PER_WORD instead of basing the
3505 calculation on sign_bit. However, on machines where
3506 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3507 compiler warning, even though the code would never be
3508 executed. */
3509 mask = sign_bit << 1;
3510 mask--;
3511
3512 /* Set sign_extend as any remaining bits. */
3513 sign_extend = ~mask;
3514
3515 /* Pick the lower word and sign-extend it. */
3516 low = INTVAL (value);
3517 low &= mask;
3518 if (low & sign_bit)
3519 low |= sign_extend;
3520
3521 /* Pick the higher word, shifted to the least significant
3522 bits, and sign-extend it. */
3523 high = INTVAL (value);
3524 high >>= BITS_PER_WORD - 1;
3525 high >>= 1;
3526 high &= mask;
3527 if (high & sign_bit)
3528 high |= sign_extend;
3529
3530 /* Store the words in the target machine order. */
3531 if (WORDS_BIG_ENDIAN)
3532 {
3533 *first = GEN_INT (high);
3534 *second = GEN_INT (low);
3535 }
3536 else
3537 {
3538 *first = GEN_INT (low);
3539 *second = GEN_INT (high);
3540 }
3541 }
3542 else
3543 {
3544 /* The rule for using CONST_INT for a wider mode
3545 is that we regard the value as signed.
3546 So sign-extend it. */
3547 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3548 if (WORDS_BIG_ENDIAN)
3549 {
3550 *first = high;
3551 *second = value;
3552 }
3553 else
3554 {
3555 *first = value;
3556 *second = high;
3557 }
3558 }
3559 }
3560 else if (GET_CODE (value) != CONST_DOUBLE)
3561 {
3562 if (WORDS_BIG_ENDIAN)
3563 {
3564 *first = const0_rtx;
3565 *second = value;
3566 }
3567 else
3568 {
3569 *first = value;
3570 *second = const0_rtx;
3571 }
3572 }
3573 else if (GET_MODE (value) == VOIDmode
3574 /* This is the old way we did CONST_DOUBLE integers. */
3575 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3576 {
3577 /* In an integer, the words are defined as most and least significant.
3578 So order them by the target's convention. */
3579 if (WORDS_BIG_ENDIAN)
3580 {
3581 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3582 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3583 }
3584 else
3585 {
3586 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3587 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3588 }
3589 }
3590 else
3591 {
3592 REAL_VALUE_TYPE r;
3593 long l[2];
3594 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3595
3596 /* Note, this converts the REAL_VALUE_TYPE to the target's
3597 format, splits up the floating point double and outputs
3598 exactly 32 bits of it into each of l[0] and l[1] --
3599 not necessarily BITS_PER_WORD bits. */
3600 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3601
3602 /* If 32 bits is an entire word for the target, but not for the host,
3603 then sign-extend on the host so that the number will look the same
3604 way on the host that it would on the target. See for instance
3605 simplify_unary_operation. The #if is needed to avoid compiler
3606 warnings. */
3607
3608#if HOST_BITS_PER_LONG > 32
3609 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3610 {
3611 if (l[0] & ((long) 1 << 31))
3612 l[0] |= ((long) (-1) << 32);
3613 if (l[1] & ((long) 1 << 31))
3614 l[1] |= ((long) (-1) << 32);
3615 }
3616#endif
3617
|
3587 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3588 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
| 3618 *first = GEN_INT (l[0]);
3619 *second = GEN_INT (l[1]);
|
3589 }
3590}
3591
3592/* Return nonzero if this function has no function calls. */
3593
3594int
3595leaf_function_p (void)
3596{
3597 rtx insn;
3598 rtx link;
3599
3600 if (current_function_profile || profile_arc_flag)
3601 return 0;
3602
3603 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3604 {
| 3620 }
3621}
3622
3623/* Return nonzero if this function has no function calls. */
3624
3625int
3626leaf_function_p (void)
3627{
3628 rtx insn;
3629 rtx link;
3630
3631 if (current_function_profile || profile_arc_flag)
3632 return 0;
3633
3634 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3635 {
|
3605 if (GET_CODE (insn) == CALL_INSN
| 3636 if (CALL_P (insn)
|
3606 && ! SIBLING_CALL_P (insn))
3607 return 0;
| 3637 && ! SIBLING_CALL_P (insn))
3638 return 0;
|
3608 if (GET_CODE (insn) == INSN
| 3639 if (NONJUMP_INSN_P (insn)
|
3609 && GET_CODE (PATTERN (insn)) == SEQUENCE
| 3640 && GET_CODE (PATTERN (insn)) == SEQUENCE
|
3610 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
| 3641 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
|
3611 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3612 return 0;
3613 }
3614 for (link = current_function_epilogue_delay_list;
3615 link;
3616 link = XEXP (link, 1))
3617 {
3618 insn = XEXP (link, 0);
3619
| 3642 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3643 return 0;
3644 }
3645 for (link = current_function_epilogue_delay_list;
3646 link;
3647 link = XEXP (link, 1))
3648 {
3649 insn = XEXP (link, 0);
3650
|
3620 if (GET_CODE (insn) == CALL_INSN
| 3651 if (CALL_P (insn)
|
3621 && ! SIBLING_CALL_P (insn))
3622 return 0;
| 3652 && ! SIBLING_CALL_P (insn))
3653 return 0;
|
3623 if (GET_CODE (insn) == INSN
| 3654 if (NONJUMP_INSN_P (insn)
|
3624 && GET_CODE (PATTERN (insn)) == SEQUENCE
| 3655 && GET_CODE (PATTERN (insn)) == SEQUENCE
|
3625 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
| 3656 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
|
3626 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3627 return 0;
3628 }
3629
3630 return 1;
3631}
3632
3633/* Return 1 if branch is a forward branch.
3634 Uses insn_shuid array, so it works only in the final pass. May be used by
3635 output templates to customary add branch prediction hints.
3636 */
3637int
3638final_forward_branch_p (rtx insn)
3639{
3640 int insn_id, label_id;
| 3657 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3658 return 0;
3659 }
3660
3661 return 1;
3662}
3663
3664/* Return 1 if branch is a forward branch.
3665 Uses insn_shuid array, so it works only in the final pass. May be used by
3666 output templates to customary add branch prediction hints.
3667 */
3668int
3669final_forward_branch_p (rtx insn)
3670{
3671 int insn_id, label_id;
|
3641 if (!uid_shuid)
3642 abort ();
| 3672
3673 gcc_assert (uid_shuid);
|
3643 insn_id = INSN_SHUID (insn);
3644 label_id = INSN_SHUID (JUMP_LABEL (insn));
3645 /* We've hit some insns that does not have id information available. */
| 3674 insn_id = INSN_SHUID (insn);
3675 label_id = INSN_SHUID (JUMP_LABEL (insn));
3676 /* We've hit some insns that does not have id information available. */
|
3646 if (!insn_id || !label_id)
3647 abort ();
| 3677 gcc_assert (insn_id && label_id);
|
3648 return insn_id < label_id;
3649}
3650
3651/* On some machines, a function with no call insns
3652 can run faster if it doesn't create its own register window.
3653 When output, the leaf function should use only the "output"
3654 registers. Ordinarily, the function would be compiled to use
3655 the "input" registers to find its arguments; it is a candidate
3656 for leaf treatment if it uses only the "input" registers.
3657 Leaf function treatment means renumbering so the function
3658 uses the "output" registers instead. */
3659
3660#ifdef LEAF_REGISTERS
3661
3662/* Return 1 if this function uses only the registers that can be
3663 safely renumbered. */
3664
3665int
3666only_leaf_regs_used (void)
3667{
3668 int i;
3669 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3670
3671 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3672 if ((regs_ever_live[i] || global_regs[i])
3673 && ! permitted_reg_in_leaf_functions[i])
3674 return 0;
3675
3676 if (current_function_uses_pic_offset_table
3677 && pic_offset_table_rtx != 0
| 3678 return insn_id < label_id;
3679}
3680
3681/* On some machines, a function with no call insns
3682 can run faster if it doesn't create its own register window.
3683 When output, the leaf function should use only the "output"
3684 registers. Ordinarily, the function would be compiled to use
3685 the "input" registers to find its arguments; it is a candidate
3686 for leaf treatment if it uses only the "input" registers.
3687 Leaf function treatment means renumbering so the function
3688 uses the "output" registers instead. */
3689
3690#ifdef LEAF_REGISTERS
3691
3692/* Return 1 if this function uses only the registers that can be
3693 safely renumbered. */
3694
3695int
3696only_leaf_regs_used (void)
3697{
3698 int i;
3699 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3700
3701 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3702 if ((regs_ever_live[i] || global_regs[i])
3703 && ! permitted_reg_in_leaf_functions[i])
3704 return 0;
3705
3706 if (current_function_uses_pic_offset_table
3707 && pic_offset_table_rtx != 0
|
3678 && GET_CODE (pic_offset_table_rtx) == REG
| 3708 && REG_P (pic_offset_table_rtx)
|
3679 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3680 return 0;
3681
3682 return 1;
3683}
3684
3685/* Scan all instructions and renumber all registers into those
3686 available in leaf functions. */
3687
3688static void
3689leaf_renumber_regs (rtx first)
3690{
3691 rtx insn;
3692
3693 /* Renumber only the actual patterns.
3694 The reg-notes can contain frame pointer refs,
3695 and renumbering them could crash, and should not be needed. */
3696 for (insn = first; insn; insn = NEXT_INSN (insn))
3697 if (INSN_P (insn))
3698 leaf_renumber_regs_insn (PATTERN (insn));
3699 for (insn = current_function_epilogue_delay_list;
3700 insn;
3701 insn = XEXP (insn, 1))
3702 if (INSN_P (XEXP (insn, 0)))
3703 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3704}
3705
3706/* Scan IN_RTX and its subexpressions, and renumber all regs into those
3707 available in leaf functions. */
3708
3709void
3710leaf_renumber_regs_insn (rtx in_rtx)
3711{
3712 int i, j;
3713 const char *format_ptr;
3714
3715 if (in_rtx == 0)
3716 return;
3717
3718 /* Renumber all input-registers into output-registers.
3719 renumbered_regs would be 1 for an output-register;
3720 they */
3721
| 3709 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3710 return 0;
3711
3712 return 1;
3713}
3714
3715/* Scan all instructions and renumber all registers into those
3716 available in leaf functions. */
3717
3718static void
3719leaf_renumber_regs (rtx first)
3720{
3721 rtx insn;
3722
3723 /* Renumber only the actual patterns.
3724 The reg-notes can contain frame pointer refs,
3725 and renumbering them could crash, and should not be needed. */
3726 for (insn = first; insn; insn = NEXT_INSN (insn))
3727 if (INSN_P (insn))
3728 leaf_renumber_regs_insn (PATTERN (insn));
3729 for (insn = current_function_epilogue_delay_list;
3730 insn;
3731 insn = XEXP (insn, 1))
3732 if (INSN_P (XEXP (insn, 0)))
3733 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3734}
3735
3736/* Scan IN_RTX and its subexpressions, and renumber all regs into those
3737 available in leaf functions. */
3738
3739void
3740leaf_renumber_regs_insn (rtx in_rtx)
3741{
3742 int i, j;
3743 const char *format_ptr;
3744
3745 if (in_rtx == 0)
3746 return;
3747
3748 /* Renumber all input-registers into output-registers.
3749 renumbered_regs would be 1 for an output-register;
3750 they */
3751
|
3722 if (GET_CODE (in_rtx) == REG)
| 3752 if (REG_P (in_rtx))
|
3723 {
3724 int newreg;
3725
3726 /* Don't renumber the same reg twice. */
3727 if (in_rtx->used)
3728 return;
3729
3730 newreg = REGNO (in_rtx);
3731 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3732 to reach here as part of a REG_NOTE. */
3733 if (newreg >= FIRST_PSEUDO_REGISTER)
3734 {
3735 in_rtx->used = 1;
3736 return;
3737 }
3738 newreg = LEAF_REG_REMAP (newreg);
| 3753 {
3754 int newreg;
3755
3756 /* Don't renumber the same reg twice. */
3757 if (in_rtx->used)
3758 return;
3759
3760 newreg = REGNO (in_rtx);
3761 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3762 to reach here as part of a REG_NOTE. */
3763 if (newreg >= FIRST_PSEUDO_REGISTER)
3764 {
3765 in_rtx->used = 1;
3766 return;
3767 }
3768 newreg = LEAF_REG_REMAP (newreg);
|
3739 if (newreg < 0)
3740 abort ();
| 3769 gcc_assert (newreg >= 0);
|
3741 regs_ever_live[REGNO (in_rtx)] = 0;
3742 regs_ever_live[newreg] = 1;
3743 REGNO (in_rtx) = newreg;
3744 in_rtx->used = 1;
3745 }
3746
3747 if (INSN_P (in_rtx))
3748 {
3749 /* Inside a SEQUENCE, we find insns.
3750 Renumber just the patterns of these insns,
3751 just as we do for the top-level insns. */
3752 leaf_renumber_regs_insn (PATTERN (in_rtx));
3753 return;
3754 }
3755
3756 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3757
3758 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3759 switch (*format_ptr++)
3760 {
3761 case 'e':
3762 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3763 break;
3764
3765 case 'E':
3766 if (NULL != XVEC (in_rtx, i))
3767 {
3768 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3769 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3770 }
3771 break;
3772
3773 case 'S':
3774 case 's':
3775 case '0':
3776 case 'i':
3777 case 'w':
3778 case 'n':
3779 case 'u':
3780 break;
3781
3782 default:
| 3770 regs_ever_live[REGNO (in_rtx)] = 0;
3771 regs_ever_live[newreg] = 1;
3772 REGNO (in_rtx) = newreg;
3773 in_rtx->used = 1;
3774 }
3775
3776 if (INSN_P (in_rtx))
3777 {
3778 /* Inside a SEQUENCE, we find insns.
3779 Renumber just the patterns of these insns,
3780 just as we do for the top-level insns. */
3781 leaf_renumber_regs_insn (PATTERN (in_rtx));
3782 return;
3783 }
3784
3785 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3786
3787 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3788 switch (*format_ptr++)
3789 {
3790 case 'e':
3791 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3792 break;
3793
3794 case 'E':
3795 if (NULL != XVEC (in_rtx, i))
3796 {
3797 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3798 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3799 }
3800 break;
3801
3802 case 'S':
3803 case 's':
3804 case '0':
3805 case 'i':
3806 case 'w':
3807 case 'n':
3808 case 'u':
3809 break;
3810
3811 default:
|
3783 abort ();
| 3812 gcc_unreachable ();
|
3784 }
3785}
3786#endif
3787
3788
3789/* When -gused is used, emit debug info for only used symbols. But in
3790 addition to the standard intercepted debug_hooks there are some direct
3791 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3792 Those routines may also be called from a higher level intercepted routine. So
3793 to prevent recording data for an inner call to one of these for an intercept,
3794 we maintain an intercept nesting counter (debug_nesting). We only save the
3795 intercepted arguments if the nesting is 1. */
3796int debug_nesting = 0;
3797
3798static tree *symbol_queue;
3799int symbol_queue_index = 0;
3800static int symbol_queue_size = 0;
3801
3802/* Generate the symbols for any queued up type symbols we encountered
3803 while generating the type info for some originally used symbol.
3804 This might generate additional entries in the queue. Only when
3805 the nesting depth goes to 0 is this routine called. */
3806
3807void
3808debug_flush_symbol_queue (void)
3809{
3810 int i;
3811
3812 /* Make sure that additionally queued items are not flushed
3813 prematurely. */
3814
3815 ++debug_nesting;
3816
3817 for (i = 0; i < symbol_queue_index; ++i)
3818 {
| 3813 }
3814}
3815#endif
3816
3817
3818/* When -gused is used, emit debug info for only used symbols. But in
3819 addition to the standard intercepted debug_hooks there are some direct
3820 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3821 Those routines may also be called from a higher level intercepted routine. So
3822 to prevent recording data for an inner call to one of these for an intercept,
3823 we maintain an intercept nesting counter (debug_nesting). We only save the
3824 intercepted arguments if the nesting is 1. */
3825int debug_nesting = 0;
3826
3827static tree *symbol_queue;
3828int symbol_queue_index = 0;
3829static int symbol_queue_size = 0;
3830
3831/* Generate the symbols for any queued up type symbols we encountered
3832 while generating the type info for some originally used symbol.
3833 This might generate additional entries in the queue. Only when
3834 the nesting depth goes to 0 is this routine called. */
3835
3836void
3837debug_flush_symbol_queue (void)
3838{
3839 int i;
3840
3841 /* Make sure that additionally queued items are not flushed
3842 prematurely. */
3843
3844 ++debug_nesting;
3845
3846 for (i = 0; i < symbol_queue_index; ++i)
3847 {
|
3819 /* If we pushed queued symbols then such symbols are must be
| 3848 /* If we pushed queued symbols then such symbols must be
|
3820 output no matter what anyone else says. Specifically,
3821 we need to make sure dbxout_symbol() thinks the symbol was
3822 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3823 which may be set for outside reasons. */
3824 int saved_tree_used = TREE_USED (symbol_queue[i]);
3825 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3826 TREE_USED (symbol_queue[i]) = 1;
3827 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3828
3829#ifdef DBX_DEBUGGING_INFO
3830 dbxout_symbol (symbol_queue[i], 0);
3831#endif
3832
3833 TREE_USED (symbol_queue[i]) = saved_tree_used;
3834 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3835 }
3836
3837 symbol_queue_index = 0;
3838 --debug_nesting;
3839}
3840
3841/* Queue a type symbol needed as part of the definition of a decl
3842 symbol. These symbols are generated when debug_flush_symbol_queue()
3843 is called. */
3844
3845void
3846debug_queue_symbol (tree decl)
3847{
3848 if (symbol_queue_index >= symbol_queue_size)
3849 {
3850 symbol_queue_size += 10;
3851 symbol_queue = xrealloc (symbol_queue,
3852 symbol_queue_size * sizeof (tree));
3853 }
3854
3855 symbol_queue[symbol_queue_index++] = decl;
3856}
3857
3858/* Free symbol queue. */
3859void
3860debug_free_queue (void)
3861{
3862 if (symbol_queue)
3863 {
3864 free (symbol_queue);
3865 symbol_queue = NULL;
3866 symbol_queue_size = 0;
3867 }
3868}
| 3849 output no matter what anyone else says. Specifically,
3850 we need to make sure dbxout_symbol() thinks the symbol was
3851 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3852 which may be set for outside reasons. */
3853 int saved_tree_used = TREE_USED (symbol_queue[i]);
3854 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3855 TREE_USED (symbol_queue[i]) = 1;
3856 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3857
3858#ifdef DBX_DEBUGGING_INFO
3859 dbxout_symbol (symbol_queue[i], 0);
3860#endif
3861
3862 TREE_USED (symbol_queue[i]) = saved_tree_used;
3863 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3864 }
3865
3866 symbol_queue_index = 0;
3867 --debug_nesting;
3868}
3869
3870/* Queue a type symbol needed as part of the definition of a decl
3871 symbol. These symbols are generated when debug_flush_symbol_queue()
3872 is called. */
3873
3874void
3875debug_queue_symbol (tree decl)
3876{
3877 if (symbol_queue_index >= symbol_queue_size)
3878 {
3879 symbol_queue_size += 10;
3880 symbol_queue = xrealloc (symbol_queue,
3881 symbol_queue_size * sizeof (tree));
3882 }
3883
3884 symbol_queue[symbol_queue_index++] = decl;
3885}
3886
3887/* Free symbol queue. */
3888void
3889debug_free_queue (void)
3890{
3891 if (symbol_queue)
3892 {
3893 free (symbol_queue);
3894 symbol_queue = NULL;
3895 symbol_queue_size = 0;
3896 }
3897}
|
| 3898
3899/* Turn the RTL into assembly. */
3900static unsigned int
3901rest_of_handle_final (void)
3902{
3903 rtx x;
3904 const char *fnname;
3905
3906 /* Get the function's name, as described by its RTL. This may be
3907 different from the DECL_NAME name used in the source file. */
3908
3909 x = DECL_RTL (current_function_decl);
3910 gcc_assert (MEM_P (x));
3911 x = XEXP (x, 0);
3912 gcc_assert (GET_CODE (x) == SYMBOL_REF);
3913 fnname = XSTR (x, 0);
3914
3915 assemble_start_function (current_function_decl, fnname);
3916 final_start_function (get_insns (), asm_out_file, optimize);
3917 final (get_insns (), asm_out_file, optimize);
3918 final_end_function ();
3919
3920#ifdef TARGET_UNWIND_INFO
3921 /* ??? The IA-64 ".handlerdata" directive must be issued before
3922 the ".endp" directive that closes the procedure descriptor. */
3923 output_function_exception_table ();
3924#endif
3925
3926 assemble_end_function (current_function_decl, fnname);
3927
3928#ifndef TARGET_UNWIND_INFO
3929 /* Otherwise, it feels unclean to switch sections in the middle. */
3930 output_function_exception_table ();
3931#endif
3932
3933 user_defined_section_attribute = false;
3934
3935 if (! quiet_flag)
3936 fflush (asm_out_file);
3937
3938 /* Release all memory allocated by flow. */
3939 free_basic_block_vars ();
3940
3941 /* Write DBX symbols if requested. */
3942
3943 /* Note that for those inline functions where we don't initially
3944 know for certain that we will be generating an out-of-line copy,
3945 the first invocation of this routine (rest_of_compilation) will
3946 skip over this code by doing a `goto exit_rest_of_compilation;'.
3947 Later on, wrapup_global_declarations will (indirectly) call
3948 rest_of_compilation again for those inline functions that need
3949 to have out-of-line copies generated. During that call, we
3950 *will* be routed past here. */
3951
3952 timevar_push (TV_SYMOUT);
3953 (*debug_hooks->function_decl) (current_function_decl);
3954 timevar_pop (TV_SYMOUT);
3955 return 0;
3956}
3957
3958struct tree_opt_pass pass_final =
3959{
3960 NULL, /* name */
3961 NULL, /* gate */
3962 rest_of_handle_final, /* execute */
3963 NULL, /* sub */
3964 NULL, /* next */
3965 0, /* static_pass_number */
3966 TV_FINAL, /* tv_id */
3967 0, /* properties_required */
3968 0, /* properties_provided */
3969 0, /* properties_destroyed */
3970 0, /* todo_flags_start */
3971 TODO_ggc_collect, /* todo_flags_finish */
3972 0 /* letter */
3973};
3974
3975
3976static unsigned int
3977rest_of_handle_shorten_branches (void)
3978{
3979 /* Shorten branches. */
3980 shorten_branches (get_insns ());
3981 return 0;
3982}
3983
3984struct tree_opt_pass pass_shorten_branches =
3985{
3986 "shorten", /* name */
3987 NULL, /* gate */
3988 rest_of_handle_shorten_branches, /* execute */
3989 NULL, /* sub */
3990 NULL, /* next */
3991 0, /* static_pass_number */
3992 TV_FINAL, /* tv_id */
3993 0, /* properties_required */
3994 0, /* properties_provided */
3995 0, /* properties_destroyed */
3996 0, /* todo_flags_start */
3997 TODO_dump_func, /* todo_flags_finish */
3998 0 /* letter */
3999};
4000
4001
4002static unsigned int
4003rest_of_clean_state (void)
4004{
4005 rtx insn, next;
4006
4007 /* It is very important to decompose the RTL instruction chain here:
4008 debug information keeps pointing into CODE_LABEL insns inside the function
4009 body. If these remain pointing to the other insns, we end up preserving
4010 whole RTL chain and attached detailed debug info in memory. */
4011 for (insn = get_insns (); insn; insn = next)
4012 {
4013 next = NEXT_INSN (insn);
4014 NEXT_INSN (insn) = NULL;
4015 PREV_INSN (insn) = NULL;
4016 }
4017
4018 /* In case the function was not output,
4019 don't leave any temporary anonymous types
4020 queued up for sdb output. */
4021#ifdef SDB_DEBUGGING_INFO
4022 if (write_symbols == SDB_DEBUG)
4023 sdbout_types (NULL_TREE);
4024#endif
4025
4026 reload_completed = 0;
4027 epilogue_completed = 0;
4028 flow2_completed = 0;
4029 no_new_pseudos = 0;
4030#ifdef STACK_REGS
4031 regstack_completed = 0;
4032#endif
4033
4034 /* Clear out the insn_length contents now that they are no
4035 longer valid. */
4036 init_insn_lengths ();
4037
4038 /* Show no temporary slots allocated. */
4039 init_temp_slots ();
4040
4041 free_basic_block_vars ();
4042 free_bb_for_insn ();
4043
4044
4045 if (targetm.binds_local_p (current_function_decl))
4046 {
4047 int pref = cfun->preferred_stack_boundary;
4048 if (cfun->stack_alignment_needed > cfun->preferred_stack_boundary)
4049 pref = cfun->stack_alignment_needed;
4050 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4051 = pref;
4052 }
4053
4054 /* Make sure volatile mem refs aren't considered valid operands for
4055 arithmetic insns. We must call this here if this is a nested inline
4056 function, since the above code leaves us in the init_recog state,
4057 and the function context push/pop code does not save/restore volatile_ok.
4058
4059 ??? Maybe it isn't necessary for expand_start_function to call this
4060 anymore if we do it here? */
4061
4062 init_recog_no_volatile ();
4063
4064 /* We're done with this function. Free up memory if we can. */
4065 free_after_parsing (cfun);
4066 free_after_compilation (cfun);
4067 return 0;
4068}
4069
4070struct tree_opt_pass pass_clean_state =
4071{
4072 NULL, /* name */
4073 NULL, /* gate */
4074 rest_of_clean_state, /* execute */
4075 NULL, /* sub */
4076 NULL, /* next */
4077 0, /* static_pass_number */
4078 TV_FINAL, /* tv_id */
4079 0, /* properties_required */
4080 0, /* properties_provided */
4081 PROP_rtl, /* properties_destroyed */
4082 0, /* todo_flags_start */
4083 0, /* todo_flags_finish */
4084 0 /* letter */
4085};
4086
|
| |