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emit-rtl.c (146906) emit-rtl.c (169699)
1/* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1/* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 2, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
20Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
2102110-1301, USA. */
21
22
23/* Middle-to-low level generation of rtx code and insns.
24
22
23
24/* Middle-to-low level generation of rtx code and insns.
25
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
28
28
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
31
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
35 use. */
37
38#include "config.h"
39#include "system.h"
40#include "coretypes.h"
41#include "tm.h"
42#include "toplev.h"
43#include "rtl.h"
44#include "tree.h"

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52#include "insn-config.h"
53#include "recog.h"
54#include "real.h"
55#include "bitmap.h"
56#include "basic-block.h"
57#include "ggc.h"
58#include "debug.h"
59#include "langhooks.h"
36
37#include "config.h"
38#include "system.h"
39#include "coretypes.h"
40#include "tm.h"
41#include "toplev.h"
42#include "rtl.h"
43#include "tree.h"

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51#include "insn-config.h"
52#include "recog.h"
53#include "real.h"
54#include "bitmap.h"
55#include "basic-block.h"
56#include "ggc.h"
57#include "debug.h"
58#include "langhooks.h"
59#include "tree-pass.h"
60
61/* Commonly used modes. */
62
63enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67
68
69/* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
71
72static GTY(()) int label_num = 1;
73
60
61/* Commonly used modes. */
62
63enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67
68
69/* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
71
72static GTY(()) int label_num = 1;
73
74/* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
77
78static int last_label_num;
79
80/* Value label_num had when set_new_last_label_num was called.
81 If label_num has not changed since then, last_label_num is valid. */
82
83static int base_label_num;
84
85/* Nonzero means do not generate NOTEs for source line numbers. */
86
87static int no_line_numbers;
88
89/* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
92 of these. */

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171 htab_t const_double_htab;
172
173#define first_insn (cfun->emit->x_first_insn)
174#define last_insn (cfun->emit->x_last_insn)
175#define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176#define last_location (cfun->emit->x_last_location)
177#define first_label_num (cfun->emit->x_first_label_num)
178
74/* Nonzero means do not generate NOTEs for source line numbers. */
75
76static int no_line_numbers;
77
78/* Commonly used rtx's, so that we only need space for one copy.
79 These are initialized once for the entire compilation.
80 All of these are unique; no other rtx-object will be equal to any
81 of these. */

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160 htab_t const_double_htab;
161
162#define first_insn (cfun->emit->x_first_insn)
163#define last_insn (cfun->emit->x_last_insn)
164#define cur_insn_uid (cfun->emit->x_cur_insn_uid)
165#define last_location (cfun->emit->x_last_location)
166#define first_label_num (cfun->emit->x_first_label_num)
167
179static rtx make_jump_insn_raw (rtx);
180static rtx make_call_insn_raw (rtx);
181static rtx find_line_note (rtx);
182static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183static void unshare_all_decls (tree);
184static void reset_used_decls (tree);
185static void mark_label_nuses (rtx);
186static hashval_t const_int_htab_hash (const void *);
187static int const_int_htab_eq (const void *, const void *);
188static hashval_t const_double_htab_hash (const void *);
189static int const_double_htab_eq (const void *, const void *);
190static rtx lookup_const_double (rtx);
191static hashval_t mem_attrs_htab_hash (const void *);
192static int mem_attrs_htab_eq (const void *, const void *);
193static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
194 enum machine_mode);
195static hashval_t reg_attrs_htab_hash (const void *);
196static int reg_attrs_htab_eq (const void *, const void *);
197static reg_attrs *get_reg_attrs (tree, int);
198static tree component_ref_for_mem_expr (tree);
168static rtx make_call_insn_raw (rtx);
169static rtx find_line_note (rtx);
170static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
171static void unshare_all_decls (tree);
172static void reset_used_decls (tree);
173static void mark_label_nuses (rtx);
174static hashval_t const_int_htab_hash (const void *);
175static int const_int_htab_eq (const void *, const void *);
176static hashval_t const_double_htab_hash (const void *);
177static int const_double_htab_eq (const void *, const void *);
178static rtx lookup_const_double (rtx);
179static hashval_t mem_attrs_htab_hash (const void *);
180static int mem_attrs_htab_eq (const void *, const void *);
181static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
182 enum machine_mode);
183static hashval_t reg_attrs_htab_hash (const void *);
184static int reg_attrs_htab_eq (const void *, const void *);
185static reg_attrs *get_reg_attrs (tree, int);
186static tree component_ref_for_mem_expr (tree);
199static rtx gen_const_vector_0 (enum machine_mode);
200static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
187static rtx gen_const_vector (enum machine_mode, int);
201static void copy_rtx_if_shared_1 (rtx *orig);
202
203/* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205int split_branch_probability = -1;
206
207/* Returns a hash code for X (which is a really a CONST_INT). */
208

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262static hashval_t
263mem_attrs_htab_hash (const void *x)
264{
265 mem_attrs *p = (mem_attrs *) x;
266
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
188static void copy_rtx_if_shared_1 (rtx *orig);
189
190/* Probability of the conditional branch currently proceeded by try_split.
191 Set to -1 otherwise. */
192int split_branch_probability = -1;
193
194/* Returns a hash code for X (which is a really a CONST_INT). */
195

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249static hashval_t
250mem_attrs_htab_hash (const void *x)
251{
252 mem_attrs *p = (mem_attrs *) x;
253
254 return (p->alias ^ (p->align * 1000)
255 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
256 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
270 ^ (size_t) p->expr);
257 ^ (size_t) iterative_hash_expr (p->expr, 0));
271}
272
273/* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
275 mem_attrs *). */
276
277static int
278mem_attrs_htab_eq (const void *x, const void *y)
279{
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
282
258}
259
260/* Returns nonzero if the value represented by X (which is really a
261 mem_attrs *) is the same as that given by Y (which is also really a
262 mem_attrs *). */
263
264static int
265mem_attrs_htab_eq (const void *x, const void *y)
266{
267 mem_attrs *p = (mem_attrs *) x;
268 mem_attrs *q = (mem_attrs *) y;
269
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
270 return (p->alias == q->alias && p->offset == q->offset
271 && p->size == q->size && p->align == q->align
272 && (p->expr == q->expr
273 || (p->expr != NULL_TREE && q->expr != NULL_TREE
274 && operand_equal_p (p->expr, q->expr, 0))));
285}
286
287/* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
289 MEM of mode MODE. */
290
291static mem_attrs *
292get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,

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434/* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
436rtx
437const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
438{
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
441
275}
276
277/* Allocate a new mem_attrs structure and insert it into the hash table if
278 one identical to it is not already in the table. We are doing this for
279 MEM of mode MODE. */
280
281static mem_attrs *
282get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,

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424/* Return a CONST_DOUBLE rtx for a floating-point value specified by
425 VALUE in mode MODE. */
426rtx
427const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
428{
429 rtx real = rtx_alloc (CONST_DOUBLE);
430 PUT_MODE (real, mode);
431
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
432 real->u.rv = value;
443
444 return lookup_const_double (real);
445}
446
447/* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
451
452rtx
453immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
454{
455 rtx value;
456 unsigned int i;
457
433
434 return lookup_const_double (real);
435}
436
437/* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
438 of ints: I0 is the low-order word and I1 is the high-order word.
439 Do not use this routine for non-integer modes; convert to
440 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
441
442rtx
443immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
444{
445 rtx value;
446 unsigned int i;
447
448 /* There are the following cases (note that there are no modes with
449 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
450
451 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
452 gen_int_mode.
453 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
454 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
455 from copies of the sign bit, and sign of i0 and i1 are the same), then
456 we return a CONST_INT for i0.
457 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
458 if (mode != VOIDmode)
459 {
458 if (mode != VOIDmode)
459 {
460 int width;
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
466 abort ();
460 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
461 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
462 /* We can get a 0 for an error mark. */
463 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
464 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
467
465
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
478 i1 = 0;
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
481 abort ();
466 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
467 return gen_int_mode (i0, mode);
482
468
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
486
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
491
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
495
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
497 CONST_INT.
498
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
503 negative number.
504
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
510
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
513
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
469 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
516 }
517
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
520 return GEN_INT (i0);
521
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);

--- 80 unchanged lines hidden (view full) ---

604
605 /* This field is not cleared by the mere allocation of the rtx, so
606 we clear it here. */
607 MEM_ATTRS (rt) = 0;
608
609 return rt;
610}
611
470 }
471
472 /* If this integer fits in one word, return a CONST_INT. */
473 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
474 return GEN_INT (i0);
475
476 /* We use VOIDmode for integers. */
477 value = rtx_alloc (CONST_DOUBLE);

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558
559 /* This field is not cleared by the mere allocation of the rtx, so
560 we clear it here. */
561 MEM_ATTRS (rt) = 0;
562
563 return rt;
564}
565
566/* Generate a memory referring to non-trapping constant memory. */
567
612rtx
568rtx
613gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
569gen_const_mem (enum machine_mode mode, rtx addr)
614{
570{
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
618 abort ();
619
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
623#if 0
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
626 abort ();
627#endif
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
571 rtx mem = gen_rtx_MEM (mode, addr);
572 MEM_READONLY_P (mem) = 1;
573 MEM_NOTRAP_P (mem) = 1;
574 return mem;
629}
630
575}
576
631/* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
577/* Generate a MEM referring to fixed portions of the frame, e.g., register
578 save areas. */
633
634rtx
579
580rtx
635gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
581gen_frame_mem (enum machine_mode mode, rtx addr)
636{
582{
637 enum machine_mode inmode;
638
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
641 inmode = mode;
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
583 rtx mem = gen_rtx_MEM (mode, addr);
584 MEM_NOTRAP_P (mem) = 1;
585 set_mem_alias_set (mem, get_frame_alias_set ());
586 return mem;
644}
587}
645
646/* rtx gen_rtx (code, mode, [element1, ..., elementn])
647**
648** This routine generates an RTX of the size specified by
649** <code>, which is an RTX code. The RTX structure is initialized
650** from the arguments <element1> through <elementn>, which are
651** interpreted according to the specific RTX type's format. The
652** special machine mode associated with the rtx (if any) is specified
653** in <mode>.
654**
655** gen_rtx can be invoked in a way which resembles the lisp-like
656** rtx it will generate. For example, the following rtx structure:
657**
658** (plus:QI (mem:QI (reg:SI 1))
659** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
660**
661** ...would be generated by the following C code:
662**
663** gen_rtx (PLUS, QImode,
664** gen_rtx (MEM, QImode,
665** gen_rtx (REG, SImode, 1)),
666** gen_rtx (MEM, QImode,
667** gen_rtx (PLUS, SImode,
668** gen_rtx (REG, SImode, 2),
669** gen_rtx (REG, SImode, 3)))),
670*/
671
588
672/*VARARGS2*/
589/* Generate a MEM referring to a temporary use of the stack, not part
590 of the fixed stack frame. For example, something which is pushed
591 by a target splitter. */
673rtx
592rtx
674gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
593gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
675{
594{
676 int i; /* Array indices... */
677 const char *fmt; /* Current rtx's format... */
678 rtx rt_val; /* RTX to return to caller... */
679 va_list p;
595 rtx mem = gen_rtx_MEM (mode, addr);
596 MEM_NOTRAP_P (mem) = 1;
597 if (!current_function_calls_alloca)
598 set_mem_alias_set (mem, get_frame_alias_set ());
599 return mem;
600}
680
601
681 va_start (p, mode);
602/* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
603 this construct would be valid, and false otherwise. */
682
604
683 switch (code)
684 {
685 case CONST_INT:
686 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
687 break;
605bool
606validate_subreg (enum machine_mode omode, enum machine_mode imode,
607 rtx reg, unsigned int offset)
608{
609 unsigned int isize = GET_MODE_SIZE (imode);
610 unsigned int osize = GET_MODE_SIZE (omode);
688
611
689 case CONST_DOUBLE:
690 {
691 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
692 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
612 /* All subregs must be aligned. */
613 if (offset % osize != 0)
614 return false;
693
615
694 rt_val = immed_double_const (arg0, arg1, mode);
695 }
696 break;
616 /* The subreg offset cannot be outside the inner object. */
617 if (offset >= isize)
618 return false;
697
619
698 case REG:
699 rt_val = gen_rtx_REG (mode, va_arg (p, int));
700 break;
620 /* ??? This should not be here. Temporarily continue to allow word_mode
621 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
622 Generally, backends are doing something sketchy but it'll take time to
623 fix them all. */
624 if (omode == word_mode)
625 ;
626 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
627 is the culprit here, and not the backends. */
628 else if (osize >= UNITS_PER_WORD && isize >= osize)
629 ;
630 /* Allow component subregs of complex and vector. Though given the below
631 extraction rules, it's not always clear what that means. */
632 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
633 && GET_MODE_INNER (imode) == omode)
634 ;
635 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
636 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
637 represent this. It's questionable if this ought to be represented at
638 all -- why can't this all be hidden in post-reload splitters that make
639 arbitrarily mode changes to the registers themselves. */
640 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
641 ;
642 /* Subregs involving floating point modes are not allowed to
643 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
644 (subreg:SI (reg:DF) 0) isn't. */
645 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
646 {
647 if (isize != osize)
648 return false;
649 }
701
650
702 case MEM:
703 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
704 break;
651 /* Paradoxical subregs must have offset zero. */
652 if (osize > isize)
653 return offset == 0;
705
654
706 default:
707 rt_val = rtx_alloc (code); /* Allocate the storage space. */
708 rt_val->mode = mode; /* Store the machine mode... */
655 /* This is a normal subreg. Verify that the offset is representable. */
709
656
710 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
712 {
713 switch (*fmt++)
714 {
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val, i) = NULL_RTX;
717 break;
657 /* For hard registers, we already have most of these rules collected in
658 subreg_offset_representable_p. */
659 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
660 {
661 unsigned int regno = REGNO (reg);
718
662
719 case 'i': /* An integer? */
720 XINT (rt_val, i) = va_arg (p, int);
721 break;
663#ifdef CANNOT_CHANGE_MODE_CLASS
664 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
665 && GET_MODE_INNER (imode) == omode)
666 ;
667 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
668 return false;
669#endif
722
670
723 case 'w': /* A wide integer? */
724 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
725 break;
671 return subreg_offset_representable_p (regno, imode, offset, omode);
672 }
726
673
727 case 's': /* A string? */
728 XSTR (rt_val, i) = va_arg (p, char *);
729 break;
674 /* For pseudo registers, we want most of the same checks. Namely:
675 If the register no larger than a word, the subreg must be lowpart.
676 If the register is larger than a word, the subreg must be the lowpart
677 of a subword. A subreg does *not* perform arbitrary bit extraction.
678 Given that we've already checked mode/offset alignment, we only have
679 to check subword subregs here. */
680 if (osize < UNITS_PER_WORD)
681 {
682 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
683 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
684 if (offset % UNITS_PER_WORD != low_off)
685 return false;
686 }
687 return true;
688}
730
689
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val, i) = va_arg (p, rtx);
734 break;
690rtx
691gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
692{
693 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
694 return gen_rtx_raw_SUBREG (mode, reg, offset);
695}
735
696
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val, i) = va_arg (p, rtvec);
738 break;
697/* Generate a SUBREG representing the least-significant part of REG if MODE
698 is smaller than mode of REG, otherwise paradoxical SUBREG. */
739
699
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val, i) = va_arg (p, bitmap);
742 break;
700rtx
701gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
702{
703 enum machine_mode inmode;
743
704
744 case 't': /* A tree? */
745 XTREE (rt_val, i) = va_arg (p, tree);
746 break;
747
748 default:
749 abort ();
750 }
751 }
752 break;
753 }
754
755 va_end (p);
756 return rt_val;
705 inmode = GET_MODE (reg);
706 if (inmode == VOIDmode)
707 inmode = mode;
708 return gen_rtx_SUBREG (mode, reg,
709 subreg_lowpart_offset (mode, inmode));
757}
710}
758
711
759/* gen_rtvec (n, [rt1, ..., rtn])
760**
761** This routine creates an rtvec and stores within it the
762** pointers to rtx's which are its arguments.
763*/
764
765/*VARARGS1*/
766rtvec

--- 43 unchanged lines hidden (view full) ---

810rtx
811gen_reg_rtx (enum machine_mode mode)
812{
813 struct function *f = cfun;
814 rtx val;
815
816 /* Don't let anything called after initial flow analysis create new
817 registers. */
712/* gen_rtvec (n, [rt1, ..., rtn])
713**
714** This routine creates an rtvec and stores within it the
715** pointers to rtx's which are its arguments.
716*/
717
718/*VARARGS1*/
719rtvec

--- 43 unchanged lines hidden (view full) ---

763rtx
764gen_reg_rtx (enum machine_mode mode)
765{
766 struct function *f = cfun;
767 rtx val;
768
769 /* Don't let anything called after initial flow analysis create new
770 registers. */
818 if (no_new_pseudos)
819 abort ();
771 gcc_assert (!no_new_pseudos);
820
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
824 {
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,

--- 28 unchanged lines hidden (view full) ---

856 f->emit->regno_pointer_align_length = old_size * 2;
857 }
858
859 val = gen_raw_REG (mode, reg_rtx_no);
860 regno_reg_rtx[reg_rtx_no++] = val;
861 return val;
862}
863
772
773 if (generating_concat_p
774 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
775 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
776 {
777 /* For complex modes, don't make a single pseudo.
778 Instead, make a CONCAT of two pseudos.
779 This allows noncontiguous allocation of the real and imaginary parts,

--- 28 unchanged lines hidden (view full) ---

808 f->emit->regno_pointer_align_length = old_size * 2;
809 }
810
811 val = gen_raw_REG (mode, reg_rtx_no);
812 regno_reg_rtx[reg_rtx_no++] = val;
813 return val;
814}
815
864/* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
816/* Generate a register with same attributes as REG, but offsetted by OFFSET.
817 Do the big endian correction if needed. */
866
867rtx
868gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
869{
870 rtx new = gen_rtx_REG (mode, regno);
818
819rtx
820gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
821{
822 rtx new = gen_rtx_REG (mode, regno);
823 tree decl;
824 HOST_WIDE_INT var_size;
825
826 /* PR middle-end/14084
827 The problem appears when a variable is stored in a larger register
828 and later it is used in the original mode or some mode in between
829 or some part of variable is accessed.
830
831 On little endian machines there is no problem because
832 the REG_OFFSET of the start of the variable is the same when
833 accessed in any mode (it is 0).
834
835 However, this is not true on big endian machines.
836 The offset of the start of the variable is different when accessed
837 in different modes.
838 When we are taking a part of the REG we have to change the OFFSET
839 from offset WRT size of mode of REG to offset WRT size of variable.
840
841 If we would not do the big endian correction the resulting REG_OFFSET
842 would be larger than the size of the DECL.
843
844 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
845
846 REG.mode MODE DECL size old offset new offset description
847 DI SI 4 4 0 int32 in SImode
848 DI SI 1 4 0 char in SImode
849 DI QI 1 7 0 char in QImode
850 DI QI 4 5 1 1st element in QImode
851 of char[4]
852 DI HI 4 6 2 1st element in HImode
853 of int16[2]
854
855 If the size of DECL is equal or greater than the size of REG
856 we can't do this correction because the register holds the
857 whole variable or a part of the variable and thus the REG_OFFSET
858 is already correct. */
859
860 decl = REG_EXPR (reg);
861 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
862 && decl != NULL
863 && offset > 0
864 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
865 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
866 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
867 {
868 int offset_le;
869
870 /* Convert machine endian to little endian WRT size of mode of REG. */
871 if (WORDS_BIG_ENDIAN)
872 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
873 / UNITS_PER_WORD) * UNITS_PER_WORD;
874 else
875 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
876
877 if (BYTES_BIG_ENDIAN)
878 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
879 % UNITS_PER_WORD);
880 else
881 offset_le += offset % UNITS_PER_WORD;
882
883 if (offset_le >= var_size)
884 {
885 /* MODE is wider than the variable so the new reg will cover
886 the whole variable so the resulting OFFSET should be 0. */
887 offset = 0;
888 }
889 else
890 {
891 /* Convert little endian to machine endian WRT size of variable. */
892 if (WORDS_BIG_ENDIAN)
893 offset = ((var_size - 1 - offset_le)
894 / UNITS_PER_WORD) * UNITS_PER_WORD;
895 else
896 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
897
898 if (BYTES_BIG_ENDIAN)
899 offset += ((var_size - 1 - offset_le)
900 % UNITS_PER_WORD);
901 else
902 offset += offset_le % UNITS_PER_WORD;
903 }
904 }
905
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
872 REG_OFFSET (reg) + offset);
873 return new;
874}
875
876/* Set the decl for MEM to DECL. */
877
878void

--- 5 unchanged lines hidden (view full) ---

884}
885
886/* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
888
889void
890set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
891{
906 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
907 REG_OFFSET (reg) + offset);
908 return new;
909}
910
911/* Set the decl for MEM to DECL. */
912
913void

--- 5 unchanged lines hidden (view full) ---

919}
920
921/* Set the register attributes for registers contained in PARM_RTX.
922 Use needed values from memory attributes of MEM. */
923
924void
925set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
926{
892 if (GET_CODE (parm_rtx) == REG)
927 if (REG_P (parm_rtx))
893 set_reg_attrs_from_mem (parm_rtx, mem);
894 else if (GET_CODE (parm_rtx) == PARALLEL)
895 {
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
899 for (; i < XVECLEN (parm_rtx, 0); i++)
900 {
901 rtx x = XVECEXP (parm_rtx, 0, i);
928 set_reg_attrs_from_mem (parm_rtx, mem);
929 else if (GET_CODE (parm_rtx) == PARALLEL)
930 {
931 /* Check for a NULL entry in the first slot, used to indicate that the
932 parameter goes both on the stack and in registers. */
933 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
934 for (; i < XVECLEN (parm_rtx, 0); i++)
935 {
936 rtx x = XVECEXP (parm_rtx, 0, i);
902 if (GET_CODE (XEXP (x, 0)) == REG)
937 if (REG_P (XEXP (x, 0)))
903 REG_ATTRS (XEXP (x, 0))
904 = get_reg_attrs (MEM_EXPR (mem),
905 INTVAL (XEXP (x, 1)));
906 }
907 }
908}
909
910/* Assign the RTX X to declaration T. */
911void
912set_decl_rtl (tree t, rtx x)
913{
938 REG_ATTRS (XEXP (x, 0))
939 = get_reg_attrs (MEM_EXPR (mem),
940 INTVAL (XEXP (x, 1)));
941 }
942 }
943}
944
945/* Assign the RTX X to declaration T. */
946void
947set_decl_rtl (tree t, rtx x)
948{
914 DECL_CHECK (t)->decl.rtl = x;
949 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
915
916 if (!x)
917 return;
918 /* For register, we maintain the reverse information too. */
950
951 if (!x)
952 return;
953 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x) == REG)
954 if (REG_P (x))
920 REG_ATTRS (x) = get_reg_attrs (t, 0);
921 else if (GET_CODE (x) == SUBREG)
922 REG_ATTRS (SUBREG_REG (x))
923 = get_reg_attrs (t, -SUBREG_BYTE (x));
924 if (GET_CODE (x) == CONCAT)
925 {
926 if (REG_P (XEXP (x, 0)))
927 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);

--- 8 unchanged lines hidden (view full) ---

936 {
937 rtx y = XVECEXP (x, 0, i);
938 if (REG_P (XEXP (y, 0)))
939 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
940 }
941 }
942}
943
955 REG_ATTRS (x) = get_reg_attrs (t, 0);
956 else if (GET_CODE (x) == SUBREG)
957 REG_ATTRS (SUBREG_REG (x))
958 = get_reg_attrs (t, -SUBREG_BYTE (x));
959 if (GET_CODE (x) == CONCAT)
960 {
961 if (REG_P (XEXP (x, 0)))
962 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);

--- 8 unchanged lines hidden (view full) ---

971 {
972 rtx y = XVECEXP (x, 0, i);
973 if (REG_P (XEXP (y, 0)))
974 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
975 }
976 }
977}
978
979/* Assign the RTX X to parameter declaration T. */
980void
981set_decl_incoming_rtl (tree t, rtx x)
982{
983 DECL_INCOMING_RTL (t) = x;
984
985 if (!x)
986 return;
987 /* For register, we maintain the reverse information too. */
988 if (REG_P (x))
989 REG_ATTRS (x) = get_reg_attrs (t, 0);
990 else if (GET_CODE (x) == SUBREG)
991 REG_ATTRS (SUBREG_REG (x))
992 = get_reg_attrs (t, -SUBREG_BYTE (x));
993 if (GET_CODE (x) == CONCAT)
994 {
995 if (REG_P (XEXP (x, 0)))
996 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
997 if (REG_P (XEXP (x, 1)))
998 REG_ATTRS (XEXP (x, 1))
999 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1000 }
1001 if (GET_CODE (x) == PARALLEL)
1002 {
1003 int i, start;
1004
1005 /* Check for a NULL entry, used to indicate that the parameter goes
1006 both on the stack and in registers. */
1007 if (XEXP (XVECEXP (x, 0, 0), 0))
1008 start = 0;
1009 else
1010 start = 1;
1011
1012 for (i = start; i < XVECLEN (x, 0); i++)
1013 {
1014 rtx y = XVECEXP (x, 0, i);
1015 if (REG_P (XEXP (y, 0)))
1016 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1017 }
1018 }
1019}
1020
944/* Identify REG (which may be a CONCAT) as a user register. */
945
946void
947mark_user_reg (rtx reg)
948{
949 if (GET_CODE (reg) == CONCAT)
950 {
951 REG_USERVAR_P (XEXP (reg, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg, 1)) = 1;
953 }
1021/* Identify REG (which may be a CONCAT) as a user register. */
1022
1023void
1024mark_user_reg (rtx reg)
1025{
1026 if (GET_CODE (reg) == CONCAT)
1027 {
1028 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1029 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1030 }
954 else if (GET_CODE (reg) == REG)
955 REG_USERVAR_P (reg) = 1;
956 else
1031 else
957 abort ();
1032 {
1033 gcc_assert (REG_P (reg));
1034 REG_USERVAR_P (reg) = 1;
1035 }
958}
959
960/* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
962
963void
964mark_reg_pointer (rtx reg, int align)
965{

--- 17 unchanged lines hidden (view full) ---

983 return reg_rtx_no;
984}
985
986/* Return 1 + the largest label number used so far in the current function. */
987
988int
989max_label_num (void)
990{
1036}
1037
1038/* Identify REG as a probable pointer register and show its alignment
1039 as ALIGN, if nonzero. */
1040
1041void
1042mark_reg_pointer (rtx reg, int align)
1043{

--- 17 unchanged lines hidden (view full) ---

1061 return reg_rtx_no;
1062}
1063
1064/* Return 1 + the largest label number used so far in the current function. */
1065
1066int
1067max_label_num (void)
1068{
991 if (last_label_num && label_num == base_label_num)
992 return last_label_num;
993 return label_num;
994}
995
996/* Return first label number used in this function (if any were used). */
997
998int
999get_first_label_num (void)
1000{
1001 return first_label_num;
1002}
1069 return label_num;
1070}
1071
1072/* Return first label number used in this function (if any were used). */
1073
1074int
1075get_first_label_num (void)
1076{
1077 return first_label_num;
1078}
1003
1004/* Return the final regno of X, which is a SUBREG of a hard
1005 register. */
1006int
1007subreg_hard_regno (rtx x, int check_mode)
1008{
1009 enum machine_mode mode = GET_MODE (x);
1010 unsigned int byte_offset, base_regno, final_regno;
1011 rtx reg = SUBREG_REG (x);
1012
1079
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x) != SUBREG
1016 || GET_CODE (reg) != REG)
1017 abort ();
1018 base_regno = REGNO (reg);
1019 if (base_regno >= FIRST_PSEUDO_REGISTER)
1020 abort ();
1021 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1022 abort ();
1023#ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1025 SUBREG_BYTE (x), mode))
1026 abort ();
1027#endif
1028 /* Catch non-congruent offsets too. */
1029 byte_offset = SUBREG_BYTE (x);
1030 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1031 abort ();
1080/* If the rtx for label was created during the expansion of a nested
1081 function, then first_label_num won't include this label number.
1082 Fix this now so that array indicies work later. */
1032
1083
1033 final_regno = subreg_regno (x);
1034
1035 return final_regno;
1084void
1085maybe_set_first_label_num (rtx x)
1086{
1087 if (CODE_LABEL_NUMBER (x) < first_label_num)
1088 first_label_num = CODE_LABEL_NUMBER (x);
1036}
1089}
1037
1090
1038/* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1042
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.

--- 6 unchanged lines hidden (view full) ---

1052 int msize = GET_MODE_SIZE (mode);
1053 int xsize;
1054 int offset = 0;
1055 enum machine_mode innermode;
1056
1057 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1058 so we have to make one up. Yuk. */
1059 innermode = GET_MODE (x);
1091/* Return a value representing some low-order bits of X, where the number
1092 of low-order bits is given by MODE. Note that no conversion is done
1093 between floating-point and fixed-point values, rather, the bit
1094 representation is returned.
1095
1096 This function handles the cases in common between gen_lowpart, below,
1097 and two variants in cse.c and combine.c. These are the cases that can
1098 be safely handled at all points in the compilation.

--- 6 unchanged lines hidden (view full) ---

1105 int msize = GET_MODE_SIZE (mode);
1106 int xsize;
1107 int offset = 0;
1108 enum machine_mode innermode;
1109
1110 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1111 so we have to make one up. Yuk. */
1112 innermode = GET_MODE (x);
1060 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1113 if (GET_CODE (x) == CONST_INT
1114 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1061 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1062 else if (innermode == VOIDmode)
1063 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1064
1065 xsize = GET_MODE_SIZE (innermode);
1066
1115 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1116 else if (innermode == VOIDmode)
1117 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1118
1119 xsize = GET_MODE_SIZE (innermode);
1120
1067 if (innermode == VOIDmode || innermode == BLKmode)
1068 abort ();
1121 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1069
1070 if (innermode == mode)
1071 return x;
1072
1073 /* MODE must occupy no more words than the mode of X. */
1074 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1075 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1076 return 0;
1077
1078 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1122
1123 if (innermode == mode)
1124 return x;
1125
1126 /* MODE must occupy no more words than the mode of X. */
1127 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1128 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1129 return 0;
1130
1131 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1079 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1132 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1080 return 0;
1081
1082 offset = subreg_lowpart_offset (mode, innermode);
1083
1084 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1085 && (GET_MODE_CLASS (mode) == MODE_INT
1086 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1087 {

--- 7 unchanged lines hidden (view full) ---

1095
1096 if (GET_MODE (XEXP (x, 0)) == mode)
1097 return XEXP (x, 0);
1098 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1099 return gen_lowpart_common (mode, XEXP (x, 0));
1100 else if (msize < xsize)
1101 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1102 }
1133 return 0;
1134
1135 offset = subreg_lowpart_offset (mode, innermode);
1136
1137 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1138 && (GET_MODE_CLASS (mode) == MODE_INT
1139 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1140 {

--- 7 unchanged lines hidden (view full) ---

1148
1149 if (GET_MODE (XEXP (x, 0)) == mode)
1150 return XEXP (x, 0);
1151 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1152 return gen_lowpart_common (mode, XEXP (x, 0));
1153 else if (msize < xsize)
1154 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1155 }
1103 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1156 else if (GET_CODE (x) == SUBREG || REG_P (x)
1104 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1105 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1106 return simplify_gen_subreg (mode, x, innermode, offset);
1107
1108 /* Otherwise, we can't do this. */
1109 return 0;
1110}
1111
1157 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1158 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1159 return simplify_gen_subreg (mode, x, innermode, offset);
1160
1161 /* Otherwise, we can't do this. */
1162 return 0;
1163}
1164
1112/* Return the constant real or imaginary part (which has mode MODE)
1113 of a complex value X. The IMAGPART_P argument determines whether
1114 the real or complex component should be returned. This function
1115 returns NULL_RTX if the component isn't a constant. */
1116
1117static rtx
1118gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1119{
1120 tree decl, part;
1121
1122 if (GET_CODE (x) == MEM
1123 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1124 {
1125 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1126 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1127 {
1128 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1129 if (TREE_CODE (part) == REAL_CST
1130 || TREE_CODE (part) == INTEGER_CST)
1131 return expand_expr (part, NULL_RTX, mode, 0);
1132 }
1133 }
1134 return NULL_RTX;
1135}
1136
1137/* Return the real part (which has mode MODE) of a complex value X.
1138 This always comes at the low address in memory. */
1139
1140rtx
1165rtx
1141gen_realpart (enum machine_mode mode, rtx x)
1142{
1143 rtx part;
1144
1145 /* Handle complex constants. */
1146 part = gen_complex_constant_part (mode, x, 0);
1147 if (part != NULL_RTX)
1148 return part;
1149
1150 if (WORDS_BIG_ENDIAN
1151 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1152 && REG_P (x)
1153 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1154 internal_error
1155 ("can't access real part of complex value in hard register");
1156 else if (WORDS_BIG_ENDIAN)
1157 return gen_highpart (mode, x);
1158 else
1159 return gen_lowpart (mode, x);
1160}
1161
1162/* Return the imaginary part (which has mode MODE) of a complex value X.
1163 This always comes at the high address in memory. */
1164
1165rtx
1166gen_imagpart (enum machine_mode mode, rtx x)
1167{
1168 rtx part;
1169
1170 /* Handle complex constants. */
1171 part = gen_complex_constant_part (mode, x, 1);
1172 if (part != NULL_RTX)
1173 return part;
1174
1175 if (WORDS_BIG_ENDIAN)
1176 return gen_lowpart (mode, x);
1177 else if (! WORDS_BIG_ENDIAN
1178 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1179 && REG_P (x)
1180 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1181 internal_error
1182 ("can't access imaginary part of complex value in hard register");
1183 else
1184 return gen_highpart (mode, x);
1185}
1186
1187/* Return 1 iff X, assumed to be a SUBREG,
1188 refers to the real part of the complex value in its containing reg.
1189 Complex values are always stored with the real part in the first word,
1190 regardless of WORDS_BIG_ENDIAN. */
1191
1192int
1193subreg_realpart_p (rtx x)
1194{
1195 if (GET_CODE (x) != SUBREG)
1196 abort ();
1197
1198 return ((unsigned int) SUBREG_BYTE (x)
1199 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1200}
1201
1202/* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1203 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1204 least-significant part of X.
1205 MODE specifies how big a part of X to return;
1206 it usually should not be larger than a word.
1207 If X is a MEM whose address is a QUEUED, the value may be so also. */
1208
1209rtx
1210gen_lowpart (enum machine_mode mode, rtx x)
1211{
1212 rtx result = gen_lowpart_common (mode, x);
1213
1214 if (result)
1215 return result;
1216 else if (GET_CODE (x) == REG)
1217 {
1218 /* Must be a hard reg that's not valid in MODE. */
1219 result = gen_lowpart_common (mode, copy_to_reg (x));
1220 if (result == 0)
1221 abort ();
1222 return result;
1223 }
1224 else if (GET_CODE (x) == MEM)
1225 {
1226 /* The only additional case we can do is MEM. */
1227 int offset = 0;
1228
1229 /* The following exposes the use of "x" to CSE. */
1230 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1231 && SCALAR_INT_MODE_P (GET_MODE (x))
1232 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1233 GET_MODE_BITSIZE (GET_MODE (x)))
1234 && ! no_new_pseudos)
1235 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1236
1237 if (WORDS_BIG_ENDIAN)
1238 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1239 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1240
1241 if (BYTES_BIG_ENDIAN)
1242 /* Adjust the address so that the address-after-the-data
1243 is unchanged. */
1244 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1245 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1246
1247 return adjust_address (x, mode, offset);
1248 }
1249 else if (GET_CODE (x) == ADDRESSOF)
1250 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1251 else
1252 abort ();
1253}
1254
1255/* Like `gen_lowpart', but refer to the most significant part.
1256 This is used to access the imaginary part of a complex number. */
1257
1258rtx
1259gen_highpart (enum machine_mode mode, rtx x)
1260{
1261 unsigned int msize = GET_MODE_SIZE (mode);
1262 rtx result;
1263
1264 /* This case loses if X is a subreg. To catch bugs early,
1265 complain if an invalid MODE is used even in other cases. */
1166gen_highpart (enum machine_mode mode, rtx x)
1167{
1168 unsigned int msize = GET_MODE_SIZE (mode);
1169 rtx result;
1170
1171 /* This case loses if X is a subreg. To catch bugs early,
1172 complain if an invalid MODE is used even in other cases. */
1266 if (msize > UNITS_PER_WORD
1267 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1268 abort ();
1173 gcc_assert (msize <= UNITS_PER_WORD
1174 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1269
1270 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1271 subreg_highpart_offset (mode, GET_MODE (x)));
1175
1176 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1177 subreg_highpart_offset (mode, GET_MODE (x)));
1272
1178 gcc_assert (result);
1179
1273 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1274 the target if we have a MEM. gen_highpart must return a valid operand,
1275 emitting code if necessary to do so. */
1180 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1181 the target if we have a MEM. gen_highpart must return a valid operand,
1182 emitting code if necessary to do so. */
1276 if (result != NULL_RTX && GET_CODE (result) == MEM)
1277 result = validize_mem (result);
1278
1279 if (!result)
1280 abort ();
1183 if (MEM_P (result))
1184 {
1185 result = validize_mem (result);
1186 gcc_assert (result);
1187 }
1188
1281 return result;
1282}
1283
1284/* Like gen_highpart, but accept mode of EXP operand in case EXP can
1285 be VOIDmode constant. */
1286rtx
1287gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1288{
1289 if (GET_MODE (exp) != VOIDmode)
1290 {
1189 return result;
1190}
1191
1192/* Like gen_highpart, but accept mode of EXP operand in case EXP can
1193 be VOIDmode constant. */
1194rtx
1195gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1196{
1197 if (GET_MODE (exp) != VOIDmode)
1198 {
1291 if (GET_MODE (exp) != innermode)
1292 abort ();
1199 gcc_assert (GET_MODE (exp) == innermode);
1293 return gen_highpart (outermode, exp);
1294 }
1295 return simplify_gen_subreg (outermode, exp, innermode,
1296 subreg_highpart_offset (outermode, innermode));
1297}
1298
1299/* Return offset in bytes to get OUTERMODE low part
1300 of the value in mode INNERMODE stored in memory in target format. */

--- 18 unchanged lines hidden (view full) ---

1319/* Return offset in bytes to get OUTERMODE high part
1320 of the value in mode INNERMODE stored in memory in target format. */
1321unsigned int
1322subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1323{
1324 unsigned int offset = 0;
1325 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1326
1200 return gen_highpart (outermode, exp);
1201 }
1202 return simplify_gen_subreg (outermode, exp, innermode,
1203 subreg_highpart_offset (outermode, innermode));
1204}
1205
1206/* Return offset in bytes to get OUTERMODE low part
1207 of the value in mode INNERMODE stored in memory in target format. */

--- 18 unchanged lines hidden (view full) ---

1226/* Return offset in bytes to get OUTERMODE high part
1227 of the value in mode INNERMODE stored in memory in target format. */
1228unsigned int
1229subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1230{
1231 unsigned int offset = 0;
1232 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1233
1327 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1328 abort ();
1234 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1329
1330 if (difference > 0)
1331 {
1332 if (! WORDS_BIG_ENDIAN)
1333 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1334 if (! BYTES_BIG_ENDIAN)
1335 offset += difference % UNITS_PER_WORD;
1336 }

--- 43 unchanged lines hidden (view full) ---

1380 */
1381
1382rtx
1383operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1384{
1385 if (mode == VOIDmode)
1386 mode = GET_MODE (op);
1387
1235
1236 if (difference > 0)
1237 {
1238 if (! WORDS_BIG_ENDIAN)
1239 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1240 if (! BYTES_BIG_ENDIAN)
1241 offset += difference % UNITS_PER_WORD;
1242 }

--- 43 unchanged lines hidden (view full) ---

1286 */
1287
1288rtx
1289operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1290{
1291 if (mode == VOIDmode)
1292 mode = GET_MODE (op);
1293
1388 if (mode == VOIDmode)
1389 abort ();
1294 gcc_assert (mode != VOIDmode);
1390
1391 /* If OP is narrower than a word, fail. */
1392 if (mode != BLKmode
1393 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1394 return 0;
1395
1396 /* If we want a word outside OP, return zero. */
1397 if (mode != BLKmode
1398 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1399 return const0_rtx;
1400
1401 /* Form a new MEM at the requested address. */
1295
1296 /* If OP is narrower than a word, fail. */
1297 if (mode != BLKmode
1298 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1299 return 0;
1300
1301 /* If we want a word outside OP, return zero. */
1302 if (mode != BLKmode
1303 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1304 return const0_rtx;
1305
1306 /* Form a new MEM at the requested address. */
1402 if (GET_CODE (op) == MEM)
1307 if (MEM_P (op))
1403 {
1404 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1405
1406 if (! validate_address)
1407 return new;
1408
1409 else if (reload_completed)
1410 {
1411 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1412 return 0;
1413 }
1414 else
1415 return replace_equiv_address (new, XEXP (new, 0));
1416 }
1417
1418 /* Rest can be handled by simplify_subreg. */
1419 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1420}
1421
1308 {
1309 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1310
1311 if (! validate_address)
1312 return new;
1313
1314 else if (reload_completed)
1315 {
1316 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1317 return 0;
1318 }
1319 else
1320 return replace_equiv_address (new, XEXP (new, 0));
1321 }
1322
1323 /* Rest can be handled by simplify_subreg. */
1324 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1325}
1326
1422/* Similar to `operand_subword', but never return 0. If we can't extract
1423 the required subword, put OP into a register and try again. If that fails,
1424 abort. We always validate the address in this case.
1327/* Similar to `operand_subword', but never return 0. If we can't
1328 extract the required subword, put OP into a register and try again.
1329 The second attempt must succeed. We always validate the address in
1330 this case.
1425
1426 MODE is the mode of OP, in case it is CONST_INT. */
1427
1428rtx
1429operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1430{
1431 rtx result = operand_subword (op, offset, 1, mode);
1432
1433 if (result)
1434 return result;
1435
1436 if (mode != BLKmode && mode != VOIDmode)
1437 {
1438 /* If this is a register which can not be accessed by words, copy it
1439 to a pseudo register. */
1331
1332 MODE is the mode of OP, in case it is CONST_INT. */
1333
1334rtx
1335operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1336{
1337 rtx result = operand_subword (op, offset, 1, mode);
1338
1339 if (result)
1340 return result;
1341
1342 if (mode != BLKmode && mode != VOIDmode)
1343 {
1344 /* If this is a register which can not be accessed by words, copy it
1345 to a pseudo register. */
1440 if (GET_CODE (op) == REG)
1346 if (REG_P (op))
1441 op = copy_to_reg (op);
1442 else
1443 op = force_reg (mode, op);
1444 }
1445
1446 result = operand_subword (op, offset, 1, mode);
1347 op = copy_to_reg (op);
1348 else
1349 op = force_reg (mode, op);
1350 }
1351
1352 result = operand_subword (op, offset, 1, mode);
1447 if (result == 0)
1448 abort ();
1353 gcc_assert (result);
1449
1450 return result;
1451}
1452
1354
1355 return result;
1356}
1357
1453/* Given a compare instruction, swap the operands.
1454 A test instruction is changed into a compare of 0 against the operand. */
1455
1456void
1457reverse_comparison (rtx insn)
1458{
1459 rtx body = PATTERN (insn);
1460 rtx comp;
1461
1462 if (GET_CODE (body) == SET)
1463 comp = SET_SRC (body);
1464 else
1465 comp = SET_SRC (XVECEXP (body, 0, 0));
1466
1467 if (GET_CODE (comp) == COMPARE)
1468 {
1469 rtx op0 = XEXP (comp, 0);
1470 rtx op1 = XEXP (comp, 1);
1471 XEXP (comp, 0) = op1;
1472 XEXP (comp, 1) = op0;
1473 }
1474 else
1475 {
1476 rtx new = gen_rtx_COMPARE (VOIDmode,
1477 CONST0_RTX (GET_MODE (comp)), comp);
1478 if (GET_CODE (body) == SET)
1479 SET_SRC (body) = new;
1480 else
1481 SET_SRC (XVECEXP (body, 0, 0)) = new;
1482 }
1483}
1484
1485/* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1486 or (2) a component ref of something variable. Represent the later with
1487 a NULL expression. */
1488
1489static tree
1490component_ref_for_mem_expr (tree ref)
1491{
1492 tree inner = TREE_OPERAND (ref, 0);
1493
1494 if (TREE_CODE (inner) == COMPONENT_REF)
1495 inner = component_ref_for_mem_expr (inner);
1496 else
1497 {
1358/* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1359 or (2) a component ref of something variable. Represent the later with
1360 a NULL expression. */
1361
1362static tree
1363component_ref_for_mem_expr (tree ref)
1364{
1365 tree inner = TREE_OPERAND (ref, 0);
1366
1367 if (TREE_CODE (inner) == COMPONENT_REF)
1368 inner = component_ref_for_mem_expr (inner);
1369 else
1370 {
1498 tree placeholder_ptr = 0;
1499
1500 /* Now remove any conversions: they don't change what the underlying
1371 /* Now remove any conversions: they don't change what the underlying
1501 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1372 object is. Likewise for SAVE_EXPR. */
1502 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1503 || TREE_CODE (inner) == NON_LVALUE_EXPR
1504 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1373 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1374 || TREE_CODE (inner) == NON_LVALUE_EXPR
1375 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1505 || TREE_CODE (inner) == SAVE_EXPR
1506 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1507 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1508 inner = find_placeholder (inner, &placeholder_ptr);
1509 else
1510 inner = TREE_OPERAND (inner, 0);
1376 || TREE_CODE (inner) == SAVE_EXPR)
1377 inner = TREE_OPERAND (inner, 0);
1511
1512 if (! DECL_P (inner))
1513 inner = NULL_TREE;
1514 }
1515
1516 if (inner == TREE_OPERAND (ref, 0))
1517 return ref;
1518 else
1378
1379 if (! DECL_P (inner))
1380 inner = NULL_TREE;
1381 }
1382
1383 if (inner == TREE_OPERAND (ref, 0))
1384 return ref;
1385 else
1519 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1520 TREE_OPERAND (ref, 1));
1386 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1387 TREE_OPERAND (ref, 1), NULL_TREE);
1521}
1522
1523/* Returns 1 if both MEM_EXPR can be considered equal
1524 and 0 otherwise. */
1525
1526int
1527mem_expr_equal_p (tree expr1, tree expr2)
1528{

--- 8 unchanged lines hidden (view full) ---

1537
1538 if (TREE_CODE (expr1) == COMPONENT_REF)
1539 return
1540 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1541 TREE_OPERAND (expr2, 0))
1542 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1543 TREE_OPERAND (expr2, 1));
1544
1388}
1389
1390/* Returns 1 if both MEM_EXPR can be considered equal
1391 and 0 otherwise. */
1392
1393int
1394mem_expr_equal_p (tree expr1, tree expr2)
1395{

--- 8 unchanged lines hidden (view full) ---

1404
1405 if (TREE_CODE (expr1) == COMPONENT_REF)
1406 return
1407 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1408 TREE_OPERAND (expr2, 0))
1409 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1410 TREE_OPERAND (expr2, 1));
1411
1545 if (TREE_CODE (expr1) == INDIRECT_REF)
1412 if (INDIRECT_REF_P (expr1))
1546 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1547 TREE_OPERAND (expr2, 0));
1413 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1414 TREE_OPERAND (expr2, 0));
1548
1549 /* Decls with different pointers can't be equal. */
1550 if (DECL_P (expr1))
1551 return 0;
1552
1415
1553 abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1416 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1554 have been resolved here. */
1417 have been resolved here. */
1418 gcc_assert (DECL_P (expr1));
1419
1420 /* Decls with different pointers can't be equal. */
1421 return 0;
1555}
1556
1557/* Given REF, a MEM, and T, either the type of X or the expression
1558 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1559 if we are making a new object of this type. BITPOS is nonzero if
1560 there is an offset outstanding on T that will be applied later. */
1561
1562void

--- 17 unchanged lines hidden (view full) ---

1580 type = TYPE_P (t) ? t : TREE_TYPE (t);
1581 if (type == error_mark_node)
1582 return;
1583
1584 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1585 wrong answer, as it assumes that DECL_RTL already has the right alias
1586 info. Callers should not set DECL_RTL until after the call to
1587 set_mem_attributes. */
1422}
1423
1424/* Given REF, a MEM, and T, either the type of X or the expression
1425 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1426 if we are making a new object of this type. BITPOS is nonzero if
1427 there is an offset outstanding on T that will be applied later. */
1428
1429void

--- 17 unchanged lines hidden (view full) ---

1447 type = TYPE_P (t) ? t : TREE_TYPE (t);
1448 if (type == error_mark_node)
1449 return;
1450
1451 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1452 wrong answer, as it assumes that DECL_RTL already has the right alias
1453 info. Callers should not set DECL_RTL until after the call to
1454 set_mem_attributes. */
1588 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1589 abort ();
1455 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1590
1591 /* Get the alias set from the expression or type (perhaps using a
1592 front-end routine) and use it. */
1593 alias = get_alias_set (t);
1594
1456
1457 /* Get the alias set from the expression or type (perhaps using a
1458 front-end routine) and use it. */
1459 alias = get_alias_set (t);
1460
1595 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1461 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1596 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1462 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1597 RTX_UNCHANGING_P (ref)
1598 |= ((lang_hooks.honor_readonly
1599 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1600 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1463 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1601
1602 /* If we are making an object of this type, or if this is a DECL, we know
1603 that it is a scalar if the type is not an aggregate. */
1604 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1605 MEM_SCALAR_P (ref) = 1;
1606
1607 /* We can set the alignment from the type if we are making an object,
1608 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1464
1465 /* If we are making an object of this type, or if this is a DECL, we know
1466 that it is a scalar if the type is not an aggregate. */
1467 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1468 MEM_SCALAR_P (ref) = 1;
1469
1470 /* We can set the alignment from the type if we are making an object,
1471 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1609 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1472 if (objectp || TREE_CODE (t) == INDIRECT_REF
1473 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1474 || TYPE_ALIGN_OK (type))
1610 align = MAX (align, TYPE_ALIGN (type));
1475 align = MAX (align, TYPE_ALIGN (type));
1476 else
1477 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1478 {
1479 if (integer_zerop (TREE_OPERAND (t, 1)))
1480 /* We don't know anything about the alignment. */
1481 align = BITS_PER_UNIT;
1482 else
1483 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1484 }
1611
1612 /* If the size is known, we can set that. */
1613 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1614 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1615
1616 /* If T is not a type, we may be able to deduce some more information about
1617 the expression. */
1618 if (! TYPE_P (t))
1619 {
1485
1486 /* If the size is known, we can set that. */
1487 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1488 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1489
1490 /* If T is not a type, we may be able to deduce some more information about
1491 the expression. */
1492 if (! TYPE_P (t))
1493 {
1620 maybe_set_unchanging (ref, t);
1494 tree base;
1495
1621 if (TREE_THIS_VOLATILE (t))
1622 MEM_VOLATILE_P (ref) = 1;
1623
1624 /* Now remove any conversions: they don't change what the underlying
1625 object is. Likewise for SAVE_EXPR. */
1626 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1627 || TREE_CODE (t) == NON_LVALUE_EXPR
1628 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1629 || TREE_CODE (t) == SAVE_EXPR)
1630 t = TREE_OPERAND (t, 0);
1631
1496 if (TREE_THIS_VOLATILE (t))
1497 MEM_VOLATILE_P (ref) = 1;
1498
1499 /* Now remove any conversions: they don't change what the underlying
1500 object is. Likewise for SAVE_EXPR. */
1501 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1502 || TREE_CODE (t) == NON_LVALUE_EXPR
1503 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1504 || TREE_CODE (t) == SAVE_EXPR)
1505 t = TREE_OPERAND (t, 0);
1506
1632 /* If this expression can't be addressed (e.g., it contains a reference
1633 to a non-addressable field), show we don't change its alias set. */
1634 if (! can_address_p (t))
1507 /* We may look through structure-like accesses for the purposes of
1508 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1509 base = t;
1510 while (TREE_CODE (base) == COMPONENT_REF
1511 || TREE_CODE (base) == REALPART_EXPR
1512 || TREE_CODE (base) == IMAGPART_EXPR
1513 || TREE_CODE (base) == BIT_FIELD_REF)
1514 base = TREE_OPERAND (base, 0);
1515
1516 if (DECL_P (base))
1517 {
1518 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1519 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1520 else
1521 MEM_NOTRAP_P (ref) = 1;
1522 }
1523 else
1524 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1525
1526 base = get_base_address (base);
1527 if (base && DECL_P (base)
1528 && TREE_READONLY (base)
1529 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1530 {
1531 tree base_type = TREE_TYPE (base);
1532 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1533 || DECL_ARTIFICIAL (base));
1534 MEM_READONLY_P (ref) = 1;
1535 }
1536
1537 /* If this expression uses it's parent's alias set, mark it such
1538 that we won't change it. */
1539 if (component_uses_parent_alias_set (t))
1635 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1636
1637 /* If this is a decl, set the attributes of the MEM from it. */
1638 if (DECL_P (t))
1639 {
1640 expr = t;
1641 offset = const0_rtx;
1642 apply_bitpos = bitpos;
1643 size = (DECL_SIZE_UNIT (t)
1644 && host_integerp (DECL_SIZE_UNIT (t), 1)
1645 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1646 align = DECL_ALIGN (t);
1647 }
1648
1649 /* If this is a constant, we know the alignment. */
1540 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1541
1542 /* If this is a decl, set the attributes of the MEM from it. */
1543 if (DECL_P (t))
1544 {
1545 expr = t;
1546 offset = const0_rtx;
1547 apply_bitpos = bitpos;
1548 size = (DECL_SIZE_UNIT (t)
1549 && host_integerp (DECL_SIZE_UNIT (t), 1)
1550 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1551 align = DECL_ALIGN (t);
1552 }
1553
1554 /* If this is a constant, we know the alignment. */
1650 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1555 else if (CONSTANT_CLASS_P (t))
1651 {
1652 align = TYPE_ALIGN (type);
1653#ifdef CONSTANT_ALIGNMENT
1654 align = CONSTANT_ALIGNMENT (t, align);
1655#endif
1656 }
1657
1658 /* If this is a field reference and not a bit-field, record it. */

--- 16 unchanged lines hidden (view full) ---

1675 tree off_tree = size_zero_node;
1676 /* We can't modify t, because we use it at the end of the
1677 function. */
1678 tree t2 = t;
1679
1680 do
1681 {
1682 tree index = TREE_OPERAND (t2, 1);
1556 {
1557 align = TYPE_ALIGN (type);
1558#ifdef CONSTANT_ALIGNMENT
1559 align = CONSTANT_ALIGNMENT (t, align);
1560#endif
1561 }
1562
1563 /* If this is a field reference and not a bit-field, record it. */

--- 16 unchanged lines hidden (view full) ---

1580 tree off_tree = size_zero_node;
1581 /* We can't modify t, because we use it at the end of the
1582 function. */
1583 tree t2 = t;
1584
1585 do
1586 {
1587 tree index = TREE_OPERAND (t2, 1);
1683 tree array = TREE_OPERAND (t2, 0);
1684 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1685 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1686 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1588 tree low_bound = array_ref_low_bound (t2);
1589 tree unit_size = array_ref_element_size (t2);
1687
1688 /* We assume all arrays have sizes that are a multiple of a byte.
1689 First subtract the lower bound, if any, in the type of the
1590
1591 /* We assume all arrays have sizes that are a multiple of a byte.
1592 First subtract the lower bound, if any, in the type of the
1690 index, then convert to sizetype and multiply by the size of the
1691 array element. */
1692 if (low_bound != 0 && ! integer_zerop (low_bound))
1693 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1694 index, low_bound));
1593 index, then convert to sizetype and multiply by the size of
1594 the array element. */
1595 if (! integer_zerop (low_bound))
1596 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1597 index, low_bound);
1695
1598
1696 /* If the index has a self-referential type, pass it to a
1697 WITH_RECORD_EXPR; if the component size is, pass our
1698 component to one. */
1699 if (CONTAINS_PLACEHOLDER_P (index))
1700 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1701 if (CONTAINS_PLACEHOLDER_P (unit_size))
1702 unit_size = build (WITH_RECORD_EXPR, sizetype,
1703 unit_size, array);
1704
1705 off_tree
1706 = fold (build (PLUS_EXPR, sizetype,
1707 fold (build (MULT_EXPR, sizetype,
1708 index,
1709 unit_size)),
1710 off_tree));
1599 off_tree = size_binop (PLUS_EXPR,
1600 size_binop (MULT_EXPR,
1601 fold_convert (sizetype,
1602 index),
1603 unit_size),
1604 off_tree);
1711 t2 = TREE_OPERAND (t2, 0);
1712 }
1713 while (TREE_CODE (t2) == ARRAY_REF);
1714
1715 if (DECL_P (t2))
1716 {
1717 expr = t2;
1718 offset = NULL;

--- 15 unchanged lines hidden (view full) ---

1734 {
1735 offset = GEN_INT (tree_low_cst (off_tree, 1));
1736 apply_bitpos = bitpos;
1737 }
1738 /* ??? Any reason the field size would be different than
1739 the size we got from the type? */
1740 }
1741 else if (flag_argument_noalias > 1
1605 t2 = TREE_OPERAND (t2, 0);
1606 }
1607 while (TREE_CODE (t2) == ARRAY_REF);
1608
1609 if (DECL_P (t2))
1610 {
1611 expr = t2;
1612 offset = NULL;

--- 15 unchanged lines hidden (view full) ---

1628 {
1629 offset = GEN_INT (tree_low_cst (off_tree, 1));
1630 apply_bitpos = bitpos;
1631 }
1632 /* ??? Any reason the field size would be different than
1633 the size we got from the type? */
1634 }
1635 else if (flag_argument_noalias > 1
1742 && TREE_CODE (t2) == INDIRECT_REF
1636 && (INDIRECT_REF_P (t2))
1743 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1744 {
1745 expr = t2;
1746 offset = NULL;
1747 }
1748 }
1749
1750 /* If this is a Fortran indirect argument reference, record the
1751 parameter decl. */
1752 else if (flag_argument_noalias > 1
1637 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1638 {
1639 expr = t2;
1640 offset = NULL;
1641 }
1642 }
1643
1644 /* If this is a Fortran indirect argument reference, record the
1645 parameter decl. */
1646 else if (flag_argument_noalias > 1
1753 && TREE_CODE (t) == INDIRECT_REF
1647 && (INDIRECT_REF_P (t))
1754 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1755 {
1756 expr = t;
1757 offset = NULL;
1758 }
1759 }
1760
1761 /* If we modified OFFSET based on T, then subtract the outstanding
1762 bit position offset. Similarly, increase the size of the accessed
1763 object to contain the negative offset. */
1764 if (apply_bitpos)
1765 {
1766 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1767 if (size)
1768 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1769 }
1770
1648 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1649 {
1650 expr = t;
1651 offset = NULL;
1652 }
1653 }
1654
1655 /* If we modified OFFSET based on T, then subtract the outstanding
1656 bit position offset. Similarly, increase the size of the accessed
1657 object to contain the negative offset. */
1658 if (apply_bitpos)
1659 {
1660 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1661 if (size)
1662 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1663 }
1664
1665 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1666 {
1667 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1668 we're overlapping. */
1669 offset = NULL;
1670 expr = NULL;
1671 }
1672
1771 /* Now set the attributes we computed above. */
1772 MEM_ATTRS (ref)
1773 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1774
1775 /* If this is already known to be a scalar or aggregate, we are done. */
1776 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1777 return;
1778

--- 24 unchanged lines hidden (view full) ---

1803
1804/* Set the alias set of MEM to SET. */
1805
1806void
1807set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1808{
1809#ifdef ENABLE_CHECKING
1810 /* If the new and old alias sets don't conflict, something is wrong. */
1673 /* Now set the attributes we computed above. */
1674 MEM_ATTRS (ref)
1675 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1676
1677 /* If this is already known to be a scalar or aggregate, we are done. */
1678 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1679 return;
1680

--- 24 unchanged lines hidden (view full) ---

1705
1706/* Set the alias set of MEM to SET. */
1707
1708void
1709set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1710{
1711#ifdef ENABLE_CHECKING
1712 /* If the new and old alias sets don't conflict, something is wrong. */
1811 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1812 abort ();
1713 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1813#endif
1814
1815 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1816 MEM_SIZE (mem), MEM_ALIGN (mem),
1817 GET_MODE (mem));
1818}
1819
1820/* Set the alignment of MEM to ALIGN bits. */

--- 42 unchanged lines hidden (view full) ---

1863 returned memory location is required to be valid. The memory
1864 attributes are not changed. */
1865
1866static rtx
1867change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1868{
1869 rtx new;
1870
1714#endif
1715
1716 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1717 MEM_SIZE (mem), MEM_ALIGN (mem),
1718 GET_MODE (mem));
1719}
1720
1721/* Set the alignment of MEM to ALIGN bits. */

--- 42 unchanged lines hidden (view full) ---

1764 returned memory location is required to be valid. The memory
1765 attributes are not changed. */
1766
1767static rtx
1768change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1769{
1770 rtx new;
1771
1871 if (GET_CODE (memref) != MEM)
1872 abort ();
1772 gcc_assert (MEM_P (memref));
1873 if (mode == VOIDmode)
1874 mode = GET_MODE (memref);
1875 if (addr == 0)
1876 addr = XEXP (memref, 0);
1877 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1878 && (!validate || memory_address_p (mode, addr)))
1879 return memref;
1880
1881 if (validate)
1882 {
1883 if (reload_in_progress || reload_completed)
1773 if (mode == VOIDmode)
1774 mode = GET_MODE (memref);
1775 if (addr == 0)
1776 addr = XEXP (memref, 0);
1777 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1778 && (!validate || memory_address_p (mode, addr)))
1779 return memref;
1780
1781 if (validate)
1782 {
1783 if (reload_in_progress || reload_completed)
1884 {
1885 if (! memory_address_p (mode, addr))
1886 abort ();
1887 }
1784 gcc_assert (memory_address_p (mode, addr));
1888 else
1889 addr = memory_address (mode, addr);
1890 }
1891
1892 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1893 return memref;
1894
1895 new = gen_rtx_MEM (mode, addr);

--- 202 unchanged lines hidden (view full) ---

2098 if (! memoffset)
2099 expr = NULL_TREE;
2100
2101 while (expr)
2102 {
2103 if (TREE_CODE (expr) == COMPONENT_REF)
2104 {
2105 tree field = TREE_OPERAND (expr, 1);
1785 else
1786 addr = memory_address (mode, addr);
1787 }
1788
1789 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1790 return memref;
1791
1792 new = gen_rtx_MEM (mode, addr);

--- 202 unchanged lines hidden (view full) ---

1995 if (! memoffset)
1996 expr = NULL_TREE;
1997
1998 while (expr)
1999 {
2000 if (TREE_CODE (expr) == COMPONENT_REF)
2001 {
2002 tree field = TREE_OPERAND (expr, 1);
2003 tree offset = component_ref_field_offset (expr);
2106
2107 if (! DECL_SIZE_UNIT (field))
2108 {
2109 expr = NULL_TREE;
2110 break;
2111 }
2112
2113 /* Is the field at least as large as the access? If so, ok,
2114 otherwise strip back to the containing structure. */
2115 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2116 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2117 && INTVAL (memoffset) >= 0)
2118 break;
2119
2004
2005 if (! DECL_SIZE_UNIT (field))
2006 {
2007 expr = NULL_TREE;
2008 break;
2009 }
2010
2011 /* Is the field at least as large as the access? If so, ok,
2012 otherwise strip back to the containing structure. */
2013 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2014 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2015 && INTVAL (memoffset) >= 0)
2016 break;
2017
2120 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2018 if (! host_integerp (offset, 1))
2121 {
2122 expr = NULL_TREE;
2123 break;
2124 }
2125
2126 expr = TREE_OPERAND (expr, 0);
2019 {
2020 expr = NULL_TREE;
2021 break;
2022 }
2023
2024 expr = TREE_OPERAND (expr, 0);
2127 memoffset = (GEN_INT (INTVAL (memoffset)
2128 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2129 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2130 / BITS_PER_UNIT)));
2025 memoffset
2026 = (GEN_INT (INTVAL (memoffset)
2027 + tree_low_cst (offset, 1)
2028 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2029 / BITS_PER_UNIT)));
2131 }
2132 /* Similarly for the decl. */
2133 else if (DECL_P (expr)
2134 && DECL_SIZE_UNIT (expr)
2135 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2136 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2137 && (! memoffset || INTVAL (memoffset) >= 0))
2138 break;

--- 42 unchanged lines hidden (view full) ---

2181 last_insn = last;
2182 cur_insn_uid = 0;
2183
2184 for (insn = first; insn; insn = NEXT_INSN (insn))
2185 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2186
2187 cur_insn_uid++;
2188}
2030 }
2031 /* Similarly for the decl. */
2032 else if (DECL_P (expr)
2033 && DECL_SIZE_UNIT (expr)
2034 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2035 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2036 && (! memoffset || INTVAL (memoffset) >= 0))
2037 break;

--- 42 unchanged lines hidden (view full) ---

2080 last_insn = last;
2081 cur_insn_uid = 0;
2082
2083 for (insn = first; insn; insn = NEXT_INSN (insn))
2084 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2085
2086 cur_insn_uid++;
2087}
2189
2190/* Set the last label number found in the current function.
2191 This is used when belatedly compiling an inline function. */
2192
2193void
2194set_new_last_label_num (int last)
2195{
2196 base_label_num = label_num;
2197 last_label_num = last;
2198}
2199
2088
2200/* Restore all variables describing the current status from the structure *P.
2201 This is used after a nested function. */
2202
2203void
2204restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2205{
2206 last_label_num = 0;
2207}
2208
2209/* Go through all the RTL insn bodies and copy any invalid shared
2210 structure. This routine should only be called once. */
2211
2089/* Go through all the RTL insn bodies and copy any invalid shared
2090 structure. This routine should only be called once. */
2091
2212void
2213unshare_all_rtl (tree fndecl, rtx insn)
2092static void
2093unshare_all_rtl_1 (tree fndecl, rtx insn)
2214{
2215 tree decl;
2216
2217 /* Make sure that virtual parameters are not shared. */
2218 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2219 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2220
2221 /* Make sure that virtual stack slots are not shared. */

--- 34 unchanged lines hidden (view full) ---

2256 reset_used_decls (DECL_INITIAL (cfun->decl));
2257
2258 /* Make sure that virtual parameters are not shared. */
2259 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2260 reset_used_flags (DECL_RTL (decl));
2261
2262 reset_used_flags (stack_slot_list);
2263
2094{
2095 tree decl;
2096
2097 /* Make sure that virtual parameters are not shared. */
2098 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2099 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2100
2101 /* Make sure that virtual stack slots are not shared. */

--- 34 unchanged lines hidden (view full) ---

2136 reset_used_decls (DECL_INITIAL (cfun->decl));
2137
2138 /* Make sure that virtual parameters are not shared. */
2139 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2140 reset_used_flags (DECL_RTL (decl));
2141
2142 reset_used_flags (stack_slot_list);
2143
2264 unshare_all_rtl (cfun->decl, insn);
2144 unshare_all_rtl_1 (cfun->decl, insn);
2265}
2266
2145}
2146
2147unsigned int
2148unshare_all_rtl (void)
2149{
2150 unshare_all_rtl_1 (current_function_decl, get_insns ());
2151 return 0;
2152}
2153
2154struct tree_opt_pass pass_unshare_all_rtl =
2155{
2156 "unshare", /* name */
2157 NULL, /* gate */
2158 unshare_all_rtl, /* execute */
2159 NULL, /* sub */
2160 NULL, /* next */
2161 0, /* static_pass_number */
2162 0, /* tv_id */
2163 0, /* properties_required */
2164 0, /* properties_provided */
2165 0, /* properties_destroyed */
2166 0, /* todo_flags_start */
2167 TODO_dump_func, /* todo_flags_finish */
2168 0 /* letter */
2169};
2170
2171
2267/* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2268 Recursively does the same for subexpressions. */
2269
2270static void
2271verify_rtx_sharing (rtx orig, rtx insn)
2272{
2273 rtx x = orig;
2274 int i;

--- 5 unchanged lines hidden (view full) ---

2280
2281 code = GET_CODE (x);
2282
2283 /* These types may be freely shared. */
2284
2285 switch (code)
2286 {
2287 case REG:
2172/* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2173 Recursively does the same for subexpressions. */
2174
2175static void
2176verify_rtx_sharing (rtx orig, rtx insn)
2177{
2178 rtx x = orig;
2179 int i;

--- 5 unchanged lines hidden (view full) ---

2185
2186 code = GET_CODE (x);
2187
2188 /* These types may be freely shared. */
2189
2190 switch (code)
2191 {
2192 case REG:
2288 case QUEUED:
2289 case CONST_INT:
2290 case CONST_DOUBLE:
2291 case CONST_VECTOR:
2292 case SYMBOL_REF:
2293 case LABEL_REF:
2294 case CODE_LABEL:
2295 case PC:
2296 case CC0:
2297 case SCRATCH:
2193 case CONST_INT:
2194 case CONST_DOUBLE:
2195 case CONST_VECTOR:
2196 case SYMBOL_REF:
2197 case LABEL_REF:
2198 case CODE_LABEL:
2199 case PC:
2200 case CC0:
2201 case SCRATCH:
2298 /* SCRATCH must be shared because they represent distinct values. */
2299 return;
2202 return;
2203 /* SCRATCH must be shared because they represent distinct values. */
2204 case CLOBBER:
2205 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2206 return;
2207 break;
2300
2301 case CONST:
2302 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2303 a LABEL_REF, it isn't sharable. */
2304 if (GET_CODE (XEXP (x, 0)) == PLUS
2305 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2306 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2307 return;

--- 8 unchanged lines hidden (view full) ---

2316 break;
2317
2318 default:
2319 break;
2320 }
2321
2322 /* This rtx may not be shared. If it has already been seen,
2323 replace it with a copy of itself. */
2208
2209 case CONST:
2210 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2211 a LABEL_REF, it isn't sharable. */
2212 if (GET_CODE (XEXP (x, 0)) == PLUS
2213 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2214 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2215 return;

--- 8 unchanged lines hidden (view full) ---

2224 break;
2225
2226 default:
2227 break;
2228 }
2229
2230 /* This rtx may not be shared. If it has already been seen,
2231 replace it with a copy of itself. */
2324
2232#ifdef ENABLE_CHECKING
2325 if (RTX_FLAG (x, used))
2326 {
2233 if (RTX_FLAG (x, used))
2234 {
2327 error ("Invalid rtl sharing found in the insn");
2235 error ("invalid rtl sharing found in the insn");
2328 debug_rtx (insn);
2236 debug_rtx (insn);
2329 error ("Shared rtx");
2237 error ("shared rtx");
2330 debug_rtx (x);
2238 debug_rtx (x);
2331 abort ();
2239 internal_error ("internal consistency failure");
2332 }
2240 }
2241#endif
2242 gcc_assert (!RTX_FLAG (x, used));
2243
2333 RTX_FLAG (x, used) = 1;
2334
2335 /* Now scan the subexpressions recursively. */
2336
2337 format_ptr = GET_RTX_FORMAT (code);
2338
2339 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2340 {

--- 6 unchanged lines hidden (view full) ---

2347 case 'E':
2348 if (XVEC (x, i) != NULL)
2349 {
2350 int j;
2351 int len = XVECLEN (x, i);
2352
2353 for (j = 0; j < len; j++)
2354 {
2244 RTX_FLAG (x, used) = 1;
2245
2246 /* Now scan the subexpressions recursively. */
2247
2248 format_ptr = GET_RTX_FORMAT (code);
2249
2250 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2251 {

--- 6 unchanged lines hidden (view full) ---

2258 case 'E':
2259 if (XVEC (x, i) != NULL)
2260 {
2261 int j;
2262 int len = XVECLEN (x, i);
2263
2264 for (j = 0; j < len; j++)
2265 {
2355 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2266 /* We allow sharing of ASM_OPERANDS inside single
2267 instruction. */
2356 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2268 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2357 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2269 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2270 == ASM_OPERANDS))
2358 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2359 else
2360 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2361 }
2362 }
2363 break;
2364 }
2365 }

--- 69 unchanged lines hidden (view full) ---

2435 if (DECL_RTL_SET_P (t))
2436 reset_used_flags (DECL_RTL (t));
2437
2438 /* Now process sub-blocks. */
2439 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2440 reset_used_decls (t);
2441}
2442
2271 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2272 else
2273 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2274 }
2275 }
2276 break;
2277 }
2278 }

--- 69 unchanged lines hidden (view full) ---

2348 if (DECL_RTL_SET_P (t))
2349 reset_used_flags (DECL_RTL (t));
2350
2351 /* Now process sub-blocks. */
2352 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2353 reset_used_decls (t);
2354}
2355
2443/* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2444 placed in the result directly, rather than being copied. MAY_SHARE is
2445 either a MEM of an EXPR_LIST of MEMs. */
2446
2447rtx
2448copy_most_rtx (rtx orig, rtx may_share)
2449{
2450 rtx copy;
2451 int i, j;
2452 RTX_CODE code;
2453 const char *format_ptr;
2454
2455 if (orig == may_share
2456 || (GET_CODE (may_share) == EXPR_LIST
2457 && in_expr_list_p (may_share, orig)))
2458 return orig;
2459
2460 code = GET_CODE (orig);
2461
2462 switch (code)
2463 {
2464 case REG:
2465 case QUEUED:
2466 case CONST_INT:
2467 case CONST_DOUBLE:
2468 case CONST_VECTOR:
2469 case SYMBOL_REF:
2470 case CODE_LABEL:
2471 case PC:
2472 case CC0:
2473 return orig;
2474 default:
2475 break;
2476 }
2477
2478 copy = rtx_alloc (code);
2479 PUT_MODE (copy, GET_MODE (orig));
2480 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2481 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2482 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2483 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2484 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2485
2486 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2487
2488 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2489 {
2490 switch (*format_ptr++)
2491 {
2492 case 'e':
2493 XEXP (copy, i) = XEXP (orig, i);
2494 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2495 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2496 break;
2497
2498 case 'u':
2499 XEXP (copy, i) = XEXP (orig, i);
2500 break;
2501
2502 case 'E':
2503 case 'V':
2504 XVEC (copy, i) = XVEC (orig, i);
2505 if (XVEC (orig, i) != NULL)
2506 {
2507 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2508 for (j = 0; j < XVECLEN (copy, i); j++)
2509 XVECEXP (copy, i, j)
2510 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2511 }
2512 break;
2513
2514 case 'w':
2515 XWINT (copy, i) = XWINT (orig, i);
2516 break;
2517
2518 case 'n':
2519 case 'i':
2520 XINT (copy, i) = XINT (orig, i);
2521 break;
2522
2523 case 't':
2524 XTREE (copy, i) = XTREE (orig, i);
2525 break;
2526
2527 case 's':
2528 case 'S':
2529 XSTR (copy, i) = XSTR (orig, i);
2530 break;
2531
2532 case '0':
2533 X0ANY (copy, i) = X0ANY (orig, i);
2534 break;
2535
2536 default:
2537 abort ();
2538 }
2539 }
2540 return copy;
2541}
2542
2543/* Mark ORIG as in use, and return a copy of it if it was already in use.
2544 Recursively does the same for subexpressions. Uses
2545 copy_rtx_if_shared_1 to reduce stack space. */
2546
2547rtx
2548copy_rtx_if_shared (rtx orig)
2549{
2550 copy_rtx_if_shared_1 (&orig);

--- 23 unchanged lines hidden (view full) ---

2574
2575 code = GET_CODE (x);
2576
2577 /* These types may be freely shared. */
2578
2579 switch (code)
2580 {
2581 case REG:
2356/* Mark ORIG as in use, and return a copy of it if it was already in use.
2357 Recursively does the same for subexpressions. Uses
2358 copy_rtx_if_shared_1 to reduce stack space. */
2359
2360rtx
2361copy_rtx_if_shared (rtx orig)
2362{
2363 copy_rtx_if_shared_1 (&orig);

--- 23 unchanged lines hidden (view full) ---

2387
2388 code = GET_CODE (x);
2389
2390 /* These types may be freely shared. */
2391
2392 switch (code)
2393 {
2394 case REG:
2582 case QUEUED:
2583 case CONST_INT:
2584 case CONST_DOUBLE:
2585 case CONST_VECTOR:
2586 case SYMBOL_REF:
2587 case LABEL_REF:
2588 case CODE_LABEL:
2589 case PC:
2590 case CC0:
2591 case SCRATCH:
2592 /* SCRATCH must be shared because they represent distinct values. */
2593 return;
2395 case CONST_INT:
2396 case CONST_DOUBLE:
2397 case CONST_VECTOR:
2398 case SYMBOL_REF:
2399 case LABEL_REF:
2400 case CODE_LABEL:
2401 case PC:
2402 case CC0:
2403 case SCRATCH:
2404 /* SCRATCH must be shared because they represent distinct values. */
2405 return;
2406 case CLOBBER:
2407 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2408 return;
2409 break;
2594
2595 case CONST:
2596 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2597 a LABEL_REF, it isn't sharable. */
2598 if (GET_CODE (XEXP (x, 0)) == PLUS
2599 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2600 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2601 return;

--- 11 unchanged lines hidden (view full) ---

2613 break;
2614 }
2615
2616 /* This rtx may not be shared. If it has already been seen,
2617 replace it with a copy of itself. */
2618
2619 if (RTX_FLAG (x, used))
2620 {
2410
2411 case CONST:
2412 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2413 a LABEL_REF, it isn't sharable. */
2414 if (GET_CODE (XEXP (x, 0)) == PLUS
2415 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2416 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2417 return;

--- 11 unchanged lines hidden (view full) ---

2429 break;
2430 }
2431
2432 /* This rtx may not be shared. If it has already been seen,
2433 replace it with a copy of itself. */
2434
2435 if (RTX_FLAG (x, used))
2436 {
2621 rtx copy;
2622
2623 copy = rtx_alloc (code);
2624 memcpy (copy, x, RTX_SIZE (code));
2625 x = copy;
2437 x = shallow_copy_rtx (x);
2626 copied = 1;
2627 }
2628 RTX_FLAG (x, used) = 1;
2629
2630 /* Now scan the subexpressions recursively.
2631 We can store any replaced subexpressions directly into X
2632 since we know X is not shared! Any vectors in X
2633 must be copied if X was copied. */

--- 62 unchanged lines hidden (view full) ---

2696 code = GET_CODE (x);
2697
2698 /* These types may be freely shared so we needn't do any resetting
2699 for them. */
2700
2701 switch (code)
2702 {
2703 case REG:
2438 copied = 1;
2439 }
2440 RTX_FLAG (x, used) = 1;
2441
2442 /* Now scan the subexpressions recursively.
2443 We can store any replaced subexpressions directly into X
2444 since we know X is not shared! Any vectors in X
2445 must be copied if X was copied. */

--- 62 unchanged lines hidden (view full) ---

2508 code = GET_CODE (x);
2509
2510 /* These types may be freely shared so we needn't do any resetting
2511 for them. */
2512
2513 switch (code)
2514 {
2515 case REG:
2704 case QUEUED:
2705 case CONST_INT:
2706 case CONST_DOUBLE:
2707 case CONST_VECTOR:
2708 case SYMBOL_REF:
2709 case CODE_LABEL:
2710 case PC:
2711 case CC0:
2712 return;

--- 53 unchanged lines hidden (view full) ---

2766 code = GET_CODE (x);
2767
2768 /* These types may be freely shared so we needn't do any resetting
2769 for them. */
2770
2771 switch (code)
2772 {
2773 case REG:
2516 case CONST_INT:
2517 case CONST_DOUBLE:
2518 case CONST_VECTOR:
2519 case SYMBOL_REF:
2520 case CODE_LABEL:
2521 case PC:
2522 case CC0:
2523 return;

--- 53 unchanged lines hidden (view full) ---

2577 code = GET_CODE (x);
2578
2579 /* These types may be freely shared so we needn't do any resetting
2580 for them. */
2581
2582 switch (code)
2583 {
2584 case REG:
2774 case QUEUED:
2775 case CONST_INT:
2776 case CONST_DOUBLE:
2777 case CONST_VECTOR:
2778 case SYMBOL_REF:
2779 case CODE_LABEL:
2780 case PC:
2781 case CC0:
2782 return;

--- 47 unchanged lines hidden (view full) ---

2830 case SIGN_EXTEND:
2831 case ZERO_EXTEND:
2832 other = XEXP (other, 0);
2833 break;
2834 default:
2835 goto done;
2836 }
2837 done:
2585 case CONST_INT:
2586 case CONST_DOUBLE:
2587 case CONST_VECTOR:
2588 case SYMBOL_REF:
2589 case CODE_LABEL:
2590 case PC:
2591 case CC0:
2592 return;

--- 47 unchanged lines hidden (view full) ---

2640 case SIGN_EXTEND:
2641 case ZERO_EXTEND:
2642 other = XEXP (other, 0);
2643 break;
2644 default:
2645 goto done;
2646 }
2647 done:
2838 if ((GET_CODE (other) == MEM
2648 if ((MEM_P (other)
2839 && ! CONSTANT_P (x)
2649 && ! CONSTANT_P (x)
2840 && GET_CODE (x) != REG
2650 && !REG_P (x)
2841 && GET_CODE (x) != SUBREG)
2651 && GET_CODE (x) != SUBREG)
2842 || (GET_CODE (other) == REG
2652 || (REG_P (other)
2843 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2844 || reg_mentioned_p (other, x))))
2845 {
2846 rtx temp = gen_reg_rtx (GET_MODE (x));
2847 emit_move_insn (temp, x);
2848 return temp;
2849 }
2850 return x;

--- 9 unchanged lines hidden (view full) ---

2860 return first_insn;
2861}
2862
2863/* Specify a new insn as the first in the chain. */
2864
2865void
2866set_first_insn (rtx insn)
2867{
2653 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2654 || reg_mentioned_p (other, x))))
2655 {
2656 rtx temp = gen_reg_rtx (GET_MODE (x));
2657 emit_move_insn (temp, x);
2658 return temp;
2659 }
2660 return x;

--- 9 unchanged lines hidden (view full) ---

2670 return first_insn;
2671}
2672
2673/* Specify a new insn as the first in the chain. */
2674
2675void
2676set_first_insn (rtx insn)
2677{
2868 if (PREV_INSN (insn) != 0)
2869 abort ();
2678 gcc_assert (!PREV_INSN (insn));
2870 first_insn = insn;
2871}
2872
2873/* Return the last insn emitted in current sequence or current function. */
2874
2875rtx
2876get_last_insn (void)
2877{
2878 return last_insn;
2879}
2880
2881/* Specify a new insn as the last in the chain. */
2882
2883void
2884set_last_insn (rtx insn)
2885{
2679 first_insn = insn;
2680}
2681
2682/* Return the last insn emitted in current sequence or current function. */
2683
2684rtx
2685get_last_insn (void)
2686{
2687 return last_insn;
2688}
2689
2690/* Specify a new insn as the last in the chain. */
2691
2692void
2693set_last_insn (rtx insn)
2694{
2886 if (NEXT_INSN (insn) != 0)
2887 abort ();
2695 gcc_assert (!NEXT_INSN (insn));
2888 last_insn = insn;
2889}
2890
2891/* Return the last insn emitted, even if it is in a sequence now pushed. */
2892
2893rtx
2894get_last_insn_anywhere (void)
2895{

--- 18 unchanged lines hidden (view full) ---

2914 {
2915 if (NOTE_P (insn))
2916 for (insn = next_insn (insn);
2917 insn && NOTE_P (insn);
2918 insn = next_insn (insn))
2919 continue;
2920 else
2921 {
2696 last_insn = insn;
2697}
2698
2699/* Return the last insn emitted, even if it is in a sequence now pushed. */
2700
2701rtx
2702get_last_insn_anywhere (void)
2703{

--- 18 unchanged lines hidden (view full) ---

2722 {
2723 if (NOTE_P (insn))
2724 for (insn = next_insn (insn);
2725 insn && NOTE_P (insn);
2726 insn = next_insn (insn))
2727 continue;
2728 else
2729 {
2922 if (GET_CODE (insn) == INSN
2730 if (NONJUMP_INSN_P (insn)
2923 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2924 insn = XVECEXP (PATTERN (insn), 0, 0);
2925 }
2926 }
2927
2928 return insn;
2929}
2930

--- 9 unchanged lines hidden (view full) ---

2940 {
2941 if (NOTE_P (insn))
2942 for (insn = previous_insn (insn);
2943 insn && NOTE_P (insn);
2944 insn = previous_insn (insn))
2945 continue;
2946 else
2947 {
2731 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2732 insn = XVECEXP (PATTERN (insn), 0, 0);
2733 }
2734 }
2735
2736 return insn;
2737}
2738

--- 9 unchanged lines hidden (view full) ---

2748 {
2749 if (NOTE_P (insn))
2750 for (insn = previous_insn (insn);
2751 insn && NOTE_P (insn);
2752 insn = previous_insn (insn))
2753 continue;
2754 else
2755 {
2948 if (GET_CODE (insn) == INSN
2756 if (NONJUMP_INSN_P (insn)
2949 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2950 insn = XVECEXP (PATTERN (insn), 0,
2951 XVECLEN (PATTERN (insn), 0) - 1);
2952 }
2953 }
2954
2955 return insn;
2956}

--- 4 unchanged lines hidden (view full) ---

2961get_max_uid (void)
2962{
2963 return cur_insn_uid;
2964}
2965
2966/* Renumber instructions so that no instruction UIDs are wasted. */
2967
2968void
2757 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2758 insn = XVECEXP (PATTERN (insn), 0,
2759 XVECLEN (PATTERN (insn), 0) - 1);
2760 }
2761 }
2762
2763 return insn;
2764}

--- 4 unchanged lines hidden (view full) ---

2769get_max_uid (void)
2770{
2771 return cur_insn_uid;
2772}
2773
2774/* Renumber instructions so that no instruction UIDs are wasted. */
2775
2776void
2969renumber_insns (FILE *stream)
2777renumber_insns (void)
2970{
2971 rtx insn;
2972
2973 /* If we're not supposed to renumber instructions, don't. */
2974 if (!flag_renumber_insns)
2975 return;
2976
2977 /* If there aren't that many instructions, then it's not really
2978 worth renumbering them. */
2979 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2980 return;
2981
2982 cur_insn_uid = 1;
2983
2984 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2985 {
2778{
2779 rtx insn;
2780
2781 /* If we're not supposed to renumber instructions, don't. */
2782 if (!flag_renumber_insns)
2783 return;
2784
2785 /* If there aren't that many instructions, then it's not really
2786 worth renumbering them. */
2787 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2788 return;
2789
2790 cur_insn_uid = 1;
2791
2792 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2793 {
2986 if (stream)
2987 fprintf (stream, "Renumbering insn %d to %d\n",
2794 if (dump_file)
2795 fprintf (dump_file, "Renumbering insn %d to %d\n",
2988 INSN_UID (insn), cur_insn_uid);
2989 INSN_UID (insn) = cur_insn_uid++;
2990 }
2991}
2992
2993/* Return the next insn. If it is a SEQUENCE, return the first insn
2994 of the sequence. */
2995
2996rtx
2997next_insn (rtx insn)
2998{
2999 if (insn)
3000 {
3001 insn = NEXT_INSN (insn);
2796 INSN_UID (insn), cur_insn_uid);
2797 INSN_UID (insn) = cur_insn_uid++;
2798 }
2799}
2800
2801/* Return the next insn. If it is a SEQUENCE, return the first insn
2802 of the sequence. */
2803
2804rtx
2805next_insn (rtx insn)
2806{
2807 if (insn)
2808 {
2809 insn = NEXT_INSN (insn);
3002 if (insn && GET_CODE (insn) == INSN
2810 if (insn && NONJUMP_INSN_P (insn)
3003 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3004 insn = XVECEXP (PATTERN (insn), 0, 0);
3005 }
3006
3007 return insn;
3008}
3009
3010/* Return the previous insn. If it is a SEQUENCE, return the last insn
3011 of the sequence. */
3012
3013rtx
3014previous_insn (rtx insn)
3015{
3016 if (insn)
3017 {
3018 insn = PREV_INSN (insn);
2811 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2812 insn = XVECEXP (PATTERN (insn), 0, 0);
2813 }
2814
2815 return insn;
2816}
2817
2818/* Return the previous insn. If it is a SEQUENCE, return the last insn
2819 of the sequence. */
2820
2821rtx
2822previous_insn (rtx insn)
2823{
2824 if (insn)
2825 {
2826 insn = PREV_INSN (insn);
3019 if (insn && GET_CODE (insn) == INSN
2827 if (insn && NONJUMP_INSN_P (insn)
3020 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3021 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3022 }
3023
3024 return insn;
3025}
3026
3027/* Return the next insn after INSN that is not a NOTE. This routine does not
3028 look inside SEQUENCEs. */
3029
3030rtx
3031next_nonnote_insn (rtx insn)
3032{
3033 while (insn)
3034 {
3035 insn = NEXT_INSN (insn);
2828 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2829 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2830 }
2831
2832 return insn;
2833}
2834
2835/* Return the next insn after INSN that is not a NOTE. This routine does not
2836 look inside SEQUENCEs. */
2837
2838rtx
2839next_nonnote_insn (rtx insn)
2840{
2841 while (insn)
2842 {
2843 insn = NEXT_INSN (insn);
3036 if (insn == 0 || GET_CODE (insn) != NOTE)
2844 if (insn == 0 || !NOTE_P (insn))
3037 break;
3038 }
3039
3040 return insn;
3041}
3042
3043/* Return the previous insn before INSN that is not a NOTE. This routine does
3044 not look inside SEQUENCEs. */
3045
3046rtx
3047prev_nonnote_insn (rtx insn)
3048{
3049 while (insn)
3050 {
3051 insn = PREV_INSN (insn);
2845 break;
2846 }
2847
2848 return insn;
2849}
2850
2851/* Return the previous insn before INSN that is not a NOTE. This routine does
2852 not look inside SEQUENCEs. */
2853
2854rtx
2855prev_nonnote_insn (rtx insn)
2856{
2857 while (insn)
2858 {
2859 insn = PREV_INSN (insn);
3052 if (insn == 0 || GET_CODE (insn) != NOTE)
2860 if (insn == 0 || !NOTE_P (insn))
3053 break;
3054 }
3055
3056 return insn;
3057}
3058
3059/* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3060 or 0, if there is none. This routine does not look inside
3061 SEQUENCEs. */
3062
3063rtx
3064next_real_insn (rtx insn)
3065{
3066 while (insn)
3067 {
3068 insn = NEXT_INSN (insn);
2861 break;
2862 }
2863
2864 return insn;
2865}
2866
2867/* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2868 or 0, if there is none. This routine does not look inside
2869 SEQUENCEs. */
2870
2871rtx
2872next_real_insn (rtx insn)
2873{
2874 while (insn)
2875 {
2876 insn = NEXT_INSN (insn);
3069 if (insn == 0 || GET_CODE (insn) == INSN
3070 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2877 if (insn == 0 || INSN_P (insn))
3071 break;
3072 }
3073
3074 return insn;
3075}
3076
3077/* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3078 or 0, if there is none. This routine does not look inside
3079 SEQUENCEs. */
3080
3081rtx
3082prev_real_insn (rtx insn)
3083{
3084 while (insn)
3085 {
3086 insn = PREV_INSN (insn);
2878 break;
2879 }
2880
2881 return insn;
2882}
2883
2884/* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2885 or 0, if there is none. This routine does not look inside
2886 SEQUENCEs. */
2887
2888rtx
2889prev_real_insn (rtx insn)
2890{
2891 while (insn)
2892 {
2893 insn = PREV_INSN (insn);
3087 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3088 || GET_CODE (insn) == JUMP_INSN)
2894 if (insn == 0 || INSN_P (insn))
3089 break;
3090 }
3091
3092 return insn;
3093}
3094
3095/* Return the last CALL_INSN in the current list, or 0 if there is none.
3096 This routine does not look inside SEQUENCEs. */
3097
3098rtx
3099last_call_insn (void)
3100{
3101 rtx insn;
3102
3103 for (insn = get_last_insn ();
2895 break;
2896 }
2897
2898 return insn;
2899}
2900
2901/* Return the last CALL_INSN in the current list, or 0 if there is none.
2902 This routine does not look inside SEQUENCEs. */
2903
2904rtx
2905last_call_insn (void)
2906{
2907 rtx insn;
2908
2909 for (insn = get_last_insn ();
3104 insn && GET_CODE (insn) != CALL_INSN;
2910 insn && !CALL_P (insn);
3105 insn = PREV_INSN (insn))
3106 ;
3107
3108 return insn;
3109}
3110
3111/* Find the next insn after INSN that really does something. This routine
3112 does not look inside SEQUENCEs. Until reload has completed, this is the
3113 same as next_real_insn. */
3114
3115int
3116active_insn_p (rtx insn)
3117{
2911 insn = PREV_INSN (insn))
2912 ;
2913
2914 return insn;
2915}
2916
2917/* Find the next insn after INSN that really does something. This routine
2918 does not look inside SEQUENCEs. Until reload has completed, this is the
2919 same as next_real_insn. */
2920
2921int
2922active_insn_p (rtx insn)
2923{
3118 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3119 || (GET_CODE (insn) == INSN
2924 return (CALL_P (insn) || JUMP_P (insn)
2925 || (NONJUMP_INSN_P (insn)
3120 && (! reload_completed
3121 || (GET_CODE (PATTERN (insn)) != USE
3122 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3123}
3124
3125rtx
3126next_active_insn (rtx insn)
3127{

--- 27 unchanged lines hidden (view full) ---

3155/* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3156
3157rtx
3158next_label (rtx insn)
3159{
3160 while (insn)
3161 {
3162 insn = NEXT_INSN (insn);
2926 && (! reload_completed
2927 || (GET_CODE (PATTERN (insn)) != USE
2928 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2929}
2930
2931rtx
2932next_active_insn (rtx insn)
2933{

--- 27 unchanged lines hidden (view full) ---

2961/* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2962
2963rtx
2964next_label (rtx insn)
2965{
2966 while (insn)
2967 {
2968 insn = NEXT_INSN (insn);
3163 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2969 if (insn == 0 || LABEL_P (insn))
3164 break;
3165 }
3166
3167 return insn;
3168}
3169
3170/* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3171
3172rtx
3173prev_label (rtx insn)
3174{
3175 while (insn)
3176 {
3177 insn = PREV_INSN (insn);
2970 break;
2971 }
2972
2973 return insn;
2974}
2975
2976/* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2977
2978rtx
2979prev_label (rtx insn)
2980{
2981 while (insn)
2982 {
2983 insn = PREV_INSN (insn);
3178 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2984 if (insn == 0 || LABEL_P (insn))
3179 break;
3180 }
3181
3182 return insn;
3183}
2985 break;
2986 }
2987
2988 return insn;
2989}
2990
2991/* Return the last label to mark the same position as LABEL. Return null
2992 if LABEL itself is null. */
2993
2994rtx
2995skip_consecutive_labels (rtx label)
2996{
2997 rtx insn;
2998
2999 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3000 if (LABEL_P (insn))
3001 label = insn;
3002
3003 return label;
3004}
3184
3185#ifdef HAVE_cc0
3186/* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3187 and REG_CC_USER notes so we can find it. */
3188
3189void
3190link_cc0_insns (rtx insn)
3191{
3192 rtx user = next_nonnote_insn (insn);
3193
3005
3006#ifdef HAVE_cc0
3007/* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3008 and REG_CC_USER notes so we can find it. */
3009
3010void
3011link_cc0_insns (rtx insn)
3012{
3013 rtx user = next_nonnote_insn (insn);
3014
3194 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3015 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3195 user = XVECEXP (PATTERN (user), 0, 0);
3196
3197 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3198 REG_NOTES (user));
3199 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3200}
3201
3202/* Return the next insn that uses CC0 after INSN, which is assumed to

--- 9 unchanged lines hidden (view full) ---

3212next_cc0_user (rtx insn)
3213{
3214 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3215
3216 if (note)
3217 return XEXP (note, 0);
3218
3219 insn = next_nonnote_insn (insn);
3016 user = XVECEXP (PATTERN (user), 0, 0);
3017
3018 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3019 REG_NOTES (user));
3020 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3021}
3022
3023/* Return the next insn that uses CC0 after INSN, which is assumed to

--- 9 unchanged lines hidden (view full) ---

3033next_cc0_user (rtx insn)
3034{
3035 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3036
3037 if (note)
3038 return XEXP (note, 0);
3039
3040 insn = next_nonnote_insn (insn);
3220 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3041 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3221 insn = XVECEXP (PATTERN (insn), 0, 0);
3222
3223 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3224 return insn;
3225
3226 return 0;
3227}
3228

--- 4 unchanged lines hidden (view full) ---

3233prev_cc0_setter (rtx insn)
3234{
3235 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3236
3237 if (note)
3238 return XEXP (note, 0);
3239
3240 insn = prev_nonnote_insn (insn);
3042 insn = XVECEXP (PATTERN (insn), 0, 0);
3043
3044 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3045 return insn;
3046
3047 return 0;
3048}
3049

--- 4 unchanged lines hidden (view full) ---

3054prev_cc0_setter (rtx insn)
3055{
3056 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3057
3058 if (note)
3059 return XEXP (note, 0);
3060
3061 insn = prev_nonnote_insn (insn);
3241 if (! sets_cc0_p (PATTERN (insn)))
3242 abort ();
3062 gcc_assert (sets_cc0_p (PATTERN (insn)));
3243
3244 return insn;
3245}
3246#endif
3247
3248/* Increment the label uses for all labels present in rtx. */
3249
3250static void

--- 46 unchanged lines hidden (view full) ---

3297 probability = split_branch_probability;
3298
3299 seq = split_insns (pat, trial);
3300
3301 split_branch_probability = -1;
3302
3303 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3304 We may need to handle this specially. */
3063
3064 return insn;
3065}
3066#endif
3067
3068/* Increment the label uses for all labels present in rtx. */
3069
3070static void

--- 46 unchanged lines hidden (view full) ---

3117 probability = split_branch_probability;
3118
3119 seq = split_insns (pat, trial);
3120
3121 split_branch_probability = -1;
3122
3123 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3124 We may need to handle this specially. */
3305 if (after && GET_CODE (after) == BARRIER)
3125 if (after && BARRIER_P (after))
3306 {
3307 has_barrier = 1;
3308 after = NEXT_INSN (after);
3309 }
3310
3311 if (!seq)
3312 return trial;
3313

--- 8 unchanged lines hidden (view full) ---

3322 if (!NEXT_INSN (insn_last))
3323 break;
3324 insn_last = NEXT_INSN (insn_last);
3325 }
3326
3327 /* Mark labels. */
3328 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3329 {
3126 {
3127 has_barrier = 1;
3128 after = NEXT_INSN (after);
3129 }
3130
3131 if (!seq)
3132 return trial;
3133

--- 8 unchanged lines hidden (view full) ---

3142 if (!NEXT_INSN (insn_last))
3143 break;
3144 insn_last = NEXT_INSN (insn_last);
3145 }
3146
3147 /* Mark labels. */
3148 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3149 {
3330 if (GET_CODE (insn) == JUMP_INSN)
3150 if (JUMP_P (insn))
3331 {
3332 mark_jump_label (PATTERN (insn), insn, 0);
3333 njumps++;
3334 if (probability != -1
3335 && any_condjump_p (insn)
3336 && !find_reg_note (insn, REG_BR_PROB, 0))
3337 {
3338 /* We can preserve the REG_BR_PROB notes only if exactly
3339 one jump is created, otherwise the machine description
3340 is responsible for this step using
3341 split_branch_probability variable. */
3151 {
3152 mark_jump_label (PATTERN (insn), insn, 0);
3153 njumps++;
3154 if (probability != -1
3155 && any_condjump_p (insn)
3156 && !find_reg_note (insn, REG_BR_PROB, 0))
3157 {
3158 /* We can preserve the REG_BR_PROB notes only if exactly
3159 one jump is created, otherwise the machine description
3160 is responsible for this step using
3161 split_branch_probability variable. */
3342 if (njumps != 1)
3343 abort ();
3162 gcc_assert (njumps == 1);
3344 REG_NOTES (insn)
3345 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3346 GEN_INT (probability),
3347 REG_NOTES (insn));
3348 }
3349 }
3350 }
3351
3352 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3353 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3163 REG_NOTES (insn)
3164 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3165 GEN_INT (probability),
3166 REG_NOTES (insn));
3167 }
3168 }
3169 }
3170
3171 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3172 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3354 if (GET_CODE (trial) == CALL_INSN)
3173 if (CALL_P (trial))
3355 {
3356 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3174 {
3175 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3357 if (GET_CODE (insn) == CALL_INSN)
3176 if (CALL_P (insn))
3358 {
3359 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3360 while (*p)
3361 p = &XEXP (*p, 1);
3362 *p = CALL_INSN_FUNCTION_USAGE (trial);
3363 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3364 }
3365 }
3366
3367 /* Copy notes, particularly those related to the CFG. */
3368 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3369 {
3370 switch (REG_NOTE_KIND (note))
3371 {
3372 case REG_EH_REGION:
3373 insn = insn_last;
3374 while (insn != NULL_RTX)
3375 {
3177 {
3178 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3179 while (*p)
3180 p = &XEXP (*p, 1);
3181 *p = CALL_INSN_FUNCTION_USAGE (trial);
3182 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3183 }
3184 }
3185
3186 /* Copy notes, particularly those related to the CFG. */
3187 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3188 {
3189 switch (REG_NOTE_KIND (note))
3190 {
3191 case REG_EH_REGION:
3192 insn = insn_last;
3193 while (insn != NULL_RTX)
3194 {
3376 if (GET_CODE (insn) == CALL_INSN
3377 || (flag_non_call_exceptions
3195 if (CALL_P (insn)
3196 || (flag_non_call_exceptions && INSN_P (insn)
3378 && may_trap_p (PATTERN (insn))))
3379 REG_NOTES (insn)
3380 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3381 XEXP (note, 0),
3382 REG_NOTES (insn));
3383 insn = PREV_INSN (insn);
3384 }
3385 break;
3386
3387 case REG_NORETURN:
3388 case REG_SETJMP:
3197 && may_trap_p (PATTERN (insn))))
3198 REG_NOTES (insn)
3199 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3200 XEXP (note, 0),
3201 REG_NOTES (insn));
3202 insn = PREV_INSN (insn);
3203 }
3204 break;
3205
3206 case REG_NORETURN:
3207 case REG_SETJMP:
3389 case REG_ALWAYS_RETURN:
3390 insn = insn_last;
3391 while (insn != NULL_RTX)
3392 {
3208 insn = insn_last;
3209 while (insn != NULL_RTX)
3210 {
3393 if (GET_CODE (insn) == CALL_INSN)
3211 if (CALL_P (insn))
3394 REG_NOTES (insn)
3395 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3396 XEXP (note, 0),
3397 REG_NOTES (insn));
3398 insn = PREV_INSN (insn);
3399 }
3400 break;
3401
3402 case REG_NON_LOCAL_GOTO:
3403 insn = insn_last;
3404 while (insn != NULL_RTX)
3405 {
3212 REG_NOTES (insn)
3213 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3214 XEXP (note, 0),
3215 REG_NOTES (insn));
3216 insn = PREV_INSN (insn);
3217 }
3218 break;
3219
3220 case REG_NON_LOCAL_GOTO:
3221 insn = insn_last;
3222 while (insn != NULL_RTX)
3223 {
3406 if (GET_CODE (insn) == JUMP_INSN)
3224 if (JUMP_P (insn))
3407 REG_NOTES (insn)
3408 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3409 XEXP (note, 0),
3410 REG_NOTES (insn));
3411 insn = PREV_INSN (insn);
3412 }
3413 break;
3414
3415 default:
3416 break;
3417 }
3418 }
3419
3420 /* If there are LABELS inside the split insns increment the
3421 usage count so we don't delete the label. */
3225 REG_NOTES (insn)
3226 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3227 XEXP (note, 0),
3228 REG_NOTES (insn));
3229 insn = PREV_INSN (insn);
3230 }
3231 break;
3232
3233 default:
3234 break;
3235 }
3236 }
3237
3238 /* If there are LABELS inside the split insns increment the
3239 usage count so we don't delete the label. */
3422 if (GET_CODE (trial) == INSN)
3240 if (NONJUMP_INSN_P (trial))
3423 {
3424 insn = insn_last;
3425 while (insn != NULL_RTX)
3426 {
3241 {
3242 insn = insn_last;
3243 while (insn != NULL_RTX)
3244 {
3427 if (GET_CODE (insn) == INSN)
3245 if (NONJUMP_INSN_P (insn))
3428 mark_label_nuses (PATTERN (insn));
3429
3430 insn = PREV_INSN (insn);
3431 }
3432 }
3433
3434 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3435

--- 37 unchanged lines hidden (view full) ---

3473
3474#ifdef ENABLE_RTL_CHECKING
3475 if (insn
3476 && INSN_P (insn)
3477 && (returnjump_p (insn)
3478 || (GET_CODE (insn) == SET
3479 && SET_DEST (insn) == pc_rtx)))
3480 {
3246 mark_label_nuses (PATTERN (insn));
3247
3248 insn = PREV_INSN (insn);
3249 }
3250 }
3251
3252 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3253

--- 37 unchanged lines hidden (view full) ---

3291
3292#ifdef ENABLE_RTL_CHECKING
3293 if (insn
3294 && INSN_P (insn)
3295 && (returnjump_p (insn)
3296 || (GET_CODE (insn) == SET
3297 && SET_DEST (insn) == pc_rtx)))
3298 {
3481 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3299 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3482 debug_rtx (insn);
3483 }
3484#endif
3485
3486 return insn;
3487}
3488
3489/* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3490
3300 debug_rtx (insn);
3301 }
3302#endif
3303
3304 return insn;
3305}
3306
3307/* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3308
3491static rtx
3309rtx
3492make_jump_insn_raw (rtx pattern)
3493{
3494 rtx insn;
3495
3496 insn = rtx_alloc (JUMP_INSN);
3497 INSN_UID (insn) = cur_insn_uid++;
3498
3499 PATTERN (insn) = pattern;

--- 52 unchanged lines hidden (view full) ---

3552 SEQUENCE. */
3553
3554void
3555add_insn_after (rtx insn, rtx after)
3556{
3557 rtx next = NEXT_INSN (after);
3558 basic_block bb;
3559
3310make_jump_insn_raw (rtx pattern)
3311{
3312 rtx insn;
3313
3314 insn = rtx_alloc (JUMP_INSN);
3315 INSN_UID (insn) = cur_insn_uid++;
3316
3317 PATTERN (insn) = pattern;

--- 52 unchanged lines hidden (view full) ---

3370 SEQUENCE. */
3371
3372void
3373add_insn_after (rtx insn, rtx after)
3374{
3375 rtx next = NEXT_INSN (after);
3376 basic_block bb;
3377
3560 if (optimize && INSN_DELETED_P (after))
3561 abort ();
3378 gcc_assert (!optimize || !INSN_DELETED_P (after));
3562
3563 NEXT_INSN (insn) = next;
3564 PREV_INSN (insn) = after;
3565
3566 if (next)
3567 {
3568 PREV_INSN (next) = insn;
3379
3380 NEXT_INSN (insn) = next;
3381 PREV_INSN (insn) = after;
3382
3383 if (next)
3384 {
3385 PREV_INSN (next) = insn;
3569 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3386 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3570 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3571 }
3572 else if (last_insn == after)
3573 last_insn = insn;
3574 else
3575 {
3576 struct sequence_stack *stack = seq_stack;
3577 /* Scan all pending sequences too. */
3578 for (; stack; stack = stack->next)
3579 if (after == stack->last)
3580 {
3581 stack->last = insn;
3582 break;
3583 }
3584
3387 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3388 }
3389 else if (last_insn == after)
3390 last_insn = insn;
3391 else
3392 {
3393 struct sequence_stack *stack = seq_stack;
3394 /* Scan all pending sequences too. */
3395 for (; stack; stack = stack->next)
3396 if (after == stack->last)
3397 {
3398 stack->last = insn;
3399 break;
3400 }
3401
3585 if (stack == 0)
3586 abort ();
3402 gcc_assert (stack);
3587 }
3588
3403 }
3404
3589 if (GET_CODE (after) != BARRIER
3590 && GET_CODE (insn) != BARRIER
3405 if (!BARRIER_P (after)
3406 && !BARRIER_P (insn)
3591 && (bb = BLOCK_FOR_INSN (after)))
3592 {
3593 set_block_for_insn (insn, bb);
3594 if (INSN_P (insn))
3595 bb->flags |= BB_DIRTY;
3596 /* Should not happen as first in the BB is always
3597 either NOTE or LABEL. */
3598 if (BB_END (bb) == after
3599 /* Avoid clobbering of structure when creating new BB. */
3407 && (bb = BLOCK_FOR_INSN (after)))
3408 {
3409 set_block_for_insn (insn, bb);
3410 if (INSN_P (insn))
3411 bb->flags |= BB_DIRTY;
3412 /* Should not happen as first in the BB is always
3413 either NOTE or LABEL. */
3414 if (BB_END (bb) == after
3415 /* Avoid clobbering of structure when creating new BB. */
3600 && GET_CODE (insn) != BARRIER
3601 && (GET_CODE (insn) != NOTE
3416 && !BARRIER_P (insn)
3417 && (!NOTE_P (insn)
3602 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3603 BB_END (bb) = insn;
3604 }
3605
3606 NEXT_INSN (after) = insn;
3418 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3419 BB_END (bb) = insn;
3420 }
3421
3422 NEXT_INSN (after) = insn;
3607 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3423 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3608 {
3609 rtx sequence = PATTERN (after);
3610 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3611 }
3612}
3613
3614/* Add INSN into the doubly-linked list before insn BEFORE. This and
3615 the previous should be the only functions called to insert an insn once
3616 delay slots have been filled since only they know how to update a
3617 SEQUENCE. */
3618
3619void
3620add_insn_before (rtx insn, rtx before)
3621{
3622 rtx prev = PREV_INSN (before);
3623 basic_block bb;
3624
3424 {
3425 rtx sequence = PATTERN (after);
3426 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3427 }
3428}
3429
3430/* Add INSN into the doubly-linked list before insn BEFORE. This and
3431 the previous should be the only functions called to insert an insn once
3432 delay slots have been filled since only they know how to update a
3433 SEQUENCE. */
3434
3435void
3436add_insn_before (rtx insn, rtx before)
3437{
3438 rtx prev = PREV_INSN (before);
3439 basic_block bb;
3440
3625 if (optimize && INSN_DELETED_P (before))
3626 abort ();
3441 gcc_assert (!optimize || !INSN_DELETED_P (before));
3627
3628 PREV_INSN (insn) = prev;
3629 NEXT_INSN (insn) = before;
3630
3631 if (prev)
3632 {
3633 NEXT_INSN (prev) = insn;
3442
3443 PREV_INSN (insn) = prev;
3444 NEXT_INSN (insn) = before;
3445
3446 if (prev)
3447 {
3448 NEXT_INSN (prev) = insn;
3634 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3449 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3635 {
3636 rtx sequence = PATTERN (prev);
3637 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3638 }
3639 }
3640 else if (first_insn == before)
3641 first_insn = insn;
3642 else
3643 {
3644 struct sequence_stack *stack = seq_stack;
3645 /* Scan all pending sequences too. */
3646 for (; stack; stack = stack->next)
3647 if (before == stack->first)
3648 {
3649 stack->first = insn;
3650 break;
3651 }
3652
3450 {
3451 rtx sequence = PATTERN (prev);
3452 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3453 }
3454 }
3455 else if (first_insn == before)
3456 first_insn = insn;
3457 else
3458 {
3459 struct sequence_stack *stack = seq_stack;
3460 /* Scan all pending sequences too. */
3461 for (; stack; stack = stack->next)
3462 if (before == stack->first)
3463 {
3464 stack->first = insn;
3465 break;
3466 }
3467
3653 if (stack == 0)
3654 abort ();
3468 gcc_assert (stack);
3655 }
3656
3469 }
3470
3657 if (GET_CODE (before) != BARRIER
3658 && GET_CODE (insn) != BARRIER
3471 if (!BARRIER_P (before)
3472 && !BARRIER_P (insn)
3659 && (bb = BLOCK_FOR_INSN (before)))
3660 {
3661 set_block_for_insn (insn, bb);
3662 if (INSN_P (insn))
3663 bb->flags |= BB_DIRTY;
3473 && (bb = BLOCK_FOR_INSN (before)))
3474 {
3475 set_block_for_insn (insn, bb);
3476 if (INSN_P (insn))
3477 bb->flags |= BB_DIRTY;
3664 /* Should not happen as first in the BB is always
3665 either NOTE or LABEl. */
3666 if (BB_HEAD (bb) == insn
3667 /* Avoid clobbering of structure when creating new BB. */
3668 && GET_CODE (insn) != BARRIER
3669 && (GET_CODE (insn) != NOTE
3670 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3671 abort ();
3478 /* Should not happen as first in the BB is always either NOTE or
3479 LABEL. */
3480 gcc_assert (BB_HEAD (bb) != insn
3481 /* Avoid clobbering of structure when creating new BB. */
3482 || BARRIER_P (insn)
3483 || (NOTE_P (insn)
3484 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK));
3672 }
3673
3674 PREV_INSN (before) = insn;
3485 }
3486
3487 PREV_INSN (before) = insn;
3675 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3488 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3676 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3677}
3678
3679/* Remove an insn from its doubly-linked list. This function knows how
3680 to handle sequences. */
3681void
3682remove_insn (rtx insn)
3683{
3684 rtx next = NEXT_INSN (insn);
3685 rtx prev = PREV_INSN (insn);
3686 basic_block bb;
3687
3688 if (prev)
3689 {
3690 NEXT_INSN (prev) = next;
3489 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3490}
3491
3492/* Remove an insn from its doubly-linked list. This function knows how
3493 to handle sequences. */
3494void
3495remove_insn (rtx insn)
3496{
3497 rtx next = NEXT_INSN (insn);
3498 rtx prev = PREV_INSN (insn);
3499 basic_block bb;
3500
3501 if (prev)
3502 {
3503 NEXT_INSN (prev) = next;
3691 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3504 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3692 {
3693 rtx sequence = PATTERN (prev);
3694 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3695 }
3696 }
3697 else if (first_insn == insn)
3698 first_insn = next;
3699 else
3700 {
3701 struct sequence_stack *stack = seq_stack;
3702 /* Scan all pending sequences too. */
3703 for (; stack; stack = stack->next)
3704 if (insn == stack->first)
3705 {
3706 stack->first = next;
3707 break;
3708 }
3709
3505 {
3506 rtx sequence = PATTERN (prev);
3507 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3508 }
3509 }
3510 else if (first_insn == insn)
3511 first_insn = next;
3512 else
3513 {
3514 struct sequence_stack *stack = seq_stack;
3515 /* Scan all pending sequences too. */
3516 for (; stack; stack = stack->next)
3517 if (insn == stack->first)
3518 {
3519 stack->first = next;
3520 break;
3521 }
3522
3710 if (stack == 0)
3711 abort ();
3523 gcc_assert (stack);
3712 }
3713
3714 if (next)
3715 {
3716 PREV_INSN (next) = prev;
3524 }
3525
3526 if (next)
3527 {
3528 PREV_INSN (next) = prev;
3717 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3529 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3718 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3719 }
3720 else if (last_insn == insn)
3721 last_insn = prev;
3722 else
3723 {
3724 struct sequence_stack *stack = seq_stack;
3725 /* Scan all pending sequences too. */
3726 for (; stack; stack = stack->next)
3727 if (insn == stack->last)
3728 {
3729 stack->last = prev;
3730 break;
3731 }
3732
3530 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3531 }
3532 else if (last_insn == insn)
3533 last_insn = prev;
3534 else
3535 {
3536 struct sequence_stack *stack = seq_stack;
3537 /* Scan all pending sequences too. */
3538 for (; stack; stack = stack->next)
3539 if (insn == stack->last)
3540 {
3541 stack->last = prev;
3542 break;
3543 }
3544
3733 if (stack == 0)
3734 abort ();
3545 gcc_assert (stack);
3735 }
3546 }
3736 if (GET_CODE (insn) != BARRIER
3547 if (!BARRIER_P (insn)
3737 && (bb = BLOCK_FOR_INSN (insn)))
3738 {
3739 if (INSN_P (insn))
3740 bb->flags |= BB_DIRTY;
3741 if (BB_HEAD (bb) == insn)
3742 {
3743 /* Never ever delete the basic block note without deleting whole
3744 basic block. */
3548 && (bb = BLOCK_FOR_INSN (insn)))
3549 {
3550 if (INSN_P (insn))
3551 bb->flags |= BB_DIRTY;
3552 if (BB_HEAD (bb) == insn)
3553 {
3554 /* Never ever delete the basic block note without deleting whole
3555 basic block. */
3745 if (GET_CODE (insn) == NOTE)
3746 abort ();
3556 gcc_assert (!NOTE_P (insn));
3747 BB_HEAD (bb) = next;
3748 }
3749 if (BB_END (bb) == insn)
3750 BB_END (bb) = prev;
3751 }
3752}
3753
3754/* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3755
3756void
3757add_function_usage_to (rtx call_insn, rtx call_fusage)
3758{
3557 BB_HEAD (bb) = next;
3558 }
3559 if (BB_END (bb) == insn)
3560 BB_END (bb) = prev;
3561 }
3562}
3563
3564/* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3565
3566void
3567add_function_usage_to (rtx call_insn, rtx call_fusage)
3568{
3759 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3760 abort ();
3569 gcc_assert (call_insn && CALL_P (call_insn));
3761
3762 /* Put the register usage information on the CALL. If there is already
3763 some usage information, put ours at the end. */
3764 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3765 {
3766 rtx link;
3767
3768 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;

--- 57 unchanged lines hidden (view full) ---

3826void
3827reorder_insns (rtx from, rtx to, rtx after)
3828{
3829 rtx prev = PREV_INSN (from);
3830 basic_block bb, bb2;
3831
3832 reorder_insns_nobb (from, to, after);
3833
3570
3571 /* Put the register usage information on the CALL. If there is already
3572 some usage information, put ours at the end. */
3573 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3574 {
3575 rtx link;
3576
3577 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;

--- 57 unchanged lines hidden (view full) ---

3635void
3636reorder_insns (rtx from, rtx to, rtx after)
3637{
3638 rtx prev = PREV_INSN (from);
3639 basic_block bb, bb2;
3640
3641 reorder_insns_nobb (from, to, after);
3642
3834 if (GET_CODE (after) != BARRIER
3643 if (!BARRIER_P (after)
3835 && (bb = BLOCK_FOR_INSN (after)))
3836 {
3837 rtx x;
3838 bb->flags |= BB_DIRTY;
3839
3644 && (bb = BLOCK_FOR_INSN (after)))
3645 {
3646 rtx x;
3647 bb->flags |= BB_DIRTY;
3648
3840 if (GET_CODE (from) != BARRIER
3649 if (!BARRIER_P (from)
3841 && (bb2 = BLOCK_FOR_INSN (from)))
3842 {
3843 if (BB_END (bb2) == to)
3844 BB_END (bb2) = prev;
3845 bb2->flags |= BB_DIRTY;
3846 }
3847
3848 if (BB_END (bb) == after)
3849 BB_END (bb) = to;
3850
3851 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3650 && (bb2 = BLOCK_FOR_INSN (from)))
3651 {
3652 if (BB_END (bb2) == to)
3653 BB_END (bb2) = prev;
3654 bb2->flags |= BB_DIRTY;
3655 }
3656
3657 if (BB_END (bb) == after)
3658 BB_END (bb) = to;
3659
3660 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3852 set_block_for_insn (x, bb);
3661 if (!BARRIER_P (x))
3662 set_block_for_insn (x, bb);
3853 }
3854}
3855
3856/* Return the line note insn preceding INSN. */
3857
3858static rtx
3859find_line_note (rtx insn)
3860{
3861 if (no_line_numbers)
3862 return 0;
3863
3864 for (; insn; insn = PREV_INSN (insn))
3663 }
3664}
3665
3666/* Return the line note insn preceding INSN. */
3667
3668static rtx
3669find_line_note (rtx insn)
3670{
3671 if (no_line_numbers)
3672 return 0;
3673
3674 for (; insn; insn = PREV_INSN (insn))
3865 if (GET_CODE (insn) == NOTE
3675 if (NOTE_P (insn)
3866 && NOTE_LINE_NUMBER (insn) >= 0)
3867 break;
3868
3869 return insn;
3870}
3871
3676 && NOTE_LINE_NUMBER (insn) >= 0)
3677 break;
3678
3679 return insn;
3680}
3681
3872/* Like reorder_insns, but inserts line notes to preserve the line numbers
3873 of the moved insns when debugging. This may insert a note between AFTER
3874 and FROM, and another one after TO. */
3875
3876void
3877reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3878{
3879 rtx from_line = find_line_note (from);
3880 rtx after_line = find_line_note (after);
3881
3882 reorder_insns (from, to, after);
3883
3884 if (from_line == after_line)
3885 return;
3886
3887 if (from_line)
3888 emit_note_copy_after (from_line, after);
3889 if (after_line)
3890 emit_note_copy_after (after_line, to);
3891}
3892
3893/* Remove unnecessary notes from the instruction stream. */
3894
3895void
3896remove_unnecessary_notes (void)
3897{
3898 rtx block_stack = NULL_RTX;
3899 rtx eh_stack = NULL_RTX;
3900 rtx insn;
3901 rtx next;
3902 rtx tmp;
3903
3904 /* We must not remove the first instruction in the function because
3905 the compiler depends on the first instruction being a note. */
3906 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3907 {
3908 /* Remember what's next. */
3909 next = NEXT_INSN (insn);
3910
3911 /* We're only interested in notes. */
3912 if (GET_CODE (insn) != NOTE)
3913 continue;
3914
3915 switch (NOTE_LINE_NUMBER (insn))
3916 {
3917 case NOTE_INSN_DELETED:
3918 case NOTE_INSN_LOOP_END_TOP_COND:
3919 remove_insn (insn);
3920 break;
3921
3922 case NOTE_INSN_EH_REGION_BEG:
3923 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3924 break;
3925
3926 case NOTE_INSN_EH_REGION_END:
3927 /* Too many end notes. */
3928 if (eh_stack == NULL_RTX)
3929 abort ();
3930 /* Mismatched nesting. */
3931 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3932 abort ();
3933 tmp = eh_stack;
3934 eh_stack = XEXP (eh_stack, 1);
3935 free_INSN_LIST_node (tmp);
3936 break;
3937
3938 case NOTE_INSN_BLOCK_BEG:
3939 /* By now, all notes indicating lexical blocks should have
3940 NOTE_BLOCK filled in. */
3941 if (NOTE_BLOCK (insn) == NULL_TREE)
3942 abort ();
3943 block_stack = alloc_INSN_LIST (insn, block_stack);
3944 break;
3945
3946 case NOTE_INSN_BLOCK_END:
3947 /* Too many end notes. */
3948 if (block_stack == NULL_RTX)
3949 abort ();
3950 /* Mismatched nesting. */
3951 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3952 abort ();
3953 tmp = block_stack;
3954 block_stack = XEXP (block_stack, 1);
3955 free_INSN_LIST_node (tmp);
3956
3957 /* Scan back to see if there are any non-note instructions
3958 between INSN and the beginning of this block. If not,
3959 then there is no PC range in the generated code that will
3960 actually be in this block, so there's no point in
3961 remembering the existence of the block. */
3962 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3963 {
3964 /* This block contains a real instruction. Note that we
3965 don't include labels; if the only thing in the block
3966 is a label, then there are still no PC values that
3967 lie within the block. */
3968 if (INSN_P (tmp))
3969 break;
3970
3971 /* We're only interested in NOTEs. */
3972 if (GET_CODE (tmp) != NOTE)
3973 continue;
3974
3975 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3976 {
3977 /* We just verified that this BLOCK matches us with
3978 the block_stack check above. Never delete the
3979 BLOCK for the outermost scope of the function; we
3980 can refer to names from that scope even if the
3981 block notes are messed up. */
3982 if (! is_body_block (NOTE_BLOCK (insn))
3983 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3984 {
3985 remove_insn (tmp);
3986 remove_insn (insn);
3987 }
3988 break;
3989 }
3990 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3991 /* There's a nested block. We need to leave the
3992 current block in place since otherwise the debugger
3993 wouldn't be able to show symbols from our block in
3994 the nested block. */
3995 break;
3996 }
3997 }
3998 }
3999
4000 /* Too many begin notes. */
4001 if (block_stack || eh_stack)
4002 abort ();
4003}
4004
4005
4006/* Emit insn(s) of given code and pattern
4007 at a specified place within the doubly-linked list.
4008
4009 All of the emit_foo global entry points accept an object
4010 X which is either an insn list or a PATTERN of a single
4011 instruction.
4012

--- 18 unchanged lines hidden (view full) ---

4031/* Make X be output before the instruction BEFORE. */
4032
4033rtx
4034emit_insn_before_noloc (rtx x, rtx before)
4035{
4036 rtx last = before;
4037 rtx insn;
4038
3682
3683/* Emit insn(s) of given code and pattern
3684 at a specified place within the doubly-linked list.
3685
3686 All of the emit_foo global entry points accept an object
3687 X which is either an insn list or a PATTERN of a single
3688 instruction.
3689

--- 18 unchanged lines hidden (view full) ---

3708/* Make X be output before the instruction BEFORE. */
3709
3710rtx
3711emit_insn_before_noloc (rtx x, rtx before)
3712{
3713 rtx last = before;
3714 rtx insn;
3715
4039#ifdef ENABLE_RTL_CHECKING
4040 if (before == NULL_RTX)
4041 abort ();
4042#endif
3716 gcc_assert (before);
4043
4044 if (x == NULL_RTX)
4045 return last;
4046
4047 switch (GET_CODE (x))
4048 {
4049 case INSN:
4050 case JUMP_INSN:

--- 8 unchanged lines hidden (view full) ---

4059 add_insn_before (insn, before);
4060 last = insn;
4061 insn = next;
4062 }
4063 break;
4064
4065#ifdef ENABLE_RTL_CHECKING
4066 case SEQUENCE:
3717
3718 if (x == NULL_RTX)
3719 return last;
3720
3721 switch (GET_CODE (x))
3722 {
3723 case INSN:
3724 case JUMP_INSN:

--- 8 unchanged lines hidden (view full) ---

3733 add_insn_before (insn, before);
3734 last = insn;
3735 insn = next;
3736 }
3737 break;
3738
3739#ifdef ENABLE_RTL_CHECKING
3740 case SEQUENCE:
4067 abort ();
3741 gcc_unreachable ();
4068 break;
4069#endif
4070
4071 default:
4072 last = make_insn_raw (x);
4073 add_insn_before (last, before);
4074 break;
4075 }

--- 4 unchanged lines hidden (view full) ---

4080/* Make an instruction with body X and code JUMP_INSN
4081 and output it before the instruction BEFORE. */
4082
4083rtx
4084emit_jump_insn_before_noloc (rtx x, rtx before)
4085{
4086 rtx insn, last = NULL_RTX;
4087
3742 break;
3743#endif
3744
3745 default:
3746 last = make_insn_raw (x);
3747 add_insn_before (last, before);
3748 break;
3749 }

--- 4 unchanged lines hidden (view full) ---

3754/* Make an instruction with body X and code JUMP_INSN
3755 and output it before the instruction BEFORE. */
3756
3757rtx
3758emit_jump_insn_before_noloc (rtx x, rtx before)
3759{
3760 rtx insn, last = NULL_RTX;
3761
4088#ifdef ENABLE_RTL_CHECKING
4089 if (before == NULL_RTX)
4090 abort ();
4091#endif
3762 gcc_assert (before);
4092
4093 switch (GET_CODE (x))
4094 {
4095 case INSN:
4096 case JUMP_INSN:
4097 case CALL_INSN:
4098 case CODE_LABEL:
4099 case BARRIER:

--- 5 unchanged lines hidden (view full) ---

4105 add_insn_before (insn, before);
4106 last = insn;
4107 insn = next;
4108 }
4109 break;
4110
4111#ifdef ENABLE_RTL_CHECKING
4112 case SEQUENCE:
3763
3764 switch (GET_CODE (x))
3765 {
3766 case INSN:
3767 case JUMP_INSN:
3768 case CALL_INSN:
3769 case CODE_LABEL:
3770 case BARRIER:

--- 5 unchanged lines hidden (view full) ---

3776 add_insn_before (insn, before);
3777 last = insn;
3778 insn = next;
3779 }
3780 break;
3781
3782#ifdef ENABLE_RTL_CHECKING
3783 case SEQUENCE:
4113 abort ();
3784 gcc_unreachable ();
4114 break;
4115#endif
4116
4117 default:
4118 last = make_jump_insn_raw (x);
4119 add_insn_before (last, before);
4120 break;
4121 }

--- 4 unchanged lines hidden (view full) ---

4126/* Make an instruction with body X and code CALL_INSN
4127 and output it before the instruction BEFORE. */
4128
4129rtx
4130emit_call_insn_before_noloc (rtx x, rtx before)
4131{
4132 rtx last = NULL_RTX, insn;
4133
3785 break;
3786#endif
3787
3788 default:
3789 last = make_jump_insn_raw (x);
3790 add_insn_before (last, before);
3791 break;
3792 }

--- 4 unchanged lines hidden (view full) ---

3797/* Make an instruction with body X and code CALL_INSN
3798 and output it before the instruction BEFORE. */
3799
3800rtx
3801emit_call_insn_before_noloc (rtx x, rtx before)
3802{
3803 rtx last = NULL_RTX, insn;
3804
4134#ifdef ENABLE_RTL_CHECKING
4135 if (before == NULL_RTX)
4136 abort ();
4137#endif
3805 gcc_assert (before);
4138
4139 switch (GET_CODE (x))
4140 {
4141 case INSN:
4142 case JUMP_INSN:
4143 case CALL_INSN:
4144 case CODE_LABEL:
4145 case BARRIER:

--- 5 unchanged lines hidden (view full) ---

4151 add_insn_before (insn, before);
4152 last = insn;
4153 insn = next;
4154 }
4155 break;
4156
4157#ifdef ENABLE_RTL_CHECKING
4158 case SEQUENCE:
3806
3807 switch (GET_CODE (x))
3808 {
3809 case INSN:
3810 case JUMP_INSN:
3811 case CALL_INSN:
3812 case CODE_LABEL:
3813 case BARRIER:

--- 5 unchanged lines hidden (view full) ---

3819 add_insn_before (insn, before);
3820 last = insn;
3821 insn = next;
3822 }
3823 break;
3824
3825#ifdef ENABLE_RTL_CHECKING
3826 case SEQUENCE:
4159 abort ();
3827 gcc_unreachable ();
4160 break;
4161#endif
4162
4163 default:
4164 last = make_call_insn_raw (x);
4165 add_insn_before (last, before);
4166 break;
4167 }

--- 33 unchanged lines hidden (view full) ---

4201
4202/* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4203
4204rtx
4205emit_note_before (int subtype, rtx before)
4206{
4207 rtx note = rtx_alloc (NOTE);
4208 INSN_UID (note) = cur_insn_uid++;
3828 break;
3829#endif
3830
3831 default:
3832 last = make_call_insn_raw (x);
3833 add_insn_before (last, before);
3834 break;
3835 }

--- 33 unchanged lines hidden (view full) ---

3869
3870/* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3871
3872rtx
3873emit_note_before (int subtype, rtx before)
3874{
3875 rtx note = rtx_alloc (NOTE);
3876 INSN_UID (note) = cur_insn_uid++;
3877#ifndef USE_MAPPED_LOCATION
4209 NOTE_SOURCE_FILE (note) = 0;
3878 NOTE_SOURCE_FILE (note) = 0;
3879#endif
4210 NOTE_LINE_NUMBER (note) = subtype;
4211 BLOCK_FOR_INSN (note) = NULL;
4212
4213 add_insn_before (note, before);
4214 return note;
4215}
4216
4217/* Helper for emit_insn_after, handles lists of instructions
4218 efficiently. */
4219
4220static rtx emit_insn_after_1 (rtx, rtx);
4221
4222static rtx
4223emit_insn_after_1 (rtx first, rtx after)
4224{
4225 rtx last;
4226 rtx after_after;
4227 basic_block bb;
4228
3880 NOTE_LINE_NUMBER (note) = subtype;
3881 BLOCK_FOR_INSN (note) = NULL;
3882
3883 add_insn_before (note, before);
3884 return note;
3885}
3886
3887/* Helper for emit_insn_after, handles lists of instructions
3888 efficiently. */
3889
3890static rtx emit_insn_after_1 (rtx, rtx);
3891
3892static rtx
3893emit_insn_after_1 (rtx first, rtx after)
3894{
3895 rtx last;
3896 rtx after_after;
3897 basic_block bb;
3898
4229 if (GET_CODE (after) != BARRIER
3899 if (!BARRIER_P (after)
4230 && (bb = BLOCK_FOR_INSN (after)))
4231 {
4232 bb->flags |= BB_DIRTY;
4233 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3900 && (bb = BLOCK_FOR_INSN (after)))
3901 {
3902 bb->flags |= BB_DIRTY;
3903 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4234 if (GET_CODE (last) != BARRIER)
3904 if (!BARRIER_P (last))
4235 set_block_for_insn (last, bb);
3905 set_block_for_insn (last, bb);
4236 if (GET_CODE (last) != BARRIER)
3906 if (!BARRIER_P (last))
4237 set_block_for_insn (last, bb);
4238 if (BB_END (bb) == after)
4239 BB_END (bb) = last;
4240 }
4241 else
4242 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4243 continue;
4244

--- 12 unchanged lines hidden (view full) ---

4257
4258/* Make X be output after the insn AFTER. */
4259
4260rtx
4261emit_insn_after_noloc (rtx x, rtx after)
4262{
4263 rtx last = after;
4264
3907 set_block_for_insn (last, bb);
3908 if (BB_END (bb) == after)
3909 BB_END (bb) = last;
3910 }
3911 else
3912 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3913 continue;
3914

--- 12 unchanged lines hidden (view full) ---

3927
3928/* Make X be output after the insn AFTER. */
3929
3930rtx
3931emit_insn_after_noloc (rtx x, rtx after)
3932{
3933 rtx last = after;
3934
4265#ifdef ENABLE_RTL_CHECKING
4266 if (after == NULL_RTX)
4267 abort ();
4268#endif
3935 gcc_assert (after);
4269
4270 if (x == NULL_RTX)
4271 return last;
4272
4273 switch (GET_CODE (x))
4274 {
4275 case INSN:
4276 case JUMP_INSN:
4277 case CALL_INSN:
4278 case CODE_LABEL:
4279 case BARRIER:
4280 case NOTE:
4281 last = emit_insn_after_1 (x, after);
4282 break;
4283
4284#ifdef ENABLE_RTL_CHECKING
4285 case SEQUENCE:
3936
3937 if (x == NULL_RTX)
3938 return last;
3939
3940 switch (GET_CODE (x))
3941 {
3942 case INSN:
3943 case JUMP_INSN:
3944 case CALL_INSN:
3945 case CODE_LABEL:
3946 case BARRIER:
3947 case NOTE:
3948 last = emit_insn_after_1 (x, after);
3949 break;
3950
3951#ifdef ENABLE_RTL_CHECKING
3952 case SEQUENCE:
4286 abort ();
3953 gcc_unreachable ();
4287 break;
4288#endif
4289
4290 default:
4291 last = make_insn_raw (x);
4292 add_insn_after (last, after);
4293 break;
4294 }

--- 21 unchanged lines hidden (view full) ---

4316/* Make an insn of code JUMP_INSN with body X
4317 and output it after the insn AFTER. */
4318
4319rtx
4320emit_jump_insn_after_noloc (rtx x, rtx after)
4321{
4322 rtx last;
4323
3954 break;
3955#endif
3956
3957 default:
3958 last = make_insn_raw (x);
3959 add_insn_after (last, after);
3960 break;
3961 }

--- 21 unchanged lines hidden (view full) ---

3983/* Make an insn of code JUMP_INSN with body X
3984 and output it after the insn AFTER. */
3985
3986rtx
3987emit_jump_insn_after_noloc (rtx x, rtx after)
3988{
3989 rtx last;
3990
4324#ifdef ENABLE_RTL_CHECKING
4325 if (after == NULL_RTX)
4326 abort ();
4327#endif
3991 gcc_assert (after);
4328
4329 switch (GET_CODE (x))
4330 {
4331 case INSN:
4332 case JUMP_INSN:
4333 case CALL_INSN:
4334 case CODE_LABEL:
4335 case BARRIER:
4336 case NOTE:
4337 last = emit_insn_after_1 (x, after);
4338 break;
4339
4340#ifdef ENABLE_RTL_CHECKING
4341 case SEQUENCE:
3992
3993 switch (GET_CODE (x))
3994 {
3995 case INSN:
3996 case JUMP_INSN:
3997 case CALL_INSN:
3998 case CODE_LABEL:
3999 case BARRIER:
4000 case NOTE:
4001 last = emit_insn_after_1 (x, after);
4002 break;
4003
4004#ifdef ENABLE_RTL_CHECKING
4005 case SEQUENCE:
4342 abort ();
4006 gcc_unreachable ();
4343 break;
4344#endif
4345
4346 default:
4347 last = make_jump_insn_raw (x);
4348 add_insn_after (last, after);
4349 break;
4350 }

--- 4 unchanged lines hidden (view full) ---

4355/* Make an instruction with body X and code CALL_INSN
4356 and output it after the instruction AFTER. */
4357
4358rtx
4359emit_call_insn_after_noloc (rtx x, rtx after)
4360{
4361 rtx last;
4362
4007 break;
4008#endif
4009
4010 default:
4011 last = make_jump_insn_raw (x);
4012 add_insn_after (last, after);
4013 break;
4014 }

--- 4 unchanged lines hidden (view full) ---

4019/* Make an instruction with body X and code CALL_INSN
4020 and output it after the instruction AFTER. */
4021
4022rtx
4023emit_call_insn_after_noloc (rtx x, rtx after)
4024{
4025 rtx last;
4026
4363#ifdef ENABLE_RTL_CHECKING
4364 if (after == NULL_RTX)
4365 abort ();
4366#endif
4027 gcc_assert (after);
4367
4368 switch (GET_CODE (x))
4369 {
4370 case INSN:
4371 case JUMP_INSN:
4372 case CALL_INSN:
4373 case CODE_LABEL:
4374 case BARRIER:
4375 case NOTE:
4376 last = emit_insn_after_1 (x, after);
4377 break;
4378
4379#ifdef ENABLE_RTL_CHECKING
4380 case SEQUENCE:
4028
4029 switch (GET_CODE (x))
4030 {
4031 case INSN:
4032 case JUMP_INSN:
4033 case CALL_INSN:
4034 case CODE_LABEL:
4035 case BARRIER:
4036 case NOTE:
4037 last = emit_insn_after_1 (x, after);
4038 break;
4039
4040#ifdef ENABLE_RTL_CHECKING
4041 case SEQUENCE:
4381 abort ();
4042 gcc_unreachable ();
4382 break;
4383#endif
4384
4385 default:
4386 last = make_call_insn_raw (x);
4387 add_insn_after (last, after);
4388 break;
4389 }

--- 34 unchanged lines hidden (view full) ---

4424
4425/* Emit a note of subtype SUBTYPE after the insn AFTER. */
4426
4427rtx
4428emit_note_after (int subtype, rtx after)
4429{
4430 rtx note = rtx_alloc (NOTE);
4431 INSN_UID (note) = cur_insn_uid++;
4043 break;
4044#endif
4045
4046 default:
4047 last = make_call_insn_raw (x);
4048 add_insn_after (last, after);
4049 break;
4050 }

--- 34 unchanged lines hidden (view full) ---

4085
4086/* Emit a note of subtype SUBTYPE after the insn AFTER. */
4087
4088rtx
4089emit_note_after (int subtype, rtx after)
4090{
4091 rtx note = rtx_alloc (NOTE);
4092 INSN_UID (note) = cur_insn_uid++;
4093#ifndef USE_MAPPED_LOCATION
4432 NOTE_SOURCE_FILE (note) = 0;
4094 NOTE_SOURCE_FILE (note) = 0;
4095#endif
4433 NOTE_LINE_NUMBER (note) = subtype;
4434 BLOCK_FOR_INSN (note) = NULL;
4435 add_insn_after (note, after);
4436 return note;
4437}
4438
4439/* Emit a copy of note ORIG after the insn AFTER. */
4440

--- 236 unchanged lines hidden (view full) ---

4677 add_insn (insn);
4678 last = insn;
4679 insn = next;
4680 }
4681 break;
4682
4683#ifdef ENABLE_RTL_CHECKING
4684 case SEQUENCE:
4096 NOTE_LINE_NUMBER (note) = subtype;
4097 BLOCK_FOR_INSN (note) = NULL;
4098 add_insn_after (note, after);
4099 return note;
4100}
4101
4102/* Emit a copy of note ORIG after the insn AFTER. */
4103

--- 236 unchanged lines hidden (view full) ---

4340 add_insn (insn);
4341 last = insn;
4342 insn = next;
4343 }
4344 break;
4345
4346#ifdef ENABLE_RTL_CHECKING
4347 case SEQUENCE:
4685 abort ();
4348 gcc_unreachable ();
4686 break;
4687#endif
4688
4689 default:
4690 last = make_insn_raw (x);
4691 add_insn (last);
4692 break;
4693 }

--- 24 unchanged lines hidden (view full) ---

4718 add_insn (insn);
4719 last = insn;
4720 insn = next;
4721 }
4722 break;
4723
4724#ifdef ENABLE_RTL_CHECKING
4725 case SEQUENCE:
4349 break;
4350#endif
4351
4352 default:
4353 last = make_insn_raw (x);
4354 add_insn (last);
4355 break;
4356 }

--- 24 unchanged lines hidden (view full) ---

4381 add_insn (insn);
4382 last = insn;
4383 insn = next;
4384 }
4385 break;
4386
4387#ifdef ENABLE_RTL_CHECKING
4388 case SEQUENCE:
4726 abort ();
4389 gcc_unreachable ();
4727 break;
4728#endif
4729
4730 default:
4731 last = make_jump_insn_raw (x);
4732 add_insn (last);
4733 break;
4734 }

--- 17 unchanged lines hidden (view full) ---

4752 case CODE_LABEL:
4753 case BARRIER:
4754 case NOTE:
4755 insn = emit_insn (x);
4756 break;
4757
4758#ifdef ENABLE_RTL_CHECKING
4759 case SEQUENCE:
4390 break;
4391#endif
4392
4393 default:
4394 last = make_jump_insn_raw (x);
4395 add_insn (last);
4396 break;
4397 }

--- 17 unchanged lines hidden (view full) ---

4415 case CODE_LABEL:
4416 case BARRIER:
4417 case NOTE:
4418 insn = emit_insn (x);
4419 break;
4420
4421#ifdef ENABLE_RTL_CHECKING
4422 case SEQUENCE:
4760 abort ();
4423 gcc_unreachable ();
4761 break;
4762#endif
4763
4764 default:
4765 insn = make_call_insn_raw (x);
4766 add_insn (insn);
4767 break;
4768 }

--- 33 unchanged lines hidden (view full) ---

4802 of the doubly-linked list, but only if line-numbers are desired for
4803 debugging info and it doesn't match the previous one. */
4804
4805rtx
4806emit_line_note (location_t location)
4807{
4808 rtx note;
4809
4424 break;
4425#endif
4426
4427 default:
4428 insn = make_call_insn_raw (x);
4429 add_insn (insn);
4430 break;
4431 }

--- 33 unchanged lines hidden (view full) ---

4465 of the doubly-linked list, but only if line-numbers are desired for
4466 debugging info and it doesn't match the previous one. */
4467
4468rtx
4469emit_line_note (location_t location)
4470{
4471 rtx note;
4472
4810 set_file_and_line_for_stmt (location);
4811
4473#ifdef USE_MAPPED_LOCATION
4474 if (location == last_location)
4475 return NULL_RTX;
4476#else
4812 if (location.file && last_location.file
4813 && !strcmp (location.file, last_location.file)
4814 && location.line == last_location.line)
4815 return NULL_RTX;
4477 if (location.file && last_location.file
4478 && !strcmp (location.file, last_location.file)
4479 && location.line == last_location.line)
4480 return NULL_RTX;
4481#endif
4816 last_location = location;
4817
4818 if (no_line_numbers)
4819 {
4820 cur_insn_uid++;
4821 return NULL_RTX;
4822 }
4823
4482 last_location = location;
4483
4484 if (no_line_numbers)
4485 {
4486 cur_insn_uid++;
4487 return NULL_RTX;
4488 }
4489
4490#ifdef USE_MAPPED_LOCATION
4491 note = emit_note ((int) location);
4492#else
4824 note = emit_note (location.line);
4825 NOTE_SOURCE_FILE (note) = location.file;
4493 note = emit_note (location.line);
4494 NOTE_SOURCE_FILE (note) = location.file;
4495#endif
4826
4827 return note;
4828}
4829
4830/* Emit a copy of note ORIG. */
4831
4832rtx
4833emit_note_copy (rtx orig)

--- 35 unchanged lines hidden (view full) ---

4869}
4870
4871/* Cause next statement to emit a line note even if the line number
4872 has not changed. */
4873
4874void
4875force_next_line_note (void)
4876{
4496
4497 return note;
4498}
4499
4500/* Emit a copy of note ORIG. */
4501
4502rtx
4503emit_note_copy (rtx orig)

--- 35 unchanged lines hidden (view full) ---

4539}
4540
4541/* Cause next statement to emit a line note even if the line number
4542 has not changed. */
4543
4544void
4545force_next_line_note (void)
4546{
4547#ifdef USE_MAPPED_LOCATION
4548 last_location = -1;
4549#else
4877 last_location.line = -1;
4550 last_location.line = -1;
4551#endif
4878}
4879
4880/* Place a note of KIND on insn INSN with DATUM as the datum. If a
4881 note of this type already exists, remove it first. */
4882
4883rtx
4884set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4885{

--- 4 unchanged lines hidden (view full) ---

4890 case REG_EQUAL:
4891 case REG_EQUIV:
4892 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4893 has multiple sets (some callers assume single_set
4894 means the insn only has one set, when in fact it
4895 means the insn only has one * useful * set). */
4896 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4897 {
4552}
4553
4554/* Place a note of KIND on insn INSN with DATUM as the datum. If a
4555 note of this type already exists, remove it first. */
4556
4557rtx
4558set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4559{

--- 4 unchanged lines hidden (view full) ---

4564 case REG_EQUAL:
4565 case REG_EQUIV:
4566 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4567 has multiple sets (some callers assume single_set
4568 means the insn only has one set, when in fact it
4569 means the insn only has one * useful * set). */
4570 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4571 {
4898 if (note)
4899 abort ();
4572 gcc_assert (!note);
4900 return NULL_RTX;
4901 }
4902
4903 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4904 It serves no useful purpose and breaks eliminate_regs. */
4905 if (GET_CODE (datum) == ASM_OPERANDS)
4906 return NULL_RTX;
4907 break;

--- 10 unchanged lines hidden (view full) ---

4918
4919 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4920 return REG_NOTES (insn);
4921}
4922
4923/* Return an indication of which type of insn should have X as a body.
4924 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4925
4573 return NULL_RTX;
4574 }
4575
4576 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4577 It serves no useful purpose and breaks eliminate_regs. */
4578 if (GET_CODE (datum) == ASM_OPERANDS)
4579 return NULL_RTX;
4580 break;

--- 10 unchanged lines hidden (view full) ---

4591
4592 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4593 return REG_NOTES (insn);
4594}
4595
4596/* Return an indication of which type of insn should have X as a body.
4597 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4598
4926enum rtx_code
4599static enum rtx_code
4927classify_insn (rtx x)
4928{
4600classify_insn (rtx x)
4601{
4929 if (GET_CODE (x) == CODE_LABEL)
4602 if (LABEL_P (x))
4930 return CODE_LABEL;
4931 if (GET_CODE (x) == CALL)
4932 return CALL_INSN;
4933 if (GET_CODE (x) == RETURN)
4934 return JUMP_INSN;
4935 if (GET_CODE (x) == SET)
4936 {
4937 if (SET_DEST (x) == pc_rtx)

--- 22 unchanged lines hidden (view full) ---

4960/* Emit the rtl pattern X as an appropriate kind of insn.
4961 If X is a label, it is simply added into the insn chain. */
4962
4963rtx
4964emit (rtx x)
4965{
4966 enum rtx_code code = classify_insn (x);
4967
4603 return CODE_LABEL;
4604 if (GET_CODE (x) == CALL)
4605 return CALL_INSN;
4606 if (GET_CODE (x) == RETURN)
4607 return JUMP_INSN;
4608 if (GET_CODE (x) == SET)
4609 {
4610 if (SET_DEST (x) == pc_rtx)

--- 22 unchanged lines hidden (view full) ---

4633/* Emit the rtl pattern X as an appropriate kind of insn.
4634 If X is a label, it is simply added into the insn chain. */
4635
4636rtx
4637emit (rtx x)
4638{
4639 enum rtx_code code = classify_insn (x);
4640
4968 if (code == CODE_LABEL)
4969 return emit_label (x);
4970 else if (code == INSN)
4971 return emit_insn (x);
4972 else if (code == JUMP_INSN)
4641 switch (code)
4973 {
4642 {
4974 rtx insn = emit_jump_insn (x);
4975 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4976 return emit_barrier ();
4977 return insn;
4643 case CODE_LABEL:
4644 return emit_label (x);
4645 case INSN:
4646 return emit_insn (x);
4647 case JUMP_INSN:
4648 {
4649 rtx insn = emit_jump_insn (x);
4650 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4651 return emit_barrier ();
4652 return insn;
4653 }
4654 case CALL_INSN:
4655 return emit_call_insn (x);
4656 default:
4657 gcc_unreachable ();
4978 }
4658 }
4979 else if (code == CALL_INSN)
4980 return emit_call_insn (x);
4981 else
4982 abort ();
4983}
4984
4985/* Space for free sequence stack entries. */
4659}
4660
4661/* Space for free sequence stack entries. */
4986static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4662static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4987
4663
4988/* Begin emitting insns to a sequence which can be packaged in an
4989 RTL_EXPR. If this sequence will contain something that might cause
4990 the compiler to pop arguments to function calls (because those
4991 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4992 details), use do_pending_stack_adjust before calling this function.
4993 That will ensure that the deferred pops are not accidentally
4994 emitted in the middle of this sequence. */
4664/* Begin emitting insns to a sequence. If this sequence will contain
4665 something that might cause the compiler to pop arguments to function
4666 calls (because those pops have previously been deferred; see
4667 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4668 before calling this function. That will ensure that the deferred
4669 pops are not accidentally emitted in the middle of this sequence. */
4995
4996void
4997start_sequence (void)
4998{
4999 struct sequence_stack *tem;
5000
5001 if (free_sequence_stack != NULL)
5002 {
5003 tem = free_sequence_stack;
5004 free_sequence_stack = tem->next;
5005 }
5006 else
5007 tem = ggc_alloc (sizeof (struct sequence_stack));
5008
5009 tem->next = seq_stack;
5010 tem->first = first_insn;
5011 tem->last = last_insn;
4670
4671void
4672start_sequence (void)
4673{
4674 struct sequence_stack *tem;
4675
4676 if (free_sequence_stack != NULL)
4677 {
4678 tem = free_sequence_stack;
4679 free_sequence_stack = tem->next;
4680 }
4681 else
4682 tem = ggc_alloc (sizeof (struct sequence_stack));
4683
4684 tem->next = seq_stack;
4685 tem->first = first_insn;
4686 tem->last = last_insn;
5012 tem->sequence_rtl_expr = seq_rtl_expr;
5013
5014 seq_stack = tem;
5015
5016 first_insn = 0;
5017 last_insn = 0;
5018}
5019
4687
4688 seq_stack = tem;
4689
4690 first_insn = 0;
4691 last_insn = 0;
4692}
4693
5020/* Similarly, but indicate that this sequence will be placed in T, an
5021 RTL_EXPR. See the documentation for start_sequence for more
5022 information about how to use this function. */
5023
5024void
5025start_sequence_for_rtl_expr (tree t)
5026{
5027 start_sequence ();
5028
5029 seq_rtl_expr = t;
5030}
5031
5032/* Set up the insn chain starting with FIRST as the current sequence,
5033 saving the previously current one. See the documentation for
5034 start_sequence for more information about how to use this function. */
5035
5036void
5037push_to_sequence (rtx first)
5038{
5039 rtx last;
5040
5041 start_sequence ();
5042
5043 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5044
5045 first_insn = first;
5046 last_insn = last;
5047}
5048
4694/* Set up the insn chain starting with FIRST as the current sequence,
4695 saving the previously current one. See the documentation for
4696 start_sequence for more information about how to use this function. */
4697
4698void
4699push_to_sequence (rtx first)
4700{
4701 rtx last;
4702
4703 start_sequence ();
4704
4705 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4706
4707 first_insn = first;
4708 last_insn = last;
4709}
4710
5049/* Set up the insn chain from a chain stort in FIRST to LAST. */
5050
5051void
5052push_to_full_sequence (rtx first, rtx last)
5053{
5054 start_sequence ();
5055 first_insn = first;
5056 last_insn = last;
5057 /* We really should have the end of the insn chain here. */
5058 if (last && NEXT_INSN (last))
5059 abort ();
5060}
5061
5062/* Set up the outer-level insn chain
5063 as the current sequence, saving the previously current one. */
5064
5065void
5066push_topmost_sequence (void)
5067{
5068 struct sequence_stack *stack, *top = NULL;
5069
5070 start_sequence ();
5071
5072 for (stack = seq_stack; stack; stack = stack->next)
5073 top = stack;
5074
5075 first_insn = top->first;
5076 last_insn = top->last;
4711/* Set up the outer-level insn chain
4712 as the current sequence, saving the previously current one. */
4713
4714void
4715push_topmost_sequence (void)
4716{
4717 struct sequence_stack *stack, *top = NULL;
4718
4719 start_sequence ();
4720
4721 for (stack = seq_stack; stack; stack = stack->next)
4722 top = stack;
4723
4724 first_insn = top->first;
4725 last_insn = top->last;
5077 seq_rtl_expr = top->sequence_rtl_expr;
5078}
5079
5080/* After emitting to the outer-level insn chain, update the outer-level
5081 insn chain, and restore the previous saved state. */
5082
5083void
5084pop_topmost_sequence (void)
5085{
5086 struct sequence_stack *stack, *top = NULL;
5087
5088 for (stack = seq_stack; stack; stack = stack->next)
5089 top = stack;
5090
5091 top->first = first_insn;
5092 top->last = last_insn;
4726}
4727
4728/* After emitting to the outer-level insn chain, update the outer-level
4729 insn chain, and restore the previous saved state. */
4730
4731void
4732pop_topmost_sequence (void)
4733{
4734 struct sequence_stack *stack, *top = NULL;
4735
4736 for (stack = seq_stack; stack; stack = stack->next)
4737 top = stack;
4738
4739 top->first = first_insn;
4740 top->last = last_insn;
5093 /* ??? Why don't we save seq_rtl_expr here? */
5094
5095 end_sequence ();
5096}
5097
5098/* After emitting to a sequence, restore previous saved state.
5099
5100 To get the contents of the sequence just made, you must call
5101 `get_insns' *before* calling here.

--- 8 unchanged lines hidden (view full) ---

5110
5111void
5112end_sequence (void)
5113{
5114 struct sequence_stack *tem = seq_stack;
5115
5116 first_insn = tem->first;
5117 last_insn = tem->last;
4741
4742 end_sequence ();
4743}
4744
4745/* After emitting to a sequence, restore previous saved state.
4746
4747 To get the contents of the sequence just made, you must call
4748 `get_insns' *before* calling here.

--- 8 unchanged lines hidden (view full) ---

4757
4758void
4759end_sequence (void)
4760{
4761 struct sequence_stack *tem = seq_stack;
4762
4763 first_insn = tem->first;
4764 last_insn = tem->last;
5118 seq_rtl_expr = tem->sequence_rtl_expr;
5119 seq_stack = tem->next;
5120
5121 memset (tem, 0, sizeof (*tem));
5122 tem->next = free_sequence_stack;
5123 free_sequence_stack = tem;
5124}
5125
4765 seq_stack = tem->next;
4766
4767 memset (tem, 0, sizeof (*tem));
4768 tem->next = free_sequence_stack;
4769 free_sequence_stack = tem;
4770}
4771
5126/* This works like end_sequence, but records the old sequence in FIRST
5127 and LAST. */
5128
5129void
5130end_full_sequence (rtx *first, rtx *last)
5131{
5132 *first = first_insn;
5133 *last = last_insn;
5134 end_sequence ();
5135}
5136
5137/* Return 1 if currently emitting into a sequence. */
5138
5139int
5140in_sequence_p (void)
5141{
5142 return seq_stack != 0;
5143}
5144
5145/* Put the various virtual registers into REGNO_REG_RTX. */
5146
4772/* Return 1 if currently emitting into a sequence. */
4773
4774int
4775in_sequence_p (void)
4776{
4777 return seq_stack != 0;
4778}
4779
4780/* Put the various virtual registers into REGNO_REG_RTX. */
4781
5147void
4782static void
5148init_virtual_regs (struct emit_status *es)
5149{
5150 rtx *ptr = es->x_regno_reg_rtx;
5151 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5152 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5153 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5154 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5155 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;

--- 35 unchanged lines hidden (view full) ---

5191 RTX_CODE code;
5192 const char *format_ptr;
5193
5194 code = GET_CODE (orig);
5195
5196 switch (code)
5197 {
5198 case REG:
4783init_virtual_regs (struct emit_status *es)
4784{
4785 rtx *ptr = es->x_regno_reg_rtx;
4786 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4787 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4788 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4789 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4790 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;

--- 35 unchanged lines hidden (view full) ---

4826 RTX_CODE code;
4827 const char *format_ptr;
4828
4829 code = GET_CODE (orig);
4830
4831 switch (code)
4832 {
4833 case REG:
5199 case QUEUED:
5200 case CONST_INT:
5201 case CONST_DOUBLE:
5202 case CONST_VECTOR:
5203 case SYMBOL_REF:
5204 case CODE_LABEL:
5205 case PC:
5206 case CC0:
4834 case CONST_INT:
4835 case CONST_DOUBLE:
4836 case CONST_VECTOR:
4837 case SYMBOL_REF:
4838 case CODE_LABEL:
4839 case PC:
4840 case CC0:
5207 case ADDRESSOF:
5208 return orig;
4841 return orig;
4842 case CLOBBER:
4843 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4844 return orig;
4845 break;
5209
5210 case SCRATCH:
5211 for (i = 0; i < copy_insn_n_scratches; i++)
5212 if (copy_insn_scratch_in[i] == orig)
5213 return copy_insn_scratch_out[i];
5214 break;
5215
5216 case CONST:

--- 9 unchanged lines hidden (view full) ---

5226 the constant address may need to be reloaded. If the mem is shared,
5227 then reloading one copy of this mem will cause all copies to appear
5228 to have been reloaded. */
5229
5230 default:
5231 break;
5232 }
5233
4846
4847 case SCRATCH:
4848 for (i = 0; i < copy_insn_n_scratches; i++)
4849 if (copy_insn_scratch_in[i] == orig)
4850 return copy_insn_scratch_out[i];
4851 break;
4852
4853 case CONST:

--- 9 unchanged lines hidden (view full) ---

4863 the constant address may need to be reloaded. If the mem is shared,
4864 then reloading one copy of this mem will cause all copies to appear
4865 to have been reloaded. */
4866
4867 default:
4868 break;
4869 }
4870
5234 copy = rtx_alloc (code);
5235
5236 /* Copy the various flags, and other information. We assume that
5237 all fields need copying, and then clear the fields that should
4871 /* Copy the various flags, fields, and other information. We assume
4872 that all fields need copying, and then clear the fields that should
5238 not be copied. That is the sensible default behavior, and forces
5239 us to explicitly document why we are *not* copying a flag. */
4873 not be copied. That is the sensible default behavior, and forces
4874 us to explicitly document why we are *not* copying a flag. */
5240 memcpy (copy, orig, RTX_HDR_SIZE);
4875 copy = shallow_copy_rtx (orig);
5241
5242 /* We do not copy the USED flag, which is used as a mark bit during
5243 walks over the RTL. */
5244 RTX_FLAG (copy, used) = 0;
5245
5246 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4876
4877 /* We do not copy the USED flag, which is used as a mark bit during
4878 walks over the RTL. */
4879 RTX_FLAG (copy, used) = 0;
4880
4881 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5247 if (GET_RTX_CLASS (code) == 'i')
4882 if (INSN_P (orig))
5248 {
5249 RTX_FLAG (copy, jump) = 0;
5250 RTX_FLAG (copy, call) = 0;
5251 RTX_FLAG (copy, frame_related) = 0;
5252 }
5253
5254 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5255
5256 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4883 {
4884 RTX_FLAG (copy, jump) = 0;
4885 RTX_FLAG (copy, call) = 0;
4886 RTX_FLAG (copy, frame_related) = 0;
4887 }
4888
4889 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4890
4891 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5257 {
5258 copy->u.fld[i] = orig->u.fld[i];
5259 switch (*format_ptr++)
5260 {
5261 case 'e':
5262 if (XEXP (orig, i) != NULL)
5263 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5264 break;
4892 switch (*format_ptr++)
4893 {
4894 case 'e':
4895 if (XEXP (orig, i) != NULL)
4896 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4897 break;
5265
4898
5266 case 'E':
5267 case 'V':
5268 if (XVEC (orig, i) == orig_asm_constraints_vector)
5269 XVEC (copy, i) = copy_asm_constraints_vector;
5270 else if (XVEC (orig, i) == orig_asm_operands_vector)
5271 XVEC (copy, i) = copy_asm_operands_vector;
5272 else if (XVEC (orig, i) != NULL)
5273 {
5274 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5275 for (j = 0; j < XVECLEN (copy, i); j++)
5276 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5277 }
5278 break;
4899 case 'E':
4900 case 'V':
4901 if (XVEC (orig, i) == orig_asm_constraints_vector)
4902 XVEC (copy, i) = copy_asm_constraints_vector;
4903 else if (XVEC (orig, i) == orig_asm_operands_vector)
4904 XVEC (copy, i) = copy_asm_operands_vector;
4905 else if (XVEC (orig, i) != NULL)
4906 {
4907 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4908 for (j = 0; j < XVECLEN (copy, i); j++)
4909 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4910 }
4911 break;
5279
4912
5280 case 't':
5281 case 'w':
5282 case 'i':
5283 case 's':
5284 case 'S':
5285 case 'u':
5286 case '0':
5287 /* These are left unchanged. */
5288 break;
4913 case 't':
4914 case 'w':
4915 case 'i':
4916 case 's':
4917 case 'S':
4918 case 'u':
4919 case '0':
4920 /* These are left unchanged. */
4921 break;
5289
4922
5290 default:
5291 abort ();
5292 }
5293 }
4923 default:
4924 gcc_unreachable ();
4925 }
5294
5295 if (code == SCRATCH)
5296 {
5297 i = copy_insn_n_scratches++;
4926
4927 if (code == SCRATCH)
4928 {
4929 i = copy_insn_n_scratches++;
5298 if (i >= MAX_RECOG_OPERANDS)
5299 abort ();
4930 gcc_assert (i < MAX_RECOG_OPERANDS);
5300 copy_insn_scratch_in[i] = orig;
5301 copy_insn_scratch_out[i] = copy;
5302 }
5303 else if (code == ASM_OPERANDS)
5304 {
5305 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5306 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5307 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);

--- 25 unchanged lines hidden (view full) ---

5333void
5334init_emit (void)
5335{
5336 struct function *f = cfun;
5337
5338 f->emit = ggc_alloc (sizeof (struct emit_status));
5339 first_insn = NULL;
5340 last_insn = NULL;
4931 copy_insn_scratch_in[i] = orig;
4932 copy_insn_scratch_out[i] = copy;
4933 }
4934 else if (code == ASM_OPERANDS)
4935 {
4936 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4937 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4938 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);

--- 25 unchanged lines hidden (view full) ---

4964void
4965init_emit (void)
4966{
4967 struct function *f = cfun;
4968
4969 f->emit = ggc_alloc (sizeof (struct emit_status));
4970 first_insn = NULL;
4971 last_insn = NULL;
5341 seq_rtl_expr = NULL;
5342 cur_insn_uid = 1;
5343 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4972 cur_insn_uid = 1;
4973 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5344 last_location.line = 0;
5345 last_location.file = 0;
4974 last_location = UNKNOWN_LOCATION;
5346 first_label_num = label_num;
4975 first_label_num = label_num;
5347 last_label_num = 0;
5348 seq_stack = NULL;
5349
5350 /* Init the tables that describe all the pseudo regs. */
5351
5352 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5353
5354 f->emit->regno_pointer_align
5355 = ggc_alloc_cleared (f->emit->regno_pointer_align_length

--- 36 unchanged lines hidden (view full) ---

5392 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5393#endif
5394
5395#ifdef INIT_EXPANDERS
5396 INIT_EXPANDERS;
5397#endif
5398}
5399
4976 seq_stack = NULL;
4977
4978 /* Init the tables that describe all the pseudo regs. */
4979
4980 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4981
4982 f->emit->regno_pointer_align
4983 = ggc_alloc_cleared (f->emit->regno_pointer_align_length

--- 36 unchanged lines hidden (view full) ---

5020 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5021#endif
5022
5023#ifdef INIT_EXPANDERS
5024 INIT_EXPANDERS;
5025#endif
5026}
5027
5400/* Generate the constant 0. */
5028/* Generate a vector constant for mode MODE and constant value CONSTANT. */
5401
5402static rtx
5029
5030static rtx
5403gen_const_vector_0 (enum machine_mode mode)
5031gen_const_vector (enum machine_mode mode, int constant)
5404{
5405 rtx tem;
5406 rtvec v;
5407 int units, i;
5408 enum machine_mode inner;
5409
5410 units = GET_MODE_NUNITS (mode);
5411 inner = GET_MODE_INNER (mode);
5412
5032{
5033 rtx tem;
5034 rtvec v;
5035 int units, i;
5036 enum machine_mode inner;
5037
5038 units = GET_MODE_NUNITS (mode);
5039 inner = GET_MODE_INNER (mode);
5040
5041 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5042
5413 v = rtvec_alloc (units);
5414
5043 v = rtvec_alloc (units);
5044
5415 /* We need to call this function after we to set CONST0_RTX first. */
5416 if (!CONST0_RTX (inner))
5417 abort ();
5045 /* We need to call this function after we set the scalar const_tiny_rtx
5046 entries. */
5047 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5418
5419 for (i = 0; i < units; ++i)
5048
5049 for (i = 0; i < units; ++i)
5420 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5050 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5421
5422 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5423 return tem;
5424}
5425
5426/* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5051
5052 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5053 return tem;
5054}
5055
5056/* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5427 all elements are zero. */
5057 all elements are zero, and the one vector when all elements are one. */
5428rtx
5429gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5430{
5058rtx
5059gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5060{
5431 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5061 enum machine_mode inner = GET_MODE_INNER (mode);
5062 int nunits = GET_MODE_NUNITS (mode);
5063 rtx x;
5432 int i;
5433
5064 int i;
5065
5434 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5435 if (RTVEC_ELT (v, i) != inner_zero)
5436 return gen_rtx_raw_CONST_VECTOR (mode, v);
5437 return CONST0_RTX (mode);
5066 /* Check to see if all of the elements have the same value. */
5067 x = RTVEC_ELT (v, nunits - 1);
5068 for (i = nunits - 2; i >= 0; i--)
5069 if (RTVEC_ELT (v, i) != x)
5070 break;
5071
5072 /* If the values are all the same, check to see if we can use one of the
5073 standard constant vectors. */
5074 if (i == -1)
5075 {
5076 if (x == CONST0_RTX (inner))
5077 return CONST0_RTX (mode);
5078 else if (x == CONST1_RTX (inner))
5079 return CONST1_RTX (mode);
5080 }
5081
5082 return gen_rtx_raw_CONST_VECTOR (mode, v);
5438}
5439
5440/* Create some permanent unique rtl objects shared between all functions.
5441 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5442
5443void
5444init_emit_once (int line_numbers)
5445{

--- 20 unchanged lines hidden (view full) ---

5466 no_line_numbers = ! line_numbers;
5467
5468 /* Compute the word and byte modes. */
5469
5470 byte_mode = VOIDmode;
5471 word_mode = VOIDmode;
5472 double_mode = VOIDmode;
5473
5083}
5084
5085/* Create some permanent unique rtl objects shared between all functions.
5086 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5087
5088void
5089init_emit_once (int line_numbers)
5090{

--- 20 unchanged lines hidden (view full) ---

5111 no_line_numbers = ! line_numbers;
5112
5113 /* Compute the word and byte modes. */
5114
5115 byte_mode = VOIDmode;
5116 word_mode = VOIDmode;
5117 double_mode = VOIDmode;
5118
5474 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5119 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5120 mode != VOIDmode;
5475 mode = GET_MODE_WIDER_MODE (mode))
5476 {
5477 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5478 && byte_mode == VOIDmode)
5479 byte_mode = mode;
5480
5481 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5482 && word_mode == VOIDmode)
5483 word_mode = mode;
5484 }
5485
5121 mode = GET_MODE_WIDER_MODE (mode))
5122 {
5123 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5124 && byte_mode == VOIDmode)
5125 byte_mode = mode;
5126
5127 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5128 && word_mode == VOIDmode)
5129 word_mode = mode;
5130 }
5131
5486 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5132 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5133 mode != VOIDmode;
5487 mode = GET_MODE_WIDER_MODE (mode))
5488 {
5489 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5490 && double_mode == VOIDmode)
5491 double_mode = mode;
5492 }
5493
5494 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5495
5496 /* Assign register numbers to the globally defined register rtx.
5497 This must be done at runtime because the register number field
5498 is in a union and some compilers can't initialize unions. */
5499
5134 mode = GET_MODE_WIDER_MODE (mode))
5135 {
5136 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5137 && double_mode == VOIDmode)
5138 double_mode = mode;
5139 }
5140
5141 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5142
5143 /* Assign register numbers to the globally defined register rtx.
5144 This must be done at runtime because the register number field
5145 is in a union and some compilers can't initialize unions. */
5146
5500 pc_rtx = gen_rtx (PC, VOIDmode);
5501 cc0_rtx = gen_rtx (CC0, VOIDmode);
5147 pc_rtx = gen_rtx_PC (VOIDmode);
5148 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5502 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5503 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5504 if (hard_frame_pointer_rtx == 0)
5505 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5506 HARD_FRAME_POINTER_REGNUM);
5507 if (arg_pointer_rtx == 0)
5508 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5509 virtual_incoming_args_rtx =

--- 16 unchanged lines hidden (view full) ---

5526 call to push_function_context_to. This is needed by the Chill front
5527 end which calls push_function_context_to before the first call to
5528 init_function_start. */
5529 INIT_EXPANDERS;
5530#endif
5531
5532 /* Create the unique rtx's for certain rtx codes and operand values. */
5533
5149 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5150 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5151 if (hard_frame_pointer_rtx == 0)
5152 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5153 HARD_FRAME_POINTER_REGNUM);
5154 if (arg_pointer_rtx == 0)
5155 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5156 virtual_incoming_args_rtx =

--- 16 unchanged lines hidden (view full) ---

5173 call to push_function_context_to. This is needed by the Chill front
5174 end which calls push_function_context_to before the first call to
5175 init_function_start. */
5176 INIT_EXPANDERS;
5177#endif
5178
5179 /* Create the unique rtx's for certain rtx codes and operand values. */
5180
5534 /* Don't use gen_rtx here since gen_rtx in this case
5181 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5535 tries to use these variables. */
5536 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5537 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5538 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5539
5540 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5541 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5542 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];

--- 4 unchanged lines hidden (view full) ---

5547 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5548 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5549 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5550 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5551 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5552 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5553
5554 dconsthalf = dconst1;
5182 tries to use these variables. */
5183 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5184 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5185 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5186
5187 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5188 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5189 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];

--- 4 unchanged lines hidden (view full) ---

5194 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5195 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5196 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5197 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5198 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5199 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5200
5201 dconsthalf = dconst1;
5555 dconsthalf.exp--;
5202 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5556
5557 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5558
5559 /* Initialize mathematical constants for constant folding builtins.
5560 These constants need to be given to at least 160 bits precision. */
5561 real_from_string (&dconstpi,
5562 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5563 real_from_string (&dconste,
5564 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5565
5566 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5567 {
5568 REAL_VALUE_TYPE *r =
5569 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5570
5203
5204 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5205
5206 /* Initialize mathematical constants for constant folding builtins.
5207 These constants need to be given to at least 160 bits precision. */
5208 real_from_string (&dconstpi,
5209 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5210 real_from_string (&dconste,
5211 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5212
5213 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5214 {
5215 REAL_VALUE_TYPE *r =
5216 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5217
5571 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5218 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5219 mode != VOIDmode;
5572 mode = GET_MODE_WIDER_MODE (mode))
5573 const_tiny_rtx[i][(int) mode] =
5574 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5575
5220 mode = GET_MODE_WIDER_MODE (mode))
5221 const_tiny_rtx[i][(int) mode] =
5222 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5223
5224 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5225 mode != VOIDmode;
5226 mode = GET_MODE_WIDER_MODE (mode))
5227 const_tiny_rtx[i][(int) mode] =
5228 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5229
5576 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5577
5230 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5231
5578 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5232 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5233 mode != VOIDmode;
5579 mode = GET_MODE_WIDER_MODE (mode))
5580 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5581
5582 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5583 mode != VOIDmode;
5584 mode = GET_MODE_WIDER_MODE (mode))
5585 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5586 }
5587
5588 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5589 mode != VOIDmode;
5590 mode = GET_MODE_WIDER_MODE (mode))
5234 mode = GET_MODE_WIDER_MODE (mode))
5235 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5236
5237 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5238 mode != VOIDmode;
5239 mode = GET_MODE_WIDER_MODE (mode))
5240 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5241 }
5242
5243 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5244 mode != VOIDmode;
5245 mode = GET_MODE_WIDER_MODE (mode))
5591 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5246 {
5247 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5248 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5249 }
5592
5593 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5594 mode != VOIDmode;
5595 mode = GET_MODE_WIDER_MODE (mode))
5250
5251 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5252 mode != VOIDmode;
5253 mode = GET_MODE_WIDER_MODE (mode))
5596 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5254 {
5255 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5256 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5257 }
5597
5598 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5599 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5600 const_tiny_rtx[0][i] = const0_rtx;
5601
5602 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5603 if (STORE_FLAG_VALUE == 1)
5604 const_tiny_rtx[1][(int) BImode] = const1_rtx;

--- 24 unchanged lines hidden (view full) ---

5629 static_chain_incoming_rtx = static_chain_rtx;
5630#endif
5631#endif
5632
5633 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5634 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5635}
5636
5258
5259 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5260 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5261 const_tiny_rtx[0][i] = const0_rtx;
5262
5263 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5264 if (STORE_FLAG_VALUE == 1)
5265 const_tiny_rtx[1][(int) BImode] = const1_rtx;

--- 24 unchanged lines hidden (view full) ---

5290 static_chain_incoming_rtx = static_chain_rtx;
5291#endif
5292#endif
5293
5294 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5295 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5296}
5297
5637/* Query and clear/ restore no_line_numbers. This is used by the
5638 switch / case handling in stmt.c to give proper line numbers in
5639 warnings about unreachable code. */
5640
5641int
5642force_line_numbers (void)
5643{
5644 int old = no_line_numbers;
5645
5646 no_line_numbers = 0;
5647 if (old)
5648 force_next_line_note ();
5649 return old;
5650}
5651
5652void
5653restore_line_number_status (int old_value)
5654{
5655 no_line_numbers = old_value;
5656}
5657
5658/* Produce exact duplicate of insn INSN after AFTER.
5659 Care updating of libcall regions if present. */
5660
5661rtx
5662emit_copy_of_insn_after (rtx insn, rtx after)
5663{
5664 rtx new;
5665 rtx note1, note2, link;

--- 13 unchanged lines hidden (view full) ---

5679 if (CALL_INSN_FUNCTION_USAGE (insn))
5680 CALL_INSN_FUNCTION_USAGE (new)
5681 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5682 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5683 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5684 break;
5685
5686 default:
5298/* Produce exact duplicate of insn INSN after AFTER.
5299 Care updating of libcall regions if present. */
5300
5301rtx
5302emit_copy_of_insn_after (rtx insn, rtx after)
5303{
5304 rtx new;
5305 rtx note1, note2, link;

--- 13 unchanged lines hidden (view full) ---

5319 if (CALL_INSN_FUNCTION_USAGE (insn))
5320 CALL_INSN_FUNCTION_USAGE (new)
5321 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5322 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5323 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5324 break;
5325
5326 default:
5687 abort ();
5327 gcc_unreachable ();
5688 }
5689
5690 /* Update LABEL_NUSES. */
5691 mark_jump_label (PATTERN (new), new, 0);
5692
5693 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5694
5328 }
5329
5330 /* Update LABEL_NUSES. */
5331 mark_jump_label (PATTERN (new), new, 0);
5332
5333 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5334
5335 /* If the old insn is frame related, then so is the new one. This is
5336 primarily needed for IA-64 unwind info which marks epilogue insns,
5337 which may be duplicated by the basic block reordering code. */
5338 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5339
5695 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5696 make them. */
5697 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5698 if (REG_NOTE_KIND (link) != REG_LABEL)
5699 {
5700 if (GET_CODE (link) == EXPR_LIST)
5701 REG_NOTES (new)
5702 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),

--- 14 unchanged lines hidden (view full) ---

5717 p = PREV_INSN (p);
5718 XEXP (note1, 0) = p;
5719 XEXP (note2, 0) = new;
5720 }
5721 INSN_CODE (new) = INSN_CODE (insn);
5722 return new;
5723}
5724
5340 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5341 make them. */
5342 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5343 if (REG_NOTE_KIND (link) != REG_LABEL)
5344 {
5345 if (GET_CODE (link) == EXPR_LIST)
5346 REG_NOTES (new)
5347 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),

--- 14 unchanged lines hidden (view full) ---

5362 p = PREV_INSN (p);
5363 XEXP (note1, 0) = p;
5364 XEXP (note2, 0) = new;
5365 }
5366 INSN_CODE (new) = INSN_CODE (insn);
5367 return new;
5368}
5369
5370static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5371rtx
5372gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5373{
5374 if (hard_reg_clobbers[mode][regno])
5375 return hard_reg_clobbers[mode][regno];
5376 else
5377 return (hard_reg_clobbers[mode][regno] =
5378 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5379}
5380
5725#include "gt-emit-rtl.h"
5381#include "gt-emit-rtl.h"