1.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.14
2.\"
3.\" Standard preamble:
4.\" ========================================================================
5.de Sh \" Subsection heading
6.br
7.if t .Sp
8.ne 5
9.PP
10\fB\\$1\fR
11.PP
12..
13.de Sp \" Vertical space (when we can't use .PP)
14.if t .sp .5v
15.if n .sp
16..
17.de Vb \" Begin verbatim text
18.ft CW
19.nf
20.ne \\$1
21..
22.de Ve \" End verbatim text
23.ft R
24.fi
25..
26.\" Set up some character translations and predefined strings. \*(-- will
27.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
28.\" double quote, and \*(R" will give a right double quote. | will give a
29.\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used to
30.\" do unbreakable dashes and therefore won't be available. \*(C` and \*(C'
31.\" expand to `' in nroff, nothing in troff, for use with C<>.
32.tr \(*W-|\(bv\*(Tr
33.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
34.ie n \{\
35. ds -- \(*W-
36. ds PI pi
37. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
38. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
39. ds L" ""
40. ds R" ""
41. ds C` ""
42. ds C' ""
43'br\}
44.el\{\
45. ds -- \|\(em\|
46. ds PI \(*p
47. ds L" ``
48. ds R" ''
49'br\}
50.\"
51.\" If the F register is turned on, we'll generate index entries on stderr for
52.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
53.\" entries marked with X<> in POD. Of course, you'll have to process the
54.\" output yourself in some meaningful fashion.
55.if \nF \{\
56. de IX
57. tm Index:\\$1\t\\n%\t"\\$2"
58..
59. nr % 0
60. rr F
61.\}
62.\"
63.\" For nroff, turn off justification. Always turn off hyphenation; it makes
64.\" way too many mistakes in technical documents.
65.hy 0
66.if n .na
67.\"
68.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
69.\" Fear. Run. Save yourself. No user-serviceable parts.
70. \" fudge factors for nroff and troff
71.if n \{\
72. ds #H 0
73. ds #V .8m
74. ds #F .3m
75. ds #[ \f1
76. ds #] \fP
77.\}
78.if t \{\
79. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
80. ds #V .6m
81. ds #F 0
82. ds #[ \&
83. ds #] \&
84.\}
85. \" simple accents for nroff and troff
86.if n \{\
87. ds ' \&
88. ds ` \&
89. ds ^ \&
90. ds , \&
91. ds ~ ~
92. ds /
93.\}
94.if t \{\
95. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
96. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
97. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
98. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
99. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
100. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
101.\}
102. \" troff and (daisy-wheel) nroff accents
103.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
104.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
105.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
106.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
107.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
108.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
109.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
110.ds ae a\h'-(\w'a'u*4/10)'e
111.ds Ae A\h'-(\w'A'u*4/10)'E
112. \" corrections for vroff
113.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
114.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
115. \" for low resolution devices (crt and lpr)
116.if \n(.H>23 .if \n(.V>19 \
117\{\
118. ds : e
119. ds 8 ss
120. ds o a
121. ds d- d\h'-1'\(ga
122. ds D- D\h'-1'\(hy
123. ds th \o'bp'
124. ds Th \o'LP'
125. ds ae ae
126. ds Ae AE
127.\}
128.rm #[ #] #H #V #F C
129.\" ========================================================================
130.\"
131.IX Title "GCC 1"
132.TH GCC 1 "2011-03-07" "gcc-4.2.1" "GNU"
133.SH "NAME"
134gcc \- GNU project C and C++ compiler
135.SH "SYNOPSIS"
136.IX Header "SYNOPSIS"
137gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
138 [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
139 [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
140 [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
141 [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
142 [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
143 [\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
144.PP
145Only the most useful options are listed here; see below for the
146remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR.
147.SH "DESCRIPTION"
148.IX Header "DESCRIPTION"
149When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
150assembly and linking. The \*(L"overall options\*(R" allow you to stop this
151process at an intermediate stage. For example, the \fB\-c\fR option
152says not to run the linker. Then the output consists of object files
153output by the assembler.
154.PP
155Other options are passed on to one stage of processing. Some options
156control the preprocessor and others the compiler itself. Yet other
157options control the assembler and linker; most of these are not
158documented here, since you rarely need to use any of them.
159.PP
160Most of the command line options that you can use with \s-1GCC\s0 are useful
161for C programs; when an option is only useful with another language
162(usually \*(C+), the explanation says so explicitly. If the description
163for a particular option does not mention a source language, you can use
164that option with all supported languages.
165.PP
166The \fBgcc\fR program accepts options and file names as operands. Many
167options have multi-letter names; therefore multiple single-letter options
168may \fInot\fR be grouped: \fB\-dr\fR is very different from \fB\-d\ \-r\fR.
169.PP
170You can mix options and other arguments. For the most part, the order
171you use doesn't matter. Order does matter when you use several options
172of the same kind; for example, if you specify \fB\-L\fR more than once,
173the directories are searched in the order specified.
174.PP
175Many options have long names starting with \fB\-f\fR or with
176\&\fB\-W\fR\-\-\-for example,
177\&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on. Most of
178these have both positive and negative forms; the negative form of
179\&\fB\-ffoo\fR would be \fB\-fno\-foo\fR. This manual documents
180only one of these two forms, whichever one is not the default.
181.SH "OPTIONS"
182.IX Header "OPTIONS"
183.Sh "Option Summary"
184.IX Subsection "Option Summary"
185Here is a summary of all the options, grouped by type. Explanations are
186in the following sections.
187.IP "\fIOverall Options\fR" 4
188.IX Item "Overall Options"
189\&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-combine \-pipe \-pass\-exit\-codes
190\&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help \-\-target\-help \-\-version @\fR\fIfile\fR
191.IP "\fIC Language Options\fR" 4
192.IX Item "C Language Options"
193\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fgnu89\-inline
194\&\-aux\-info\fR \fIfilename\fR
195\&\fB\-fno\-asm \-fno\-builtin \-fno\-builtin\-\fR\fIfunction\fR
196\&\fB\-fhosted \-ffreestanding \-fopenmp \-fms\-extensions
197\&\-trigraphs \-no\-integrated\-cpp \-traditional \-traditional\-cpp
198\&\-fallow\-single\-precision \-fcond\-mismatch
199\&\-fsigned\-bitfields \-fsigned\-char
200\&\-funsigned\-bitfields \-funsigned\-char\fR
201.IP "\fI\*(C+ Language Options\fR" 4
202.IX Item " Language Options"
203\&\fB\-fabi\-version=\fR\fIn\fR \fB\-fno\-access\-control \-fcheck\-new
204\&\-fconserve\-space \-ffriend\-injection
205\&\-fno\-elide\-constructors
206\&\-fno\-enforce\-eh\-specs
207\&\-ffor\-scope \-fno\-for\-scope \-fno\-gnu\-keywords
208\&\-fno\-implicit\-templates
209\&\-fno\-implicit\-inline\-templates
210\&\-fno\-implement\-inlines \-fms\-extensions
211\&\-fno\-nonansi\-builtins \-fno\-operator\-names
212\&\-fno\-optional\-diags \-fpermissive
213\&\-frepo \-fno\-rtti \-fstats \-ftemplate\-depth\-\fR\fIn\fR
214\&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit \-fno\-weak \-nostdinc++
215\&\-fno\-default\-inline \-fvisibility\-inlines\-hidden
216\&\-Wabi \-Wctor\-dtor\-privacy
217\&\-Wnon\-virtual\-dtor \-Wreorder
218\&\-Weffc++ \-Wno\-deprecated \-Wstrict\-null\-sentinel
219\&\-Wno\-non\-template\-friend \-Wold\-style\-cast
220\&\-Woverloaded\-virtual \-Wno\-pmf\-conversions
221\&\-Wsign\-promo\fR
222.IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
223.IX Item "Objective-C and Objective- Language Options"
224\&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR
225\&\fB\-fgnu\-runtime \-fnext\-runtime
226\&\-fno\-nil\-receivers
227\&\-fobjc\-call\-cxx\-cdtors
228\&\-fobjc\-direct\-dispatch
229\&\-fobjc\-exceptions
230\&\-fobjc\-gc
231\&\-freplace\-objc\-classes
232\&\-fzero\-link
233\&\-gen\-decls
234\&\-Wassign\-intercept
235\&\-Wno\-protocol \-Wselector
236\&\-Wstrict\-selector\-match
237\&\-Wundeclared\-selector\fR
238.IP "\fILanguage Independent Options\fR" 4
239.IX Item "Language Independent Options"
240\&\fB\-fmessage\-length=\fR\fIn\fR
241\&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
242\&\fB\-fdiagnostics\-show\-option\fR
243.IP "\fIWarning Options\fR" 4
244.IX Item "Warning Options"
245\&\fB\-fsyntax\-only \-pedantic \-pedantic\-errors
246\&\-w \-Wextra \-Wall \-Waddress \-Waggregate\-return \-Wno\-attributes
247\&\-Wc++\-compat \-Wcast\-align \-Wcast\-qual \-Wchar\-subscripts \-Wcomment
248\&\-Wconversion \-Wno\-deprecated\-declarations
249\&\-Wdisabled\-optimization \-Wno\-div\-by\-zero \-Wno\-endif\-labels
250\&\-Werror \-Werror=* \-Werror\-implicit\-function\-declaration
251\&\-Wfatal\-errors \-Wfloat\-equal \-Wformat \-Wformat=2
252\&\-Wno\-format\-extra\-args \-Wformat\-nonliteral
253\&\-Wformat\-security \-Wformat\-y2k
254\&\-Wimplicit \-Wimplicit\-function\-declaration \-Wimplicit\-int
255\&\-Wimport \-Wno\-import \-Winit\-self \-Winline
256\&\-Wno\-int\-to\-pointer\-cast
257\&\-Wno\-invalid\-offsetof \-Winvalid\-pch
258\&\-Wlarger\-than\-\fR\fIlen\fR \fB\-Wunsafe\-loop\-optimizations \-Wlong\-long
259\&\-Wmain \-Wmissing\-braces \-Wmissing\-field\-initializers
260\&\-Wmissing\-format\-attribute \-Wmissing\-include\-dirs
261\&\-Wmissing\-noreturn
262\&\-Wno\-multichar \-Wnonnull \-Wno\-overflow
263\&\-Woverlength\-strings \-Wpacked \-Wpadded
264\&\-Wparentheses \-Wpointer\-arith \-Wno\-pointer\-to\-int\-cast
265\&\-Wredundant\-decls
266\&\-Wreturn\-type \-Wsequence\-point \-Wshadow
267\&\-Wsign\-compare \-Wstack\-protector
268\&\-Wstrict\-aliasing \-Wstrict\-aliasing=2
269\&\-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR
270\&\fB\-Wswitch \-Wswitch\-default \-Wswitch\-enum
271\&\-Wsystem\-headers \-Wtrigraphs \-Wundef \-Wuninitialized
272\&\-Wunknown\-pragmas \-Wno\-pragmas \-Wunreachable\-code
273\&\-Wunused \-Wunused\-function \-Wunused\-label \-Wunused\-parameter
274\&\-Wunused\-value \-Wunused\-variable \-Wvariadic\-macros
275\&\-Wvolatile\-register\-var \-Wwrite\-strings\fR
276.IP "\fIC\-only Warning Options\fR" 4
277.IX Item "C-only Warning Options"
278\&\fB\-Wbad\-function\-cast \-Wmissing\-declarations
279\&\-Wmissing\-prototypes \-Wnested\-externs \-Wold\-style\-definition
280\&\-Wstrict\-prototypes \-Wtraditional
281\&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
282.IP "\fIDebugging Options\fR" 4
283.IX Item "Debugging Options"
284\&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
285\&\-fdump\-noaddr \-fdump\-unnumbered \-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR]
286\&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR]
287\&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph
288\&\-fdump\-tree\-all
289\&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]
290\&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR]
291\&\fB\-fdump\-tree\-inlined\fR[\fB\-\fR\fIn\fR]
292\&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias
293\&\-fdump\-tree\-ch
294\&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR]
295\&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR]
296\&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR]
297\&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR]
298\&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR]
299\&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR]
300\&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
301\&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR]
302\&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect
303\&\-fdump\-tree\-sink
304\&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR]
305\&\fB\-fdump\-tree\-salias
306\&\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR]
307\&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR]
308\&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR
309\&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR]
310\&\fB\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types
311\&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always
312\&\-fmem\-report \-fprofile\-arcs
313\&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR
314\&\fB\-ftest\-coverage \-ftime\-report \-fvar\-tracking
315\&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf\-2
316\&\-ggdb \-gstabs \-gstabs+ \-gvms \-gxcoff \-gxcoff+
317\&\-p \-pg \-print\-file\-name=\fR\fIlibrary\fR \fB\-print\-libgcc\-file\-name
318\&\-print\-multi\-directory \-print\-multi\-lib
319\&\-print\-prog\-name=\fR\fIprogram\fR \fB\-print\-search\-dirs \-Q
320\&\-save\-temps \-time\fR
321.IP "\fIOptimization Options\fR" 4
322.IX Item "Optimization Options"
323\&\fB\-falign\-functions=\fR\fIn\fR \fB\-falign\-jumps=\fR\fIn\fR
324\&\fB\-falign\-labels=\fR\fIn\fR \fB\-falign\-loops=\fR\fIn\fR
325\&\fB\-fbounds\-check \-fmudflap \-fmudflapth \-fmudflapir
326\&\-fbranch\-probabilities \-fprofile\-values \-fvpt \-fbranch\-target\-load\-optimize
327\&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive
328\&\-fcaller\-saves \-fcprop\-registers \-fcse\-follow\-jumps
329\&\-fcse\-skip\-blocks \-fcx\-limited\-range \-fdata\-sections
330\&\-fdelayed\-branch \-fdelete\-null\-pointer\-checks \-fearly\-inlining
331\&\-fexpensive\-optimizations \-ffast\-math \-ffloat\-store
332\&\-fforce\-addr \-ffunction\-sections
333\&\-fgcse \-fgcse\-lm \-fgcse\-sm \-fgcse\-las \-fgcse\-after\-reload
334\&\-fcrossjumping \-fif\-conversion \-fif\-conversion2
335\&\-finline\-functions \-finline\-functions\-called\-once
336\&\-finline\-limit=\fR\fIn\fR \fB\-fkeep\-inline\-functions
337\&\-fkeep\-static\-consts \-fmerge\-constants \-fmerge\-all\-constants
338\&\-fmodulo\-sched \-fno\-branch\-count\-reg
339\&\-fno\-default\-inline \-fno\-defer\-pop \-fmove\-loop\-invariants
340\&\-fno\-function\-cse \-fno\-guess\-branch\-probability
341\&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2
342\&\-funsafe\-math\-optimizations \-funsafe\-loop\-optimizations \-ffinite\-math\-only
343\&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss
344\&\-fomit\-frame\-pointer \-foptimize\-register\-move
345\&\-foptimize\-sibling\-calls \-fprefetch\-loop\-arrays
346\&\-fprofile\-generate \-fprofile\-use
347\&\-fregmove \-frename\-registers
348\&\-freorder\-blocks \-freorder\-blocks\-and\-partition \-freorder\-functions
349\&\-frerun\-cse\-after\-loop
350\&\-frounding\-math \-frtl\-abstract\-sequences
351\&\-fschedule\-insns \-fschedule\-insns2
352\&\-fno\-sched\-interblock \-fno\-sched\-spec \-fsched\-spec\-load
353\&\-fsched\-spec\-load\-dangerous
354\&\-fsched\-stalled\-insns=\fR\fIn\fR \fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR
355\&\fB\-fsched2\-use\-superblocks
356\&\-fsched2\-use\-traces \-fsee \-freschedule\-modulo\-scheduled\-loops
357\&\-fsection\-anchors \-fsignaling\-nans \-fsingle\-precision\-constant
358\&\-fstack\-protector \-fstack\-protector\-all
359\&\-fstrict\-aliasing \-fstrict\-overflow \-ftracer \-fthread\-jumps
360\&\-funroll\-all\-loops \-funroll\-loops \-fpeel\-loops
361\&\-fsplit\-ivs\-in\-unroller \-funswitch\-loops
362\&\-fvariable\-expansion\-in\-unroller
363\&\-ftree\-pre \-ftree\-ccp \-ftree\-dce \-ftree\-loop\-optimize
364\&\-ftree\-loop\-linear \-ftree\-loop\-im \-ftree\-loop\-ivcanon \-fivopts
365\&\-ftree\-dominator\-opts \-ftree\-dse \-ftree\-copyrename \-ftree\-sink
366\&\-ftree\-ch \-ftree\-sra \-ftree\-ter \-ftree\-lrs \-ftree\-fre \-ftree\-vectorize
367\&\-ftree\-vect\-loop\-version \-ftree\-salias \-fipa\-pta \-fweb
368\&\-ftree\-copy\-prop \-ftree\-store\-ccp \-ftree\-store\-copy\-prop \-fwhole\-program
369\&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
370\&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR
371.IP "\fIPreprocessor Options\fR" 4
372.IX Item "Preprocessor Options"
373\&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR
374\&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR]
375\&\fB\-C \-dD \-dI \-dM \-dN
376\&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H
377\&\-idirafter\fR \fIdir\fR
378\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
379\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
380\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
381\&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR
382\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc
383\&\-P \-fworking\-directory \-remap
384\&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR
385\&\fB\-Xpreprocessor\fR \fIoption\fR
386.IP "\fIAssembler Option\fR" 4
387.IX Item "Assembler Option"
388\&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR
389.IP "\fILinker Options\fR" 4
390.IX Item "Linker Options"
391\&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR
392\&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie \-rdynamic
393\&\-s \-static \-static\-libgcc \-shared \-shared\-libgcc \-symbolic
394\&\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR
395\&\fB\-u\fR \fIsymbol\fR
396.IP "\fIDirectory Options\fR" 4
397.IX Item "Directory Options"
398\&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iquote\fR\fIdir\fR \fB\-L\fR\fIdir\fR
399\&\fB\-specs=\fR\fIfile\fR \fB\-I\- \-\-sysroot=\fR\fIdir\fR
400.IP "\fITarget Options\fR" 4
401.IX Item "Target Options"
402\&\fB\-V\fR \fIversion\fR \fB\-b\fR \fImachine\fR
403.IP "\fIMachine Dependent Options\fR" 4
404.IX Item "Machine Dependent Options"
405\&\fI\s-1ARC\s0 Options\fR
406\&\fB\-EB \-EL
407\&\-mmangle\-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR
408\&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR
409.Sp
410\&\fI\s-1ARM\s0 Options\fR
411\&\fB\-mapcs\-frame \-mno\-apcs\-frame
412\&\-mabi=\fR\fIname\fR
413\&\fB\-mapcs\-stack\-check \-mno\-apcs\-stack\-check
414\&\-mapcs\-float \-mno\-apcs\-float
415\&\-mapcs\-reentrant \-mno\-apcs\-reentrant
416\&\-msched\-prolog \-mno\-sched\-prolog
417\&\-mlittle\-endian \-mbig\-endian \-mwords\-little\-endian
418\&\-mfloat\-abi=\fR\fIname\fR \fB\-msoft\-float \-mhard\-float \-mfpe
419\&\-mthumb\-interwork \-mno\-thumb\-interwork
420\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpu=\fR\fIname\fR
421\&\fB\-mstructure\-size\-boundary=\fR\fIn\fR
422\&\fB\-mabort\-on\-noreturn
423\&\-mlong\-calls \-mno\-long\-calls
424\&\-msingle\-pic\-base \-mno\-single\-pic\-base
425\&\-mpic\-register=\fR\fIreg\fR
426\&\fB\-mnop\-fun\-dllimport
427\&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns
428\&\-mpoke\-function\-name
429\&\-mthumb \-marm
430\&\-mtpcs\-frame \-mtpcs\-leaf\-frame
431\&\-mcaller\-super\-interworking \-mcallee\-super\-interworking
432\&\-mtp=\fR\fIname\fR
433.Sp
434\&\fI\s-1AVR\s0 Options\fR
435\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-minit\-stack=\fR\fIn\fR \fB\-mno\-interrupts
436\&\-mcall\-prologues \-mno\-tablejump \-mtiny\-stack \-mint8\fR
437.Sp
438\&\fIBlackfin Options\fR
439\&\fB\-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
440\&\-mspecld\-anomaly \-mno\-specld\-anomaly \-mcsync\-anomaly \-mno\-csync\-anomaly
441\&\-mlow\-64k \-mno\-low64k \-mid\-shared\-library
442\&\-mno\-id\-shared\-library \-mshared\-library\-id=\fR\fIn\fR
443\&\fB\-mlong\-calls \-mno\-long\-calls\fR
444.Sp
445\&\fI\s-1CRIS\s0 Options\fR
446\&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR
447\&\fB\-mmax\-stack\-frame=\fR\fIn\fR \fB\-melinux\-stacksize=\fR\fIn\fR
448\&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc\-init \-mno\-side\-effects
449\&\-mstack\-align \-mdata\-align \-mconst\-align
450\&\-m32\-bit \-m16\-bit \-m8\-bit \-mno\-prologue\-epilogue \-mno\-gotplt
451\&\-melf \-maout \-melinux \-mlinux \-sim \-sim2
452\&\-mmul\-bug\-workaround \-mno\-mul\-bug\-workaround\fR
453.Sp
454\&\fI\s-1CRX\s0 Options\fR
455\&\fB\-mmac \-mpush\-args\fR
456.Sp
457\&\fIDarwin Options\fR
458\&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal
459\&\-arch_only \-bind_at_load \-bundle \-bundle_loader
460\&\-client_name \-compatibility_version \-current_version
461\&\-dead_strip
462\&\-dependency\-file \-dylib_file \-dylinker_install_name
463\&\-dynamic \-dynamiclib \-exported_symbols_list
464\&\-filelist \-flat_namespace \-force_cpusubtype_ALL
465\&\-force_flat_namespace \-headerpad_max_install_names
466\&\-image_base \-init \-install_name \-keep_private_externs
467\&\-multi_module \-multiply_defined \-multiply_defined_unused
468\&\-noall_load \-no_dead_strip_inits_and_terms
469\&\-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit
470\&\-pagezero_size \-prebind \-prebind_all_twolevel_modules
471\&\-private_bundle \-read_only_relocs \-sectalign
472\&\-sectobjectsymbols \-whyload \-seg1addr
473\&\-sectcreate \-sectobjectsymbols \-sectorder
474\&\-segaddr \-segs_read_only_addr \-segs_read_write_addr
475\&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit
476\&\-segprot \-segs_read_only_addr \-segs_read_write_addr
477\&\-single_module \-static \-sub_library \-sub_umbrella
478\&\-twolevel_namespace \-umbrella \-undefined
479\&\-unexported_symbols_list \-weak_reference_mismatches
480\&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR
481\&\fB\-mkernel \-mone\-byte\-bool\fR
482.Sp
483\&\fI\s-1DEC\s0 Alpha Options\fR
484\&\fB\-mno\-fp\-regs \-msoft\-float \-malpha\-as \-mgas
485\&\-mieee \-mieee\-with\-inexact \-mieee\-conformant
486\&\-mfp\-trap\-mode=\fR\fImode\fR \fB\-mfp\-rounding\-mode=\fR\fImode\fR
487\&\fB\-mtrap\-precision=\fR\fImode\fR \fB\-mbuild\-constants
488\&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR
489\&\fB\-mbwx \-mmax \-mfix \-mcix
490\&\-mfloat\-vax \-mfloat\-ieee
491\&\-mexplicit\-relocs \-msmall\-data \-mlarge\-data
492\&\-msmall\-text \-mlarge\-text
493\&\-mmemory\-latency=\fR\fItime\fR
494.Sp
495\&\fI\s-1DEC\s0 Alpha/VMS Options\fR
496\&\fB\-mvms\-return\-codes\fR
497.Sp
498\&\fI\s-1FRV\s0 Options\fR
499\&\fB\-mgpr\-32 \-mgpr\-64 \-mfpr\-32 \-mfpr\-64
500\&\-mhard\-float \-msoft\-float
501\&\-malloc\-cc \-mfixed\-cc \-mdword \-mno\-dword
502\&\-mdouble \-mno\-double
503\&\-mmedia \-mno\-media \-mmuladd \-mno\-muladd
504\&\-mfdpic \-minline\-plt \-mgprel\-ro \-multilib\-library\-pic
505\&\-mlinked\-fp \-mlong\-calls \-malign\-labels
506\&\-mlibrary\-pic \-macc\-4 \-macc\-8
507\&\-mpack \-mno\-pack \-mno\-eflags \-mcond\-move \-mno\-cond\-move
508\&\-moptimize\-membar \-mno\-optimize\-membar
509\&\-mscc \-mno\-scc \-mcond\-exec \-mno\-cond\-exec
510\&\-mvliw\-branch \-mno\-vliw\-branch
511\&\-mmulti\-cond\-exec \-mno\-multi\-cond\-exec \-mnested\-cond\-exec
512\&\-mno\-nested\-cond\-exec \-mtomcat\-stats
513\&\-mTLS \-mtls
514\&\-mcpu=\fR\fIcpu\fR
515.Sp
516\&\fIGNU/Linux Options\fR
517\&\fB\-muclibc\fR
518.Sp
519\&\fIH8/300 Options\fR
520\&\fB\-mrelax \-mh \-ms \-mn \-mint32 \-malign\-300\fR
521.Sp
522\&\fI\s-1HPPA\s0 Options\fR
523\&\fB\-march=\fR\fIarchitecture-type\fR
524\&\fB\-mbig\-switch \-mdisable\-fpregs \-mdisable\-indexing
525\&\-mfast\-indirect\-calls \-mgas \-mgnu\-ld \-mhp\-ld
526\&\-mfixed\-range=\fR\fIregister-range\fR
527\&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls
528\&\-mlong\-load\-store \-mno\-big\-switch \-mno\-disable\-fpregs
529\&\-mno\-disable\-indexing \-mno\-fast\-indirect\-calls \-mno\-gas
530\&\-mno\-jump\-in\-delay \-mno\-long\-load\-store
531\&\-mno\-portable\-runtime \-mno\-soft\-float
532\&\-mno\-space\-regs \-msoft\-float \-mpa\-risc\-1\-0
533\&\-mpa\-risc\-1\-1 \-mpa\-risc\-2\-0 \-mportable\-runtime
534\&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace\-regs \-msio \-mwsio
535\&\-munix=\fR\fIunix-std\fR \fB\-nolibdld \-static \-threads\fR
536.Sp
537\&\fIi386 and x86\-64 Options\fR
538\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
539\&\fB\-mfpmath=\fR\fIunit\fR
540\&\fB\-masm=\fR\fIdialect\fR \fB\-mno\-fancy\-math\-387
541\&\-mno\-fp\-ret\-in\-387 \-msoft\-float \-msvr3\-shlib
542\&\-mno\-wide\-multiply \-mrtd \-malign\-double
543\&\-mpreferred\-stack\-boundary=\fR\fInum\fR
544\&\fB\-mmmx \-msse \-msse2 \-msse3 \-mssse3 \-m3dnow
545\&\-mthreads \-mno\-align\-stringops \-minline\-all\-stringops
546\&\-mpush\-args \-maccumulate\-outgoing\-args \-m128bit\-long\-double
547\&\-m96bit\-long\-double \-mregparm=\fR\fInum\fR \fB\-msseregparm
548\&\-mstackrealign
549\&\-momit\-leaf\-frame\-pointer \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs
550\&\-mcmodel=\fR\fIcode-model\fR
551\&\fB\-m32 \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR
552.Sp
553\&\fI\s-1IA\-64\s0 Options\fR
554\&\fB\-mbig\-endian \-mlittle\-endian \-mgnu\-as \-mgnu\-ld \-mno\-pic
555\&\-mvolatile\-asm\-stop \-mregister\-names \-mno\-sdata
556\&\-mconstant\-gp \-mauto\-pic \-minline\-float\-divide\-min\-latency
557\&\-minline\-float\-divide\-max\-throughput
558\&\-minline\-int\-divide\-min\-latency
559\&\-minline\-int\-divide\-max\-throughput
560\&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput
561\&\-mno\-dwarf2\-asm \-mearly\-stop\-bits
562\&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR
563\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-mt \-pthread \-milp32 \-mlp64
564\&\-mno\-sched\-br\-data\-spec \-msched\-ar\-data\-spec \-mno\-sched\-control\-spec
565\&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec
566\&\-msched\-ldc \-mno\-sched\-control\-ldc \-mno\-sched\-spec\-verbose
567\&\-mno\-sched\-prefer\-non\-data\-spec\-insns
568\&\-mno\-sched\-prefer\-non\-control\-spec\-insns
569\&\-mno\-sched\-count\-spec\-in\-critical\-path\fR
570.Sp
571\&\fIM32R/D Options\fR
572\&\fB\-m32r2 \-m32rx \-m32r
573\&\-mdebug
574\&\-malign\-loops \-mno\-align\-loops
575\&\-missue\-rate=\fR\fInumber\fR
576\&\fB\-mbranch\-cost=\fR\fInumber\fR
577\&\fB\-mmodel=\fR\fIcode-size-model-type\fR
578\&\fB\-msdata=\fR\fIsdata-type\fR
579\&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR
580\&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR
581\&\fB\-G\fR \fInum\fR
582.Sp
583\&\fIM32C Options\fR
584\&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
585.Sp
586\&\fIM680x0 Options\fR
587\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
588\&\-m68060 \-mcpu32 \-m5200 \-mcfv4e \-m68881 \-mbitfield
589\&\-mc68000 \-mc68020
590\&\-mnobitfield \-mrtd \-mshort \-msoft\-float \-mpcrel
591\&\-malign\-int \-mstrict\-align \-msep\-data \-mno\-sep\-data
592\&\-mshared\-library\-id=n \-mid\-shared\-library \-mno\-id\-shared\-library\fR
593.Sp
594\&\fIM68hc1x Options\fR
595\&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 \-m68hcs12
596\&\-mauto\-incdec \-minmax \-mlong\-calls \-mshort
597\&\-msoft\-reg\-count=\fR\fIcount\fR
598.Sp
599\&\fIMCore Options\fR
600\&\fB\-mhardlit \-mno\-hardlit \-mdiv \-mno\-div \-mrelax\-immediates
601\&\-mno\-relax\-immediates \-mwide\-bitfields \-mno\-wide\-bitfields
602\&\-m4byte\-functions \-mno\-4byte\-functions \-mcallgraph\-data
603\&\-mno\-callgraph\-data \-mslow\-bytes \-mno\-slow\-bytes \-mno\-lsim
604\&\-mlittle\-endian \-mbig\-endian \-m210 \-m340 \-mstack\-increment\fR
605.Sp
606\&\fI\s-1MIPS\s0 Options\fR
607\&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR
608\&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2 \-mips64
609\&\-mips16 \-mno\-mips16 \-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno\-abicalls
610\&\-mshared \-mno\-shared \-mxgot \-mno\-xgot \-mgp32 \-mgp64
611\&\-mfp32 \-mfp64 \-mhard\-float \-msoft\-float
612\&\-msingle\-float \-mdouble\-float \-mdsp \-mpaired\-single \-mips3d
613\&\-mlong64 \-mlong32 \-msym32 \-mno\-sym32
614\&\-G\fR\fInum\fR \fB\-membedded\-data \-mno\-embedded\-data
615\&\-muninit\-const\-in\-rodata \-mno\-uninit\-const\-in\-rodata
616\&\-msplit\-addresses \-mno\-split\-addresses
617\&\-mexplicit\-relocs \-mno\-explicit\-relocs
618\&\-mcheck\-zero\-division \-mno\-check\-zero\-division
619\&\-mdivide\-traps \-mdivide\-breaks
620\&\-mmemcpy \-mno\-memcpy \-mlong\-calls \-mno\-long\-calls
621\&\-mmad \-mno\-mad \-mfused\-madd \-mno\-fused\-madd \-nocpp
622\&\-mfix\-r4000 \-mno\-fix\-r4000 \-mfix\-r4400 \-mno\-fix\-r4400
623\&\-mfix\-vr4120 \-mno\-fix\-vr4120 \-mfix\-vr4130
624\&\-mfix\-sb1 \-mno\-fix\-sb1
625\&\-mflush\-func=\fR\fIfunc\fR \fB\-mno\-flush\-func
626\&\-mbranch\-likely \-mno\-branch\-likely
627\&\-mfp\-exceptions \-mno\-fp\-exceptions
628\&\-mvr4130\-align \-mno\-vr4130\-align\fR
629.Sp
630\&\fI\s-1MMIX\s0 Options\fR
631\&\fB\-mlibfuncs \-mno\-libfuncs \-mepsilon \-mno\-epsilon \-mabi=gnu
632\&\-mabi=mmixware \-mzero\-extend \-mknuthdiv \-mtoplevel\-symbols
633\&\-melf \-mbranch\-predict \-mno\-branch\-predict \-mbase\-addresses
634\&\-mno\-base\-addresses \-msingle\-exit \-mno\-single\-exit\fR
635.Sp
636\&\fI\s-1MN10300\s0 Options\fR
637\&\fB\-mmult\-bug \-mno\-mult\-bug
638\&\-mam33 \-mno\-am33
639\&\-mam33\-2 \-mno\-am33\-2
640\&\-mreturn\-pointer\-on\-d0
641\&\-mno\-crt0 \-mrelax\fR
642.Sp
643\&\fI\s-1MT\s0 Options\fR
644\&\fB\-mno\-crt0 \-mbacc \-msim
645\&\-march=\fR\fIcpu-type\fR\fB \fR
646.Sp
647\&\fI\s-1PDP\-11\s0 Options\fR
648\&\fB\-mfpu \-msoft\-float \-mac0 \-mno\-ac0 \-m40 \-m45 \-m10
649\&\-mbcopy \-mbcopy\-builtin \-mint32 \-mno\-int16
650\&\-mint16 \-mno\-int32 \-mfloat32 \-mno\-float64
651\&\-mfloat64 \-mno\-float32 \-mabshi \-mno\-abshi
652\&\-mbranch\-expensive \-mbranch\-cheap
653\&\-msplit \-mno\-split \-munix\-asm \-mdec\-asm\fR
654.Sp
655\&\fIPowerPC Options\fR
656See \s-1RS/6000\s0 and PowerPC Options.
657.Sp
658\&\fI\s-1RS/6000\s0 and PowerPC Options\fR
659\&\fB\-mcpu=\fR\fIcpu-type\fR
660\&\fB\-mtune=\fR\fIcpu-type\fR
661\&\fB\-mpower \-mno\-power \-mpower2 \-mno\-power2
662\&\-mpowerpc \-mpowerpc64 \-mno\-powerpc
663\&\-maltivec \-mno\-altivec
664\&\-mpowerpc\-gpopt \-mno\-powerpc\-gpopt
665\&\-mpowerpc\-gfxopt \-mno\-powerpc\-gfxopt
666\&\-mmfcrf \-mno\-mfcrf \-mpopcntb \-mno\-popcntb \-mfprnd \-mno\-fprnd
667\&\-mnew\-mnemonics \-mold\-mnemonics
668\&\-mfull\-toc \-mminimal\-toc \-mno\-fp\-in\-toc \-mno\-sum\-in\-toc
669\&\-m64 \-m32 \-mxl\-compat \-mno\-xl\-compat \-mpe
670\&\-malign\-power \-malign\-natural
671\&\-msoft\-float \-mhard\-float \-mmultiple \-mno\-multiple
672\&\-mstring \-mno\-string \-mupdate \-mno\-update
673\&\-mfused\-madd \-mno\-fused\-madd \-mbit\-align \-mno\-bit\-align
674\&\-mstrict\-align \-mno\-strict\-align \-mrelocatable
675\&\-mno\-relocatable \-mrelocatable\-lib \-mno\-relocatable\-lib
676\&\-mtoc \-mno\-toc \-mlittle \-mlittle\-endian \-mbig \-mbig\-endian
677\&\-mdynamic\-no\-pic \-maltivec \-mswdiv
678\&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR
679\&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR
680\&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR
681\&\fB\-mcall\-sysv \-mcall\-netbsd
682\&\-maix\-struct\-return \-msvr4\-struct\-return
683\&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt
684\&\-misel \-mno\-isel
685\&\-misel=yes \-misel=no
686\&\-mspe \-mno\-spe
687\&\-mspe=yes \-mspe=no
688\&\-mvrsave \-mno\-vrsave
689\&\-mmulhw \-mno\-mulhw
690\&\-mdlmzb \-mno\-dlmzb
691\&\-mfloat\-gprs=yes \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double
692\&\-mprototype \-mno\-prototype
693\&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata
694\&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-mwindiss \-G\fR \fInum\fR \fB\-pthread\fR
695.Sp
696\&\fIS/390 and zSeries Options\fR
697\&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
698\&\fB\-mhard\-float \-msoft\-float \-mlong\-double\-64 \-mlong\-double\-128
699\&\-mbackchain \-mno\-backchain \-mpacked\-stack \-mno\-packed\-stack
700\&\-msmall\-exec \-mno\-small\-exec \-mmvcle \-mno\-mvcle
701\&\-m64 \-m31 \-mdebug \-mno\-debug \-mesa \-mzarch
702\&\-mtpf\-trace \-mno\-tpf\-trace \-mfused\-madd \-mno\-fused\-madd
703\&\-mwarn\-framesize \-mwarn\-dynamicstack \-mstack\-size \-mstack\-guard\fR
704.Sp
705\&\fIScore Options\fR
706\&\fB\-meb \-mel
707\&\-mnhwloop
708\&\-muls
709\&\-mmac
710\&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
711.Sp
712\&\fI\s-1SH\s0 Options\fR
713\&\fB\-m1 \-m2 \-m2e \-m3 \-m3e
714\&\-m4\-nofpu \-m4\-single\-only \-m4\-single \-m4
715\&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al
716\&\-m5\-64media \-m5\-64media\-nofpu
717\&\-m5\-32media \-m5\-32media\-nofpu
718\&\-m5\-compact \-m5\-compact\-nofpu
719\&\-mb \-ml \-mdalign \-mrelax
720\&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave
721\&\-mieee \-misize \-mpadstruct \-mspace
722\&\-mprefergot \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR
723\&\fB\-mdivsi3_libfunc=\fR\fIname\fR
724\&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed
725 \-minvalid\-symbols\fR
726.Sp
727\&\fI\s-1SPARC\s0 Options\fR
728\&\fB\-mcpu=\fR\fIcpu-type\fR
729\&\fB\-mtune=\fR\fIcpu-type\fR
730\&\fB\-mcmodel=\fR\fIcode-model\fR
731\&\fB\-m32 \-m64 \-mapp\-regs \-mno\-app\-regs
732\&\-mfaster\-structs \-mno\-faster\-structs
733\&\-mfpu \-mno\-fpu \-mhard\-float \-msoft\-float
734\&\-mhard\-quad\-float \-msoft\-quad\-float
735\&\-mimpure\-text \-mno\-impure\-text \-mlittle\-endian
736\&\-mstack\-bias \-mno\-stack\-bias
737\&\-munaligned\-doubles \-mno\-unaligned\-doubles
738\&\-mv8plus \-mno\-v8plus \-mvis \-mno\-vis
739\&\-threads \-pthreads \-pthread\fR
740.Sp
741\&\fISystem V Options\fR
742\&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR
743.Sp
744\&\fITMS320C3x/C4x Options\fR
745\&\fB\-mcpu=\fR\fIcpu\fR \fB\-mbig \-msmall \-mregparm \-mmemparm
746\&\-mfast\-fix \-mmpyi \-mbk \-mti \-mdp\-isr\-reload
747\&\-mrpts=\fR\fIcount\fR \fB\-mrptb \-mdb \-mloop\-unsigned
748\&\-mparallel\-insns \-mparallel\-mpy \-mpreserve\-float\fR
749.Sp
750\&\fIV850 Options\fR
751\&\fB\-mlong\-calls \-mno\-long\-calls \-mep \-mno\-ep
752\&\-mprolog\-function \-mno\-prolog\-function \-mspace
753\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
754\&\fB\-mapp\-regs \-mno\-app\-regs
755\&\-mdisable\-callt \-mno\-disable\-callt
756\&\-mv850e1
757\&\-mv850e
758\&\-mv850 \-mbig\-switch\fR
759.Sp
760\&\fI\s-1VAX\s0 Options\fR
761\&\fB\-mg \-mgnu \-munix\fR
762.Sp
763\&\fIx86\-64 Options\fR
764See i386 and x86\-64 Options.
765.Sp
766\&\fIXstormy16 Options\fR
767\&\fB\-msim\fR
768.Sp
769\&\fIXtensa Options\fR
770\&\fB\-mconst16 \-mno\-const16
771\&\-mfused\-madd \-mno\-fused\-madd
772\&\-mtext\-section\-literals \-mno\-text\-section\-literals
773\&\-mtarget\-align \-mno\-target\-align
774\&\-mlongcalls \-mno\-longcalls\fR
775.Sp
776\&\fIzSeries Options\fR
777See S/390 and zSeries Options.
778.IP "\fICode Generation Options\fR" 4
779.IX Item "Code Generation Options"
780\&\fB\-fcall\-saved\-\fR\fIreg\fR \fB\-fcall\-used\-\fR\fIreg\fR
781\&\fB\-ffixed\-\fR\fIreg\fR \fB\-fexceptions
782\&\-fnon\-call\-exceptions \-funwind\-tables
783\&\-fasynchronous\-unwind\-tables
784\&\-finhibit\-size\-directive \-finstrument\-functions
785\&\-fno\-common \-fno\-ident
786\&\-fpcc\-struct\-return \-fpic \-fPIC \-fpie \-fPIE
787\&\-fno\-jump\-tables
788\&\-freg\-struct\-return \-fshort\-enums
789\&\-fshort\-double \-fshort\-wchar
790\&\-fverbose\-asm \-fpack\-struct[=\fR\fIn\fR\fB] \-fstack\-check
791\&\-fstack\-limit\-register=\fR\fIreg\fR \fB\-fstack\-limit\-symbol=\fR\fIsym\fR
792\&\fB\-fargument\-alias \-fargument\-noalias
793\&\-fargument\-noalias\-global \-fargument\-noalias\-anything
794\&\-fleading\-underscore \-ftls\-model=\fR\fImodel\fR
795\&\fB\-ftrapv \-fwrapv \-fbounds\-check
796\&\-fvisibility\fR
797.Sh "Options Controlling the Kind of Output"
798.IX Subsection "Options Controlling the Kind of Output"
799Compilation can involve up to four stages: preprocessing, compilation
800proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of
801preprocessing and compiling several files either into several
802assembler input files, or into one assembler input file; then each
803assembler input file produces an object file, and linking combines all
804the object files (those newly compiled, and those specified as input)
805into an executable file.
806.PP
807For any given input file, the file name suffix determines what kind of
808compilation is done:
809.IP "\fIfile\fR\fB.c\fR" 4
810.IX Item "file.c"
811C source code which must be preprocessed.
812.IP "\fIfile\fR\fB.i\fR" 4
813.IX Item "file.i"
814C source code which should not be preprocessed.
815.IP "\fIfile\fR\fB.ii\fR" 4
816.IX Item "file.ii"
817\&\*(C+ source code which should not be preprocessed.
818.IP "\fIfile\fR\fB.m\fR" 4
819.IX Item "file.m"
820Objective-C source code. Note that you must link with the \fIlibobjc\fR
821library to make an Objective-C program work.
822.IP "\fIfile\fR\fB.mi\fR" 4
823.IX Item "file.mi"
824Objective-C source code which should not be preprocessed.
825.IP "\fIfile\fR\fB.mm\fR" 4
826.IX Item "file.mm"
827.PD 0
828.IP "\fIfile\fR\fB.M\fR" 4
829.IX Item "file.M"
830.PD
831Objective\-\*(C+ source code. Note that you must link with the \fIlibobjc\fR
832library to make an Objective\-\*(C+ program work. Note that \fB.M\fR refers
833to a literal capital M.
834.IP "\fIfile\fR\fB.mii\fR" 4
835.IX Item "file.mii"
836Objective\-\*(C+ source code which should not be preprocessed.
837.IP "\fIfile\fR\fB.h\fR" 4
838.IX Item "file.h"
839C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
840precompiled header.
841.IP "\fIfile\fR\fB.cc\fR" 4
842.IX Item "file.cc"
843.PD 0
844.IP "\fIfile\fR\fB.cp\fR" 4
845.IX Item "file.cp"
846.IP "\fIfile\fR\fB.cxx\fR" 4
847.IX Item "file.cxx"
848.IP "\fIfile\fR\fB.cpp\fR" 4
849.IX Item "file.cpp"
850.IP "\fIfile\fR\fB.CPP\fR" 4
851.IX Item "file.CPP"
852.IP "\fIfile\fR\fB.c++\fR" 4
853.IX Item "file.c++"
854.IP "\fIfile\fR\fB.C\fR" 4
855.IX Item "file.C"
856.PD
857\&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR,
858the last two letters must both be literally \fBx\fR. Likewise,
859\&\fB.C\fR refers to a literal capital C.
860.IP "\fIfile\fR\fB.mm\fR" 4
861.IX Item "file.mm"
862.PD 0
863.IP "\fIfile\fR\fB.M\fR" 4
864.IX Item "file.M"
865.PD
866Objective\-\*(C+ source code which must be preprocessed.
867.IP "\fIfile\fR\fB.mii\fR" 4
868.IX Item "file.mii"
869Objective\-\*(C+ source code which should not be preprocessed.
870.IP "\fIfile\fR\fB.hh\fR" 4
871.IX Item "file.hh"
872.PD 0
873.IP "\fIfile\fR\fB.H\fR" 4
874.IX Item "file.H"
875.PD
876\&\*(C+ header file to be turned into a precompiled header.
877.IP "\fIfile\fR\fB.f\fR" 4
878.IX Item "file.f"
879.PD 0
880.IP "\fIfile\fR\fB.for\fR" 4
881.IX Item "file.for"
882.IP "\fIfile\fR\fB.FOR\fR" 4
883.IX Item "file.FOR"
884.PD
885Fixed form Fortran source code which should not be preprocessed.
886.IP "\fIfile\fR\fB.F\fR" 4
887.IX Item "file.F"
888.PD 0
889.IP "\fIfile\fR\fB.fpp\fR" 4
890.IX Item "file.fpp"
891.IP "\fIfile\fR\fB.FPP\fR" 4
892.IX Item "file.FPP"
893.PD
894Fixed form Fortran source code which must be preprocessed (with the traditional
895preprocessor).
896.IP "\fIfile\fR\fB.f90\fR" 4
897.IX Item "file.f90"
898.PD 0
899.IP "\fIfile\fR\fB.f95\fR" 4
900.IX Item "file.f95"
901.PD
902Free form Fortran source code which should not be preprocessed.
903.IP "\fIfile\fR\fB.F90\fR" 4
904.IX Item "file.F90"
905.PD 0
906.IP "\fIfile\fR\fB.F95\fR" 4
907.IX Item "file.F95"
908.PD
909Free form Fortran source code which must be preprocessed (with the
910traditional preprocessor).
911.IP "\fIfile\fR\fB.ads\fR" 4
912.IX Item "file.ads"
913Ada source code file which contains a library unit declaration (a
914declaration of a package, subprogram, or generic, or a generic
915instantiation), or a library unit renaming declaration (a package,
916generic, or subprogram renaming declaration). Such files are also
917called \fIspecs\fR.
918.IP "\fIfile\fR\fB.adb\fR" 4
919.IX Item "file.adb"
920Ada source code file containing a library unit body (a subprogram or
921package body). Such files are also called \fIbodies\fR.
922.IP "\fIfile\fR\fB.s\fR" 4
923.IX Item "file.s"
924Assembler code.
925.IP "\fIfile\fR\fB.S\fR" 4
926.IX Item "file.S"
927Assembler code which must be preprocessed.
928.IP "\fIother\fR" 4
929.IX Item "other"
930An object file to be fed straight into linking.
931Any file name with no recognized suffix is treated this way.
932.PP
933You can specify the input language explicitly with the \fB\-x\fR option:
934.IP "\fB\-x\fR \fIlanguage\fR" 4
935.IX Item "-x language"
936Specify explicitly the \fIlanguage\fR for the following input files
937(rather than letting the compiler choose a default based on the file
938name suffix). This option applies to all following input files until
939the next \fB\-x\fR option. Possible values for \fIlanguage\fR are:
940.Sp
941.Vb 9
942\& c c-header c-cpp-output
943\& c++ c++-header c++-cpp-output
944\& objective-c objective-c-header objective-c-cpp-output
945\& objective-c++ objective-c++-header objective-c++-cpp-output
946\& assembler assembler-with-cpp
947\& ada
948\& f95 f95-cpp-input
949\& java
950\& treelang
951.Ve
952.IP "\fB\-x none\fR" 4
953.IX Item "-x none"
954Turn off any specification of a language, so that subsequent files are
955handled according to their file name suffixes (as they are if \fB\-x\fR
956has not been used at all).
957.IP "\fB\-pass\-exit\-codes\fR" 4
958.IX Item "-pass-exit-codes"
959Normally the \fBgcc\fR program will exit with the code of 1 if any
960phase of the compiler returns a non-success return code. If you specify
961\&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
962numerically highest error produced by any phase that returned an error
963indication. The C, \*(C+, and Fortran frontends return 4, if an internal
964compiler error is encountered.
965.PP
966If you only want some of the stages of compilation, you can use
967\&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
968one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
969\&\fBgcc\fR is to stop. Note that some combinations (for example,
970\&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
971.IP "\fB\-c\fR" 4
972.IX Item "-c"
973Compile or assemble the source files, but do not link. The linking
974stage simply is not done. The ultimate output is in the form of an
975object file for each source file.
976.Sp
977By default, the object file name for a source file is made by replacing
978the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
979.Sp
980Unrecognized input files, not requiring compilation or assembly, are
981ignored.
982.IP "\fB\-S\fR" 4
983.IX Item "-S"
984Stop after the stage of compilation proper; do not assemble. The output
985is in the form of an assembler code file for each non-assembler input
986file specified.
987.Sp
988By default, the assembler file name for a source file is made by
989replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
990.Sp
991Input files that don't require compilation are ignored.
992.IP "\fB\-E\fR" 4
993.IX Item "-E"
994Stop after the preprocessing stage; do not run the compiler proper. The
995output is in the form of preprocessed source code, which is sent to the
996standard output.
997.Sp
998Input files which don't require preprocessing are ignored.
999.IP "\fB\-o\fR \fIfile\fR" 4
1000.IX Item "-o file"
1001Place output in file \fIfile\fR. This applies regardless to whatever
1002sort of output is being produced, whether it be an executable file,
1003an object file, an assembler file or preprocessed C code.
1004.Sp
1005If \fB\-o\fR is not specified, the default is to put an executable
1006file in \fIa.out\fR, the object file for
1007\&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
1008assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
1009\&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
1010standard output.
1011.IP "\fB\-v\fR" 4
1012.IX Item "-v"
1013Print (on standard error output) the commands executed to run the stages
1014of compilation. Also print the version number of the compiler driver
1015program and of the preprocessor and the compiler proper.
1016.IP "\fB\-###\fR" 4
1017.IX Item "-###"
1018Like \fB\-v\fR except the commands are not executed and all command
1019arguments are quoted. This is useful for shell scripts to capture the
1020driver-generated command lines.
1021.IP "\fB\-pipe\fR" 4
1022.IX Item "-pipe"
1023Use pipes rather than temporary files for communication between the
1024various stages of compilation. This fails to work on some systems where
1025the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
1026no trouble.
1027.IP "\fB\-combine\fR" 4
1028.IX Item "-combine"
1029If you are compiling multiple source files, this option tells the driver
1030to pass all the source files to the compiler at once (for those
1031languages for which the compiler can handle this). This will allow
1032intermodule analysis (\s-1IMA\s0) to be performed by the compiler. Currently the only
1033language for which this is supported is C. If you pass source files for
1034multiple languages to the driver, using this option, the driver will invoke
1035the compiler(s) that support \s-1IMA\s0 once each, passing each compiler all the
1036source files appropriate for it. For those languages that do not support
1037\&\s-1IMA\s0 this option will be ignored, and the compiler will be invoked once for
1038each source file in that language. If you use this option in conjunction
1039with \fB\-save\-temps\fR, the compiler will generate multiple
1040pre-processed files
1041(one for each source file), but only one (combined) \fI.o\fR or
1042\&\fI.s\fR file.
1043.IP "\fB\-\-help\fR" 4
1044.IX Item "--help"
1045Print (on the standard output) a description of the command line options
1046understood by \fBgcc\fR. If the \fB\-v\fR option is also specified
1047then \fB\-\-help\fR will also be passed on to the various processes
1048invoked by \fBgcc\fR, so that they can display the command line options
1049they accept. If the \fB\-Wextra\fR option is also specified then command
1050line options which have no documentation associated with them will also
1051be displayed.
1052.IP "\fB\-\-target\-help\fR" 4
1053.IX Item "--target-help"
1054Print (on the standard output) a description of target specific command
1055line options for each tool.
1056.IP "\fB\-\-version\fR" 4
1057.IX Item "--version"
1058Display the version number and copyrights of the invoked \s-1GCC\s0.
1059.IP "\fB@\fR\fIfile\fR" 4
1060.IX Item "@file"
1061Read command-line options from \fIfile\fR. The options read are
1062inserted in place of the original @\fIfile\fR option. If \fIfile\fR
1063does not exist, or cannot be read, then the option will be treated
1064literally, and not removed.
1065.Sp
1066Options in \fIfile\fR are separated by whitespace. A whitespace
1067character may be included in an option by surrounding the entire
1068option in either single or double quotes. Any character (including a
1069backslash) may be included by prefixing the character to be included
1070with a backslash. The \fIfile\fR may itself contain additional
1071@\fIfile\fR options; any such options will be processed recursively.
1072.Sh "Compiling \*(C+ Programs"
1073.IX Subsection "Compiling Programs"
1074\&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
1075\&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
1076\&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR or \fB.H\fR; and
1077preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes
1078files with these names and compiles them as \*(C+ programs even if you
1079call the compiler the same way as for compiling C programs (usually
1080with the name \fBgcc\fR).
1081.PP
1082However, the use of \fBgcc\fR does not add the \*(C+ library.
1083\&\fBg++\fR is a program that calls \s-1GCC\s0 and treats \fB.c\fR,
1084\&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
1085files unless \fB\-x\fR is used, and automatically specifies linking
1086against the \*(C+ library. This program is also useful when
1087precompiling a C header file with a \fB.h\fR extension for use in \*(C+
1088compilations. On many systems, \fBg++\fR is also installed with
1089the name \fBc++\fR.
1090.PP
1091When you compile \*(C+ programs, you may specify many of the same
1092command-line options that you use for compiling programs in any
1093language; or command-line options meaningful for C and related
1094languages; or options that are meaningful only for \*(C+ programs.
1095.Sh "Options Controlling C Dialect"
1096.IX Subsection "Options Controlling C Dialect"
1097The following options control the dialect of C (or languages derived
1098from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
1099accepts:
1100.IP "\fB\-ansi\fR" 4
1101.IX Item "-ansi"
1102In C mode, support all \s-1ISO\s0 C90 programs. In \*(C+ mode,
1103remove \s-1GNU\s0 extensions that conflict with \s-1ISO\s0 \*(C+.
1104.Sp
1105This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
1106C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
1107such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
1108predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
1109type of system you are using. It also enables the undesirable and
1110rarely used \s-1ISO\s0 trigraph feature. For the C compiler,
1111it disables recognition of \*(C+ style \fB//\fR comments as well as
1112the \f(CW\*(C`inline\*(C'\fR keyword.
1113.Sp
1114The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
1115\&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
1116\&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of
1117course, but it is useful to put them in header files that might be included
1118in compilations done with \fB\-ansi\fR. Alternate predefined macros
1119such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
1120without \fB\-ansi\fR.
1121.Sp
1122The \fB\-ansi\fR option does not cause non-ISO programs to be
1123rejected gratuitously. For that, \fB\-pedantic\fR is required in
1124addition to \fB\-ansi\fR.
1125.Sp
1126The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
1127option is used. Some header files may notice this macro and refrain
1128from declaring certain functions or defining certain macros that the
1129\&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
1130programs that might use these names for other things.
1131.Sp
1132Functions which would normally be built in but do not have semantics
1133defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
1134functions with \fB\-ansi\fR is used.
1135.IP "\fB\-std=\fR" 4
1136.IX Item "-std="
1137Determine the language standard. This option is currently only
1138supported when compiling C or \*(C+. A value for this option must be
1139provided; possible values are
1140.RS 4
1141.IP "\fBc89\fR" 4
1142.IX Item "c89"
1143.PD 0
1144.IP "\fBiso9899:1990\fR" 4
1145.IX Item "iso9899:1990"
1146.PD
1147\&\s-1ISO\s0 C90 (same as \fB\-ansi\fR).
1148.IP "\fBiso9899:199409\fR" 4
1149.IX Item "iso9899:199409"
1150\&\s-1ISO\s0 C90 as modified in amendment 1.
1151.IP "\fBc99\fR" 4
1152.IX Item "c99"
1153.PD 0
1154.IP "\fBc9x\fR" 4
1155.IX Item "c9x"
1156.IP "\fBiso9899:1999\fR" 4
1157.IX Item "iso9899:1999"
1158.IP "\fBiso9899:199x\fR" 4
1159.IX Item "iso9899:199x"
1160.PD
1161\&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see
1162<\fBhttp://gcc.gnu.org/gcc\-4.2/c99status.html\fR> for more information. The
1163names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
1164.IP "\fBgnu89\fR" 4
1165.IX Item "gnu89"
1166Default, \s-1ISO\s0 C90 plus \s-1GNU\s0 extensions (including some C99 features).
1167.IP "\fBgnu99\fR" 4
1168.IX Item "gnu99"
1169.PD 0
1170.IP "\fBgnu9x\fR" 4
1171.IX Item "gnu9x"
1172.PD
1173\&\s-1ISO\s0 C99 plus \s-1GNU\s0 extensions. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
1174this will become the default. The name \fBgnu9x\fR is deprecated.
1175.IP "\fBc++98\fR" 4
1176.IX Item "c++98"
1177The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
1178.IP "\fBgnu++98\fR" 4
1179.IX Item "gnu++98"
1180The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
1181default for \*(C+ code.
1182.RE
1183.RS 4
1184.Sp
1185Even when this option is not specified, you can still use some of the
1186features of newer standards in so far as they do not conflict with
1187previous C standards. For example, you may use \f(CW\*(C`_\|_restrict_\|_\*(C'\fR even
1188when \fB\-std=c99\fR is not specified.
1189.Sp
1190The \fB\-std\fR options specifying some version of \s-1ISO\s0 C have the same
1191effects as \fB\-ansi\fR, except that features that were not in \s-1ISO\s0 C90
1192but are in the specified version (for example, \fB//\fR comments and
1193the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled.
1194.RE
1195.IP "\fB\-fgnu89\-inline\fR" 4
1196.IX Item "-fgnu89-inline"
1197The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
1198\&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
1199 Using this
1200option is roughly equivalent to adding the \f(CW\*(C`gnu_inline\*(C'\fR function
1201attribute to all inline functions.
1202.Sp
1203This option is accepted by \s-1GCC\s0 versions 4.1.3 and up. In \s-1GCC\s0 versions
1204prior to 4.3, C99 inline semantics are not supported, and thus this
1205option is effectively assumed to be present regardless of whether or not
1206it is specified; the only effect of specifying it explicitly is to
1207disable warnings about using inline functions in C99 mode. Likewise,
1208the option \fB\-fno\-gnu89\-inline\fR is not supported in versions of
1209\&\s-1GCC\s0 before 4.3. It will be supported only in C99 or gnu99 mode, not in
1210C89 or gnu89 mode.
1211.Sp
1212The preprocesor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
1213\&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
1214in effect for \f(CW\*(C`inline\*(C'\fR functions.
1215.IP "\fB\-aux\-info\fR \fIfilename\fR" 4
1216.IX Item "-aux-info filename"
1217Output to the given filename prototyped declarations for all functions
1218declared and/or defined in a translation unit, including those in header
1219files. This option is silently ignored in any language other than C.
1220.Sp
1221Besides declarations, the file indicates, in comments, the origin of
1222each declaration (source file and line), whether the declaration was
1223implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
1224\&\fBO\fR for old, respectively, in the first character after the line
1225number and the colon), and whether it came from a declaration or a
1226definition (\fBC\fR or \fBF\fR, respectively, in the following
1227character). In the case of function definitions, a K&R\-style list of
1228arguments followed by their declarations is also provided, inside
1229comments, after the declaration.
1230.IP "\fB\-fno\-asm\fR" 4
1231.IX Item "-fno-asm"
1232Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
1233keyword, so that code can use these words as identifiers. You can use
1234the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
1235instead. \fB\-ansi\fR implies \fB\-fno\-asm\fR.
1236.Sp
1237In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
1238\&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to
1239use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
1240effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
1241switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
1242\&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
1243.IP "\fB\-fno\-builtin\fR" 4
1244.IX Item "-fno-builtin"
1245.PD 0
1246.IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
1247.IX Item "-fno-builtin-function"
1248.PD
1249Don't recognize built-in functions that do not begin with
1250\&\fB_\|_builtin_\fR as prefix.
1251.Sp
1252\&\s-1GCC\s0 normally generates special code to handle certain built-in functions
1253more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
1254instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
1255may become inline copy loops. The resulting code is often both smaller
1256and faster, but since the function calls no longer appear as such, you
1257cannot set a breakpoint on those calls, nor can you change the behavior
1258of the functions by linking with a different library. In addition,
1259when a function is recognized as a built-in function, \s-1GCC\s0 may use
1260information about that function to warn about problems with calls to
1261that function, or to generate more efficient code, even if the
1262resulting code still contains calls to that function. For example,
1263warnings are given with \fB\-Wformat\fR for bad calls to
1264\&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
1265known not to modify global memory.
1266.Sp
1267With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
1268only the built-in function \fIfunction\fR is
1269disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a
1270function is named this is not built-in in this version of \s-1GCC\s0, this
1271option is ignored. There is no corresponding
1272\&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
1273built-in functions selectively when using \fB\-fno\-builtin\fR or
1274\&\fB\-ffreestanding\fR, you may define macros such as:
1275.Sp
1276.Vb 2
1277\& #define abs(n) __builtin_abs ((n))
1278\& #define strcpy(d, s) __builtin_strcpy ((d), (s))
1279.Ve
1280.IP "\fB\-fhosted\fR" 4
1281.IX Item "-fhosted"
1282Assert that compilation takes place in a hosted environment. This implies
1283\&\fB\-fbuiltin\fR. A hosted environment is one in which the
1284entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
1285type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel.
1286This is equivalent to \fB\-fno\-freestanding\fR.
1287.IP "\fB\-ffreestanding\fR" 4
1288.IX Item "-ffreestanding"
1289Assert that compilation takes place in a freestanding environment. This
1290implies \fB\-fno\-builtin\fR. A freestanding environment
1291is one in which the standard library may not exist, and program startup may
1292not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel.
1293This is equivalent to \fB\-fno\-hosted\fR.
1294.IP "\fB\-fopenmp\fR" 4
1295.IX Item "-fopenmp"
1296Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
1297\&\f(CW\*(C`!$omp\*(C'\fR in Fortran. When \fB\-fopenmp\fR is specified, the
1298compiler generates parallel code according to the OpenMP Application
1299Program Interface v2.5 <\fBhttp://www.openmp.org/\fR>.
1300.IP "\fB\-fms\-extensions\fR" 4
1301.IX Item "-fms-extensions"
1302Accept some non-standard constructs used in Microsoft header files.
1303.Sp
1304Some cases of unnamed fields in structures and unions are only
1305accepted with this option.
1306.IP "\fB\-trigraphs\fR" 4
1307.IX Item "-trigraphs"
1308Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
1309options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
1310.IP "\fB\-no\-integrated\-cpp\fR" 4
1311.IX Item "-no-integrated-cpp"
1312Performs a compilation in two passes: preprocessing and compiling. This
1313option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
1314\&\fB\-B\fR option. The user supplied compilation step can then add in
1315an additional preprocessing step after normal preprocessing but before
1316compiling. The default is to use the integrated cpp (internal cpp)
1317.Sp
1318The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
1319\&\*(L"cc1obj\*(R" are merged.
1320.IP "\fB\-traditional\fR" 4
1321.IX Item "-traditional"
1322.PD 0
1323.IP "\fB\-traditional\-cpp\fR" 4
1324.IX Item "-traditional-cpp"
1325.PD
1326Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
1327C compiler. They are now only supported with the \fB\-E\fR switch.
1328The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0
1329\&\s-1CPP\s0 manual for details.
1330.IP "\fB\-fcond\-mismatch\fR" 4
1331.IX Item "-fcond-mismatch"
1332Allow conditional expressions with mismatched types in the second and
1333third arguments. The value of such an expression is void. This option
1334is not supported for \*(C+.
1335.IP "\fB\-funsigned\-char\fR" 4
1336.IX Item "-funsigned-char"
1337Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
1338.Sp
1339Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
1340be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
1341\&\f(CW\*(C`signed char\*(C'\fR by default.
1342.Sp
1343Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
1344\&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
1345But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
1346expect it to be signed, or expect it to be unsigned, depending on the
1347machines they were written for. This option, and its inverse, let you
1348make such a program work with the opposite default.
1349.Sp
1350The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
1351\&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
1352is always just like one of those two.
1353.IP "\fB\-fsigned\-char\fR" 4
1354.IX Item "-fsigned-char"
1355Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
1356.Sp
1357Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
1358the negative form of \fB\-funsigned\-char\fR. Likewise, the option
1359\&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
1360.IP "\fB\-fsigned\-bitfields\fR" 4
1361.IX Item "-fsigned-bitfields"
1362.PD 0
1363.IP "\fB\-funsigned\-bitfields\fR" 4
1364.IX Item "-funsigned-bitfields"
1365.IP "\fB\-fno\-signed\-bitfields\fR" 4
1366.IX Item "-fno-signed-bitfields"
1367.IP "\fB\-fno\-unsigned\-bitfields\fR" 4
1368.IX Item "-fno-unsigned-bitfields"
1369.PD
1370These options control whether a bit-field is signed or unsigned, when the
1371declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By
1372default, such a bit-field is signed, because this is consistent: the
1373basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
1374.Sh "Options Controlling \*(C+ Dialect"
1375.IX Subsection "Options Controlling Dialect"
1376This section describes the command-line options that are only meaningful
1377for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
1378regardless of what language your program is in. For example, you
1379might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
1380.PP
1381.Vb 1
1382\& g++ -g -frepo -O -c firstClass.C
1383.Ve
1384.PP
1385In this example, only \fB\-frepo\fR is an option meant
1386only for \*(C+ programs; you can use the other options with any
1387language supported by \s-1GCC\s0.
1388.PP
1389Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
1390.IP "\fB\-fabi\-version=\fR\fIn\fR" 4
1391.IX Item "-fabi-version=n"
1392Use version \fIn\fR of the \*(C+ \s-1ABI\s0. Version 2 is the version of the
1393\&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4. Version 1 is the version of
1394the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2. Version 0 will always be
1395the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
1396Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
1397are fixed.
1398.Sp
1399The default is version 2.
1400.IP "\fB\-fno\-access\-control\fR" 4
1401.IX Item "-fno-access-control"
1402Turn off all access checking. This switch is mainly useful for working
1403around bugs in the access control code.
1404.IP "\fB\-fcheck\-new\fR" 4
1405.IX Item "-fcheck-new"
1406Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
1407before attempting to modify the storage allocated. This check is
1408normally unnecessary because the \*(C+ standard specifies that
1409\&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
1410\&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
1411return value even without this option. In all other cases, when
1412\&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
1413exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also
1414\&\fBnew (nothrow)\fR.
1415.IP "\fB\-fconserve\-space\fR" 4
1416.IX Item "-fconserve-space"
1417Put uninitialized or runtime-initialized global variables into the
1418common segment, as C does. This saves space in the executable at the
1419cost of not diagnosing duplicate definitions. If you compile with this
1420flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
1421completed, you may have an object that is being destroyed twice because
1422two definitions were merged.
1423.Sp
1424This option is no longer useful on most targets, now that support has
1425been added for putting variables into \s-1BSS\s0 without making them common.
1426.IP "\fB\-ffriend\-injection\fR" 4
1427.IX Item "-ffriend-injection"
1428Inject friend functions into the enclosing namespace, so that they are
1429visible outside the scope of the class in which they are declared.
1430Friend functions were documented to work this way in the old Annotated
1431\&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
1432that way. However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
1433in an enclosing scope can only be found using argument dependent
1434lookup. This option causes friends to be injected as they were in
1435earlier releases.
1436.Sp
1437This option is for compatibility, and may be removed in a future
1438release of G++.
1439.IP "\fB\-fno\-elide\-constructors\fR" 4
1440.IX Item "-fno-elide-constructors"
1441The \*(C+ standard allows an implementation to omit creating a temporary
1442which is only used to initialize another object of the same type.
1443Specifying this option disables that optimization, and forces G++ to
1444call the copy constructor in all cases.
1445.IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
1446.IX Item "-fno-enforce-eh-specs"
1447Don't generate code to check for violation of exception specifications
1448at runtime. This option violates the \*(C+ standard, but may be useful
1449for reducing code size in production builds, much like defining
1450\&\fB\s-1NDEBUG\s0\fR. This does not give user code permission to throw
1451exceptions in violation of the exception specifications; the compiler
1452will still optimize based on the specifications, so throwing an
1453unexpected exception will result in undefined behavior.
1454.IP "\fB\-ffor\-scope\fR" 4
1455.IX Item "-ffor-scope"
1456.PD 0
1457.IP "\fB\-fno\-for\-scope\fR" 4
1458.IX Item "-fno-for-scope"
1459.PD
1460If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
1461a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
1462as specified by the \*(C+ standard.
1463If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
1464a \fIfor-init-statement\fR extends to the end of the enclosing scope,
1465as was the case in old versions of G++, and other (traditional)
1466implementations of \*(C+.
1467.Sp
1468The default if neither flag is given to follow the standard,
1469but to allow and give a warning for old-style code that would
1470otherwise be invalid, or have different behavior.
1471.IP "\fB\-fno\-gnu\-keywords\fR" 4
1472.IX Item "-fno-gnu-keywords"
1473Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
1474word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
1475\&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
1476.IP "\fB\-fno\-implicit\-templates\fR" 4
1477.IX Item "-fno-implicit-templates"
1478Never emit code for non-inline templates which are instantiated
1479implicitly (i.e. by use); only emit code for explicit instantiations.
1480.IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
1481.IX Item "-fno-implicit-inline-templates"
1482Don't emit code for implicit instantiations of inline templates, either.
1483The default is to handle inlines differently so that compiles with and
1484without optimization will need the same set of explicit instantiations.
1485.IP "\fB\-fno\-implement\-inlines\fR" 4
1486.IX Item "-fno-implement-inlines"
1487To save space, do not emit out-of-line copies of inline functions
1488controlled by \fB#pragma implementation\fR. This will cause linker
1489errors if these functions are not inlined everywhere they are called.
1490.IP "\fB\-fms\-extensions\fR" 4
1491.IX Item "-fms-extensions"
1492Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
1493int and getting a pointer to member function via non-standard syntax.
1494.IP "\fB\-fno\-nonansi\-builtins\fR" 4
1495.IX Item "-fno-nonansi-builtins"
1496Disable built-in declarations of functions that are not mandated by
1497\&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
1498\&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
1499.IP "\fB\-fno\-operator\-names\fR" 4
1500.IX Item "-fno-operator-names"
1501Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
1502\&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
1503synonyms as keywords.
1504.IP "\fB\-fno\-optional\-diags\fR" 4
1505.IX Item "-fno-optional-diags"
1506Disable diagnostics that the standard says a compiler does not need to
1507issue. Currently, the only such diagnostic issued by G++ is the one for
1508a name having multiple meanings within a class.
1509.IP "\fB\-fpermissive\fR" 4
1510.IX Item "-fpermissive"
1511Downgrade some diagnostics about nonconformant code from errors to
1512warnings. Thus, using \fB\-fpermissive\fR will allow some
1513nonconforming code to compile.
1514.IP "\fB\-frepo\fR" 4
1515.IX Item "-frepo"
1516Enable automatic template instantiation at link time. This option also
1517implies \fB\-fno\-implicit\-templates\fR.
1518.IP "\fB\-fno\-rtti\fR" 4
1519.IX Item "-fno-rtti"
1520Disable generation of information about every class with virtual
1521functions for use by the \*(C+ runtime type identification features
1522(\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts
1523of the language, you can save some space by using this flag. Note that
1524exception handling uses the same information, but it will generate it as
1525needed. The \fBdynamic_cast\fR operator can still be used for casts that
1526do not require runtime type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
1527unambiguous base classes.
1528.IP "\fB\-fstats\fR" 4
1529.IX Item "-fstats"
1530Emit statistics about front-end processing at the end of the compilation.
1531This information is generally only useful to the G++ development team.
1532.IP "\fB\-ftemplate\-depth\-\fR\fIn\fR" 4
1533.IX Item "-ftemplate-depth-n"
1534Set the maximum instantiation depth for template classes to \fIn\fR.
1535A limit on the template instantiation depth is needed to detect
1536endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+
1537conforming programs must not rely on a maximum depth greater than 17.
1538.IP "\fB\-fno\-threadsafe\-statics\fR" 4
1539.IX Item "-fno-threadsafe-statics"
1540Do not emit the extra code to use the routines specified in the \*(C+
1541\&\s-1ABI\s0 for thread-safe initialization of local statics. You can use this
1542option to reduce code size slightly in code that doesn't need to be
1543thread\-safe.
1544.IP "\fB\-fuse\-cxa\-atexit\fR" 4
1545.IX Item "-fuse-cxa-atexit"
1546Register destructors for objects with static storage duration with the
1547\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
1548This option is required for fully standards-compliant handling of static
1549destructors, but will only work if your C library supports
1550\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
1551.IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
1552.IX Item "-fno-use-cxa-get-exception-ptr"
1553Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine. This
1554will cause \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
1555if the runtime routine is not available.
1556.IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
1557.IX Item "-fvisibility-inlines-hidden"
1558This switch declares that the user does not attempt to compare
1559pointers to inline methods where the addresses of the two functions
1560were taken in different shared objects.
1561.Sp
1562The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
1563\&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
1564appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
1565when used within the \s-1DSO\s0. Enabling this option can have a dramatic effect
1566on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
1567dynamic export table when the library makes heavy use of templates.
1568.Sp
1569The behaviour of this switch is not quite the same as marking the
1570methods as hidden directly, because it does not affect static variables
1571local to the function or cause the compiler to deduce that
1572the function is defined in only one shared object.
1573.Sp
1574You may mark a method as having a visibility explicitly to negate the
1575effect of the switch for that method. For example, if you do want to
1576compare pointers to a particular inline method, you might mark it as
1577having default visibility. Marking the enclosing class with explicit
1578visibility will have no effect.
1579.Sp
1580Explicitly instantiated inline methods are unaffected by this option
1581as their linkage might otherwise cross a shared library boundary.
1582.IP "\fB\-fno\-weak\fR" 4
1583.IX Item "-fno-weak"
1584Do not use weak symbol support, even if it is provided by the linker.
1585By default, G++ will use weak symbols if they are available. This
1586option exists only for testing, and should not be used by end\-users;
1587it will result in inferior code and has no benefits. This option may
1588be removed in a future release of G++.
1589.IP "\fB\-nostdinc++\fR" 4
1590.IX Item "-nostdinc++"
1591Do not search for header files in the standard directories specific to
1592\&\*(C+, but do still search the other standard directories. (This option
1593is used when building the \*(C+ library.)
1594.PP
1595In addition, these optimization, warning, and code generation options
1596have meanings only for \*(C+ programs:
1597.IP "\fB\-fno\-default\-inline\fR" 4
1598.IX Item "-fno-default-inline"
1599Do not assume \fBinline\fR for functions defined inside a class scope.
1600 Note that these
1601functions will have linkage like inline functions; they just won't be
1602inlined by default.
1603.IP "\fB\-Wabi\fR (\*(C+ only)" 4
1604.IX Item "-Wabi ( only)"
1605Warn when G++ generates code that is probably not compatible with the
1606vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about
1607all such cases, there are probably some cases that are not warned about,
1608even though G++ is generating incompatible code. There may also be
1609cases where warnings are emitted even though the code that is generated
1610will be compatible.
1611.Sp
1612You should rewrite your code to avoid these warnings if you are
1613concerned about the fact that code generated by G++ may not be binary
1614compatible with code generated by other compilers.
1615.Sp
1616The known incompatibilities at this point include:
1617.RS 4
1618.IP "*" 4
1619Incorrect handling of tail-padding for bit\-fields. G++ may attempt to
1620pack data into the same byte as a base class. For example:
1621.Sp
1622.Vb 2
1623\& struct A { virtual void f(); int f1 : 1; };
1624\& struct B : public A { int f2 : 1; };
1625.Ve
1626.Sp
1627In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
1628as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem
1629by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
1630byte size on your platform; that will cause G++ and other compilers to
1631layout \f(CW\*(C`B\*(C'\fR identically.
1632.IP "*" 4
1633Incorrect handling of tail-padding for virtual bases. G++ does not use
1634tail padding when laying out virtual bases. For example:
1635.Sp
1636.Vb 3
1637\& struct A { virtual void f(); char c1; };
1638\& struct B { B(); char c2; };
1639\& struct C : public A, public virtual B {};
1640.Ve
1641.Sp
1642In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
1643\&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by
1644explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
1645alignment (ignoring virtual base classes); that will cause G++ and other
1646compilers to layout \f(CW\*(C`C\*(C'\fR identically.
1647.IP "*" 4
1648Incorrect handling of bit-fields with declared widths greater than that
1649of their underlying types, when the bit-fields appear in a union. For
1650example:
1651.Sp
1652.Vb 1
1653\& union U { int i : 4096; };
1654.Ve
1655.Sp
1656Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
1657union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
1658.IP "*" 4
1659Empty classes can be placed at incorrect offsets. For example:
1660.Sp
1661.Vb 1
1662\& struct A {};
1663.Ve
1664.Sp
1665.Vb 4
1666\& struct B {
1667\& A a;
1668\& virtual void f ();
1669\& };
1670.Ve
1671.Sp
1672.Vb 1
1673\& struct C : public B, public A {};
1674.Ve
1675.Sp
1676G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
1677it should be placed at offset zero. G++ mistakenly believes that the
1678\&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
1679.IP "*" 4
1680Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
1681template template parameters can be mangled incorrectly.
1682.Sp
1683.Vb 2
1684\& template <typename Q>
1685\& void f(typename Q::X) {}
1686.Ve
1687.Sp
1688.Vb 2
1689\& template <template <typename> class Q>
1690\& void f(typename Q<int>::X) {}
1691.Ve
1692.Sp
1693Instantiations of these templates may be mangled incorrectly.
1694.RE
1695.RS 4
1696.RE
1697.IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ only)" 4
1698.IX Item "-Wctor-dtor-privacy ( only)"
1699Warn when a class seems unusable because all the constructors or
1700destructors in that class are private, and it has neither friends nor
1701public static member functions.
1702.IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ only)" 4
1703.IX Item "-Wnon-virtual-dtor ( only)"
1704Warn when a class appears to be polymorphic, thereby requiring a virtual
1705destructor, yet it declares a non-virtual one. This warning is also
1706enabled if \-Weffc++ is specified.
1707.IP "\fB\-Wreorder\fR (\*(C+ only)" 4
1708.IX Item "-Wreorder ( only)"
1709Warn when the order of member initializers given in the code does not
1710match the order in which they must be executed. For instance:
1711.Sp
1712.Vb 5
1713\& struct A {
1714\& int i;
1715\& int j;
1716\& A(): j (0), i (1) { }
1717\& };
1718.Ve
1719.Sp
1720The compiler will rearrange the member initializers for \fBi\fR
1721and \fBj\fR to match the declaration order of the members, emitting
1722a warning to that effect. This warning is enabled by \fB\-Wall\fR.
1723.PP
1724The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
1725.IP "\fB\-Weffc++\fR (\*(C+ only)" 4
1726.IX Item "-Weffc++ ( only)"
1727Warn about violations of the following style guidelines from Scott Meyers'
1728\&\fIEffective \*(C+\fR book:
1729.RS 4
1730.IP "*" 4
1731Item 11: Define a copy constructor and an assignment operator for classes
1732with dynamically allocated memory.
1733.IP "*" 4
1734Item 12: Prefer initialization to assignment in constructors.
1735.IP "*" 4
1736Item 14: Make destructors virtual in base classes.
1737.IP "*" 4
1738Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
1739.IP "*" 4
1740Item 23: Don't try to return a reference when you must return an object.
1741.RE
1742.RS 4
1743.Sp
1744Also warn about violations of the following style guidelines from
1745Scott Meyers' \fIMore Effective \*(C+\fR book:
1746.IP "*" 4
1747Item 6: Distinguish between prefix and postfix forms of increment and
1748decrement operators.
1749.IP "*" 4
1750Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
1751.RE
1752.RS 4
1753.Sp
1754When selecting this option, be aware that the standard library
1755headers do not obey all of these guidelines; use \fBgrep \-v\fR
1756to filter out those warnings.
1757.RE
1758.IP "\fB\-Wno\-deprecated\fR (\*(C+ only)" 4
1759.IX Item "-Wno-deprecated ( only)"
1760Do not warn about usage of deprecated features.
1761.IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ only)" 4
1762.IX Item "-Wstrict-null-sentinel ( only)"
1763Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel. When
1764compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
1765to \f(CW\*(C`_\|_null\*(C'\fR. Although it is a null pointer constant not a null pointer,
1766it is guaranteed to of the same size as a pointer. But this use is
1767not portable across different compilers.
1768.IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ only)" 4
1769.IX Item "-Wno-non-template-friend ( only)"
1770Disable warnings when non-templatized friend functions are declared
1771within a template. Since the advent of explicit template specification
1772support in G++, if the name of the friend is an unqualified-id (i.e.,
1773\&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
1774friend declare or define an ordinary, nontemplate function. (Section
177514.5.3). Before G++ implemented explicit specification, unqualified-ids
1776could be interpreted as a particular specialization of a templatized
1777function. Because this non-conforming behavior is no longer the default
1778behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
1779check existing code for potential trouble spots and is on by default.
1780This new compiler behavior can be turned off with
1781\&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
1782but disables the helpful warning.
1783.IP "\fB\-Wold\-style\-cast\fR (\*(C+ only)" 4
1784.IX Item "-Wold-style-cast ( only)"
1785Warn if an old-style (C\-style) cast to a non-void type is used within
1786a \*(C+ program. The new-style casts (\fBdynamic_cast\fR,
1787\&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
1788less vulnerable to unintended effects and much easier to search for.
1789.IP "\fB\-Woverloaded\-virtual\fR (\*(C+ only)" 4
1790.IX Item "-Woverloaded-virtual ( only)"
1791Warn when a function declaration hides virtual functions from a
1792base class. For example, in:
1793.Sp
1794.Vb 3
1795\& struct A {
1796\& virtual void f();
1797\& };
1798.Ve
1799.Sp
1800.Vb 3
1801\& struct B: public A {
1802\& void f(int);
1803\& };
1804.Ve
1805.Sp
1806the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
1807like:
1808.Sp
1809.Vb 2
1810\& B* b;
1811\& b->f();
1812.Ve
1813.Sp
1814will fail to compile.
1815.IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ only)" 4
1816.IX Item "-Wno-pmf-conversions ( only)"
1817Disable the diagnostic for converting a bound pointer to member function
1818to a plain pointer.
1819.IP "\fB\-Wsign\-promo\fR (\*(C+ only)" 4
1820.IX Item "-Wsign-promo ( only)"
1821Warn when overload resolution chooses a promotion from unsigned or
1822enumerated type to a signed type, over a conversion to an unsigned type of
1823the same size. Previous versions of G++ would try to preserve
1824unsignedness, but the standard mandates the current behavior.
1825.Sp
1826.Vb 4
1827\& struct A {
1828\& operator int ();
1829\& A& operator = (int);
1830\& };
1831.Ve
1832.Sp
1833.Vb 5
1834\& main ()
1835\& {
1836\& A a,b;
1837\& a = b;
1838\& }
1839.Ve
1840.Sp
1841In this example, G++ will synthesize a default \fBA& operator =
1842(const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
1843.Sh "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
1844.IX Subsection "Options Controlling Objective-C and Objective- Dialects"
1845(\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
1846languages themselves. See
1847.PP
1848This section describes the command-line options that are only meaningful
1849for Objective-C and Objective\-\*(C+ programs, but you can also use most of
1850the language-independent \s-1GNU\s0 compiler options.
1851For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
1852.PP
1853.Vb 1
1854\& gcc -g -fgnu-runtime -O -c some_class.m
1855.Ve
1856.PP
1857In this example, \fB\-fgnu\-runtime\fR is an option meant only for
1858Objective-C and Objective\-\*(C+ programs; you can use the other options with
1859any language supported by \s-1GCC\s0.
1860.PP
1861Note that since Objective-C is an extension of the C language, Objective-C
1862compilations may also use options specific to the C front-end (e.g.,
1863\&\fB\-Wtraditional\fR). Similarly, Objective\-\*(C+ compilations may use
1864\&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
1865.PP
1866Here is a list of options that are \fIonly\fR for compiling Objective-C
1867and Objective\-\*(C+ programs:
1868.IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
1869.IX Item "-fconstant-string-class=class-name"
1870Use \fIclass-name\fR as the name of the class to instantiate for each
1871literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default
1872class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
1873\&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The
1874\&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
1875\&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
1876to be laid out as constant CoreFoundation strings.
1877.IP "\fB\-fgnu\-runtime\fR" 4
1878.IX Item "-fgnu-runtime"
1879Generate object code compatible with the standard \s-1GNU\s0 Objective-C
1880runtime. This is the default for most types of systems.
1881.IP "\fB\-fnext\-runtime\fR" 4
1882.IX Item "-fnext-runtime"
1883Generate output compatible with the NeXT runtime. This is the default
1884for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro
1885\&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
1886used.
1887.IP "\fB\-fno\-nil\-receivers\fR" 4
1888.IX Item "-fno-nil-receivers"
1889Assume that all Objective-C message dispatches (e.g.,
1890\&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver
1891is not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the runtime
1892to be used. Currently, this option is only available in conjunction with
1893the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
1894.IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
1895.IX Item "-fobjc-call-cxx-cdtors"
1896For each Objective-C class, check if any of its instance variables is a
1897\&\*(C+ object with a non-trivial default constructor. If so, synthesize a
1898special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
1899non-trivial default constructors on any such instance variables, in order,
1900and then return \f(CW\*(C`self\*(C'\fR. Similarly, check if any instance variable
1901is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
1902special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
1903all such default destructors, in reverse order.
1904.Sp
1905The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and/or \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods
1906thusly generated will only operate on instance variables declared in the
1907current Objective-C class, and not those inherited from superclasses. It
1908is the responsibility of the Objective-C runtime to invoke all such methods
1909in an object's inheritance hierarchy. The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods
1910will be invoked by the runtime immediately after a new object
1911instance is allocated; the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will
1912be invoked immediately before the runtime deallocates an object instance.
1913.Sp
1914As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
1915support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
1916\&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
1917.IP "\fB\-fobjc\-direct\-dispatch\fR" 4
1918.IX Item "-fobjc-direct-dispatch"
1919Allow fast jumps to the message dispatcher. On Darwin this is
1920accomplished via the comm page.
1921.IP "\fB\-fobjc\-exceptions\fR" 4
1922.IX Item "-fobjc-exceptions"
1923Enable syntactic support for structured exception handling in Objective\-C,
1924similar to what is offered by \*(C+ and Java. This option is
1925unavailable in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.2 and
1926earlier.
1927.Sp
1928.Vb 23
1929\& @try {
1930\& ...
1931\& @throw expr;
1932\& ...
1933\& }
1934\& @catch (AnObjCClass *exc) {
1935\& ...
1936\& @throw expr;
1937\& ...
1938\& @throw;
1939\& ...
1940\& }
1941\& @catch (AnotherClass *exc) {
1942\& ...
1943\& }
1944\& @catch (id allOthers) {
1945\& ...
1946\& }
1947\& @finally {
1948\& ...
1949\& @throw expr;
1950\& ...
1951\& }
1952.Ve
1953.Sp
1954The \f(CW@throw\fR statement may appear anywhere in an Objective-C or
1955Objective\-\*(C+ program; when used inside of a \f(CW@catch\fR block, the
1956\&\f(CW@throw\fR may appear without an argument (as shown above), in which case
1957the object caught by the \f(CW@catch\fR will be rethrown.
1958.Sp
1959Note that only (pointers to) Objective-C objects may be thrown and
1960caught using this scheme. When an object is thrown, it will be caught
1961by the nearest \f(CW@catch\fR clause capable of handling objects of that type,
1962analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java. A
1963\&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch
1964any and all Objective-C exceptions not caught by previous \f(CW@catch\fR
1965clauses (if any).
1966.Sp
1967The \f(CW@finally\fR clause, if present, will be executed upon exit from the
1968immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section. This will happen
1969regardless of whether any exceptions are thrown, caught or rethrown
1970inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior
1971of the \f(CW\*(C`finally\*(C'\fR clause in Java.
1972.Sp
1973There are several caveats to using the new exception mechanism:
1974.RS 4
1975.IP "*" 4
1976Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style
1977idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new
1978exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later
1979systems, due to additional functionality needed in the (NeXT) Objective-C
1980runtime.
1981.IP "*" 4
1982As mentioned above, the new exceptions do not support handling
1983types other than Objective-C objects. Furthermore, when used from
1984Objective\-\*(C+, the Objective-C exception model does not interoperate with \*(C+
1985exceptions at this time. This means you cannot \f(CW@throw\fR an exception
1986from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa
1987(i.e., \f(CW\*(C`throw ... @catch\*(C'\fR).
1988.RE
1989.RS 4
1990.Sp
1991The \fB\-fobjc\-exceptions\fR switch also enables the use of synchronization
1992blocks for thread-safe execution:
1993.Sp
1994.Vb 3
1995\& @synchronized (ObjCClass *guard) {
1996\& ...
1997\& }
1998.Ve
1999.Sp
2000Upon entering the \f(CW@synchronized\fR block, a thread of execution shall
2001first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR
2002object by another thread. If it has, the current thread shall wait until
2003the other thread relinquishes its lock. Once \f(CW\*(C`guard\*(C'\fR becomes available,
2004the current thread will place its own lock on it, execute the code contained in
2005the \f(CW@synchronized\fR block, and finally relinquish the lock (thereby
2006making \f(CW\*(C`guard\*(C'\fR available to other threads).
2007.Sp
2008Unlike Java, Objective-C does not allow for entire methods to be marked
2009\&\f(CW@synchronized\fR. Note that throwing exceptions out of
2010\&\f(CW@synchronized\fR blocks is allowed, and will cause the guarding object
2011to be unlocked properly.
2012.RE
2013.IP "\fB\-fobjc\-gc\fR" 4
2014.IX Item "-fobjc-gc"
2015Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+ programs.
2016.IP "\fB\-freplace\-objc\-classes\fR" 4
2017.IX Item "-freplace-objc-classes"
2018Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
2019the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
2020run time instead. This is used in conjunction with the Fix-and-Continue
2021debugging mode, where the object file in question may be recompiled and
2022dynamically reloaded in the course of program execution, without the need
2023to restart the program itself. Currently, Fix-and-Continue functionality
2024is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
2025and later.
2026.IP "\fB\-fzero\-link\fR" 4
2027.IX Item "-fzero-link"
2028When compiling for the NeXT runtime, the compiler ordinarily replaces calls
2029to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
2030compile time) with static class references that get initialized at load time,
2031which improves run-time performance. Specifying the \fB\-fzero\-link\fR flag
2032suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
2033to be retained. This is useful in Zero-Link debugging mode, since it allows
2034for individual class implementations to be modified during program execution.
2035.IP "\fB\-gen\-decls\fR" 4
2036.IX Item "-gen-decls"
2037Dump interface declarations for all classes seen in the source file to a
2038file named \fI\fIsourcename\fI.decl\fR.
2039.IP "\fB\-Wassign\-intercept\fR" 4
2040.IX Item "-Wassign-intercept"
2041Warn whenever an Objective-C assignment is being intercepted by the
2042garbage collector.
2043.IP "\fB\-Wno\-protocol\fR" 4
2044.IX Item "-Wno-protocol"
2045If a class is declared to implement a protocol, a warning is issued for
2046every method in the protocol that is not implemented by the class. The
2047default behavior is to issue a warning for every method not explicitly
2048implemented in the class, even if a method implementation is inherited
2049from the superclass. If you use the \fB\-Wno\-protocol\fR option, then
2050methods inherited from the superclass are considered to be implemented,
2051and no warning is issued for them.
2052.IP "\fB\-Wselector\fR" 4
2053.IX Item "-Wselector"
2054Warn if multiple methods of different types for the same selector are
2055found during compilation. The check is performed on the list of methods
2056in the final stage of compilation. Additionally, a check is performed
2057for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
2058expression, and a corresponding method for that selector has been found
2059during compilation. Because these checks scan the method table only at
2060the end of compilation, these warnings are not produced if the final
2061stage of compilation is not reached, for example because an error is
2062found during compilation, or because the \fB\-fsyntax\-only\fR option is
2063being used.
2064.IP "\fB\-Wstrict\-selector\-match\fR" 4
2065.IX Item "-Wstrict-selector-match"
2066Warn if multiple methods with differing argument and/or return types are
2067found for a given selector when attempting to send a message using this
2068selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR. When this flag
2069is off (which is the default behavior), the compiler will omit such warnings
2070if any differences found are confined to types which share the same size
2071and alignment.
2072.IP "\fB\-Wundeclared\-selector\fR" 4
2073.IX Item "-Wundeclared-selector"
2074Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
2075undeclared selector is found. A selector is considered undeclared if no
2076method with that name has been declared before the
2077\&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
2078\&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
2079an \f(CW@implementation\fR section. This option always performs its
2080checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
2081while \fB\-Wselector\fR only performs its checks in the final stage of
2082compilation. This also enforces the coding style convention
2083that methods and selectors must be declared before being used.
2084.IP "\fB\-print\-objc\-runtime\-info\fR" 4
2085.IX Item "-print-objc-runtime-info"
2086Generate C header describing the largest structure that is passed by
2087value, if any.
2088.Sh "Options to Control Diagnostic Messages Formatting"
2089.IX Subsection "Options to Control Diagnostic Messages Formatting"
2090Traditionally, diagnostic messages have been formatted irrespective of
2091the output device's aspect (e.g. its width, ...). The options described
2092below can be used to control the diagnostic messages formatting
2093algorithm, e.g. how many characters per line, how often source location
2094information should be reported. Right now, only the \*(C+ front end can
2095honor these options. However it is expected, in the near future, that
2096the remaining front ends would be able to digest them correctly.
2097.IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
2098.IX Item "-fmessage-length=n"
2099Try to format error messages so that they fit on lines of about \fIn\fR
2100characters. The default is 72 characters for \fBg++\fR and 0 for the rest of
2101the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no
2102line-wrapping will be done; each error message will appear on a single
2103line.
2104.IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
2105.IX Item "-fdiagnostics-show-location=once"
2106Only meaningful in line-wrapping mode. Instructs the diagnostic messages
2107reporter to emit \fIonce\fR source location information; that is, in
2108case the message is too long to fit on a single physical line and has to
2109be wrapped, the source location won't be emitted (as prefix) again,
2110over and over, in subsequent continuation lines. This is the default
2111behavior.
2112.IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
2113.IX Item "-fdiagnostics-show-location=every-line"
2114Only meaningful in line-wrapping mode. Instructs the diagnostic
2115messages reporter to emit the same source location information (as
2116prefix) for physical lines that result from the process of breaking
2117a message which is too long to fit on a single line.
2118.IP "\fB\-fdiagnostics\-show\-option\fR" 4
2119.IX Item "-fdiagnostics-show-option"
2120This option instructs the diagnostic machinery to add text to each
2121diagnostic emitted, which indicates which command line option directly
2122controls that diagnostic, when such an option is known to the
2123diagnostic machinery.
2124.Sh "Options to Request or Suppress Warnings"
2125.IX Subsection "Options to Request or Suppress Warnings"
2126Warnings are diagnostic messages that report constructions which
2127are not inherently erroneous but which are risky or suggest there
2128may have been an error.
2129.PP
2130You can request many specific warnings with options beginning \fB\-W\fR,
2131for example \fB\-Wimplicit\fR to request warnings on implicit
2132declarations. Each of these specific warning options also has a
2133negative form beginning \fB\-Wno\-\fR to turn off warnings;
2134for example, \fB\-Wno\-implicit\fR. This manual lists only one of the
2135two forms, whichever is not the default.
2136.PP
2137The following options control the amount and kinds of warnings produced
2138by \s-1GCC\s0; for further, language-specific options also refer to
2139\&\fB\*(C+ Dialect Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect
2140Options\fR.
2141.IP "\fB\-fsyntax\-only\fR" 4
2142.IX Item "-fsyntax-only"
2143Check the code for syntax errors, but don't do anything beyond that.
2144.IP "\fB\-pedantic\fR" 4
2145.IX Item "-pedantic"
2146Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
2147reject all programs that use forbidden extensions, and some other
2148programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the
2149version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
2150.Sp
2151Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
2152this option (though a rare few will require \fB\-ansi\fR or a
2153\&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However,
2154without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
2155features are supported as well. With this option, they are rejected.
2156.Sp
2157\&\fB\-pedantic\fR does not cause warning messages for use of the
2158alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic
2159warnings are also disabled in the expression that follows
2160\&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use
2161these escape routes; application programs should avoid them.
2162.Sp
2163Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
2164C conformance. They soon find that it does not do quite what they want:
2165it finds some non-ISO practices, but not all\-\-\-only those for which
2166\&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
2167diagnostics have been added.
2168.Sp
2169A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
2170some instances, but would require considerable additional work and would
2171be quite different from \fB\-pedantic\fR. We don't have plans to
2172support such a feature in the near future.
2173.Sp
2174Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
2175extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a
2176corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
2177extended dialect is based. Warnings from \fB\-pedantic\fR are given
2178where they are required by the base standard. (It would not make sense
2179for such warnings to be given only for features not in the specified \s-1GNU\s0
2180C dialect, since by definition the \s-1GNU\s0 dialects of C include all
2181features the compiler supports with the given option, and there would be
2182nothing to warn about.)
2183.IP "\fB\-pedantic\-errors\fR" 4
2184.IX Item "-pedantic-errors"
2185Like \fB\-pedantic\fR, except that errors are produced rather than
2186warnings.
2187.IP "\fB\-w\fR" 4
2188.IX Item "-w"
2189Inhibit all warning messages.
2190.IP "\fB\-Wno\-import\fR" 4
2191.IX Item "-Wno-import"
2192Inhibit warning messages about the use of \fB#import\fR.
2193.IP "\fB\-Wchar\-subscripts\fR" 4
2194.IX Item "-Wchar-subscripts"
2195Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause
2196of error, as programmers often forget that this type is signed on some
2197machines.
2198This warning is enabled by \fB\-Wall\fR.
2199.IP "\fB\-Wcomment\fR" 4
2200.IX Item "-Wcomment"
2201Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
2202comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
2203This warning is enabled by \fB\-Wall\fR.
2204.IP "\fB\-Wfatal\-errors\fR" 4
2205.IX Item "-Wfatal-errors"
2206This option causes the compiler to abort compilation on the first error
2207occurred rather than trying to keep going and printing further error
2208messages.
2209.IP "\fB\-Wformat\fR" 4
2210.IX Item "-Wformat"
2211Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
2212the arguments supplied have types appropriate to the format string
2213specified, and that the conversions specified in the format string make
2214sense. This includes standard functions, and others specified by format
2215attributes, in the \f(CW\*(C`printf\*(C'\fR,
2216\&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
2217not in the C standard) families (or other target-specific families).
2218Which functions are checked without format attributes having been
2219specified depends on the standard version selected, and such checks of
2220functions without the attribute specified are disabled by
2221\&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
2222.Sp
2223The formats are checked against the format features supported by \s-1GNU\s0
2224libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well
2225as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
2226extensions. Other library implementations may not support all these
2227features; \s-1GCC\s0 does not support warning about features that go beyond a
2228particular library's limitations. However, if \fB\-pedantic\fR is used
2229with \fB\-Wformat\fR, warnings will be given about format features not
2230in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
2231since those are not in any version of the C standard).
2232.Sp
2233Since \fB\-Wformat\fR also checks for null format arguments for
2234several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
2235.Sp
2236\&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some
2237aspects of format checking, the options \fB\-Wformat\-y2k\fR,
2238\&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
2239\&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
2240\&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
2241.IP "\fB\-Wformat\-y2k\fR" 4
2242.IX Item "-Wformat-y2k"
2243If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
2244formats which may yield only a two-digit year.
2245.IP "\fB\-Wno\-format\-extra\-args\fR" 4
2246.IX Item "-Wno-format-extra-args"
2247If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
2248\&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies
2249that such arguments are ignored.
2250.Sp
2251Where the unused arguments lie between used arguments that are
2252specified with \fB$\fR operand number specifications, normally
2253warnings are still given, since the implementation could not know what
2254type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However,
2255in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
2256warning if the unused arguments are all pointers, since the Single
2257Unix Specification says that such unused arguments are allowed.
2258.IP "\fB\-Wno\-format\-zero\-length\fR" 4
2259.IX Item "-Wno-format-zero-length"
2260If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
2261The C standard specifies that zero-length formats are allowed.
2262.IP "\fB\-Wformat\-nonliteral\fR" 4
2263.IX Item "-Wformat-nonliteral"
2264If \fB\-Wformat\fR is specified, also warn if the format string is not a
2265string literal and so cannot be checked, unless the format function
2266takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
2267.IP "\fB\-Wformat\-security\fR" 4
2268.IX Item "-Wformat-security"
2269If \fB\-Wformat\fR is specified, also warn about uses of format
2270functions that represent possible security problems. At present, this
2271warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
2272format string is not a string literal and there are no format arguments,
2273as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format
2274string came from untrusted input and contains \fB%n\fR. (This is
2275currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
2276in future warnings may be added to \fB\-Wformat\-security\fR that are not
2277included in \fB\-Wformat\-nonliteral\fR.)
2278.IP "\fB\-Wformat=2\fR" 4
2279.IX Item "-Wformat=2"
2280Enable \fB\-Wformat\fR plus format checks not included in
2281\&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat
2282\&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
2283.IP "\fB\-Wnonnull\fR" 4
2284.IX Item "-Wnonnull"
2285Warn about passing a null pointer for arguments marked as
2286requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
2287.Sp
2288\&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It
2289can be disabled with the \fB\-Wno\-nonnull\fR option.
2290.IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
2291.IX Item "-Winit-self (C, , Objective-C and Objective- only)"
2292Warn about uninitialized variables which are initialized with themselves.
2293Note this option can only be used with the \fB\-Wuninitialized\fR option,
2294which in turn only works with \fB\-O1\fR and above.
2295.Sp
2296For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
2297following snippet only when \fB\-Winit\-self\fR has been specified:
2298.Sp
2299.Vb 5
2300\& int f()
2301\& {
2302\& int i = i;
2303\& return i;
2304\& }
2305.Ve
2306.IP "\fB\-Wimplicit\-int\fR" 4
2307.IX Item "-Wimplicit-int"
2308Warn when a declaration does not specify a type.
2309This warning is enabled by \fB\-Wall\fR.
2310.IP "\fB\-Wimplicit\-function\-declaration\fR" 4
2311.IX Item "-Wimplicit-function-declaration"
2312.PD 0
2313.IP "\fB\-Werror\-implicit\-function\-declaration\fR" 4
2314.IX Item "-Werror-implicit-function-declaration"
2315.PD
2316Give a warning (or error) whenever a function is used before being
2317declared. The form \fB\-Wno\-error\-implicit\-function\-declaration\fR
2318is not supported.
2319This warning is enabled by \fB\-Wall\fR (as a warning, not an error).
2320.IP "\fB\-Wimplicit\fR" 4
2321.IX Item "-Wimplicit"
2322Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
2323This warning is enabled by \fB\-Wall\fR.
2324.IP "\fB\-Wmain\fR" 4
2325.IX Item "-Wmain"
2326Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be a
2327function with external linkage, returning int, taking either zero
2328arguments, two, or three arguments of appropriate types.
2329This warning is enabled by \fB\-Wall\fR.
2330.IP "\fB\-Wmissing\-braces\fR" 4
2331.IX Item "-Wmissing-braces"
2332Warn if an aggregate or union initializer is not fully bracketed. In
2333the following example, the initializer for \fBa\fR is not fully
2334bracketed, but that for \fBb\fR is fully bracketed.
2335.Sp
2336.Vb 2
2337\& int a[2][2] = { 0, 1, 2, 3 };
2338\& int b[2][2] = { { 0, 1 }, { 2, 3 } };
2339.Ve
2340.Sp
2341This warning is enabled by \fB\-Wall\fR.
2342.IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
2343.IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
2344Warn if a user-supplied include directory does not exist.
2345.IP "\fB\-Wparentheses\fR" 4
2346.IX Item "-Wparentheses"
2347Warn if parentheses are omitted in certain contexts, such
2348as when there is an assignment in a context where a truth value
2349is expected, or when operators are nested whose precedence people
2350often get confused about. Only the warning for an assignment used as
2351a truth value is supported when compiling \*(C+; the other warnings are
2352only supported when compiling C.
2353.Sp
2354Also warn if a comparison like \fBx<=y<=z\fR appears; this is
2355equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
2356interpretation from that of ordinary mathematical notation.
2357.Sp
2358Also warn about constructions where there may be confusion to which
2359\&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of
2360such a case:
2361.Sp
2362.Vb 7
2363\& {
2364\& if (a)
2365\& if (b)
2366\& foo ();
2367\& else
2368\& bar ();
2369\& }
2370.Ve
2371.Sp
2372In C, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible \f(CW\*(C`if\*(C'\fR
2373statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is often not
2374what the programmer expected, as illustrated in the above example by
2375indentation the programmer chose. When there is the potential for this
2376confusion, \s-1GCC\s0 will issue a warning when this flag is specified.
2377To eliminate the warning, add explicit braces around the innermost
2378\&\f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR could belong to
2379the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would look like this:
2380.Sp
2381.Vb 9
2382\& {
2383\& if (a)
2384\& {
2385\& if (b)
2386\& foo ();
2387\& else
2388\& bar ();
2389\& }
2390\& }
2391.Ve
2392.Sp
2393This warning is enabled by \fB\-Wall\fR.
2394.IP "\fB\-Wsequence\-point\fR" 4
2395.IX Item "-Wsequence-point"
2396Warn about code that may have undefined semantics because of violations
2397of sequence point rules in the C and \*(C+ standards.
2398.Sp
2399The C and \*(C+ standards defines the order in which expressions in a C/\*(C+
2400program are evaluated in terms of \fIsequence points\fR, which represent
2401a partial ordering between the execution of parts of the program: those
2402executed before the sequence point, and those executed after it. These
2403occur after the evaluation of a full expression (one which is not part
2404of a larger expression), after the evaluation of the first operand of a
2405\&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
2406function is called (but after the evaluation of its arguments and the
2407expression denoting the called function), and in certain other places.
2408Other than as expressed by the sequence point rules, the order of
2409evaluation of subexpressions of an expression is not specified. All
2410these rules describe only a partial order rather than a total order,
2411since, for example, if two functions are called within one expression
2412with no sequence point between them, the order in which the functions
2413are called is not specified. However, the standards committee have
2414ruled that function calls do not overlap.
2415.Sp
2416It is not specified when between sequence points modifications to the
2417values of objects take effect. Programs whose behavior depends on this
2418have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
2419the previous and next sequence point an object shall have its stored
2420value modified at most once by the evaluation of an expression.
2421Furthermore, the prior value shall be read only to determine the value
2422to be stored.\*(R". If a program breaks these rules, the results on any
2423particular implementation are entirely unpredictable.
2424.Sp
2425Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
2426= b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not
2427diagnosed by this option, and it may give an occasional false positive
2428result, but in general it has been found fairly effective at detecting
2429this sort of problem in programs.
2430.Sp
2431The standard is worded confusingly, therefore there is some debate
2432over the precise meaning of the sequence point rules in subtle cases.
2433Links to discussions of the problem, including proposed formal
2434definitions, may be found on the \s-1GCC\s0 readings page, at
2435<\fBhttp://gcc.gnu.org/readings.html\fR>.
2436.Sp
2437This warning is enabled by \fB\-Wall\fR for C and \*(C+.
2438.IP "\fB\-Wreturn\-type\fR" 4
2439.IX Item "-Wreturn-type"
2440Warn whenever a function is defined with a return-type that defaults to
2441\&\f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
2442return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR.
2443.Sp
2444For C, also warn if the return type of a function has a type qualifier
2445such as \f(CW\*(C`const\*(C'\fR. Such a type qualifier has no effect, since the
2446value returned by a function is not an lvalue. \s-1ISO\s0 C prohibits
2447qualified \f(CW\*(C`void\*(C'\fR return types on function definitions, so such
2448return types always receive a warning even without this option.
2449.Sp
2450For \*(C+, a function without return type always produces a diagnostic
2451message, even when \fB\-Wno\-return\-type\fR is specified. The only
2452exceptions are \fBmain\fR and functions defined in system headers.
2453.Sp
2454This warning is enabled by \fB\-Wall\fR.
2455.IP "\fB\-Wswitch\fR" 4
2456.IX Item "-Wswitch"
2457Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
2458and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
2459enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
2460warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
2461provoke warnings when this option is used.
2462This warning is enabled by \fB\-Wall\fR.
2463.IP "\fB\-Wswitch\-default\fR" 4
2464.IX Item "-Wswitch-default"
2465Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
2466case.
2467.IP "\fB\-Wswitch\-enum\fR" 4
2468.IX Item "-Wswitch-enum"
2469Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
2470and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
2471enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
2472provoke warnings when this option is used.
2473.IP "\fB\-Wtrigraphs\fR" 4
2474.IX Item "-Wtrigraphs"
2475Warn if any trigraphs are encountered that might change the meaning of
2476the program (trigraphs within comments are not warned about).
2477This warning is enabled by \fB\-Wall\fR.
2478.IP "\fB\-Wunused\-function\fR" 4
2479.IX Item "-Wunused-function"
2480Warn whenever a static function is declared but not defined or a
2481non-inline static function is unused.
2482This warning is enabled by \fB\-Wall\fR.
2483.IP "\fB\-Wunused\-label\fR" 4
2484.IX Item "-Wunused-label"
2485Warn whenever a label is declared but not used.
2486This warning is enabled by \fB\-Wall\fR.
2487.Sp
2488To suppress this warning use the \fBunused\fR attribute.
2489.IP "\fB\-Wunused\-parameter\fR" 4
2490.IX Item "-Wunused-parameter"
2491Warn whenever a function parameter is unused aside from its declaration.
2492.Sp
2493To suppress this warning use the \fBunused\fR attribute.
2494.IP "\fB\-Wunused\-variable\fR" 4
2495.IX Item "-Wunused-variable"
2496Warn whenever a local variable or non-constant static variable is unused
2497aside from its declaration.
2498This warning is enabled by \fB\-Wall\fR.
2499.Sp
2500To suppress this warning use the \fBunused\fR attribute.
2501.IP "\fB\-Wunused\-value\fR" 4
2502.IX Item "-Wunused-value"
2503Warn whenever a statement computes a result that is explicitly not used.
2504This warning is enabled by \fB\-Wall\fR.
2505.Sp
2506To suppress this warning cast the expression to \fBvoid\fR.
2507.IP "\fB\-Wunused\fR" 4
2508.IX Item "-Wunused"
2509All the above \fB\-Wunused\fR options combined.
2510.Sp
2511In order to get a warning about an unused function parameter, you must
2512either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
2513\&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
2514.IP "\fB\-Wuninitialized\fR" 4
2515.IX Item "-Wuninitialized"
2516Warn if an automatic variable is used without first being initialized or
2517if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call.
2518.Sp
2519These warnings are possible only in optimizing compilation,
2520because they require data flow information that is computed only
2521when optimizing. If you do not specify \fB\-O\fR, you will not get
2522these warnings. Instead, \s-1GCC\s0 will issue a warning about \fB\-Wuninitialized\fR
2523requiring \fB\-O\fR.
2524.Sp
2525If you want to warn about code which uses the uninitialized value of the
2526variable in its own initializer, use the \fB\-Winit\-self\fR option.
2527.Sp
2528These warnings occur for individual uninitialized or clobbered
2529elements of structure, union or array variables as well as for
2530variables which are uninitialized or clobbered as a whole. They do
2531not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR. Because
2532these warnings depend on optimization, the exact variables or elements
2533for which there are warnings will depend on the precise optimization
2534options and version of \s-1GCC\s0 used.
2535.Sp
2536Note that there may be no warning about a variable that is used only
2537to compute a value that itself is never used, because such
2538computations may be deleted by data flow analysis before the warnings
2539are printed.
2540.Sp
2541These warnings are made optional because \s-1GCC\s0 is not smart
2542enough to see all the reasons why the code might be correct
2543despite appearing to have an error. Here is one example of how
2544this can happen:
2545.Sp
2546.Vb 12
2547\& {
2548\& int x;
2549\& switch (y)
2550\& {
2551\& case 1: x = 1;
2552\& break;
2553\& case 2: x = 4;
2554\& break;
2555\& case 3: x = 5;
2556\& }
2557\& foo (x);
2558\& }
2559.Ve
2560.Sp
2561If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
2562always initialized, but \s-1GCC\s0 doesn't know this. Here is
2563another common case:
2564.Sp
2565.Vb 6
2566\& {
2567\& int save_y;
2568\& if (change_y) save_y = y, y = new_y;
2569\& ...
2570\& if (change_y) y = save_y;
2571\& }
2572.Ve
2573.Sp
2574This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set.
2575.Sp
2576This option also warns when a non-volatile automatic variable might be
2577changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible
2578only in optimizing compilation.
2579.Sp
2580The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know
2581where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
2582call it at any point in the code. As a result, you may get a warning
2583even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
2584in fact be called at the place which would cause a problem.
2585.Sp
2586Some spurious warnings can be avoided if you declare all the functions
2587you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
2588.Sp
2589This warning is enabled by \fB\-Wall\fR.
2590.IP "\fB\-Wunknown\-pragmas\fR" 4
2591.IX Item "-Wunknown-pragmas"
2592Warn when a #pragma directive is encountered which is not understood by
2593\&\s-1GCC\s0. If this command line option is used, warnings will even be issued
2594for unknown pragmas in system header files. This is not the case if
2595the warnings were only enabled by the \fB\-Wall\fR command line option.
2596.IP "\fB\-Wno\-pragmas\fR" 4
2597.IX Item "-Wno-pragmas"
2598Do not warn about misuses of pragmas, such as incorrect parameters,
2599invalid syntax, or conflicts between pragmas. See also
2600\&\fB\-Wunknown\-pragmas\fR.
2601.IP "\fB\-Wstrict\-aliasing\fR" 4
2602.IX Item "-Wstrict-aliasing"
2603This option is only active when \fB\-fstrict\-aliasing\fR is active.
2604It warns about code which might break the strict aliasing rules that the
2605compiler is using for optimization. The warning does not catch all
2606cases, but does attempt to catch the more common pitfalls. It is
2607included in \fB\-Wall\fR.
2608.IP "\fB\-Wstrict\-aliasing=2\fR" 4
2609.IX Item "-Wstrict-aliasing=2"
2610This option is only active when \fB\-fstrict\-aliasing\fR is active.
2611It warns about code which might break the strict aliasing rules that the
2612compiler is using for optimization. This warning catches more cases than
2613\&\fB\-Wstrict\-aliasing\fR, but it will also give a warning for some ambiguous
2614cases that are safe.
2615.IP "\fB\-Wstrict\-overflow\fR" 4
2616.IX Item "-Wstrict-overflow"
2617.PD 0
2618.IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
2619.IX Item "-Wstrict-overflow=n"
2620.PD
2621This option is only active when \fB\-fstrict\-overflow\fR is active.
2622It warns about cases where the compiler optimizes based on the
2623assumption that signed overflow does not occur. Note that it does not
2624warn about all cases where the code might overflow: it only warns
2625about cases where the compiler implements some optimization. Thus
2626this warning depends on the optimization level.
2627.Sp
2628An optimization which assumes that signed overflow does not occur is
2629perfectly safe if the values of the variables involved are such that
2630overflow never does, in fact, occur. Therefore this warning can
2631easily give a false positive: a warning about code which is not
2632actually a problem. To help focus on important issues, several
2633warning levels are defined. No warnings are issued for the use of
2634undefined signed overflow when estimating how many iterations a loop
2635will require, in particular when determining whether a loop will be
2636executed at all.
2637.RS 4
2638.IP "@option<\-Wstrict\-overflow=1>" 4
2639.IX Item "@option<-Wstrict-overflow=1>"
2640Warn about cases which are both questionable and easy to avoid. For
2641example: \f(CW\*(C`x + 1 > x\*(C'\fR; with \fB\-fstrict\-overflow\fR, the
2642compiler will simplify this to \f(CW1\fR. This level of
2643\&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
2644are not, and must be explicitly requested.
2645.IP "@option<\-Wstrict\-overflow=2>" 4
2646.IX Item "@option<-Wstrict-overflow=2>"
2647Also warn about other cases where a comparison is simplified to a
2648constant. For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR. This can only be
2649simplified when \fB\-fstrict\-overflow\fR is in effect, because
2650\&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
2651zero. \fB\-Wstrict\-overflow\fR (with no level) is the same as
2652\&\fB\-Wstrict\-overflow=2\fR.
2653.IP "@option<\-Wstrict\-overflow=3>" 4
2654.IX Item "@option<-Wstrict-overflow=3>"
2655Also warn about other cases where a comparison is simplified. For
2656example: \f(CW\*(C`x + 1 > 1\*(C'\fR will be simplified to \f(CW\*(C`x > 0\*(C'\fR.
2657.IP "@option<\-Wstrict\-overflow=4>" 4
2658.IX Item "@option<-Wstrict-overflow=4>"
2659Also warn about other simplifications not covered by the above cases.
2660For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR will be simplified to \f(CW\*(C`x * 2\*(C'\fR.
2661.IP "@option<\-Wstrict\-overflow=5>" 4
2662.IX Item "@option<-Wstrict-overflow=5>"
2663Also warn about cases where the compiler reduces the magnitude of a
2664constant involved in a comparison. For example: \f(CW\*(C`x + 2 > y\*(C'\fR will
2665be simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR. This is reported only at the
2666highest warning level because this simplification applies to many
2667comparisons, so this warning level will give a very large number of
2668false positives.
2669.RE
2670.RS 4
2671.RE
2672.IP "\fB\-Wall\fR" 4
2673.IX Item "-Wall"
2674All of the above \fB\-W\fR options combined. This enables all the
2675warnings about constructions that some users consider questionable, and
2676that are easy to avoid (or modify to prevent the warning), even in
2677conjunction with macros. This also enables some language-specific
2678warnings described in \fB\*(C+ Dialect Options\fR and
2679\&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
2680.PP
2681The following \fB\-W...\fR options are not implied by \fB\-Wall\fR.
2682Some of them warn about constructions that users generally do not
2683consider questionable, but which occasionally you might wish to check
2684for; others warn about constructions that are necessary or hard to avoid
2685in some cases, and there is no simple way to modify the code to suppress
2686the warning.
2687.IP "\fB\-Wextra\fR" 4
2688.IX Item "-Wextra"
2689(This option used to be called \fB\-W\fR. The older name is still
2690supported, but the newer name is more descriptive.) Print extra warning
2691messages for these events:
2692.RS 4
2693.IP "*" 4
2694A function can return either with or without a value. (Falling
2695off the end of the function body is considered returning without
2696a value.) For example, this function would evoke such a
2697warning:
2698.Sp
2699.Vb 5
2700\& foo (a)
2701\& {
2702\& if (a > 0)
2703\& return a;
2704\& }
2705.Ve
2706.IP "*" 4
2707An expression-statement or the left-hand side of a comma expression
2708contains no side effects.
2709To suppress the warning, cast the unused expression to void.
2710For example, an expression such as \fBx[i,j]\fR will cause a warning,
2711but \fBx[(void)i,j]\fR will not.
2712.IP "*" 4
2713An unsigned value is compared against zero with \fB<\fR or \fB>=\fR.
2714.IP "*" 4
2715Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in
2716a declaration. According to the C Standard, this usage is obsolescent.
2717.IP "*" 4
2718If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused
2719arguments.
2720.IP "*" 4
2721A comparison between signed and unsigned values could produce an
2722incorrect result when the signed value is converted to unsigned.
2723(But don't warn if \fB\-Wno\-sign\-compare\fR is also specified.)
2724.IP "*" 4
2725An aggregate has an initializer which does not initialize all members.
2726This warning can be independently controlled by
2727\&\fB\-Wmissing\-field\-initializers\fR.
2728.IP "*" 4
2729An initialized field without side effects is overridden when using
2730designated initializers. This warning can be independently controlled by
2731\&\fB\-Woverride\-init\fR.
2732.IP "*" 4
2733A function parameter is declared without a type specifier in K&R\-style
2734functions:
2735.Sp
2736.Vb 1
2737\& void foo(bar) { }
2738.Ve
2739.IP "*" 4
2740An empty body occurs in an \fBif\fR or \fBelse\fR statement.
2741.IP "*" 4
2742A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
2743\&\fB>\fR, or \fB>=\fR.
2744.IP "*" 4
2745A variable might be changed by \fBlongjmp\fR or \fBvfork\fR.
2746.IP "*<(\*(C+ only)>" 4
2747.IX Item "*<( only)>"
2748An enumerator and a non-enumerator both appear in a conditional expression.
2749.IP "*<(\*(C+ only)>" 4
2750.IX Item "*<( only)>"
2751A non-static reference or non-static \fBconst\fR member appears in a
2752class without constructors.
2753.IP "*<(\*(C+ only)>" 4
2754.IX Item "*<( only)>"
2755Ambiguous virtual bases.
2756.IP "*<(\*(C+ only)>" 4
2757.IX Item "*<( only)>"
2758Subscripting an array which has been declared \fBregister\fR.
2759.IP "*<(\*(C+ only)>" 4
2760.IX Item "*<( only)>"
2761Taking the address of a variable which has been declared \fBregister\fR.
2762.IP "*<(\*(C+ only)>" 4
2763.IX Item "*<( only)>"
2764A base class is not initialized in a derived class' copy constructor.
2765.RE
2766.RS 4
2767.RE
2768.IP "\fB\-Wno\-div\-by\-zero\fR" 4
2769.IX Item "-Wno-div-by-zero"
2770Do not warn about compile-time integer division by zero. Floating point
2771division by zero is not warned about, as it can be a legitimate way of
2772obtaining infinities and NaNs.
2773.IP "\fB\-Wsystem\-headers\fR" 4
2774.IX Item "-Wsystem-headers"
2775Print warning messages for constructs found in system header files.
2776Warnings from system headers are normally suppressed, on the assumption
2777that they usually do not indicate real problems and would only make the
2778compiler output harder to read. Using this command line option tells
2779\&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
2780code. However, note that using \fB\-Wall\fR in conjunction with this
2781option will \fInot\fR warn about unknown pragmas in system
2782headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
2783.IP "\fB\-Wfloat\-equal\fR" 4
2784.IX Item "-Wfloat-equal"
2785Warn if floating point values are used in equality comparisons.
2786.Sp
2787The idea behind this is that sometimes it is convenient (for the
2788programmer) to consider floating-point values as approximations to
2789infinitely precise real numbers. If you are doing this, then you need
2790to compute (by analyzing the code, or in some other way) the maximum or
2791likely maximum error that the computation introduces, and allow for it
2792when performing comparisons (and when producing output, but that's a
2793different problem). In particular, instead of testing for equality, you
2794would check to see whether the two values have ranges that overlap; and
2795this is done with the relational operators, so equality comparisons are
2796probably mistaken.
2797.IP "\fB\-Wtraditional\fR (C only)" 4
2798.IX Item "-Wtraditional (C only)"
2799Warn about certain constructs that behave differently in traditional and
2800\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
2801equivalent, and/or problematic constructs which should be avoided.
2802.RS 4
2803.IP "*" 4
2804Macro parameters that appear within string literals in the macro body.
2805In traditional C macro replacement takes place within string literals,
2806but does not in \s-1ISO\s0 C.
2807.IP "*" 4
2808In traditional C, some preprocessor directives did not exist.
2809Traditional preprocessors would only consider a line to be a directive
2810if the \fB#\fR appeared in column 1 on the line. Therefore
2811\&\fB\-Wtraditional\fR warns about directives that traditional C
2812understands but would ignore because the \fB#\fR does not appear as the
2813first character on the line. It also suggests you hide directives like
2814\&\fB#pragma\fR not understood by traditional C by indenting them. Some
2815traditional implementations would not recognize \fB#elif\fR, so it
2816suggests avoiding it altogether.
2817.IP "*" 4
2818A function-like macro that appears without arguments.
2819.IP "*" 4
2820The unary plus operator.
2821.IP "*" 4
2822The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
2823constant suffixes. (Traditional C does support the \fBL\fR suffix on integer
2824constants.) Note, these suffixes appear in macros defined in the system
2825headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
2826Use of these macros in user code might normally lead to spurious
2827warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
2828avoid warning in these cases.
2829.IP "*" 4
2830A function declared external in one block and then used after the end of
2831the block.
2832.IP "*" 4
2833A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
2834.IP "*" 4
2835A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
2836This construct is not accepted by some traditional C compilers.
2837.IP "*" 4
2838The \s-1ISO\s0 type of an integer constant has a different width or
2839signedness from its traditional type. This warning is only issued if
2840the base of the constant is ten. I.e. hexadecimal or octal values, which
2841typically represent bit patterns, are not warned about.
2842.IP "*" 4
2843Usage of \s-1ISO\s0 string concatenation is detected.
2844.IP "*" 4
2845Initialization of automatic aggregates.
2846.IP "*" 4
2847Identifier conflicts with labels. Traditional C lacks a separate
2848namespace for labels.
2849.IP "*" 4
2850Initialization of unions. If the initializer is zero, the warning is
2851omitted. This is done under the assumption that the zero initializer in
2852user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
2853initializer warnings and relies on default initialization to zero in the
2854traditional C case.
2855.IP "*" 4
2856Conversions by prototypes between fixed/floating point values and vice
2857versa. The absence of these prototypes when compiling with traditional
2858C would cause serious problems. This is a subset of the possible
2859conversion warnings, for the full set use \fB\-Wconversion\fR.
2860.IP "*" 4
2861Use of \s-1ISO\s0 C style function definitions. This warning intentionally is
2862\&\fInot\fR issued for prototype declarations or variadic functions
2863because these \s-1ISO\s0 C features will appear in your code when using
2864libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
2865\&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions
2866because that feature is already a \s-1GCC\s0 extension and thus not relevant to
2867traditional C compatibility.
2868.RE
2869.RS 4
2870.RE
2871.IP "\fB\-Wdeclaration\-after\-statement\fR (C only)" 4
2872.IX Item "-Wdeclaration-after-statement (C only)"
2873Warn when a declaration is found after a statement in a block. This
2874construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
2875allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by
2876\&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
2877.IP "\fB\-Wundef\fR" 4
2878.IX Item "-Wundef"
2879Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
2880.IP "\fB\-Wno\-endif\-labels\fR" 4
2881.IX Item "-Wno-endif-labels"
2882Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
2883.IP "\fB\-Wshadow\fR" 4
2884.IX Item "-Wshadow"
2885Warn whenever a local variable shadows another local variable, parameter or
2886global variable or whenever a built-in function is shadowed.
2887.IP "\fB\-Wlarger\-than\-\fR\fIlen\fR" 4
2888.IX Item "-Wlarger-than-len"
2889Warn whenever an object of larger than \fIlen\fR bytes is defined.
2890.IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
2891.IX Item "-Wunsafe-loop-optimizations"
2892Warn if the loop cannot be optimized because the compiler could not
2893assume anything on the bounds of the loop indices. With
2894\&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
2895such assumptions.
2896.IP "\fB\-Wpointer\-arith\fR" 4
2897.IX Item "-Wpointer-arith"
2898Warn about anything that depends on the \*(L"size of\*(R" a function type or
2899of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for
2900convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
2901to functions.
2902.IP "\fB\-Wbad\-function\-cast\fR (C only)" 4
2903.IX Item "-Wbad-function-cast (C only)"
2904Warn whenever a function call is cast to a non-matching type.
2905For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
2906.IP "\fB\-Wc++\-compat\fR" 4
2907.IX Item "-Wc++-compat"
2908Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
2909\&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
2910\&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
2911.IP "\fB\-Wcast\-qual\fR" 4
2912.IX Item "-Wcast-qual"
2913Warn whenever a pointer is cast so as to remove a type qualifier from
2914the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
2915to an ordinary \f(CW\*(C`char *\*(C'\fR.
2916.IP "\fB\-Wcast\-align\fR" 4
2917.IX Item "-Wcast-align"
2918Warn whenever a pointer is cast such that the required alignment of the
2919target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
2920an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
2921two\- or four-byte boundaries.
2922.IP "\fB\-Wwrite\-strings\fR" 4
2923.IX Item "-Wwrite-strings"
2924When compiling C, give string constants the type \f(CW\*(C`const
2925char[\f(CIlength\f(CW]\*(C'\fR so that
2926copying the address of one into a non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR
2927pointer will get a warning; when compiling \*(C+, warn about the
2928deprecated conversion from string literals to \f(CW\*(C`char *\*(C'\fR. This
2929warning, by default, is enabled for \*(C+ programs.
2930These warnings will help you find at
2931compile time code that can try to write into a string constant, but
2932only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in
2933declarations and prototypes. Otherwise, it will just be a nuisance;
2934this is why we did not make \fB\-Wall\fR request these warnings.
2935.IP "\fB\-Wconversion\fR" 4
2936.IX Item "-Wconversion"
2937Warn if a prototype causes a type conversion that is different from what
2938would happen to the same argument in the absence of a prototype. This
2939includes conversions of fixed point to floating and vice versa, and
2940conversions changing the width or signedness of a fixed point argument
2941except when the same as the default promotion.
2942.Sp
2943Also, warn if a negative integer constant expression is implicitly
2944converted to an unsigned type. For example, warn about the assignment
2945\&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned. But do not warn about explicit
2946casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR.
2947.IP "\fB\-Wsign\-compare\fR" 4
2948.IX Item "-Wsign-compare"
2949Warn when a comparison between signed and unsigned values could produce
2950an incorrect result when the signed value is converted to unsigned.
2951This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
2952of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
2953.IP "\fB\-Waddress\fR" 4
2954.IX Item "-Waddress"
2955Warn about suspicious uses of memory addresses. These include using
2956the address of a function in a conditional expression, such as
2957\&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
2958address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR. Such
2959uses typically indicate a programmer error: the address of a function
2960always evaluates to true, so their use in a conditional usually
2961indicate that the programmer forgot the parentheses in a function
2962call; and comparisons against string literals result in unspecified
2963behavior and are not portable in C, so they usually indicate that the
2964programmer intended to use \f(CW\*(C`strcmp\*(C'\fR. This warning is enabled by
2965\&\fB\-Wall\fR.
2966.IP "\fB\-Waggregate\-return\fR" 4
2967.IX Item "-Waggregate-return"
2968Warn if any functions that return structures or unions are defined or
2969called. (In languages where you can return an array, this also elicits
2970a warning.)
2971.IP "\fB\-Wno\-attributes\fR" 4
2972.IX Item "-Wno-attributes"
2973Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
2974unrecognized attributes, function attributes applied to variables,
2975etc. This will not stop errors for incorrect use of supported
2976attributes.
2977.IP "\fB\-Wstrict\-prototypes\fR (C only)" 4
2978.IX Item "-Wstrict-prototypes (C only)"
2979Warn if a function is declared or defined without specifying the
2980argument types. (An old-style function definition is permitted without
2981a warning if preceded by a declaration which specifies the argument
2982types.)
2983.IP "\fB\-Wold\-style\-definition\fR (C only)" 4
2984.IX Item "-Wold-style-definition (C only)"
2985Warn if an old-style function definition is used. A warning is given
2986even if there is a previous prototype.
2987.IP "\fB\-Wmissing\-prototypes\fR (C only)" 4
2988.IX Item "-Wmissing-prototypes (C only)"
2989Warn if a global function is defined without a previous prototype
2990declaration. This warning is issued even if the definition itself
2991provides a prototype. The aim is to detect global functions that fail
2992to be declared in header files.
2993.IP "\fB\-Wmissing\-declarations\fR (C only)" 4
2994.IX Item "-Wmissing-declarations (C only)"
2995Warn if a global function is defined without a previous declaration.
2996Do so even if the definition itself provides a prototype.
2997Use this option to detect global functions that are not declared in
2998header files.
2999.IP "\fB\-Wmissing\-field\-initializers\fR" 4
3000.IX Item "-Wmissing-field-initializers"
3001Warn if a structure's initializer has some fields missing. For
3002example, the following code would cause such a warning, because
3003\&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
3004.Sp
3005.Vb 2
3006\& struct s { int f, g, h; };
3007\& struct s x = { 3, 4 };
3008.Ve
3009.Sp
3010This option does not warn about designated initializers, so the following
3011modification would not trigger a warning:
3012.Sp
3013.Vb 2
3014\& struct s { int f, g, h; };
3015\& struct s x = { .f = 3, .g = 4 };
3016.Ve
3017.Sp
3018This warning is included in \fB\-Wextra\fR. To get other \fB\-Wextra\fR
3019warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
3020.IP "\fB\-Wmissing\-noreturn\fR" 4
3021.IX Item "-Wmissing-noreturn"
3022Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR.
3023Note these are only possible candidates, not absolute ones. Care should
3024be taken to manually verify functions actually do not ever return before
3025adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation
3026bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in
3027hosted C environments.
3028.IP "\fB\-Wmissing\-format\-attribute\fR" 4
3029.IX Item "-Wmissing-format-attribute"
3030Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
3031attributes. Note these are only possible candidates, not absolute ones.
3032\&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
3033are used in assignment, initialization, parameter passing or return
3034statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
3035resulting type. I.e. the left-hand side of the assignment or
3036initialization, the type of the parameter variable, or the return type
3037of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
3038attribute to avoid the warning.
3039.Sp
3040\&\s-1GCC\s0 will also warn about function definitions which might be
3041candidates for \f(CW\*(C`format\*(C'\fR attributes. Again, these are only
3042possible candidates. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
3043might be appropriate for any function that calls a function like
3044\&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
3045case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
3046appropriate may not be detected.
3047.IP "\fB\-Wno\-multichar\fR" 4
3048.IX Item "-Wno-multichar"
3049Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
3050Usually they indicate a typo in the user's code, as they have
3051implementation-defined values, and should not be used in portable code.
3052.IP "\fB\-Wnormalized=<none|id|nfc|nfkc>\fR" 4
3053.IX Item "-Wnormalized=<none|id|nfc|nfkc>"
3054In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
3055different sequences of characters. However, sometimes when characters
3056outside the basic \s-1ASCII\s0 character set are used, you can have two
3057different character sequences that look the same. To avoid confusion,
3058the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
3059when applied ensure that two sequences that look the same are turned into
3060the same sequence. \s-1GCC\s0 can warn you if you are using identifiers which
3061have not been normalized; this option controls that warning.
3062.Sp
3063There are four levels of warning that \s-1GCC\s0 supports. The default is
3064\&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
3065not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR. \s-1NFC\s0 is the
3066recommended form for most uses.
3067.Sp
3068Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
3069in identifiers that when turned into \s-1NFC\s0 aren't allowable as
3070identifiers. That is, there's no way to use these symbols in portable
3071\&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
3072\&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
3073It is hoped that future versions of the standards involved will correct
3074this, which is why this option is not the default.
3075.Sp
3076You can switch the warning off for all characters by writing
3077\&\fB\-Wnormalized=none\fR. You would only want to do this if you
3078were using some other normalization scheme (like \*(L"D\*(R"), because
3079otherwise you can easily create bugs that are literally impossible to see.
3080.Sp
3081Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
3082in some fonts or display methodologies, especially once formatting has
3083been applied. For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
3084\&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
3085placed in a superscript. \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
3086normalization scheme to convert all these into a standard form as
3087well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
3088\&\fB\-Wnormalized=nfkc\fR. This warning is comparable to warning
3089about every identifier that contains the letter O because it might be
3090confused with the digit 0, and so is not the default, but may be
3091useful as a local coding convention if the programming environment is
3092unable to be fixed to display these characters distinctly.
3093.IP "\fB\-Wno\-deprecated\-declarations\fR" 4
3094.IX Item "-Wno-deprecated-declarations"
3095Do not warn about uses of functions,
3096variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
3097attribute.
3098.IP "\fB\-Wno\-overflow\fR" 4
3099.IX Item "-Wno-overflow"
3100Do not warn about compile-time overflow in constant expressions.
3101.IP "\fB\-Woverride\-init\fR" 4
3102.IX Item "-Woverride-init"
3103Warn if an initialized field without side effects is overridden when
3104using designated initializers.
3105.Sp
3106This warning is included in \fB\-Wextra\fR. To get other
3107\&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
3108\&\-Wno\-override\-init\fR.
3109.IP "\fB\-Wpacked\fR" 4
3110.IX Item "-Wpacked"
3111Warn if a structure is given the packed attribute, but the packed
3112attribute has no effect on the layout or size of the structure.
3113Such structures may be mis-aligned for little benefit. For
3114instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
3115will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
3116have the packed attribute:
3117.Sp
3118.Vb 8
3119\& struct foo {
3120\& int x;
3121\& char a, b, c, d;
3122\& } __attribute__((packed));
3123\& struct bar {
3124\& char z;
3125\& struct foo f;
3126\& };
3127.Ve
3128.IP "\fB\-Wpadded\fR" 4
3129.IX Item "-Wpadded"
3130Warn if padding is included in a structure, either to align an element
3131of the structure or to align the whole structure. Sometimes when this
3132happens it is possible to rearrange the fields of the structure to
3133reduce the padding and so make the structure smaller.
3134.IP "\fB\-Wredundant\-decls\fR" 4
3135.IX Item "-Wredundant-decls"
3136Warn if anything is declared more than once in the same scope, even in
3137cases where multiple declaration is valid and changes nothing.
3138.IP "\fB\-Wnested\-externs\fR (C only)" 4
3139.IX Item "-Wnested-externs (C only)"
3140Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
3141.IP "\fB\-Wunreachable\-code\fR" 4
3142.IX Item "-Wunreachable-code"
3143Warn if the compiler detects that code will never be executed.
3144.Sp
3145This option is intended to warn when the compiler detects that at
3146least a whole line of source code will never be executed, because
3147some condition is never satisfied or because it is after a
3148procedure that never returns.
3149.Sp
3150It is possible for this option to produce a warning even though there
3151are circumstances under which part of the affected line can be executed,
3152so care should be taken when removing apparently-unreachable code.
3153.Sp
3154For instance, when a function is inlined, a warning may mean that the
3155line is unreachable in only one inlined copy of the function.
3156.Sp
3157This option is not made part of \fB\-Wall\fR because in a debugging
3158version of a program there is often substantial code which checks
3159correct functioning of the program and is, hopefully, unreachable
3160because the program does work. Another common use of unreachable
3161code is to provide behavior which is selectable at compile\-time.
3162.IP "\fB\-Winline\fR" 4
3163.IX Item "-Winline"
3164Warn if a function can not be inlined and it was declared as inline.
3165Even with this option, the compiler will not warn about failures to
3166inline functions declared in system headers.
3167.Sp
3168The compiler uses a variety of heuristics to determine whether or not
3169to inline a function. For example, the compiler takes into account
3170the size of the function being inlined and the amount of inlining
3171that has already been done in the current function. Therefore,
3172seemingly insignificant changes in the source program can cause the
3173warnings produced by \fB\-Winline\fR to appear or disappear.
3174.IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ only)" 4
3175.IX Item "-Wno-invalid-offsetof ( only)"
3176Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
3177type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
3178to a non-POD type is undefined. In existing \*(C+ implementations,
3179however, \fBoffsetof\fR typically gives meaningful results even when
3180applied to certain kinds of non-POD types. (Such as a simple
3181\&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
3182constructor.) This flag is for users who are aware that they are
3183writing nonportable code and who have deliberately chosen to ignore the
3184warning about it.
3185.Sp
3186The restrictions on \fBoffsetof\fR may be relaxed in a future version
3187of the \*(C+ standard.
3188.IP "\fB\-Wno\-int\-to\-pointer\-cast\fR (C only)" 4
3189.IX Item "-Wno-int-to-pointer-cast (C only)"
3190Suppress warnings from casts to pointer type of an integer of a
3191different size.
3192.IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C only)" 4
3193.IX Item "-Wno-pointer-to-int-cast (C only)"
3194Suppress warnings from casts from a pointer to an integer type of a
3195different size.
3196.IP "\fB\-Winvalid\-pch\fR" 4
3197.IX Item "-Winvalid-pch"
3198Warn if a precompiled header is found in
3199the search path but can't be used.
3200.IP "\fB\-Wlong\-long\fR" 4
3201.IX Item "-Wlong-long"
3202Warn if \fBlong long\fR type is used. This is default. To inhibit
3203the warning messages, use \fB\-Wno\-long\-long\fR. Flags
3204\&\fB\-Wlong\-long\fR and \fB\-Wno\-long\-long\fR are taken into account
3205only when \fB\-pedantic\fR flag is used.
3206.IP "\fB\-Wvariadic\-macros\fR" 4
3207.IX Item "-Wvariadic-macros"
3208Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
3209alternate syntax when in pedantic \s-1ISO\s0 C99 mode. This is default.
3210To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
3211.IP "\fB\-Wvolatile\-register\-var\fR" 4
3212.IX Item "-Wvolatile-register-var"
3213Warn if a register variable is declared volatile. The volatile
3214modifier does not inhibit all optimizations that may eliminate reads
3215and/or writes to register variables.
3216.IP "\fB\-Wdisabled\-optimization\fR" 4
3217.IX Item "-Wdisabled-optimization"
3218Warn if a requested optimization pass is disabled. This warning does
3219not generally indicate that there is anything wrong with your code; it
3220merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
3221effectively. Often, the problem is that your code is too big or too
3222complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
3223itself is likely to take inordinate amounts of time.
3224.IP "\fB\-Wpointer\-sign\fR" 4
3225.IX Item "-Wpointer-sign"
3226Warn for pointer argument passing or assignment with different signedness.
3227This option is only supported for C and Objective\-C. It is implied by
3228\&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
3229\&\fB\-Wno\-pointer\-sign\fR.
3230.IP "\fB\-Werror\fR" 4
3231.IX Item "-Werror"
3232Make all warnings into errors.
3233.IP "\fB\-Werror=\fR" 4
3234.IX Item "-Werror="
3235Make the specified warning into an errors. The specifier for a
3236warning is appended, for example \fB\-Werror=switch\fR turns the
3237warnings controlled by \fB\-Wswitch\fR into errors. This switch
3238takes a negative form, to be used to negate \fB\-Werror\fR for
3239specific warnings, for example \fB\-Wno\-error=switch\fR makes
3240\&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
3241is in effect. You can use the \fB\-fdiagnostics\-show\-option\fR
3242option to have each controllable warning amended with the option which
3243controls it, to determine what to use with this option.
3244.Sp
3245Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
3246\&\fB\-W\fR\fIfoo\fR. However, \fB\-Wno\-error=\fR\fIfoo\fR does not
3247imply anything.
3248.IP "\fB\-Wstack\-protector\fR" 4
3249.IX Item "-Wstack-protector"
3250This option is only active when \fB\-fstack\-protector\fR is active. It
3251warns about functions that will not be protected against stack smashing.
3252.IP "\fB\-Woverlength\-strings\fR" 4
3253.IX Item "-Woverlength-strings"
3254Warn about string constants which are longer than the \*(L"minimum
3255maximum\*(R" length specified in the C standard. Modern compilers
3256generally allow string constants which are much longer than the
3257standard's minimum limit, but very portable programs should avoid
3258using longer strings.
3259.Sp
3260The limit applies \fIafter\fR string constant concatenation, and does
3261not count the trailing \s-1NUL\s0. In C89, the limit was 509 characters; in
3262C99, it was raised to 4095. \*(C+98 does not specify a normative
3263minimum maximum, so we do not diagnose overlength strings in \*(C+.
3264.Sp
3265This option is implied by \fB\-pedantic\fR, and can be disabled with
3266\&\fB\-Wno\-overlength\-strings\fR.
3267.Sh "Options for Debugging Your Program or \s-1GCC\s0"
3268.IX Subsection "Options for Debugging Your Program or GCC"
3269\&\s-1GCC\s0 has various special options that are used for debugging
3270either your program or \s-1GCC:\s0
3271.IP "\fB\-g\fR" 4
3272.IX Item "-g"
3273Produce debugging information in the operating system's native format
3274(stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2). \s-1GDB\s0 can work with this debugging
3275information.
3276.Sp
3277On most systems that use stabs format, \fB\-g\fR enables use of extra
3278debugging information that only \s-1GDB\s0 can use; this extra information
3279makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
3280crash or
3281refuse to read the program. If you want to control for certain whether
3282to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
3283\&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
3284.Sp
3285\&\s-1GCC\s0 allows you to use \fB\-g\fR with
3286\&\fB\-O\fR. The shortcuts taken by optimized code may occasionally
3287produce surprising results: some variables you declared may not exist
3288at all; flow of control may briefly move where you did not expect it;
3289some statements may not be executed because they compute constant
3290results or their values were already at hand; some statements may
3291execute in different places because they were moved out of loops.
3292.Sp
3293Nevertheless it proves possible to debug optimized output. This makes
3294it reasonable to use the optimizer for programs that might have bugs.
3295.Sp
3296The following options are useful when \s-1GCC\s0 is generated with the
3297capability for more than one debugging format.
3298.IP "\fB\-ggdb\fR" 4
3299.IX Item "-ggdb"
3300Produce debugging information for use by \s-1GDB\s0. This means to use the
3301most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
3302if neither of those are supported), including \s-1GDB\s0 extensions if at all
3303possible.
3304.IP "\fB\-gstabs\fR" 4
3305.IX Item "-gstabs"
3306Produce debugging information in stabs format (if that is supported),
3307without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
3308systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
3309produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
3310On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
3311.IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
3312.IX Item "-feliminate-unused-debug-symbols"
3313Produce debugging information in stabs format (if that is supported),
3314for only symbols that are actually used.
3315.IP "\fB\-femit\-class\-debug\-always\fR" 4
3316.IX Item "-femit-class-debug-always"
3317Instead of emitting debugging information for a \*(C+ class in only one
3318object file, emit it in all object files using the class. This option
3319should be used only with debuggers that are unable to handle the way \s-1GCC\s0
3320normally emits debugging information for classes because using this
3321option will increase the size of debugging information by as much as a
3322factor of two.
3323.IP "\fB\-gstabs+\fR" 4
3324.IX Item "-gstabs+"
3325Produce debugging information in stabs format (if that is supported),
3326using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
3327use of these extensions is likely to make other debuggers crash or
3328refuse to read the program.
3329.IP "\fB\-gcoff\fR" 4
3330.IX Item "-gcoff"
3331Produce debugging information in \s-1COFF\s0 format (if that is supported).
3332This is the format used by \s-1SDB\s0 on most System V systems prior to
3333System V Release 4.
3334.IP "\fB\-gxcoff\fR" 4
3335.IX Item "-gxcoff"
3336Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
3337This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
3338.IP "\fB\-gxcoff+\fR" 4
3339.IX Item "-gxcoff+"
3340Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
3341using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
3342use of these extensions is likely to make other debuggers crash or
3343refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
3344assembler (\s-1GAS\s0) to fail with an error.
3345.IP "\fB\-gdwarf\-2\fR" 4
3346.IX Item "-gdwarf-2"
3347Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
3348supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. With this
3349option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 3 when they are useful;
3350version 3 is upward compatible with version 2, but may still cause
3351problems for older debuggers.
3352.IP "\fB\-gvms\fR" 4
3353.IX Item "-gvms"
3354Produce debugging information in \s-1VMS\s0 debug format (if that is
3355supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
3356.IP "\fB\-g\fR\fIlevel\fR" 4
3357.IX Item "-glevel"
3358.PD 0
3359.IP "\fB\-ggdb\fR\fIlevel\fR" 4
3360.IX Item "-ggdblevel"
3361.IP "\fB\-gstabs\fR\fIlevel\fR" 4
3362.IX Item "-gstabslevel"
3363.IP "\fB\-gcoff\fR\fIlevel\fR" 4
3364.IX Item "-gcofflevel"
3365.IP "\fB\-gxcoff\fR\fIlevel\fR" 4
3366.IX Item "-gxcofflevel"
3367.IP "\fB\-gvms\fR\fIlevel\fR" 4
3368.IX Item "-gvmslevel"
3369.PD
3370Request debugging information and also use \fIlevel\fR to specify how
3371much information. The default level is 2.
3372.Sp
3373Level 1 produces minimal information, enough for making backtraces in
3374parts of the program that you don't plan to debug. This includes
3375descriptions of functions and external variables, but no information
3376about local variables and no line numbers.
3377.Sp
3378Level 3 includes extra information, such as all the macro definitions
3379present in the program. Some debuggers support macro expansion when
3380you use \fB\-g3\fR.
3381.Sp
3382\&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
3383\&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
3384debug information in version 1 of the \s-1DWARF\s0 format (which is very
3385different from version 2), and it would have been too confusing. That
3386debug format is long obsolete, but the option cannot be changed now.
3387Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
3388debug level for \s-1DWARF2\s0.
3389.IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
3390.IX Item "-feliminate-dwarf2-dups"
3391Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
3392information about each symbol. This option only makes sense when
3393generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
3394.IP "\fB\-p\fR" 4
3395.IX Item "-p"
3396Generate extra code to write profile information suitable for the
3397analysis program \fBprof\fR. You must use this option when compiling
3398the source files you want data about, and you must also use it when
3399linking.
3400.IP "\fB\-pg\fR" 4
3401.IX Item "-pg"
3402Generate extra code to write profile information suitable for the
3403analysis program \fBgprof\fR. You must use this option when compiling
3404the source files you want data about, and you must also use it when
3405linking.
3406.IP "\fB\-Q\fR" 4
3407.IX Item "-Q"
3408Makes the compiler print out each function name as it is compiled, and
3409print some statistics about each pass when it finishes.
3410.IP "\fB\-ftime\-report\fR" 4
3411.IX Item "-ftime-report"
3412Makes the compiler print some statistics about the time consumed by each
3413pass when it finishes.
3414.IP "\fB\-fmem\-report\fR" 4
3415.IX Item "-fmem-report"
3416Makes the compiler print some statistics about permanent memory
3417allocation when it finishes.
3418.IP "\fB\-fprofile\-arcs\fR" 4
3419.IX Item "-fprofile-arcs"
3420Add code so that program flow \fIarcs\fR are instrumented. During
3421execution the program records how many times each branch and call is
3422executed and how many times it is taken or returns. When the compiled
3423program exits it saves this data to a file called
3424\&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
3425profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
3426test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
3427\&\fIauxname\fR is generated from the name of the output file, if
3428explicitly specified and it is not the final executable, otherwise it is
3429the basename of the source file. In both cases any suffix is removed
3430(e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
3431\&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
3432.IP "\fB\-\-coverage\fR" 4
3433.IX Item "--coverage"
3434This option is used to compile and link code instrumented for coverage
3435analysis. The option is a synonym for \fB\-fprofile\-arcs\fR
3436\&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
3437linking). See the documentation for those options for more details.
3438.RS 4
3439.IP "*" 4
3440Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
3441and code generation options. For test coverage analysis, use the
3442additional \fB\-ftest\-coverage\fR option. You do not need to profile
3443every source file in a program.
3444.IP "*" 4
3445Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
3446(the latter implies the former).
3447.IP "*" 4
3448Run the program on a representative workload to generate the arc profile
3449information. This may be repeated any number of times. You can run
3450concurrent instances of your program, and provided that the file system
3451supports locking, the data files will be correctly updated. Also
3452\&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
3453will not happen).
3454.IP "*" 4
3455For profile-directed optimizations, compile the source files again with
3456the same optimization and code generation options plus
3457\&\fB\-fbranch\-probabilities\fR.
3458.IP "*" 4
3459For test coverage analysis, use \fBgcov\fR to produce human readable
3460information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
3461\&\fBgcov\fR documentation for further information.
3462.RE
3463.RS 4
3464.Sp
3465With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
3466creates a program flow graph, then finds a spanning tree for the graph.
3467Only arcs that are not on the spanning tree have to be instrumented: the
3468compiler adds code to count the number of times that these arcs are
3469executed. When an arc is the only exit or only entrance to a block, the
3470instrumentation code can be added to the block; otherwise, a new basic
3471block must be created to hold the instrumentation code.
3472.RE
3473.IP "\fB\-ftest\-coverage\fR" 4
3474.IX Item "-ftest-coverage"
3475Produce a notes file that the \fBgcov\fR code-coverage utility can use to
3476show program coverage. Each source file's note file is called
3477\&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
3478above for a description of \fIauxname\fR and instructions on how to
3479generate test coverage data. Coverage data will match the source files
3480more closely, if you do not optimize.
3481.IP "\fB\-d\fR\fIletters\fR" 4
3482.IX Item "-dletters"
3483.PD 0
3484.IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
3485.IX Item "-fdump-rtl-pass"
3486.PD
3487Says to make debugging dumps during compilation at times specified by
3488\&\fIletters\fR. This is used for debugging the RTL-based passes of the
3489compiler. The file names for most of the dumps are made by appending a
3490pass number and a word to the \fIdumpname\fR. \fIdumpname\fR is generated
3491from the name of the output file, if explicitly specified and it is not
3492an executable, otherwise it is the basename of the source file.
3493.Sp
3494Most debug dumps can be enabled either passing a letter to the \fB\-d\fR
3495option, or with a long \fB\-fdump\-rtl\fR switch; here are the possible
3496letters for use in \fIletters\fR and \fIpass\fR, and their meanings:
3497.RS 4
3498.IP "\fB\-dA\fR" 4
3499.IX Item "-dA"
3500Annotate the assembler output with miscellaneous debugging information.
3501.IP "\fB\-dB\fR" 4
3502.IX Item "-dB"
3503.PD 0
3504.IP "\fB\-fdump\-rtl\-bbro\fR" 4
3505.IX Item "-fdump-rtl-bbro"
3506.PD
3507Dump after block reordering, to \fI\fIfile\fI.148r.bbro\fR.
3508.IP "\fB\-dc\fR" 4
3509.IX Item "-dc"
3510.PD 0
3511.IP "\fB\-fdump\-rtl\-combine\fR" 4
3512.IX Item "-fdump-rtl-combine"
3513.PD
3514Dump after instruction combination, to the file \fI\fIfile\fI.129r.combine\fR.
3515.IP "\fB\-dC\fR" 4
3516.IX Item "-dC"
3517.PD 0
3518.IP "\fB\-fdump\-rtl\-ce1\fR" 4
3519.IX Item "-fdump-rtl-ce1"
3520.IP "\fB\-fdump\-rtl\-ce2\fR" 4
3521.IX Item "-fdump-rtl-ce2"
3522.PD
3523\&\fB\-dC\fR and \fB\-fdump\-rtl\-ce1\fR enable dumping after the
3524first if conversion, to the file \fI\fIfile\fI.117r.ce1\fR. \fB\-dC\fR
3525and \fB\-fdump\-rtl\-ce2\fR enable dumping after the second if
3526conversion, to the file \fI\fIfile\fI.130r.ce2\fR.
3527.IP "\fB\-dd\fR" 4
3528.IX Item "-dd"
3529.PD 0
3530.IP "\fB\-fdump\-rtl\-btl\fR" 4
3531.IX Item "-fdump-rtl-btl"
3532.IP "\fB\-fdump\-rtl\-dbr\fR" 4
3533.IX Item "-fdump-rtl-dbr"
3534.PD
3535\&\fB\-dd\fR and \fB\-fdump\-rtl\-btl\fR enable dumping after branch
3536target load optimization, to \fI\fIfile\fI.31.btl\fR. \fB\-dd\fR
3537and \fB\-fdump\-rtl\-dbr\fR enable dumping after delayed branch
3538scheduling, to \fI\fIfile\fI.36.dbr\fR.
3539.IP "\fB\-dD\fR" 4
3540.IX Item "-dD"
3541Dump all macro definitions, at the end of preprocessing, in addition to
3542normal output.
3543.IP "\fB\-dE\fR" 4
3544.IX Item "-dE"
3545.PD 0
3546.IP "\fB\-fdump\-rtl\-ce3\fR" 4
3547.IX Item "-fdump-rtl-ce3"
3548.PD
3549Dump after the third if conversion, to \fI\fIfile\fI.146r.ce3\fR.
3550.IP "\fB\-df\fR" 4
3551.IX Item "-df"
3552.PD 0
3553.IP "\fB\-fdump\-rtl\-cfg\fR" 4
3554.IX Item "-fdump-rtl-cfg"
3555.IP "\fB\-fdump\-rtl\-life\fR" 4
3556.IX Item "-fdump-rtl-life"
3557.PD
3558\&\fB\-df\fR and \fB\-fdump\-rtl\-cfg\fR enable dumping after control
3559and data flow analysis, to \fI\fIfile\fI.116r.cfg\fR. \fB\-df\fR
3560and \fB\-fdump\-rtl\-cfg\fR enable dumping dump after life analysis,
3561to \fI\fIfile\fI.128r.life1\fR and \fI\fIfile\fI.135r.life2\fR.
3562.IP "\fB\-dg\fR" 4
3563.IX Item "-dg"
3564.PD 0
3565.IP "\fB\-fdump\-rtl\-greg\fR" 4
3566.IX Item "-fdump-rtl-greg"
3567.PD
3568Dump after global register allocation, to \fI\fIfile\fI.139r.greg\fR.
3569.IP "\fB\-dG\fR" 4
3570.IX Item "-dG"
3571.PD 0
3572.IP "\fB\-fdump\-rtl\-gcse\fR" 4
3573.IX Item "-fdump-rtl-gcse"
3574.IP "\fB\-fdump\-rtl\-bypass\fR" 4
3575.IX Item "-fdump-rtl-bypass"
3576.PD
3577\&\fB\-dG\fR and \fB\-fdump\-rtl\-gcse\fR enable dumping after \s-1GCSE\s0, to
3578\&\fI\fIfile\fI.114r.gcse\fR. \fB\-dG\fR and \fB\-fdump\-rtl\-bypass\fR
3579enable dumping after jump bypassing and control flow optimizations, to
3580\&\fI\fIfile\fI.115r.bypass\fR.
3581.IP "\fB\-dh\fR" 4
3582.IX Item "-dh"
3583.PD 0
3584.IP "\fB\-fdump\-rtl\-eh\fR" 4
3585.IX Item "-fdump-rtl-eh"
3586.PD
3587Dump after finalization of \s-1EH\s0 handling code, to \fI\fIfile\fI.02.eh\fR.
3588.IP "\fB\-di\fR" 4
3589.IX Item "-di"
3590.PD 0
3591.IP "\fB\-fdump\-rtl\-sibling\fR" 4
3592.IX Item "-fdump-rtl-sibling"
3593.PD
3594Dump after sibling call optimizations, to \fI\fIfile\fI.106r.sibling\fR.
3595.IP "\fB\-dj\fR" 4
3596.IX Item "-dj"
3597.PD 0
3598.IP "\fB\-fdump\-rtl\-jump\fR" 4
3599.IX Item "-fdump-rtl-jump"
3600.PD
3601Dump after the first jump optimization, to \fI\fIfile\fI.112r.jump\fR.
3602.IP "\fB\-dk\fR" 4
3603.IX Item "-dk"
3604.PD 0
3605.IP "\fB\-fdump\-rtl\-stack\fR" 4
3606.IX Item "-fdump-rtl-stack"
3607.PD
3608Dump after conversion from registers to stack, to \fI\fIfile\fI.152r.stack\fR.
3609.IP "\fB\-dl\fR" 4
3610.IX Item "-dl"
3611.PD 0
3612.IP "\fB\-fdump\-rtl\-lreg\fR" 4
3613.IX Item "-fdump-rtl-lreg"
3614.PD
3615Dump after local register allocation, to \fI\fIfile\fI.138r.lreg\fR.
3616.IP "\fB\-dL\fR" 4
3617.IX Item "-dL"
3618.PD 0
3619.IP "\fB\-fdump\-rtl\-loop2\fR" 4
3620.IX Item "-fdump-rtl-loop2"
3621.PD
3622\&\fB\-dL\fR and \fB\-fdump\-rtl\-loop2\fR enable dumping after the
3623loop optimization pass, to \fI\fIfile\fI.119r.loop2\fR,
3624\&\fI\fIfile\fI.120r.loop2_init\fR,
3625\&\fI\fIfile\fI.121r.loop2_invariant\fR, and
3626\&\fI\fIfile\fI.125r.loop2_done\fR.
3627.IP "\fB\-dm\fR" 4
3628.IX Item "-dm"
3629.PD 0
3630.IP "\fB\-fdump\-rtl\-sms\fR" 4
3631.IX Item "-fdump-rtl-sms"
3632.PD
3633Dump after modulo scheduling, to \fI\fIfile\fI.136r.sms\fR.
3634.IP "\fB\-dM\fR" 4
3635.IX Item "-dM"
3636.PD 0
3637.IP "\fB\-fdump\-rtl\-mach\fR" 4
3638.IX Item "-fdump-rtl-mach"
3639.PD
3640Dump after performing the machine dependent reorganization pass, to
3641\&\fI\fIfile\fI.155r.mach\fR.
3642.IP "\fB\-dn\fR" 4
3643.IX Item "-dn"
3644.PD 0
3645.IP "\fB\-fdump\-rtl\-rnreg\fR" 4
3646.IX Item "-fdump-rtl-rnreg"
3647.PD
3648Dump after register renumbering, to \fI\fIfile\fI.147r.rnreg\fR.
3649.IP "\fB\-dN\fR" 4
3650.IX Item "-dN"
3651.PD 0
3652.IP "\fB\-fdump\-rtl\-regmove\fR" 4
3653.IX Item "-fdump-rtl-regmove"
3654.PD
3655Dump after the register move pass, to \fI\fIfile\fI.132r.regmove\fR.
3656.IP "\fB\-do\fR" 4
3657.IX Item "-do"
3658.PD 0
3659.IP "\fB\-fdump\-rtl\-postreload\fR" 4
3660.IX Item "-fdump-rtl-postreload"
3661.PD
3662Dump after post-reload optimizations, to \fI\fIfile\fI.24.postreload\fR.
3663.IP "\fB\-dr\fR" 4
3664.IX Item "-dr"
3665.PD 0
3666.IP "\fB\-fdump\-rtl\-expand\fR" 4
3667.IX Item "-fdump-rtl-expand"
3668.PD
3669Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.104r.expand\fR.
3670.IP "\fB\-dR\fR" 4
3671.IX Item "-dR"
3672.PD 0
3673.IP "\fB\-fdump\-rtl\-sched2\fR" 4
3674.IX Item "-fdump-rtl-sched2"
3675.PD
3676Dump after the second scheduling pass, to \fI\fIfile\fI.150r.sched2\fR.
3677.IP "\fB\-ds\fR" 4
3678.IX Item "-ds"
3679.PD 0
3680.IP "\fB\-fdump\-rtl\-cse\fR" 4
3681.IX Item "-fdump-rtl-cse"
3682.PD
3683Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows
3684\&\s-1CSE\s0), to \fI\fIfile\fI.113r.cse\fR.
3685.IP "\fB\-dS\fR" 4
3686.IX Item "-dS"
3687.PD 0
3688.IP "\fB\-fdump\-rtl\-sched\fR" 4
3689.IX Item "-fdump-rtl-sched"
3690.PD
3691Dump after the first scheduling pass, to \fI\fIfile\fI.21.sched\fR.
3692.IP "\fB\-dt\fR" 4
3693.IX Item "-dt"
3694.PD 0
3695.IP "\fB\-fdump\-rtl\-cse2\fR" 4
3696.IX Item "-fdump-rtl-cse2"
3697.PD
3698Dump after the second \s-1CSE\s0 pass (including the jump optimization that
3699sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.127r.cse2\fR.
3700.IP "\fB\-dT\fR" 4
3701.IX Item "-dT"
3702.PD 0
3703.IP "\fB\-fdump\-rtl\-tracer\fR" 4
3704.IX Item "-fdump-rtl-tracer"
3705.PD
3706Dump after running tracer, to \fI\fIfile\fI.118r.tracer\fR.
3707.IP "\fB\-dV\fR" 4
3708.IX Item "-dV"
3709.PD 0
3710.IP "\fB\-fdump\-rtl\-vpt\fR" 4
3711.IX Item "-fdump-rtl-vpt"
3712.IP "\fB\-fdump\-rtl\-vartrack\fR" 4
3713.IX Item "-fdump-rtl-vartrack"
3714.PD
3715\&\fB\-dV\fR and \fB\-fdump\-rtl\-vpt\fR enable dumping after the value
3716profile transformations, to \fI\fIfile\fI.10.vpt\fR. \fB\-dV\fR
3717and \fB\-fdump\-rtl\-vartrack\fR enable dumping after variable tracking,
3718to \fI\fIfile\fI.154r.vartrack\fR.
3719.IP "\fB\-dw\fR" 4
3720.IX Item "-dw"
3721.PD 0
3722.IP "\fB\-fdump\-rtl\-flow2\fR" 4
3723.IX Item "-fdump-rtl-flow2"
3724.PD
3725Dump after the second flow pass, to \fI\fIfile\fI.142r.flow2\fR.
3726.IP "\fB\-dz\fR" 4
3727.IX Item "-dz"
3728.PD 0
3729.IP "\fB\-fdump\-rtl\-peephole2\fR" 4
3730.IX Item "-fdump-rtl-peephole2"
3731.PD
3732Dump after the peephole pass, to \fI\fIfile\fI.145r.peephole2\fR.
3733.IP "\fB\-dZ\fR" 4
3734.IX Item "-dZ"
3735.PD 0
3736.IP "\fB\-fdump\-rtl\-web\fR" 4
3737.IX Item "-fdump-rtl-web"
3738.PD
3739Dump after live range splitting, to \fI\fIfile\fI.126r.web\fR.
3740.IP "\fB\-da\fR" 4
3741.IX Item "-da"
3742.PD 0
3743.IP "\fB\-fdump\-rtl\-all\fR" 4
3744.IX Item "-fdump-rtl-all"
3745.PD
3746Produce all the dumps listed above.
3747.IP "\fB\-dH\fR" 4
3748.IX Item "-dH"
3749Produce a core dump whenever an error occurs.
3750.IP "\fB\-dm\fR" 4
3751.IX Item "-dm"
3752Print statistics on memory usage, at the end of the run, to
3753standard error.
3754.IP "\fB\-dp\fR" 4
3755.IX Item "-dp"
3756Annotate the assembler output with a comment indicating which
3757pattern and alternative was used. The length of each instruction is
3758also printed.
3759.IP "\fB\-dP\fR" 4
3760.IX Item "-dP"
3761Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
3762Also turns on \fB\-dp\fR annotation.
3763.IP "\fB\-dv\fR" 4
3764.IX Item "-dv"
3765For each of the other indicated dump files (either with \fB\-d\fR or
3766\&\fB\-fdump\-rtl\-\fR\fIpass\fR), dump a representation of the control flow
3767graph suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
3768.IP "\fB\-dx\fR" 4
3769.IX Item "-dx"
3770Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used
3771with \fBr\fR (\fB\-fdump\-rtl\-expand\fR).
3772.IP "\fB\-dy\fR" 4
3773.IX Item "-dy"
3774Dump debugging information during parsing, to standard error.
3775.RE
3776.RS 4
3777.RE
3778.IP "\fB\-fdump\-noaddr\fR" 4
3779.IX Item "-fdump-noaddr"
3780When doing debugging dumps (see \fB\-d\fR option above), suppress
3781address output. This makes it more feasible to use diff on debugging
3782dumps for compiler invocations with different compiler binaries and/or
3783different text / bss / data / heap / stack / dso start locations.
3784.IP "\fB\-fdump\-unnumbered\fR" 4
3785.IX Item "-fdump-unnumbered"
3786When doing debugging dumps (see \fB\-d\fR option above), suppress instruction
3787numbers, line number note and address output. This makes it more feasible to
3788use diff on debugging dumps for compiler invocations with different
3789options, in particular with and without \fB\-g\fR.
3790.IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
3791.IX Item "-fdump-translation-unit ( only)"
3792.PD 0
3793.IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
3794.IX Item "-fdump-translation-unit-options ( only)"
3795.PD
3796Dump a representation of the tree structure for the entire translation
3797unit to a file. The file name is made by appending \fI.tu\fR to the
3798source file name. If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
3799controls the details of the dump as described for the
3800\&\fB\-fdump\-tree\fR options.
3801.IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
3802.IX Item "-fdump-class-hierarchy ( only)"
3803.PD 0
3804.IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
3805.IX Item "-fdump-class-hierarchy-options ( only)"
3806.PD
3807Dump a representation of each class's hierarchy and virtual function
3808table layout to a file. The file name is made by appending \fI.class\fR
3809to the source file name. If the \fB\-\fR\fIoptions\fR form is used,
3810\&\fIoptions\fR controls the details of the dump as described for the
3811\&\fB\-fdump\-tree\fR options.
3812.IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
3813.IX Item "-fdump-ipa-switch"
3814Control the dumping at various stages of inter-procedural analysis
3815language tree to a file. The file name is generated by appending a switch
3816specific suffix to the source file name. The following dumps are possible:
3817.RS 4
3818.IP "\fBall\fR" 4
3819.IX Item "all"
3820Enables all inter-procedural analysis dumps; currently the only produced
3821dump is the \fBcgraph\fR dump.
3822.IP "\fBcgraph\fR" 4
3823.IX Item "cgraph"
3824Dumps information about call-graph optimization, unused function removal,
3825and inlining decisions.
3826.RE
3827.RS 4
3828.RE
3829.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
3830.IX Item "-fdump-tree-switch"
3831.PD 0
3832.IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
3833.IX Item "-fdump-tree-switch-options"
3834.PD
3835Control the dumping at various stages of processing the intermediate
3836language tree to a file. The file name is generated by appending a switch
3837specific suffix to the source file name. If the \fB\-\fR\fIoptions\fR
3838form is used, \fIoptions\fR is a list of \fB\-\fR separated options that
3839control the details of the dump. Not all options are applicable to all
3840dumps, those which are not meaningful will be ignored. The following
3841options are available
3842.RS 4
3843.IP "\fBaddress\fR" 4
3844.IX Item "address"
3845Print the address of each node. Usually this is not meaningful as it
3846changes according to the environment and source file. Its primary use
3847is for tying up a dump file with a debug environment.
3848.IP "\fBslim\fR" 4
3849.IX Item "slim"
3850Inhibit dumping of members of a scope or body of a function merely
3851because that scope has been reached. Only dump such items when they
3852are directly reachable by some other path. When dumping pretty-printed
3853trees, this option inhibits dumping the bodies of control structures.
3854.IP "\fBraw\fR" 4
3855.IX Item "raw"
3856Print a raw representation of the tree. By default, trees are
3857pretty-printed into a C\-like representation.
3858.IP "\fBdetails\fR" 4
3859.IX Item "details"
3860Enable more detailed dumps (not honored by every dump option).
3861.IP "\fBstats\fR" 4
3862.IX Item "stats"
3863Enable dumping various statistics about the pass (not honored by every dump
3864option).
3865.IP "\fBblocks\fR" 4
3866.IX Item "blocks"
3867Enable showing basic block boundaries (disabled in raw dumps).
3868.IP "\fBvops\fR" 4
3869.IX Item "vops"
3870Enable showing virtual operands for every statement.
3871.IP "\fBlineno\fR" 4
3872.IX Item "lineno"
3873Enable showing line numbers for statements.
3874.IP "\fBuid\fR" 4
3875.IX Item "uid"
3876Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
3877.IP "\fBall\fR" 4
3878.IX Item "all"
3879Turn on all options, except \fBraw\fR, \fBslim\fR and \fBlineno\fR.
3880.RE
3881.RS 4
3882.Sp
3883The following tree dumps are possible:
3884.IP "\fBoriginal\fR" 4
3885.IX Item "original"
3886Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
3887.IP "\fBoptimized\fR" 4
3888.IX Item "optimized"
3889Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
3890.IP "\fBinlined\fR" 4
3891.IX Item "inlined"
3892Dump after function inlining, to \fI\fIfile\fI.inlined\fR.
3893.IP "\fBgimple\fR" 4
3894.IX Item "gimple"
3895Dump each function before and after the gimplification pass to a file. The
3896file name is made by appending \fI.gimple\fR to the source file name.
3897.IP "\fBcfg\fR" 4
3898.IX Item "cfg"
3899Dump the control flow graph of each function to a file. The file name is
3900made by appending \fI.cfg\fR to the source file name.
3901.IP "\fBvcg\fR" 4
3902.IX Item "vcg"
3903Dump the control flow graph of each function to a file in \s-1VCG\s0 format. The
3904file name is made by appending \fI.vcg\fR to the source file name. Note
3905that if the file contains more than one function, the generated file cannot
3906be used directly by \s-1VCG\s0. You will need to cut and paste each function's
3907graph into its own separate file first.
3908.IP "\fBch\fR" 4
3909.IX Item "ch"
3910Dump each function after copying loop headers. The file name is made by
3911appending \fI.ch\fR to the source file name.
3912.IP "\fBssa\fR" 4
3913.IX Item "ssa"
3914Dump \s-1SSA\s0 related information to a file. The file name is made by appending
3915\&\fI.ssa\fR to the source file name.
3916.IP "\fBsalias\fR" 4
3917.IX Item "salias"
3918Dump structure aliasing variable information to a file. This file name
3919is made by appending \fI.salias\fR to the source file name.
3920.IP "\fBalias\fR" 4
3921.IX Item "alias"
3922Dump aliasing information for each function. The file name is made by
3923appending \fI.alias\fR to the source file name.
3924.IP "\fBccp\fR" 4
3925.IX Item "ccp"
3926Dump each function after \s-1CCP\s0. The file name is made by appending
3927\&\fI.ccp\fR to the source file name.
3928.IP "\fBstoreccp\fR" 4
3929.IX Item "storeccp"
3930Dump each function after \s-1STORE\-CCP\s0. The file name is made by appending
3931\&\fI.storeccp\fR to the source file name.
3932.IP "\fBpre\fR" 4
3933.IX Item "pre"
3934Dump trees after partial redundancy elimination. The file name is made
3935by appending \fI.pre\fR to the source file name.
3936.IP "\fBfre\fR" 4
3937.IX Item "fre"
3938Dump trees after full redundancy elimination. The file name is made
3939by appending \fI.fre\fR to the source file name.
3940.IP "\fBcopyprop\fR" 4
3941.IX Item "copyprop"
3942Dump trees after copy propagation. The file name is made
3943by appending \fI.copyprop\fR to the source file name.
3944.IP "\fBstore_copyprop\fR" 4
3945.IX Item "store_copyprop"
3946Dump trees after store copy\-propagation. The file name is made
3947by appending \fI.store_copyprop\fR to the source file name.
3948.IP "\fBdce\fR" 4
3949.IX Item "dce"
3950Dump each function after dead code elimination. The file name is made by
3951appending \fI.dce\fR to the source file name.
3952.IP "\fBmudflap\fR" 4
3953.IX Item "mudflap"
3954Dump each function after adding mudflap instrumentation. The file name is
3955made by appending \fI.mudflap\fR to the source file name.
3956.IP "\fBsra\fR" 4
3957.IX Item "sra"
3958Dump each function after performing scalar replacement of aggregates. The
3959file name is made by appending \fI.sra\fR to the source file name.
3960.IP "\fBsink\fR" 4
3961.IX Item "sink"
3962Dump each function after performing code sinking. The file name is made
3963by appending \fI.sink\fR to the source file name.
3964.IP "\fBdom\fR" 4
3965.IX Item "dom"
3966Dump each function after applying dominator tree optimizations. The file
3967name is made by appending \fI.dom\fR to the source file name.
3968.IP "\fBdse\fR" 4
3969.IX Item "dse"
3970Dump each function after applying dead store elimination. The file
3971name is made by appending \fI.dse\fR to the source file name.
3972.IP "\fBphiopt\fR" 4
3973.IX Item "phiopt"
3974Dump each function after optimizing \s-1PHI\s0 nodes into straightline code. The file
3975name is made by appending \fI.phiopt\fR to the source file name.
3976.IP "\fBforwprop\fR" 4
3977.IX Item "forwprop"
3978Dump each function after forward propagating single use variables. The file
3979name is made by appending \fI.forwprop\fR to the source file name.
3980.IP "\fBcopyrename\fR" 4
3981.IX Item "copyrename"
3982Dump each function after applying the copy rename optimization. The file
3983name is made by appending \fI.copyrename\fR to the source file name.
3984.IP "\fBnrv\fR" 4
3985.IX Item "nrv"
3986Dump each function after applying the named return value optimization on
3987generic trees. The file name is made by appending \fI.nrv\fR to the source
3988file name.
3989.IP "\fBvect\fR" 4
3990.IX Item "vect"
3991Dump each function after applying vectorization of loops. The file name is
3992made by appending \fI.vect\fR to the source file name.
3993.IP "\fBvrp\fR" 4
3994.IX Item "vrp"
3995Dump each function after Value Range Propagation (\s-1VRP\s0). The file name
3996is made by appending \fI.vrp\fR to the source file name.
3997.IP "\fBall\fR" 4
3998.IX Item "all"
3999Enable all the available tree dumps with the flags provided in this option.
4000.RE
4001.RS 4
4002.RE
4003.IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
4004.IX Item "-ftree-vectorizer-verbose=n"
4005This option controls the amount of debugging output the vectorizer prints.
4006This information is written to standard error, unless
4007\&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
4008in which case it is output to the usual dump listing file, \fI.vect\fR.
4009For \fIn\fR=0 no diagnostic information is reported.
4010If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
4011and the total number of loops that got vectorized.
4012If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
4013the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
4014inner\-most, single\-bb, single\-entry/exit loops. This is the same verbosity
4015level that \fB\-fdump\-tree\-vect\-stats\fR uses.
4016Higher verbosity levels mean either more information dumped for each
4017reported loop, or same amount of information reported for more loops:
4018If \fIn\fR=3, alignment related information is added to the reports.
4019If \fIn\fR=4, data-references related information (e.g. memory dependences,
4020memory access\-patterns) is added to the reports.
4021If \fIn\fR=5, the vectorizer reports also non-vectorized inner-most loops
4022that did not pass the first analysis phase (i.e. may not be countable, or
4023may have complicated control\-flow).
4024If \fIn\fR=6, the vectorizer reports also non-vectorized nested loops.
4025For \fIn\fR=7, all the information the vectorizer generates during its
4026analysis and transformation is reported. This is the same verbosity level
4027that \fB\-fdump\-tree\-vect\-details\fR uses.
4028.IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
4029.IX Item "-frandom-seed=string"
4030This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
4031random numbers. It is used to generate certain symbol names
4032that have to be different in every compiled file. It is also used to
4033place unique stamps in coverage data files and the object files that
4034produce them. You can use the \fB\-frandom\-seed\fR option to produce
4035reproducibly identical object files.
4036.Sp
4037The \fIstring\fR should be different for every file you compile.
4038.IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
4039.IX Item "-fsched-verbose=n"
4040On targets that use instruction scheduling, this option controls the
4041amount of debugging output the scheduler prints. This information is
4042written to standard error, unless \fB\-dS\fR or \fB\-dR\fR is
4043specified, in which case it is output to the usual dump
4044listing file, \fI.sched\fR or \fI.sched2\fR respectively. However
4045for \fIn\fR greater than nine, the output is always printed to standard
4046error.
4047.Sp
4048For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
4049same information as \fB\-dRS\fR. For \fIn\fR greater than one, it
4050also output basic block probabilities, detailed ready list information
4051and unit/insn info. For \fIn\fR greater than two, it includes \s-1RTL\s0
4052at abort point, control-flow and regions info. And for \fIn\fR over
4053four, \fB\-fsched\-verbose\fR also includes dependence info.
4054.IP "\fB\-save\-temps\fR" 4
4055.IX Item "-save-temps"
4056Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
4057in the current directory and name them based on the source file. Thus,
4058compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
4059\&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a
4060preprocessed \fIfoo.i\fR output file even though the compiler now
4061normally uses an integrated preprocessor.
4062.Sp
4063When used in combination with the \fB\-x\fR command line option,
4064\&\fB\-save\-temps\fR is sensible enough to avoid over writing an
4065input source file with the same extension as an intermediate file.
4066The corresponding intermediate file may be obtained by renaming the
4067source file before using \fB\-save\-temps\fR.
4068.IP "\fB\-time\fR" 4
4069.IX Item "-time"
4070Report the \s-1CPU\s0 time taken by each subprocess in the compilation
4071sequence. For C source files, this is the compiler proper and assembler
4072(plus the linker if linking is done). The output looks like this:
4073.Sp
4074.Vb 2
4075\& # cc1 0.12 0.01
4076\& # as 0.00 0.01
4077.Ve
4078.Sp
4079The first number on each line is the \*(L"user time\*(R", that is time spent
4080executing the program itself. The second number is \*(L"system time\*(R",
4081time spent executing operating system routines on behalf of the program.
4082Both numbers are in seconds.
4083.IP "\fB\-fvar\-tracking\fR" 4
4084.IX Item "-fvar-tracking"
4085Run variable tracking pass. It computes where variables are stored at each
4086position in code. Better debugging information is then generated
4087(if the debugging information format supports this information).
4088.Sp
4089It is enabled by default when compiling with optimization (\fB\-Os\fR,
4090\&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
4091the debug info format supports it.
4092.IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
4093.IX Item "-print-file-name=library"
4094Print the full absolute name of the library file \fIlibrary\fR that
4095would be used when linking\-\-\-and don't do anything else. With this
4096option, \s-1GCC\s0 does not compile or link anything; it just prints the
4097file name.
4098.IP "\fB\-print\-multi\-directory\fR" 4
4099.IX Item "-print-multi-directory"
4100Print the directory name corresponding to the multilib selected by any
4101other switches present in the command line. This directory is supposed
4102to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
4103.IP "\fB\-print\-multi\-lib\fR" 4
4104.IX Item "-print-multi-lib"
4105Print the mapping from multilib directory names to compiler switches
4106that enable them. The directory name is separated from the switches by
4107\&\fB;\fR, and each switch starts with an \fB@} instead of the
4108\&\f(CB@samp\fB{\-\fR, without spaces between multiple switches. This is supposed to
4109ease shell\-processing.
4110.IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
4111.IX Item "-print-prog-name=program"
4112Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
4113.IP "\fB\-print\-libgcc\-file\-name\fR" 4
4114.IX Item "-print-libgcc-file-name"
4115Same as \fB\-print\-file\-name=libgcc.a\fR.
4116.Sp
4117This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
4118but you do want to link with \fIlibgcc.a\fR. You can do
4119.Sp
4120.Vb 1
4121\& gcc -nostdlib <files>... `gcc -print-libgcc-file-name`
4122.Ve
4123.IP "\fB\-print\-search\-dirs\fR" 4
4124.IX Item "-print-search-dirs"
4125Print the name of the configured installation directory and a list of
4126program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
4127.Sp
4128This is useful when \fBgcc\fR prints the error message
4129\&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
4130To resolve this you either need to put \fIcpp0\fR and the other compiler
4131components where \fBgcc\fR expects to find them, or you can set the environment
4132variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
4133Don't forget the trailing \fB/\fR.
4134.IP "\fB\-dumpmachine\fR" 4
4135.IX Item "-dumpmachine"
4136Print the compiler's target machine (for example,
4137\&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
4138.IP "\fB\-dumpversion\fR" 4
4139.IX Item "-dumpversion"
4140Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
4141anything else.
4142.IP "\fB\-dumpspecs\fR" 4
4143.IX Item "-dumpspecs"
4144Print the compiler's built-in specs\-\-\-and don't do anything else. (This
4145is used when \s-1GCC\s0 itself is being built.)
4146.IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
4147.IX Item "-feliminate-unused-debug-types"
4148Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
4149information for all types declared in a compilation
4150unit, regardless of whether or not they are actually used
4151in that compilation unit. Sometimes this is useful, such as
4152if, in the debugger, you want to cast a value to a type that is
4153not actually used in your program (but is declared). More often,
4154however, this results in a significant amount of wasted space.
4155With this option, \s-1GCC\s0 will avoid producing debug symbol output
4156for types that are nowhere used in the source file being compiled.
4157.Sh "Options That Control Optimization"
4158.IX Subsection "Options That Control Optimization"
4159These options control various sorts of optimizations.
4160.PP
4161Without any optimization option, the compiler's goal is to reduce the
4162cost of compilation and to make debugging produce the expected
4163results. Statements are independent: if you stop the program with a
4164breakpoint between statements, you can then assign a new value to any
4165variable or change the program counter to any other statement in the
4166function and get exactly the results you would expect from the source
4167code.
4168.PP
4169Turning on optimization flags makes the compiler attempt to improve
4170the performance and/or code size at the expense of compilation time
4171and possibly the ability to debug the program.
4172.PP
4173The compiler performs optimization based on the knowledge it has of
4174the program. Optimization levels \fB\-O\fR and above, in
4175particular, enable \fIunit-at-a-time\fR mode, which allows the
4176compiler to consider information gained from later functions in
4177the file when compiling a function. Compiling multiple files at
4178once to a single output file in \fIunit-at-a-time\fR mode allows
4179the compiler to use information gained from all of the files when
4180compiling each of them.
4181.PP
4182Not all optimizations are controlled directly by a flag. Only
4183optimizations that have a flag are listed.
4184.IP "\fB\-O\fR" 4
4185.IX Item "-O"
4186.PD 0
4187.IP "\fB\-O1\fR" 4
4188.IX Item "-O1"
4189.PD
4190Optimize. Optimizing compilation takes somewhat more time, and a lot
4191more memory for a large function.
4192.Sp
4193With \fB\-O\fR, the compiler tries to reduce code size and execution
4194time, without performing any optimizations that take a great deal of
4195compilation time.
4196.Sp
4197\&\fB\-O\fR turns on the following optimization flags:
4198\&\fB\-fdefer\-pop
4199\&\-fdelayed\-branch
4200\&\-fguess\-branch\-probability
4201\&\-fcprop\-registers
4202\&\-fif\-conversion
4203\&\-fif\-conversion2
4204\&\-ftree\-ccp
4205\&\-ftree\-dce
4206\&\-ftree\-dominator\-opts
4207\&\-ftree\-dse
4208\&\-ftree\-ter
4209\&\-ftree\-lrs
4210\&\-ftree\-sra
4211\&\-ftree\-copyrename
4212\&\-ftree\-fre
4213\&\-ftree\-ch
4214\&\-funit\-at\-a\-time
4215\&\-fmerge\-constants\fR
4216.Sp
4217\&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
4218where doing so does not interfere with debugging.
4219.IP "\fB\-O2\fR" 4
4220.IX Item "-O2"
4221Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations
4222that do not involve a space-speed tradeoff. The compiler does not
4223perform loop unrolling or function inlining when you specify \fB\-O2\fR.
4224As compared to \fB\-O\fR, this option increases both compilation time
4225and the performance of the generated code.
4226.Sp
4227\&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It
4228also turns on the following optimization flags:
4229\&\fB\-fthread\-jumps
4230\&\-fcrossjumping
4231\&\-foptimize\-sibling\-calls
4232\&\-fcse\-follow\-jumps \-fcse\-skip\-blocks
4233\&\-fgcse \-fgcse\-lm
4234\&\-fexpensive\-optimizations
4235\&\-frerun\-cse\-after\-loop
4236\&\-fcaller\-saves
4237\&\-fpeephole2
4238\&\-fschedule\-insns \-fschedule\-insns2
4239\&\-fsched\-interblock \-fsched\-spec
4240\&\-fregmove
4241\&\-fstrict\-aliasing \-fstrict\-overflow
4242\&\-fdelete\-null\-pointer\-checks
4243\&\-freorder\-blocks \-freorder\-functions
4244\&\-falign\-functions \-falign\-jumps
4245\&\-falign\-loops \-falign\-labels
4246\&\-ftree\-vrp
4247\&\-ftree\-pre\fR
4248.Sp
4249Please note the warning under \fB\-fgcse\fR about
4250invoking \fB\-O2\fR on programs that use computed gotos.
4251.Sp
4252\&\fB\-O2\fR doesn't turn on \fB\-ftree\-vrp\fR for the Ada compiler.
4253This option must be explicitly specified on the command line to be
4254enabled for the Ada compiler.
4255.IP "\fB\-O3\fR" 4
4256.IX Item "-O3"
4257Optimize yet more. \fB\-O3\fR turns on all optimizations specified by
4258\&\fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
4259\&\fB\-funswitch\-loops\fR and \fB\-fgcse\-after\-reload\fR options.
4260.IP "\fB\-O0\fR" 4
4261.IX Item "-O0"
4262Do not optimize. This is the default.
4263.IP "\fB\-Os\fR" 4
4264.IX Item "-Os"
4265Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that
4266do not typically increase code size. It also performs further
4267optimizations designed to reduce code size.
4268.Sp
4269\&\fB\-Os\fR disables the following optimization flags:
4270\&\fB\-falign\-functions \-falign\-jumps \-falign\-loops
4271\&\-falign\-labels \-freorder\-blocks \-freorder\-blocks\-and\-partition
4272\&\-fprefetch\-loop\-arrays \-ftree\-vect\-loop\-version\fR
4273.Sp
4274If you use multiple \fB\-O\fR options, with or without level numbers,
4275the last such option is the one that is effective.
4276.PP
4277Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
4278flags. Most flags have both positive and negative forms; the negative
4279form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table
4280below, only one of the forms is listed\-\-\-the one you typically will
4281use. You can figure out the other form by either removing \fBno\-\fR
4282or adding it.
4283.PP
4284The following options control specific optimizations. They are either
4285activated by \fB\-O\fR options or are related to ones that are. You
4286can use the following flags in the rare cases when \*(L"fine\-tuning\*(R" of
4287optimizations to be performed is desired.
4288.IP "\fB\-fno\-default\-inline\fR" 4
4289.IX Item "-fno-default-inline"
4290Do not make member functions inline by default merely because they are
4291defined inside the class scope (\*(C+ only). Otherwise, when you specify
4292\&\fB\-O\fR, member functions defined inside class scope are compiled
4293inline by default; i.e., you don't need to add \fBinline\fR in front of
4294the member function name.
4295.IP "\fB\-fno\-defer\-pop\fR" 4
4296.IX Item "-fno-defer-pop"
4297Always pop the arguments to each function call as soon as that function
4298returns. For machines which must pop arguments after a function call,
4299the compiler normally lets arguments accumulate on the stack for several
4300function calls and pops them all at once.
4301.Sp
4302Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4303.IP "\fB\-fforce\-mem\fR" 4
4304.IX Item "-fforce-mem"
4305Force memory operands to be copied into registers before doing
4306arithmetic on them. This produces better code by making all memory
4307references potential common subexpressions. When they are not common
4308subexpressions, instruction combination should eliminate the separate
4309register\-load. This option is now a nop and will be removed in 4.3.
4310.IP "\fB\-fforce\-addr\fR" 4
4311.IX Item "-fforce-addr"
4312Force memory address constants to be copied into registers before
4313doing arithmetic on them.
4314.IP "\fB\-fomit\-frame\-pointer\fR" 4
4315.IX Item "-fomit-frame-pointer"
4316Don't keep the frame pointer in a register for functions that
4317don't need one. This avoids the instructions to save, set up and
4318restore frame pointers; it also makes an extra register available
4319in many functions. \fBIt also makes debugging impossible on
4320some machines.\fR
4321.Sp
4322On some machines, such as the \s-1VAX\s0, this flag has no effect, because
4323the standard calling sequence automatically handles the frame pointer
4324and nothing is saved by pretending it doesn't exist. The
4325machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
4326whether a target machine supports this flag.
4327.Sp
4328Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4329.IP "\fB\-foptimize\-sibling\-calls\fR" 4
4330.IX Item "-foptimize-sibling-calls"
4331Optimize sibling and tail recursive calls.
4332.Sp
4333Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4334.IP "\fB\-fno\-inline\fR" 4
4335.IX Item "-fno-inline"
4336Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option
4337is used to keep the compiler from expanding any functions inline.
4338Note that if you are not optimizing, no functions can be expanded inline.
4339.IP "\fB\-finline\-functions\fR" 4
4340.IX Item "-finline-functions"
4341Integrate all simple functions into their callers. The compiler
4342heuristically decides which functions are simple enough to be worth
4343integrating in this way.
4344.Sp
4345If all calls to a given function are integrated, and the function is
4346declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
4347assembler code in its own right.
4348.Sp
4349Enabled at level \fB\-O3\fR.
4350.IP "\fB\-finline\-functions\-called\-once\fR" 4
4351.IX Item "-finline-functions-called-once"
4352Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
4353caller even if they are not marked \f(CW\*(C`inline\*(C'\fR. If a call to a given
4354function is integrated, then the function is not output as assembler code
4355in its own right.
4356.Sp
4357Enabled if \fB\-funit\-at\-a\-time\fR is enabled.
4358.IP "\fB\-fearly\-inlining\fR" 4
4359.IX Item "-fearly-inlining"
4360Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
4361smaller than the function call overhead early before doing
4362\&\fB\-fprofile\-generate\fR instrumentation and real inlining pass. Doing so
4363makes profiling significantly cheaper and usually inlining faster on programs
4364having large chains of nested wrapper functions.
4365.Sp
4366Enabled by default.
4367.IP "\fB\-finline\-limit=\fR\fIn\fR" 4
4368.IX Item "-finline-limit=n"
4369By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag
4370allows the control of this limit for functions that are explicitly marked as
4371inline (i.e., marked with the inline keyword or defined within the class
4372definition in c++). \fIn\fR is the size of functions that can be inlined in
4373number of pseudo instructions (not counting parameter handling). The default
4374value of \fIn\fR is 600.
4375Increasing this value can result in more inlined code at
4376the cost of compilation time and memory consumption. Decreasing usually makes
4377the compilation faster and less code will be inlined (which presumably
4378means slower programs). This option is particularly useful for programs that
4379use inlining heavily such as those based on recursive templates with \*(C+.
4380.Sp
4381Inlining is actually controlled by a number of parameters, which may be
4382specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
4383The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
4384as follows:
4385.RS 4
4386.IP "\fBmax-inline-insns-single\fR" 4
4387.IX Item "max-inline-insns-single"
4388.Vb 1
4389\& is set to I<n>/2.
4390.Ve
4391.IP "\fBmax-inline-insns-auto\fR" 4
4392.IX Item "max-inline-insns-auto"
4393.Vb 1
4394\& is set to I<n>/2.
4395.Ve
4396.IP "\fBmin-inline-insns\fR" 4
4397.IX Item "min-inline-insns"
4398.Vb 1
4399\& is set to 130 or I<n>/4, whichever is smaller.
4400.Ve
4401.IP "\fBmax-inline-insns-rtl\fR" 4
4402.IX Item "max-inline-insns-rtl"
4403.Vb 1
4404\& is set to I<n>.
4405.Ve
4406.RE
4407.RS 4
4408.Sp
4409See below for a documentation of the individual
4410parameters controlling inlining.
4411.Sp
4412\&\fINote:\fR pseudo instruction represents, in this particular context, an
4413abstract measurement of function's size. In no way does it represent a count
4414of assembly instructions and as such its exact meaning might change from one
4415release to an another.
4416.RE
4417.IP "\fB\-fkeep\-inline\-functions\fR" 4
4418.IX Item "-fkeep-inline-functions"
4419In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
4420into the object file, even if the function has been inlined into all
4421of its callers. This switch does not affect functions using the
4422\&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C. In \*(C+, emit any and all
4423inline functions into the object file.
4424.IP "\fB\-fkeep\-static\-consts\fR" 4
4425.IX Item "-fkeep-static-consts"
4426Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
4427on, even if the variables aren't referenced.
4428.Sp
4429\&\s-1GCC\s0 enables this option by default. If you want to force the compiler to
4430check if the variable was referenced, regardless of whether or not
4431optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
4432.IP "\fB\-fmerge\-constants\fR" 4
4433.IX Item "-fmerge-constants"
4434Attempt to merge identical constants (string constants and floating point
4435constants) across compilation units.
4436.Sp
4437This option is the default for optimized compilation if the assembler and
4438linker support it. Use \fB\-fno\-merge\-constants\fR to inhibit this
4439behavior.
4440.Sp
4441Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4442.IP "\fB\-fmerge\-all\-constants\fR" 4
4443.IX Item "-fmerge-all-constants"
4444Attempt to merge identical constants and identical variables.
4445.Sp
4446This option implies \fB\-fmerge\-constants\fR. In addition to
4447\&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
4448arrays or initialized constant variables with integral or floating point
4449types. Languages like C or \*(C+ require each non-automatic variable to
4450have distinct location, so using this option will result in non-conforming
4451behavior.
4452.IP "\fB\-fmodulo\-sched\fR" 4
4453.IX Item "-fmodulo-sched"
4454Perform swing modulo scheduling immediately before the first scheduling
4455pass. This pass looks at innermost loops and reorders their
4456instructions by overlapping different iterations.
4457.IP "\fB\-fno\-branch\-count\-reg\fR" 4
4458.IX Item "-fno-branch-count-reg"
4459Do not use \*(L"decrement and branch\*(R" instructions on a count register,
4460but instead generate a sequence of instructions that decrement a
4461register, compare it against zero, then branch based upon the result.
4462This option is only meaningful on architectures that support such
4463instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
4464.Sp
4465The default is \fB\-fbranch\-count\-reg\fR.
4466.IP "\fB\-fno\-function\-cse\fR" 4
4467.IX Item "-fno-function-cse"
4468Do not put function addresses in registers; make each instruction that
4469calls a constant function contain the function's address explicitly.
4470.Sp
4471This option results in less efficient code, but some strange hacks
4472that alter the assembler output may be confused by the optimizations
4473performed when this option is not used.
4474.Sp
4475The default is \fB\-ffunction\-cse\fR
4476.IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
4477.IX Item "-fno-zero-initialized-in-bss"
4478If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
4479are initialized to zero into \s-1BSS\s0. This can save space in the resulting
4480code.
4481.Sp
4482This option turns off this behavior because some programs explicitly
4483rely on variables going to the data section. E.g., so that the
4484resulting executable can find the beginning of that section and/or make
4485assumptions based on that.
4486.Sp
4487The default is \fB\-fzero\-initialized\-in\-bss\fR.
4488.IP "\fB\-fbounds\-check\fR" 4
4489.IX Item "-fbounds-check"
4490For front-ends that support it, generate additional code to check that
4491indices used to access arrays are within the declared range. This is
4492currently only supported by the Java and Fortran front\-ends, where
4493this option defaults to true and false respectively.
4494.IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
4495.IX Item "-fmudflap -fmudflapth -fmudflapir"
4496For front-ends that support it (C and \*(C+), instrument all risky
4497pointer/array dereferencing operations, some standard library
4498string/heap functions, and some other associated constructs with
4499range/validity tests. Modules so instrumented should be immune to
4500buffer overflows, invalid heap use, and some other classes of C/\*(C+
4501programming errors. The instrumentation relies on a separate runtime
4502library (\fIlibmudflap\fR), which will be linked into a program if
4503\&\fB\-fmudflap\fR is given at link time. Run-time behavior of the
4504instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
4505environment variable. See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
4506for its options.
4507.Sp
4508Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
4509link if your program is multi\-threaded. Use \fB\-fmudflapir\fR, in
4510addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
4511instrumentation should ignore pointer reads. This produces less
4512instrumentation (and therefore faster execution) and still provides
4513some protection against outright memory corrupting writes, but allows
4514erroneously read data to propagate within a program.
4515.IP "\fB\-fthread\-jumps\fR" 4
4516.IX Item "-fthread-jumps"
4517Perform optimizations where we check to see if a jump branches to a
4518location where another comparison subsumed by the first is found. If
4519so, the first branch is redirected to either the destination of the
4520second branch or a point immediately following it, depending on whether
4521the condition is known to be true or false.
4522.Sp
4523Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4524.IP "\fB\-fcse\-follow\-jumps\fR" 4
4525.IX Item "-fcse-follow-jumps"
4526In common subexpression elimination, scan through jump instructions
4527when the target of the jump is not reached by any other path. For
4528example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
4529\&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
4530tested is false.
4531.Sp
4532Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4533.IP "\fB\-fcse\-skip\-blocks\fR" 4
4534.IX Item "-fcse-skip-blocks"
4535This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
4536follow jumps which conditionally skip over blocks. When \s-1CSE\s0
4537encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
4538\&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
4539body of the \f(CW\*(C`if\*(C'\fR.
4540.Sp
4541Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4542.IP "\fB\-frerun\-cse\-after\-loop\fR" 4
4543.IX Item "-frerun-cse-after-loop"
4544Re-run common subexpression elimination after loop optimizations has been
4545performed.
4546.Sp
4547Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4548.IP "\fB\-fgcse\fR" 4
4549.IX Item "-fgcse"
4550Perform a global common subexpression elimination pass.
4551This pass also performs global constant and copy propagation.
4552.Sp
4553\&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
4554extension, you may get better runtime performance if you disable
4555the global common subexpression elimination pass by adding
4556\&\fB\-fno\-gcse\fR to the command line.
4557.Sp
4558Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4559.IP "\fB\-fgcse\-lm\fR" 4
4560.IX Item "-fgcse-lm"
4561When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
4562attempt to move loads which are only killed by stores into themselves. This
4563allows a loop containing a load/store sequence to be changed to a load outside
4564the loop, and a copy/store within the loop.
4565.Sp
4566Enabled by default when gcse is enabled.
4567.IP "\fB\-fgcse\-sm\fR" 4
4568.IX Item "-fgcse-sm"
4569When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
4570global common subexpression elimination. This pass will attempt to move
4571stores out of loops. When used in conjunction with \fB\-fgcse\-lm\fR,
4572loops containing a load/store sequence can be changed to a load before
4573the loop and a store after the loop.
4574.Sp
4575Not enabled at any optimization level.
4576.IP "\fB\-fgcse\-las\fR" 4
4577.IX Item "-fgcse-las"
4578When \fB\-fgcse\-las\fR is enabled, the global common subexpression
4579elimination pass eliminates redundant loads that come after stores to the
4580same memory location (both partial and full redundancies).
4581.Sp
4582Not enabled at any optimization level.
4583.IP "\fB\-fgcse\-after\-reload\fR" 4
4584.IX Item "-fgcse-after-reload"
4585When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
4586pass is performed after reload. The purpose of this pass is to cleanup
4587redundant spilling.
4588.IP "\fB\-funsafe\-loop\-optimizations\fR" 4
4589.IX Item "-funsafe-loop-optimizations"
4590If given, the loop optimizer will assume that loop indices do not
4591overflow, and that the loops with nontrivial exit condition are not
4592infinite. This enables a wider range of loop optimizations even if
4593the loop optimizer itself cannot prove that these assumptions are valid.
4594Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
4595if it finds this kind of loop.
4596.IP "\fB\-fcrossjumping\fR" 4
4597.IX Item "-fcrossjumping"
4598Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
4599resulting code may or may not perform better than without cross\-jumping.
4600.Sp
4601Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4602.IP "\fB\-fif\-conversion\fR" 4
4603.IX Item "-fif-conversion"
4604Attempt to transform conditional jumps into branch-less equivalents. This
4605include use of conditional moves, min, max, set flags and abs instructions, and
4606some tricks doable by standard arithmetics. The use of conditional execution
4607on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
4608.Sp
4609Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4610.IP "\fB\-fif\-conversion2\fR" 4
4611.IX Item "-fif-conversion2"
4612Use conditional execution (where available) to transform conditional jumps into
4613branch-less equivalents.
4614.Sp
4615Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4616.IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
4617.IX Item "-fdelete-null-pointer-checks"
4618Use global dataflow analysis to identify and eliminate useless checks
4619for null pointers. The compiler assumes that dereferencing a null
4620pointer would have halted the program. If a pointer is checked after
4621it has already been dereferenced, it cannot be null.
4622.Sp
4623In some environments, this assumption is not true, and programs can
4624safely dereference null pointers. Use
4625\&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
4626for programs which depend on that behavior.
4627.Sp
4628Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4629.IP "\fB\-fexpensive\-optimizations\fR" 4
4630.IX Item "-fexpensive-optimizations"
4631Perform a number of minor optimizations that are relatively expensive.
4632.Sp
4633Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4634.IP "\fB\-foptimize\-register\-move\fR" 4
4635.IX Item "-foptimize-register-move"
4636.PD 0
4637.IP "\fB\-fregmove\fR" 4
4638.IX Item "-fregmove"
4639.PD
4640Attempt to reassign register numbers in move instructions and as
4641operands of other simple instructions in order to maximize the amount of
4642register tying. This is especially helpful on machines with two-operand
4643instructions.
4644.Sp
4645Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
4646optimization.
4647.Sp
4648Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4649.IP "\fB\-fdelayed\-branch\fR" 4
4650.IX Item "-fdelayed-branch"
4651If supported for the target machine, attempt to reorder instructions
4652to exploit instruction slots available after delayed branch
4653instructions.
4654.Sp
4655Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4656.IP "\fB\-fschedule\-insns\fR" 4
4657.IX Item "-fschedule-insns"
4658If supported for the target machine, attempt to reorder instructions to
4659eliminate execution stalls due to required data being unavailable. This
4660helps machines that have slow floating point or memory load instructions
4661by allowing other instructions to be issued until the result of the load
4662or floating point instruction is required.
4663.Sp
4664Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4665.IP "\fB\-fschedule\-insns2\fR" 4
4666.IX Item "-fschedule-insns2"
4667Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
4668instruction scheduling after register allocation has been done. This is
4669especially useful on machines with a relatively small number of
4670registers and where memory load instructions take more than one cycle.
4671.Sp
4672Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4673.IP "\fB\-fno\-sched\-interblock\fR" 4
4674.IX Item "-fno-sched-interblock"
4675Don't schedule instructions across basic blocks. This is normally
4676enabled by default when scheduling before register allocation, i.e.
4677with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
4678.IP "\fB\-fno\-sched\-spec\fR" 4
4679.IX Item "-fno-sched-spec"
4680Don't allow speculative motion of non-load instructions. This is normally
4681enabled by default when scheduling before register allocation, i.e.
4682with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
4683.IP "\fB\-fsched\-spec\-load\fR" 4
4684.IX Item "-fsched-spec-load"
4685Allow speculative motion of some load instructions. This only makes
4686sense when scheduling before register allocation, i.e. with
4687\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
4688.IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
4689.IX Item "-fsched-spec-load-dangerous"
4690Allow speculative motion of more load instructions. This only makes
4691sense when scheduling before register allocation, i.e. with
4692\&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
4693.IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
4694.IX Item "-fsched-stalled-insns=n"
4695Define how many insns (if any) can be moved prematurely from the queue
4696of stalled insns into the ready list, during the second scheduling pass.
4697.IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
4698.IX Item "-fsched-stalled-insns-dep=n"
4699Define how many insn groups (cycles) will be examined for a dependency
4700on a stalled insn that is candidate for premature removal from the queue
4701of stalled insns. Has an effect only during the second scheduling pass,
4702and only if \fB\-fsched\-stalled\-insns\fR is used and its value is not zero.
4703.IP "\fB\-fsched2\-use\-superblocks\fR" 4
4704.IX Item "-fsched2-use-superblocks"
4705When scheduling after register allocation, do use superblock scheduling
4706algorithm. Superblock scheduling allows motion across basic block boundaries
4707resulting on faster schedules. This option is experimental, as not all machine
4708descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
4709results from the algorithm.
4710.Sp
4711This only makes sense when scheduling after register allocation, i.e. with
4712\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
4713.IP "\fB\-fsched2\-use\-traces\fR" 4
4714.IX Item "-fsched2-use-traces"
4715Use \fB\-fsched2\-use\-superblocks\fR algorithm when scheduling after register
4716allocation and additionally perform code duplication in order to increase the
4717size of superblocks using tracer pass. See \fB\-ftracer\fR for details on
4718trace formation.
4719.Sp
4720This mode should produce faster but significantly longer programs. Also
4721without \fB\-fbranch\-probabilities\fR the traces constructed may not
4722match the reality and hurt the performance. This only makes
4723sense when scheduling after register allocation, i.e. with
4724\&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
4725.IP "\fB\-fsee\fR" 4
4726.IX Item "-fsee"
4727Eliminates redundant extension instructions and move the non redundant
4728ones to optimal placement using \s-1LCM\s0.
4729.IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
4730.IX Item "-freschedule-modulo-scheduled-loops"
4731The modulo scheduling comes before the traditional scheduling, if a loop was modulo scheduled
4732we may want to prevent the later scheduling passes from changing its schedule, we use this
4733option to control that.
4734.IP "\fB\-fcaller\-saves\fR" 4
4735.IX Item "-fcaller-saves"
4736Enable values to be allocated in registers that will be clobbered by
4737function calls, by emitting extra instructions to save and restore the
4738registers around such calls. Such allocation is done only when it
4739seems to result in better code than would otherwise be produced.
4740.Sp
4741This option is always enabled by default on certain machines, usually
4742those which have no call-preserved registers to use instead.
4743.Sp
4744Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4745.IP "\fB\-ftree\-pre\fR" 4
4746.IX Item "-ftree-pre"
4747Perform Partial Redundancy Elimination (\s-1PRE\s0) on trees. This flag is
4748enabled by default at \fB\-O2\fR and \fB\-O3\fR.
4749.IP "\fB\-ftree\-fre\fR" 4
4750.IX Item "-ftree-fre"
4751Perform Full Redundancy Elimination (\s-1FRE\s0) on trees. The difference
4752between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
4753that are computed on all paths leading to the redundant computation.
4754This analysis faster than \s-1PRE\s0, though it exposes fewer redundancies.
4755This flag is enabled by default at \fB\-O\fR and higher.
4756.IP "\fB\-ftree\-copy\-prop\fR" 4
4757.IX Item "-ftree-copy-prop"
4758Perform copy propagation on trees. This pass eliminates unnecessary
4759copy operations. This flag is enabled by default at \fB\-O\fR and
4760higher.
4761.IP "\fB\-ftree\-store\-copy\-prop\fR" 4
4762.IX Item "-ftree-store-copy-prop"
4763Perform copy propagation of memory loads and stores. This pass
4764eliminates unnecessary copy operations in memory references
4765(structures, global variables, arrays, etc). This flag is enabled by
4766default at \fB\-O2\fR and higher.
4767.IP "\fB\-ftree\-salias\fR" 4
4768.IX Item "-ftree-salias"
4769Perform structural alias analysis on trees. This flag
4770is enabled by default at \fB\-O\fR and higher.
4771.IP "\fB\-fipa\-pta\fR" 4
4772.IX Item "-fipa-pta"
4773Perform interprocedural pointer analysis.
4774.IP "\fB\-ftree\-sink\fR" 4
4775.IX Item "-ftree-sink"
4776Perform forward store motion on trees. This flag is
4777enabled by default at \fB\-O\fR and higher.
4778.IP "\fB\-ftree\-ccp\fR" 4
4779.IX Item "-ftree-ccp"
4780Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
4781pass only operates on local scalar variables and is enabled by default
4782at \fB\-O\fR and higher.
4783.IP "\fB\-ftree\-store\-ccp\fR" 4
4784.IX Item "-ftree-store-ccp"
4785Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
4786pass operates on both local scalar variables and memory stores and
4787loads (global variables, structures, arrays, etc). This flag is
4788enabled by default at \fB\-O2\fR and higher.
4789.IP "\fB\-ftree\-dce\fR" 4
4790.IX Item "-ftree-dce"
4791Perform dead code elimination (\s-1DCE\s0) on trees. This flag is enabled by
4792default at \fB\-O\fR and higher.
4793.IP "\fB\-ftree\-dominator\-opts\fR" 4
4794.IX Item "-ftree-dominator-opts"
4795Perform a variety of simple scalar cleanups (constant/copy
4796propagation, redundancy elimination, range propagation and expression
4797simplification) based on a dominator tree traversal. This also
4798performs jump threading (to reduce jumps to jumps). This flag is
4799enabled by default at \fB\-O\fR and higher.
4800.IP "\fB\-ftree\-ch\fR" 4
4801.IX Item "-ftree-ch"
4802Perform loop header copying on trees. This is beneficial since it increases
4803effectiveness of code motion optimizations. It also saves one jump. This flag
4804is enabled by default at \fB\-O\fR and higher. It is not enabled
4805for \fB\-Os\fR, since it usually increases code size.
4806.IP "\fB\-ftree\-loop\-optimize\fR" 4
4807.IX Item "-ftree-loop-optimize"
4808Perform loop optimizations on trees. This flag is enabled by default
4809at \fB\-O\fR and higher.
4810.IP "\fB\-ftree\-loop\-linear\fR" 4
4811.IX Item "-ftree-loop-linear"
4812Perform linear loop transformations on tree. This flag can improve cache
4813performance and allow further loop optimizations to take place.
4814.IP "\fB\-ftree\-loop\-im\fR" 4
4815.IX Item "-ftree-loop-im"
4816Perform loop invariant motion on trees. This pass moves only invariants that
4817would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
4818nontrivial sequences of insns). With \fB\-funswitch\-loops\fR it also moves
4819operands of conditions that are invariant out of the loop, so that we can use
4820just trivial invariantness analysis in loop unswitching. The pass also includes
4821store motion.
4822.IP "\fB\-ftree\-loop\-ivcanon\fR" 4
4823.IX Item "-ftree-loop-ivcanon"
4824Create a canonical counter for number of iterations in the loop for that
4825determining number of iterations requires complicated analysis. Later
4826optimizations then may determine the number easily. Useful especially
4827in connection with unrolling.
4828.IP "\fB\-fivopts\fR" 4
4829.IX Item "-fivopts"
4830Perform induction variable optimizations (strength reduction, induction
4831variable merging and induction variable elimination) on trees.
4832.IP "\fB\-ftree\-sra\fR" 4
4833.IX Item "-ftree-sra"
4834Perform scalar replacement of aggregates. This pass replaces structure
4835references with scalars to prevent committing structures to memory too
4836early. This flag is enabled by default at \fB\-O\fR and higher.
4837.IP "\fB\-ftree\-copyrename\fR" 4
4838.IX Item "-ftree-copyrename"
4839Perform copy renaming on trees. This pass attempts to rename compiler
4840temporaries to other variables at copy locations, usually resulting in
4841variable names which more closely resemble the original variables. This flag
4842is enabled by default at \fB\-O\fR and higher.
4843.IP "\fB\-ftree\-ter\fR" 4
4844.IX Item "-ftree-ter"
4845Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase. Single
4846use/single def temporaries are replaced at their use location with their
4847defining expression. This results in non-GIMPLE code, but gives the expanders
4848much more complex trees to work on resulting in better \s-1RTL\s0 generation. This is
4849enabled by default at \fB\-O\fR and higher.
4850.IP "\fB\-ftree\-lrs\fR" 4
4851.IX Item "-ftree-lrs"
4852Perform live range splitting during the \s-1SSA\-\s0>normal phase. Distinct live
4853ranges of a variable are split into unique variables, allowing for better
4854optimization later. This is enabled by default at \fB\-O\fR and higher.
4855.IP "\fB\-ftree\-vectorize\fR" 4
4856.IX Item "-ftree-vectorize"
4857Perform loop vectorization on trees.
4858.IP "\fB\-ftree\-vect\-loop\-version\fR" 4
4859.IX Item "-ftree-vect-loop-version"
4860Perform loop versioning when doing loop vectorization on trees. When a loop
4861appears to be vectorizable except that data alignment or data dependence cannot
4862be determined at compile time then vectorized and non-vectorized versions of
4863the loop are generated along with runtime checks for alignment or dependence
4864to control which version is executed. This option is enabled by default
4865except at level \fB\-Os\fR where it is disabled.
4866.IP "\fB\-ftree\-vrp\fR" 4
4867.IX Item "-ftree-vrp"
4868Perform Value Range Propagation on trees. This is similar to the
4869constant propagation pass, but instead of values, ranges of values are
4870propagated. This allows the optimizers to remove unnecessary range
4871checks like array bound checks and null pointer checks. This is
4872enabled by default at \fB\-O2\fR and higher. Null pointer check
4873elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
4874enabled.
4875.IP "\fB\-ftracer\fR" 4
4876.IX Item "-ftracer"
4877Perform tail duplication to enlarge superblock size. This transformation
4878simplifies the control flow of the function allowing other optimizations to do
4879better job.
4880.IP "\fB\-funroll\-loops\fR" 4
4881.IX Item "-funroll-loops"
4882Unroll loops whose number of iterations can be determined at compile
4883time or upon entry to the loop. \fB\-funroll\-loops\fR implies
4884\&\fB\-frerun\-cse\-after\-loop\fR. This option makes code larger,
4885and may or may not make it run faster.
4886.IP "\fB\-funroll\-all\-loops\fR" 4
4887.IX Item "-funroll-all-loops"
4888Unroll all loops, even if their number of iterations is uncertain when
4889the loop is entered. This usually makes programs run more slowly.
4890\&\fB\-funroll\-all\-loops\fR implies the same options as
4891\&\fB\-funroll\-loops\fR,
4892.IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
4893.IX Item "-fsplit-ivs-in-unroller"
4894Enables expressing of values of induction variables in later iterations
4895of the unrolled loop using the value in the first iteration. This breaks
4896long dependency chains, thus improving efficiency of the scheduling passes.
4897.Sp
4898Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
4899same effect. However in cases the loop body is more complicated than
4900a single basic block, this is not reliable. It also does not work at all
4901on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
4902.Sp
4903This optimization is enabled by default.
4904.IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
4905.IX Item "-fvariable-expansion-in-unroller"
4906With this option, the compiler will create multiple copies of some
4907local variables when unrolling a loop which can result in superior code.
4908.IP "\fB\-fprefetch\-loop\-arrays\fR" 4
4909.IX Item "-fprefetch-loop-arrays"
4910If supported by the target machine, generate instructions to prefetch
4911memory to improve the performance of loops that access large arrays.
4912.Sp
4913This option may generate better or worse code; results are highly
4914dependent on the structure of loops within the source code.
4915.Sp
4916Disabled at level \fB\-Os\fR.
4917.IP "\fB\-fno\-peephole\fR" 4
4918.IX Item "-fno-peephole"
4919.PD 0
4920.IP "\fB\-fno\-peephole2\fR" 4
4921.IX Item "-fno-peephole2"
4922.PD
4923Disable any machine-specific peephole optimizations. The difference
4924between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
4925are implemented in the compiler; some targets use one, some use the
4926other, a few use both.
4927.Sp
4928\&\fB\-fpeephole\fR is enabled by default.
4929\&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4930.IP "\fB\-fno\-guess\-branch\-probability\fR" 4
4931.IX Item "-fno-guess-branch-probability"
4932Do not guess branch probabilities using heuristics.
4933.Sp
4934\&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
4935not provided by profiling feedback (\fB\-fprofile\-arcs\fR). These
4936heuristics are based on the control flow graph. If some branch probabilities
4937are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
4938used to guess branch probabilities for the rest of the control flow graph,
4939taking the \fB_\|_builtin_expect\fR info into account. The interactions
4940between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
4941some cases, it may be useful to disable the heuristics so that the effects
4942of \fB_\|_builtin_expect\fR are easier to understand.
4943.Sp
4944The default is \fB\-fguess\-branch\-probability\fR at levels
4945\&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4946.IP "\fB\-freorder\-blocks\fR" 4
4947.IX Item "-freorder-blocks"
4948Reorder basic blocks in the compiled function in order to reduce number of
4949taken branches and improve code locality.
4950.Sp
4951Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
4952.IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
4953.IX Item "-freorder-blocks-and-partition"
4954In addition to reordering basic blocks in the compiled function, in order
4955to reduce number of taken branches, partitions hot and cold basic blocks
4956into separate sections of the assembly and .o files, to improve
4957paging and cache locality performance.
4958.Sp
4959This optimization is automatically turned off in the presence of
4960exception handling, for linkonce sections, for functions with a user-defined
4961section attribute and on any architecture that does not support named
4962sections.
4963.IP "\fB\-freorder\-functions\fR" 4
4964.IX Item "-freorder-functions"
4965Reorder functions in the object file in order to
4966improve code locality. This is implemented by using special
4967subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
4968\&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by
4969the linker so object file format must support named sections and linker must
4970place them in a reasonable way.
4971.Sp
4972Also profile feedback must be available in to make this option effective. See
4973\&\fB\-fprofile\-arcs\fR for details.
4974.Sp
4975Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4976.IP "\fB\-fstrict\-aliasing\fR" 4
4977.IX Item "-fstrict-aliasing"
4978Allows the compiler to assume the strictest aliasing rules applicable to
4979the language being compiled. For C (and \*(C+), this activates
4980optimizations based on the type of expressions. In particular, an
4981object of one type is assumed never to reside at the same address as an
4982object of a different type, unless the types are almost the same. For
4983example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
4984\&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other
4985type.
4986.Sp
4987Pay special attention to code like this:
4988.Sp
4989.Vb 4
4990\& union a_union {
4991\& int i;
4992\& double d;
4993\& };
4994.Ve
4995.Sp
4996.Vb 5
4997\& int f() {
4998\& a_union t;
4999\& t.d = 3.0;
5000\& return t.i;
5001\& }
5002.Ve
5003.Sp
5004The practice of reading from a different union member than the one most
5005recently written to (called \*(L"type\-punning\*(R") is common. Even with
5006\&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
5007is accessed through the union type. So, the code above will work as
5008expected. However, this code might not:
5009.Sp
5010.Vb 7
5011\& int f() {
5012\& a_union t;
5013\& int* ip;
5014\& t.d = 3.0;
5015\& ip = &t.i;
5016\& return *ip;
5017\& }
5018.Ve
5019.Sp
5020Every language that wishes to perform language-specific alias analysis
5021should define a function that computes, given an \f(CW\*(C`tree\*(C'\fR
5022node, an alias set for the node. Nodes in different alias sets are not
5023allowed to alias. For an example, see the C front-end function
5024\&\f(CW\*(C`c_get_alias_set\*(C'\fR.
5025.Sp
5026Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
5027.IP "\fB\-fstrict\-overflow\fR" 4
5028.IX Item "-fstrict-overflow"
5029Allow the compiler to assume strict signed overflow rules, depending
5030on the language being compiled. For C (and \*(C+) this means that
5031overflow when doing arithmetic with signed numbers is undefined, which
5032means that the compiler may assume that it will not happen. This
5033permits various optimizations. For example, the compiler will assume
5034that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR will always be true for
5035signed \f(CW\*(C`i\*(C'\fR. This assumption is only valid if signed overflow is
5036undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
5037using twos complement arithmetic. When this option is in effect any
5038attempt to determine whether an operation on signed numbers will
5039overflow must be written carefully to not actually involve overflow.
5040.Sp
5041See also the \fB\-fwrapv\fR option. Using \fB\-fwrapv\fR means
5042that signed overflow is fully defined: it wraps. When
5043\&\fB\-fwrapv\fR is used, there is no difference between
5044\&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR. With
5045\&\fB\-fwrapv\fR certain types of overflow are permitted. For
5046example, if the compiler gets an overflow when doing arithmetic on
5047constants, the overflowed value can still be used with
5048\&\fB\-fwrapv\fR, but not otherwise.
5049.Sp
5050The \fB\-fstrict\-overflow\fR option is enabled at levels
5051\&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
5052.IP "\fB\-falign\-functions\fR" 4
5053.IX Item "-falign-functions"
5054.PD 0
5055.IP "\fB\-falign\-functions=\fR\fIn\fR" 4
5056.IX Item "-falign-functions=n"
5057.PD
5058Align the start of functions to the next power-of-two greater than
5059\&\fIn\fR, skipping up to \fIn\fR bytes. For instance,
5060\&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
5061boundary, but \fB\-falign\-functions=24\fR would align to the next
506232\-byte boundary only if this can be done by skipping 23 bytes or less.
5063.Sp
5064\&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
5065equivalent and mean that functions will not be aligned.
5066.Sp
5067Some assemblers only support this flag when \fIn\fR is a power of two;
5068in that case, it is rounded up.
5069.Sp
5070If \fIn\fR is not specified or is zero, use a machine-dependent default.
5071.Sp
5072Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
5073.IP "\fB\-falign\-labels\fR" 4
5074.IX Item "-falign-labels"
5075.PD 0
5076.IP "\fB\-falign\-labels=\fR\fIn\fR" 4
5077.IX Item "-falign-labels=n"
5078.PD
5079Align all branch targets to a power-of-two boundary, skipping up to
5080\&\fIn\fR bytes like \fB\-falign\-functions\fR. This option can easily
5081make code slower, because it must insert dummy operations for when the
5082branch target is reached in the usual flow of the code.
5083.Sp
5084\&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
5085equivalent and mean that labels will not be aligned.
5086.Sp
5087If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
5088are greater than this value, then their values are used instead.
5089.Sp
5090If \fIn\fR is not specified or is zero, use a machine-dependent default
5091which is very likely to be \fB1\fR, meaning no alignment.
5092.Sp
5093Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
5094.IP "\fB\-falign\-loops\fR" 4
5095.IX Item "-falign-loops"
5096.PD 0
5097.IP "\fB\-falign\-loops=\fR\fIn\fR" 4
5098.IX Item "-falign-loops=n"
5099.PD
5100Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
5101like \fB\-falign\-functions\fR. The hope is that the loop will be
5102executed many times, which will make up for any execution of the dummy
5103operations.
5104.Sp
5105\&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
5106equivalent and mean that loops will not be aligned.
5107.Sp
5108If \fIn\fR is not specified or is zero, use a machine-dependent default.
5109.Sp
5110Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
5111.IP "\fB\-falign\-jumps\fR" 4
5112.IX Item "-falign-jumps"
5113.PD 0
5114.IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
5115.IX Item "-falign-jumps=n"
5116.PD
5117Align branch targets to a power-of-two boundary, for branch targets
5118where the targets can only be reached by jumping, skipping up to \fIn\fR
5119bytes like \fB\-falign\-functions\fR. In this case, no dummy operations
5120need be executed.
5121.Sp
5122\&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
5123equivalent and mean that loops will not be aligned.
5124.Sp
5125If \fIn\fR is not specified or is zero, use a machine-dependent default.
5126.Sp
5127Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
5128.IP "\fB\-funit\-at\-a\-time\fR" 4
5129.IX Item "-funit-at-a-time"
5130Parse the whole compilation unit before starting to produce code.
5131This allows some extra optimizations to take place but consumes
5132more memory (in general). There are some compatibility issues
5133with \fIunit-at-a-time\fR mode:
5134.RS 4
5135.IP "*" 4
5136enabling \fIunit-at-a-time\fR mode may change the order
5137in which functions, variables, and top-level \f(CW\*(C`asm\*(C'\fR statements
5138are emitted, and will likely break code relying on some particular
5139ordering. The majority of such top-level \f(CW\*(C`asm\*(C'\fR statements,
5140though, can be replaced by \f(CW\*(C`section\*(C'\fR attributes. The
5141\&\fBfno-toplevel-reorder\fR option may be used to keep the ordering
5142used in the input file, at the cost of some optimizations.
5143.IP "*" 4
5144\&\fIunit-at-a-time\fR mode removes unreferenced static variables
5145and functions. This may result in undefined references
5146when an \f(CW\*(C`asm\*(C'\fR statement refers directly to variables or functions
5147that are otherwise unused. In that case either the variable/function
5148shall be listed as an operand of the \f(CW\*(C`asm\*(C'\fR statement operand or,
5149in the case of top-level \f(CW\*(C`asm\*(C'\fR statements the attribute \f(CW\*(C`used\*(C'\fR
5150shall be used on the declaration.
5151.IP "*" 4
5152Static functions now can use non-standard passing conventions that
5153may break \f(CW\*(C`asm\*(C'\fR statements calling functions directly. Again,
5154attribute \f(CW\*(C`used\*(C'\fR will prevent this behavior.
5155.RE
5156.RS 4
5157.Sp
5158As a temporary workaround, \fB\-fno\-unit\-at\-a\-time\fR can be used,
5159but this scheme may not be supported by future releases of \s-1GCC\s0.
5160.Sp
5161Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
5162.RE
5163.IP "\fB\-fno\-toplevel\-reorder\fR" 4
5164.IX Item "-fno-toplevel-reorder"
5165Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
5166statements. Output them in the same order that they appear in the
5167input file. When this option is used, unreferenced static variables
5168will not be removed. This option is intended to support existing code
5169which relies on a particular ordering. For new code, it is better to
5170use attributes.
5171.IP "\fB\-fweb\fR" 4
5172.IX Item "-fweb"
5173Constructs webs as commonly used for register allocation purposes and assign
5174each web individual pseudo register. This allows the register allocation pass
5175to operate on pseudos directly, but also strengthens several other optimization
5176passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can,
5177however, make debugging impossible, since variables will no longer stay in a
5178\&\*(L"home register\*(R".
5179.Sp
5180Enabled by default with \fB\-funroll\-loops\fR.
5181.IP "\fB\-fwhole\-program\fR" 4
5182.IX Item "-fwhole-program"
5183Assume that the current compilation unit represents whole program being
5184compiled. All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
5185and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
5186and in a affect gets more aggressively optimized by interprocedural optimizers.
5187While this option is equivalent to proper use of \f(CW\*(C`static\*(C'\fR keyword for
5188programs consisting of single file, in combination with option
5189\&\fB\-\-combine\fR this flag can be used to compile most of smaller scale C
5190programs since the functions and variables become local for the whole combined
5191compilation unit, not for the single source file itself.
5192.IP "\fB\-fno\-cprop\-registers\fR" 4
5193.IX Item "-fno-cprop-registers"
5194After register allocation and post-register allocation instruction splitting,
5195we perform a copy-propagation pass to try to reduce scheduling dependencies
5196and occasionally eliminate the copy.
5197.Sp
5198Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
5199.IP "\fB\-fprofile\-generate\fR" 4
5200.IX Item "-fprofile-generate"
5201Enable options usually used for instrumenting application to produce
5202profile useful for later recompilation with profile feedback based
5203optimization. You must use \fB\-fprofile\-generate\fR both when
5204compiling and when linking your program.
5205.Sp
5206The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
5207.IP "\fB\-fprofile\-use\fR" 4
5208.IX Item "-fprofile-use"
5209Enable profile feedback directed optimizations, and optimizations
5210generally profitable only with profile feedback available.
5211.Sp
5212The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
5213\&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR, \f(CW\*(C`\-ftracer\*(C'\fR
5214.PP
5215The following options control compiler behavior regarding floating
5216point arithmetic. These options trade off between speed and
5217correctness. All must be specifically enabled.
5218.IP "\fB\-ffloat\-store\fR" 4
5219.IX Item "-ffloat-store"
5220Do not store floating point variables in registers, and inhibit other
5221options that might change whether a floating point value is taken from a
5222register or memory.
5223.Sp
5224This option prevents undesirable excess precision on machines such as
5225the 68000 where the floating registers (of the 68881) keep more
5226precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the
5227x86 architecture. For most programs, the excess precision does only
5228good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
5229point. Use \fB\-ffloat\-store\fR for such programs, after modifying
5230them to store all pertinent intermediate computations into variables.
5231.IP "\fB\-ffast\-math\fR" 4
5232.IX Item "-ffast-math"
5233Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR, \fB\-fno\-trapping\-math\fR, \fB\-ffinite\-math\-only\fR,
5234\&\fB\-fno\-rounding\-math\fR, \fB\-fno\-signaling\-nans\fR
5235and \fBfcx-limited-range\fR.
5236.Sp
5237This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
5238.Sp
5239This option should never be turned on by any \fB\-O\fR option since
5240it can result in incorrect output for programs which depend on
5241an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
5242math functions.
5243.IP "\fB\-fno\-math\-errno\fR" 4
5244.IX Item "-fno-math-errno"
5245Do not set \s-1ERRNO\s0 after calling math functions that are executed
5246with a single instruction, e.g., sqrt. A program that relies on
5247\&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
5248for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
5249.Sp
5250This option should never be turned on by any \fB\-O\fR option since
5251it can result in incorrect output for programs which depend on
5252an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
5253math functions.
5254.Sp
5255The default is \fB\-fmath\-errno\fR.
5256.Sp
5257On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR. There is therefore
5258no reason for the compiler to consider the possibility that it might,
5259and \fB\-fno\-math\-errno\fR is the default.
5260.IP "\fB\-funsafe\-math\-optimizations\fR" 4
5261.IX Item "-funsafe-math-optimizations"
5262Allow optimizations for floating-point arithmetic that (a) assume
5263that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
5264\&\s-1ANSI\s0 standards. When used at link\-time, it may include libraries
5265or startup files that change the default \s-1FPU\s0 control word or other
5266similar optimizations.
5267.Sp
5268This option should never be turned on by any \fB\-O\fR option since
5269it can result in incorrect output for programs which depend on
5270an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
5271math functions.
5272.Sp
5273The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
5274.IP "\fB\-ffinite\-math\-only\fR" 4
5275.IX Item "-ffinite-math-only"
5276Allow optimizations for floating-point arithmetic that assume
5277that arguments and results are not NaNs or +\-Infs.
5278.Sp
5279This option should never be turned on by any \fB\-O\fR option since
5280it can result in incorrect output for programs which depend on
5281an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications.
5282.Sp
5283The default is \fB\-fno\-finite\-math\-only\fR.
5284.IP "\fB\-fno\-trapping\-math\fR" 4
5285.IX Item "-fno-trapping-math"
5286Compile code assuming that floating-point operations cannot generate
5287user-visible traps. These traps include division by zero, overflow,
5288underflow, inexact result and invalid operation. This option implies
5289\&\fB\-fno\-signaling\-nans\fR. Setting this option may allow faster
5290code if one relies on \*(L"non\-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
5291.Sp
5292This option should never be turned on by any \fB\-O\fR option since
5293it can result in incorrect output for programs which depend on
5294an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
5295math functions.
5296.Sp
5297The default is \fB\-ftrapping\-math\fR.
5298.IP "\fB\-frounding\-math\fR" 4
5299.IX Item "-frounding-math"
5300Disable transformations and optimizations that assume default floating
5301point rounding behavior. This is round-to-zero for all floating point
5302to integer conversions, and round-to-nearest for all other arithmetic
5303truncations. This option should be specified for programs that change
5304the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
5305non-default rounding mode. This option disables constant folding of
5306floating point expressions at compile-time (which may be affected by
5307rounding mode) and arithmetic transformations that are unsafe in the
5308presence of sign-dependent rounding modes.
5309.Sp
5310The default is \fB\-fno\-rounding\-math\fR.
5311.Sp
5312This option is experimental and does not currently guarantee to
5313disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
5314Future versions of \s-1GCC\s0 may provide finer control of this setting
5315using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command line option
5316will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
5317.IP "\fB\-frtl\-abstract\-sequences\fR" 4
5318.IX Item "-frtl-abstract-sequences"
5319It is a size optimization method. This option is to find identical
5320sequences of code, which can be turned into pseudo-procedures and
5321then replace all occurrences with calls to the newly created
5322subroutine. It is kind of an opposite of \fB\-finline\-functions\fR.
5323This optimization runs at \s-1RTL\s0 level.
5324.IP "\fB\-fsignaling\-nans\fR" 4
5325.IX Item "-fsignaling-nans"
5326Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
5327traps during floating-point operations. Setting this option disables
5328optimizations that may change the number of exceptions visible with
5329signaling NaNs. This option implies \fB\-ftrapping\-math\fR.
5330.Sp
5331This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
5332be defined.
5333.Sp
5334The default is \fB\-fno\-signaling\-nans\fR.
5335.Sp
5336This option is experimental and does not currently guarantee to
5337disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
5338.IP "\fB\-fsingle\-precision\-constant\fR" 4
5339.IX Item "-fsingle-precision-constant"
5340Treat floating point constant as single precision constant instead of
5341implicitly converting it to double precision constant.
5342.IP "\fB\-fcx\-limited\-range\fR" 4
5343.IX Item "-fcx-limited-range"
5344.PD 0
5345.IP "\fB\-fno\-cx\-limited\-range\fR" 4
5346.IX Item "-fno-cx-limited-range"
5347.PD
5348When enabled, this option states that a range reduction step is not
5349needed when performing complex division. The default is
5350\&\fB\-fno\-cx\-limited\-range\fR, but is enabled by \fB\-ffast\-math\fR.
5351.Sp
5352This option controls the default setting of the \s-1ISO\s0 C99
5353\&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma. Nevertheless, the option applies to
5354all languages.
5355.PP
5356The following options control optimizations that may improve
5357performance, but are not enabled by any \fB\-O\fR options. This
5358section includes experimental options that may produce broken code.
5359.IP "\fB\-fbranch\-probabilities\fR" 4
5360.IX Item "-fbranch-probabilities"
5361After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
5362\&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
5363the number of times each branch was taken. When the program
5364compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
5365counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
5366file The information in this data file is very dependent on the
5367structure of the generated code, so you must use the same source code
5368and the same optimization options for both compilations.
5369.Sp
5370With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
5371\&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
5372These can be used to improve optimization. Currently, they are only
5373used in one place: in \fIreorg.c\fR, instead of guessing which path a
5374branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
5375exactly determine which path is taken more often.
5376.IP "\fB\-fprofile\-values\fR" 4
5377.IX Item "-fprofile-values"
5378If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
5379data about values of expressions in the program is gathered.
5380.Sp
5381With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
5382from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR
5383notes to instructions for their later usage in optimizations.
5384.Sp
5385Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
5386.IP "\fB\-fvpt\fR" 4
5387.IX Item "-fvpt"
5388If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
5389a code to gather information about values of expressions.
5390.Sp
5391With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
5392and actually performs the optimizations based on them.
5393Currently the optimizations include specialization of division operation
5394using the knowledge about the value of the denominator.
5395.IP "\fB\-frename\-registers\fR" 4
5396.IX Item "-frename-registers"
5397Attempt to avoid false dependencies in scheduled code by making use
5398of registers left over after register allocation. This optimization
5399will most benefit processors with lots of registers. Depending on the
5400debug information format adopted by the target, however, it can
5401make debugging impossible, since variables will no longer stay in
5402a \*(L"home register\*(R".
5403.Sp
5404Enabled by default with \fB\-funroll\-loops\fR.
5405.IP "\fB\-ftracer\fR" 4
5406.IX Item "-ftracer"
5407Perform tail duplication to enlarge superblock size. This transformation
5408simplifies the control flow of the function allowing other optimizations to do
5409better job.
5410.Sp
5411Enabled with \fB\-fprofile\-use\fR.
5412.IP "\fB\-funroll\-loops\fR" 4
5413.IX Item "-funroll-loops"
5414Unroll loops whose number of iterations can be determined at compile time or
5415upon entry to the loop. \fB\-funroll\-loops\fR implies
5416\&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
5417It also turns on complete loop peeling (i.e. complete removal of loops with
5418small constant number of iterations). This option makes code larger, and may
5419or may not make it run faster.
5420.Sp
5421Enabled with \fB\-fprofile\-use\fR.
5422.IP "\fB\-funroll\-all\-loops\fR" 4
5423.IX Item "-funroll-all-loops"
5424Unroll all loops, even if their number of iterations is uncertain when
5425the loop is entered. This usually makes programs run more slowly.
5426\&\fB\-funroll\-all\-loops\fR implies the same options as
5427\&\fB\-funroll\-loops\fR.
5428.IP "\fB\-fpeel\-loops\fR" 4
5429.IX Item "-fpeel-loops"
5430Peels the loops for that there is enough information that they do not
5431roll much (from profile feedback). It also turns on complete loop peeling
5432(i.e. complete removal of loops with small constant number of iterations).
5433.Sp
5434Enabled with \fB\-fprofile\-use\fR.
5435.IP "\fB\-fmove\-loop\-invariants\fR" 4
5436.IX Item "-fmove-loop-invariants"
5437Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer. Enabled
5438at level \fB\-O1\fR
5439.IP "\fB\-funswitch\-loops\fR" 4
5440.IX Item "-funswitch-loops"
5441Move branches with loop invariant conditions out of the loop, with duplicates
5442of the loop on both branches (modified according to result of the condition).
5443.IP "\fB\-ffunction\-sections\fR" 4
5444.IX Item "-ffunction-sections"
5445.PD 0
5446.IP "\fB\-fdata\-sections\fR" 4
5447.IX Item "-fdata-sections"
5448.PD
5449Place each function or data item into its own section in the output
5450file if the target supports arbitrary sections. The name of the
5451function or the name of the data item determines the section's name
5452in the output file.
5453.Sp
5454Use these options on systems where the linker can perform optimizations
5455to improve locality of reference in the instruction space. Most systems
5456using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
5457linkers with such optimizations. \s-1AIX\s0 may have these optimizations in
5458the future.
5459.Sp
5460Only use these options when there are significant benefits from doing
5461so. When you specify these options, the assembler and linker will
5462create larger object and executable files and will also be slower.
5463You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
5464specify this option and you may have problems with debugging if
5465you specify both this option and \fB\-g\fR.
5466.IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
5467.IX Item "-fbranch-target-load-optimize"
5468Perform branch target register load optimization before prologue / epilogue
5469threading.
5470The use of target registers can typically be exposed only during reload,
5471thus hoisting loads out of loops and doing inter-block scheduling needs
5472a separate optimization pass.
5473.IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
5474.IX Item "-fbranch-target-load-optimize2"
5475Perform branch target register load optimization after prologue / epilogue
5476threading.
5477.IP "\fB\-fbtr\-bb\-exclusive\fR" 4
5478.IX Item "-fbtr-bb-exclusive"
5479When performing branch target register load optimization, don't reuse
5480branch target registers in within any basic block.
5481.IP "\fB\-fstack\-protector\fR" 4
5482.IX Item "-fstack-protector"
5483Emit extra code to check for buffer overflows, such as stack smashing
5484attacks. This is done by adding a guard variable to functions with
5485vulnerable objects. This includes functions that call alloca, and
5486functions with buffers larger than 8 bytes. The guards are initialized
5487when a function is entered and then checked when the function exits.
5488If a guard check fails, an error message is printed and the program exits.
5489.IP "\fB\-fstack\-protector\-all\fR" 4
5490.IX Item "-fstack-protector-all"
5491Like \fB\-fstack\-protector\fR except that all functions are protected.
5492.IP "\fB\-fsection\-anchors\fR" 4
5493.IX Item "-fsection-anchors"
5494Try to reduce the number of symbolic address calculations by using
5495shared \*(L"anchor\*(R" symbols to address nearby objects. This transformation
5496can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
5497targets.
5498.Sp
5499For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
5500.Sp
5501.Vb 2
5502\& static int a, b, c;
5503\& int foo (void) { return a + b + c; }
5504.Ve
5505.Sp
5506would usually calculate the addresses of all three variables, but if you
5507compile it with \fB\-fsection\-anchors\fR, it will access the variables
5508from a common anchor point instead. The effect is similar to the
5509following pseudocode (which isn't valid C):
5510.Sp
5511.Vb 5
5512\& int foo (void)
5513\& {
5514\& register int *xr = &x;
5515\& return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
5516\& }
5517.Ve
5518.Sp
5519Not all targets support this option.
5520.IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
5521.IX Item "--param name=value"
5522In some places, \s-1GCC\s0 uses various constants to control the amount of
5523optimization that is done. For example, \s-1GCC\s0 will not inline functions
5524that contain more that a certain number of instructions. You can
5525control some of these constants on the command-line using the
5526\&\fB\-\-param\fR option.
5527.Sp
5528The names of specific parameters, and the meaning of the values, are
5529tied to the internals of the compiler, and are subject to change
5530without notice in future releases.
5531.Sp
5532In each case, the \fIvalue\fR is an integer. The allowable choices for
5533\&\fIname\fR are given in the following table:
5534.RS 4
5535.IP "\fBsalias-max-implicit-fields\fR" 4
5536.IX Item "salias-max-implicit-fields"
5537The maximum number of fields in a variable without direct
5538structure accesses for which structure aliasing will consider trying
5539to track each field. The default is 5
5540.IP "\fBsalias-max-array-elements\fR" 4
5541.IX Item "salias-max-array-elements"
5542The maximum number of elements an array can have and its elements
5543still be tracked individually by structure aliasing. The default is 4
5544.IP "\fBsra-max-structure-size\fR" 4
5545.IX Item "sra-max-structure-size"
5546The maximum structure size, in bytes, at which the scalar replacement
5547of aggregates (\s-1SRA\s0) optimization will perform block copies. The
5548default value, 0, implies that \s-1GCC\s0 will select the most appropriate
5549size itself.
5550.IP "\fBsra-field-structure-ratio\fR" 4
5551.IX Item "sra-field-structure-ratio"
5552The threshold ratio (as a percentage) between instantiated fields and
5553the complete structure size. We say that if the ratio of the number
5554of bytes in instantiated fields to the number of bytes in the complete
5555structure exceeds this parameter, then block copies are not used. The
5556default is 75.
5557.IP "\fBmax-crossjump-edges\fR" 4
5558.IX Item "max-crossjump-edges"
5559The maximum number of incoming edges to consider for crossjumping.
5560The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
5561the number of edges incoming to each block. Increasing values mean
5562more aggressive optimization, making the compile time increase with
5563probably small improvement in executable size.
5564.IP "\fBmin-crossjump-insns\fR" 4
5565.IX Item "min-crossjump-insns"
5566The minimum number of instructions which must be matched at the end
5567of two blocks before crossjumping will be performed on them. This
5568value is ignored in the case where all instructions in the block being
5569crossjumped from are matched. The default value is 5.
5570.IP "\fBmax-grow-copy-bb-insns\fR" 4
5571.IX Item "max-grow-copy-bb-insns"
5572The maximum code size expansion factor when copying basic blocks
5573instead of jumping. The expansion is relative to a jump instruction.
5574The default value is 8.
5575.IP "\fBmax-goto-duplication-insns\fR" 4
5576.IX Item "max-goto-duplication-insns"
5577The maximum number of instructions to duplicate to a block that jumps
5578to a computed goto. To avoid O(N^2) behavior in a number of
5579passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
5580and unfactors them as late as possible. Only computed jumps at the
5581end of a basic blocks with no more than max-goto-duplication-insns are
5582unfactored. The default value is 8.
5583.IP "\fBmax-delay-slot-insn-search\fR" 4
5584.IX Item "max-delay-slot-insn-search"
5585The maximum number of instructions to consider when looking for an
5586instruction to fill a delay slot. If more than this arbitrary number of
5587instructions is searched, the time savings from filling the delay slot
5588will be minimal so stop searching. Increasing values mean more
5589aggressive optimization, making the compile time increase with probably
5590small improvement in executable run time.
5591.IP "\fBmax-delay-slot-live-search\fR" 4
5592.IX Item "max-delay-slot-live-search"
5593When trying to fill delay slots, the maximum number of instructions to
5594consider when searching for a block with valid live register
5595information. Increasing this arbitrarily chosen value means more
5596aggressive optimization, increasing the compile time. This parameter
5597should be removed when the delay slot code is rewritten to maintain the
5598control-flow graph.
5599.IP "\fBmax-gcse-memory\fR" 4
5600.IX Item "max-gcse-memory"
5601The approximate maximum amount of memory that will be allocated in
5602order to perform the global common subexpression elimination
5603optimization. If more memory than specified is required, the
5604optimization will not be done.
5605.IP "\fBmax-gcse-passes\fR" 4
5606.IX Item "max-gcse-passes"
5607The maximum number of passes of \s-1GCSE\s0 to run. The default is 1.
5608.IP "\fBmax-pending-list-length\fR" 4
5609.IX Item "max-pending-list-length"
5610The maximum number of pending dependencies scheduling will allow
5611before flushing the current state and starting over. Large functions
5612with few branches or calls can create excessively large lists which
5613needlessly consume memory and resources.
5614.IP "\fBmax-inline-insns-single\fR" 4
5615.IX Item "max-inline-insns-single"
5616Several parameters control the tree inliner used in gcc.
5617This number sets the maximum number of instructions (counted in \s-1GCC\s0's
5618internal representation) in a single function that the tree inliner
5619will consider for inlining. This only affects functions declared
5620inline and methods implemented in a class declaration (\*(C+).
5621The default value is 450.
5622.IP "\fBmax-inline-insns-auto\fR" 4
5623.IX Item "max-inline-insns-auto"
5624When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
5625a lot of functions that would otherwise not be considered for inlining
5626by the compiler will be investigated. To those functions, a different
5627(more restrictive) limit compared to functions declared inline can
5628be applied.
5629The default value is 90.
5630.IP "\fBlarge-function-insns\fR" 4
5631.IX Item "large-function-insns"
5632The limit specifying really large functions. For functions larger than this
5633limit after inlining inlining is constrained by
5634\&\fB\-\-param large-function-growth\fR. This parameter is useful primarily
5635to avoid extreme compilation time caused by non-linear algorithms used by the
5636backend.
5637This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
5638The default value is 2700.
5639.IP "\fBlarge-function-growth\fR" 4
5640.IX Item "large-function-growth"
5641Specifies maximal growth of large function caused by inlining in percents.
5642This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
5643The default value is 100 which limits large function growth to 2.0 times
5644the original size.
5645.IP "\fBlarge-unit-insns\fR" 4
5646.IX Item "large-unit-insns"
5647The limit specifying large translation unit. Growth caused by inlining of
5648units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
5649For small units this might be too tight (consider unit consisting of function A
5650that is inline and B that just calls A three time. If B is small relative to
5651A, the growth of unit is 300\e% and yet such inlining is very sane. For very
5652large units consisting of small inlininable functions however the overall unit
5653growth limit is needed to avoid exponential explosion of code size. Thus for
5654smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
5655before applying \fB\-\-param inline-unit-growth\fR. The default is 10000
5656.IP "\fBinline-unit-growth\fR" 4
5657.IX Item "inline-unit-growth"
5658Specifies maximal overall growth of the compilation unit caused by inlining.
5659This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
5660The default value is 50 which limits unit growth to 1.5 times the original
5661size.
5662.IP "\fBmax-inline-insns-recursive\fR" 4
5663.IX Item "max-inline-insns-recursive"
5664.PD 0
5665.IP "\fBmax-inline-insns-recursive-auto\fR" 4
5666.IX Item "max-inline-insns-recursive-auto"
5667.PD
5668Specifies maximum number of instructions out-of-line copy of self recursive inline
5669function can grow into by performing recursive inlining.
5670.Sp
5671For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
5672taken into account. For function not declared inline, recursive inlining
5673happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
5674enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used. The
5675default value is 450.
5676.IP "\fBmax-inline-recursive-depth\fR" 4
5677.IX Item "max-inline-recursive-depth"
5678.PD 0
5679.IP "\fBmax-inline-recursive-depth-auto\fR" 4
5680.IX Item "max-inline-recursive-depth-auto"
5681.PD
5682Specifies maximum recursion depth used by the recursive inlining.
5683.Sp
5684For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
5685taken into account. For function not declared inline, recursive inlining
5686happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
5687enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used. The
5688default value is 450.
5689.IP "\fBmin-inline-recursive-probability\fR" 4
5690.IX Item "min-inline-recursive-probability"
5691Recursive inlining is profitable only for function having deep recursion
5692in average and can hurt for function having little recursion depth by
5693increasing the prologue size or complexity of function body to other
5694optimizers.
5695.Sp
5696When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
5697recursion depth can be guessed from probability that function will recurse via
5698given call expression. This parameter limits inlining only to call expression
5699whose probability exceeds given threshold (in percents). The default value is
570010.
5701.IP "\fBinline-call-cost\fR" 4
5702.IX Item "inline-call-cost"
5703Specify cost of call instruction relative to simple arithmetics operations
5704(having cost of 1). Increasing this cost disqualifies inlining of non-leaf
5705functions and at the same time increases size of leaf function that is believed to
5706reduce function size by being inlined. In effect it increases amount of
5707inlining for code having large abstraction penalty (many functions that just
5708pass the arguments to other functions) and decrease inlining for code with low
5709abstraction penalty. The default value is 16.
5710.IP "\fBmax-unrolled-insns\fR" 4
5711.IX Item "max-unrolled-insns"
5712The maximum number of instructions that a loop should have if that loop
5713is unrolled, and if the loop is unrolled, it determines how many times
5714the loop code is unrolled.
5715.IP "\fBmax-average-unrolled-insns\fR" 4
5716.IX Item "max-average-unrolled-insns"
5717The maximum number of instructions biased by probabilities of their execution
5718that a loop should have if that loop is unrolled, and if the loop is unrolled,
5719it determines how many times the loop code is unrolled.
5720.IP "\fBmax-unroll-times\fR" 4
5721.IX Item "max-unroll-times"
5722The maximum number of unrollings of a single loop.
5723.IP "\fBmax-peeled-insns\fR" 4
5724.IX Item "max-peeled-insns"
5725The maximum number of instructions that a loop should have if that loop
5726is peeled, and if the loop is peeled, it determines how many times
5727the loop code is peeled.
5728.IP "\fBmax-peel-times\fR" 4
5729.IX Item "max-peel-times"
5730The maximum number of peelings of a single loop.
5731.IP "\fBmax-completely-peeled-insns\fR" 4
5732.IX Item "max-completely-peeled-insns"
5733The maximum number of insns of a completely peeled loop.
5734.IP "\fBmax-completely-peel-times\fR" 4
5735.IX Item "max-completely-peel-times"
5736The maximum number of iterations of a loop to be suitable for complete peeling.
5737.IP "\fBmax-unswitch-insns\fR" 4
5738.IX Item "max-unswitch-insns"
5739The maximum number of insns of an unswitched loop.
5740.IP "\fBmax-unswitch-level\fR" 4
5741.IX Item "max-unswitch-level"
5742The maximum number of branches unswitched in a single loop.
5743.IP "\fBlim-expensive\fR" 4
5744.IX Item "lim-expensive"
5745The minimum cost of an expensive expression in the loop invariant motion.
5746.IP "\fBiv-consider-all-candidates-bound\fR" 4
5747.IX Item "iv-consider-all-candidates-bound"
5748Bound on number of candidates for induction variables below that
5749all candidates are considered for each use in induction variable
5750optimizations. Only the most relevant candidates are considered
5751if there are more candidates, to avoid quadratic time complexity.
5752.IP "\fBiv-max-considered-uses\fR" 4
5753.IX Item "iv-max-considered-uses"
5754The induction variable optimizations give up on loops that contain more
5755induction variable uses.
5756.IP "\fBiv-always-prune-cand-set-bound\fR" 4
5757.IX Item "iv-always-prune-cand-set-bound"
5758If number of candidates in the set is smaller than this value,
5759we always try to remove unnecessary ivs from the set during its
5760optimization when a new iv is added to the set.
5761.IP "\fBscev-max-expr-size\fR" 4
5762.IX Item "scev-max-expr-size"
5763Bound on size of expressions used in the scalar evolutions analyzer.
5764Large expressions slow the analyzer.
5765.IP "\fBvect-max-version-checks\fR" 4
5766.IX Item "vect-max-version-checks"
5767The maximum number of runtime checks that can be performed when doing
5768loop versioning in the vectorizer. See option ftree-vect-loop-version
5769for more information.
5770.IP "\fBmax-iterations-to-track\fR" 4
5771.IX Item "max-iterations-to-track"
5772The maximum number of iterations of a loop the brute force algorithm
5773for analysis of # of iterations of the loop tries to evaluate.
5774.IP "\fBhot-bb-count-fraction\fR" 4
5775.IX Item "hot-bb-count-fraction"
5776Select fraction of the maximal count of repetitions of basic block in program
5777given basic block needs to have to be considered hot.
5778.IP "\fBhot-bb-frequency-fraction\fR" 4
5779.IX Item "hot-bb-frequency-fraction"
5780Select fraction of the maximal frequency of executions of basic block in
5781function given basic block needs to have to be considered hot
5782.IP "\fBmax-predicted-iterations\fR" 4
5783.IX Item "max-predicted-iterations"
5784The maximum number of loop iterations we predict statically. This is useful
5785in cases where function contain single loop with known bound and other loop
5786with unknown. We predict the known number of iterations correctly, while
5787the unknown number of iterations average to roughly 10. This means that the
5788loop without bounds would appear artificially cold relative to the other one.
5789.IP "\fBtracer-dynamic-coverage\fR" 4
5790.IX Item "tracer-dynamic-coverage"
5791.PD 0
5792.IP "\fBtracer-dynamic-coverage-feedback\fR" 4
5793.IX Item "tracer-dynamic-coverage-feedback"
5794.PD
5795This value is used to limit superblock formation once the given percentage of
5796executed instructions is covered. This limits unnecessary code size
5797expansion.
5798.Sp
5799The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
5800feedback is available. The real profiles (as opposed to statically estimated
5801ones) are much less balanced allowing the threshold to be larger value.
5802.IP "\fBtracer-max-code-growth\fR" 4
5803.IX Item "tracer-max-code-growth"
5804Stop tail duplication once code growth has reached given percentage. This is
5805rather hokey argument, as most of the duplicates will be eliminated later in
5806cross jumping, so it may be set to much higher values than is the desired code
5807growth.
5808.IP "\fBtracer-min-branch-ratio\fR" 4
5809.IX Item "tracer-min-branch-ratio"
5810Stop reverse growth when the reverse probability of best edge is less than this
5811threshold (in percent).
5812.IP "\fBtracer-min-branch-ratio\fR" 4
5813.IX Item "tracer-min-branch-ratio"
5814.PD 0
5815.IP "\fBtracer-min-branch-ratio-feedback\fR" 4
5816.IX Item "tracer-min-branch-ratio-feedback"
5817.PD
5818Stop forward growth if the best edge do have probability lower than this
5819threshold.
5820.Sp
5821Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
5822compilation for profile feedback and one for compilation without. The value
5823for compilation with profile feedback needs to be more conservative (higher) in
5824order to make tracer effective.
5825.IP "\fBmax-cse-path-length\fR" 4
5826.IX Item "max-cse-path-length"
5827Maximum number of basic blocks on path that cse considers. The default is 10.
5828.IP "\fBmax-cse-insns\fR" 4
5829.IX Item "max-cse-insns"
5830The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
5831.IP "\fBglobal-var-threshold\fR" 4
5832.IX Item "global-var-threshold"
5833Counts the number of function calls (\fIn\fR) and the number of
5834call-clobbered variables (\fIv\fR). If \fIn\fRx\fIv\fR is larger than this limit, a
5835single artificial variable will be created to represent all the
5836call-clobbered variables at function call sites. This artificial
5837variable will then be made to alias every call-clobbered variable.
5838(done as \f(CW\*(C`int * size_t\*(C'\fR on the host machine; beware overflow).
5839.IP "\fBmax-aliased-vops\fR" 4
5840.IX Item "max-aliased-vops"
5841Maximum number of virtual operands allowed to represent aliases
5842before triggering the alias grouping heuristic. Alias grouping
5843reduces compile times and memory consumption needed for aliasing at
5844the expense of precision loss in alias information.
5845.IP "\fBggc-min-expand\fR" 4
5846.IX Item "ggc-min-expand"
5847\&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This
5848parameter specifies the minimum percentage by which the garbage
5849collector's heap should be allowed to expand between collections.
5850Tuning this may improve compilation speed; it has no effect on code
5851generation.
5852.Sp
5853The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
5854\&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
5855the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR. If
5856\&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
5857bound of 30% is used. Setting this parameter and
5858\&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
5859every opportunity. This is extremely slow, but can be useful for
5860debugging.
5861.IP "\fBggc-min-heapsize\fR" 4
5862.IX Item "ggc-min-heapsize"
5863Minimum size of the garbage collector's heap before it begins bothering
5864to collect garbage. The first collection occurs after the heap expands
5865by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again,
5866tuning this may improve compilation speed, and has no effect on code
5867generation.
5868.Sp
5869The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
5870tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
5871with a lower bound of 4096 (four megabytes) and an upper bound of
5872131072 (128 megabytes). If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
5873particular platform, the lower bound is used. Setting this parameter
5874very large effectively disables garbage collection. Setting this
5875parameter and \fBggc-min-expand\fR to zero causes a full collection
5876to occur at every opportunity.
5877.IP "\fBmax-reload-search-insns\fR" 4
5878.IX Item "max-reload-search-insns"
5879The maximum number of instruction reload should look backward for equivalent
5880register. Increasing values mean more aggressive optimization, making the
5881compile time increase with probably slightly better performance. The default
5882value is 100.
5883.IP "\fBmax-cselib-memory-locations\fR" 4
5884.IX Item "max-cselib-memory-locations"
5885The maximum number of memory locations cselib should take into account.
5886Increasing values mean more aggressive optimization, making the compile time
5887increase with probably slightly better performance. The default value is 500.
5888.IP "\fBmax-flow-memory-locations\fR" 4
5889.IX Item "max-flow-memory-locations"
5890Similar as \fBmax-cselib-memory-locations\fR but for dataflow liveness.
5891The default value is 100.
5892.IP "\fBreorder-blocks-duplicate\fR" 4
5893.IX Item "reorder-blocks-duplicate"
5894.PD 0
5895.IP "\fBreorder-blocks-duplicate-feedback\fR" 4
5896.IX Item "reorder-blocks-duplicate-feedback"
5897.PD
5898Used by basic block reordering pass to decide whether to use unconditional
5899branch or duplicate the code on its destination. Code is duplicated when its
5900estimated size is smaller than this value multiplied by the estimated size of
5901unconditional jump in the hot spots of the program.
5902.Sp
5903The \fBreorder-block-duplicate-feedback\fR is used only when profile
5904feedback is available and may be set to higher values than
5905\&\fBreorder-block-duplicate\fR since information about the hot spots is more
5906accurate.
5907.IP "\fBmax-sched-ready-insns\fR" 4
5908.IX Item "max-sched-ready-insns"
5909The maximum number of instructions ready to be issued the scheduler should
5910consider at any given time during the first scheduling pass. Increasing
5911values mean more thorough searches, making the compilation time increase
5912with probably little benefit. The default value is 100.
5913.IP "\fBmax-sched-region-blocks\fR" 4
5914.IX Item "max-sched-region-blocks"
5915The maximum number of blocks in a region to be considered for
5916interblock scheduling. The default value is 10.
5917.IP "\fBmax-sched-region-insns\fR" 4
5918.IX Item "max-sched-region-insns"
5919The maximum number of insns in a region to be considered for
5920interblock scheduling. The default value is 100.
5921.IP "\fBmin-spec-prob\fR" 4
5922.IX Item "min-spec-prob"
5923The minimum probability (in percents) of reaching a source block
5924for interblock speculative scheduling. The default value is 40.
5925.IP "\fBmax-sched-extend-regions-iters\fR" 4
5926.IX Item "max-sched-extend-regions-iters"
5927The maximum number of iterations through \s-1CFG\s0 to extend regions.
59280 \- disable region extension,
5929N \- do at most N iterations.
5930The default value is 0.
5931.IP "\fBmax-sched-insn-conflict-delay\fR" 4
5932.IX Item "max-sched-insn-conflict-delay"
5933The maximum conflict delay for an insn to be considered for speculative motion.
5934The default value is 3.
5935.IP "\fBsched-spec-prob-cutoff\fR" 4
5936.IX Item "sched-spec-prob-cutoff"
5937The minimal probability of speculation success (in percents), so that
5938speculative insn will be scheduled.
5939The default value is 40.
5940.IP "\fBmax-last-value-rtl\fR" 4
5941.IX Item "max-last-value-rtl"
5942The maximum size measured as number of RTLs that can be recorded in an expression
5943in combiner for a pseudo register as last known value of that register. The default
5944is 10000.
5945.IP "\fBinteger-share-limit\fR" 4
5946.IX Item "integer-share-limit"
5947Small integer constants can use a shared data structure, reducing the
5948compiler's memory usage and increasing its speed. This sets the maximum
5949value of a shared integer constant's. The default value is 256.
5950.IP "\fBmin-virtual-mappings\fR" 4
5951.IX Item "min-virtual-mappings"
5952Specifies the minimum number of virtual mappings in the incremental
5953\&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
5954heuristic defined by virtual\-mappings\-ratio. The default value is
5955100.
5956.IP "\fBvirtual-mappings-ratio\fR" 4
5957.IX Item "virtual-mappings-ratio"
5958If the number of virtual mappings is virtual-mappings-ratio bigger
5959than the number of virtual symbols to be updated, then the incremental
5960\&\s-1SSA\s0 updater switches to a full update for those symbols. The default
5961ratio is 3.
5962.IP "\fBssp-buffer-size\fR" 4
5963.IX Item "ssp-buffer-size"
5964The minimum size of buffers (i.e. arrays) that will receive stack smashing
5965protection when \fB\-fstack\-protection\fR is used.
5966.IP "\fBmax-jump-thread-duplication-stmts\fR" 4
5967.IX Item "max-jump-thread-duplication-stmts"
5968Maximum number of statements allowed in a block that needs to be
5969duplicated when threading jumps.
5970.IP "\fBmax-fields-for-field-sensitive\fR" 4
5971.IX Item "max-fields-for-field-sensitive"
5972Maximum number of fields in a structure we will treat in
5973a field sensitive manner during pointer analysis.
5974.RE
5975.RS 4
5976.RE
5977.Sh "Options Controlling the Preprocessor"
5978.IX Subsection "Options Controlling the Preprocessor"
5979These options control the C preprocessor, which is run on each C source
5980file before actual compilation.
5981.PP
5982If you use the \fB\-E\fR option, nothing is done except preprocessing.
5983Some of these options make sense only together with \fB\-E\fR because
5984they cause the preprocessor output to be unsuitable for actual
5985compilation.
5986.Sp
5987.RS 4
5988You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
5989and pass \fIoption\fR directly through to the preprocessor. If
5990\&\fIoption\fR contains commas, it is split into multiple options at the
5991commas. However, many options are modified, translated or interpreted
5992by the compiler driver before being passed to the preprocessor, and
5993\&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct
5994interface is undocumented and subject to change, so whenever possible
5995you should avoid using \fB\-Wp\fR and let the driver handle the
5996options instead.
5997.RE
5998.IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
5999.IX Item "-Xpreprocessor option"
6000Pass \fIoption\fR as an option to the preprocessor. You can use this to
6001supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
6002recognize.
6003.Sp
6004If you want to pass an option that takes an argument, you must use
6005\&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
6006.IP "\fB\-D\fR \fIname\fR" 4
6007.IX Item "-D name"
6008Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
6009.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
6010.IX Item "-D name=definition"
6011The contents of \fIdefinition\fR are tokenized and processed as if
6012they appeared during translation phase three in a \fB#define\fR
6013directive. In particular, the definition will be truncated by
6014embedded newline characters.
6015.Sp
6016If you are invoking the preprocessor from a shell or shell-like
6017program you may need to use the shell's quoting syntax to protect
6018characters such as spaces that have a meaning in the shell syntax.
6019.Sp
6020If you wish to define a function-like macro on the command line, write
6021its argument list with surrounding parentheses before the equals sign
6022(if any). Parentheses are meaningful to most shells, so you will need
6023to quote the option. With \fBsh\fR and \fBcsh\fR,
6024\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
6025.Sp
6026\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
6027are given on the command line. All \fB\-imacros\fR \fIfile\fR and
6028\&\fB\-include\fR \fIfile\fR options are processed after all
6029\&\fB\-D\fR and \fB\-U\fR options.
6030.IP "\fB\-U\fR \fIname\fR" 4
6031.IX Item "-U name"
6032Cancel any previous definition of \fIname\fR, either built in or
6033provided with a \fB\-D\fR option.
6034.IP "\fB\-undef\fR" 4
6035.IX Item "-undef"
6036Do not predefine any system-specific or GCC-specific macros. The
6037standard predefined macros remain defined.
6038.IP "\fB\-I\fR \fIdir\fR" 4
6039.IX Item "-I dir"
6040Add the directory \fIdir\fR to the list of directories to be searched
6041for header files.
6042Directories named by \fB\-I\fR are searched before the standard
6043system include directories. If the directory \fIdir\fR is a standard
6044system include directory, the option is ignored to ensure that the
6045default search order for system directories and the special treatment
6046of system headers are not defeated
6047\&.
6048.IP "\fB\-o\fR \fIfile\fR" 4
6049.IX Item "-o file"
6050Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
6051as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
6052different interpretation of a second non-option argument, so you must
6053use \fB\-o\fR to specify the output file.
6054.IP "\fB\-Wall\fR" 4
6055.IX Item "-Wall"
6056Turns on all optional warnings which are desirable for normal code.
6057At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
6058\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
6059change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
6060preprocessor's warnings are on by default and have no options to
6061control them.
6062.IP "\fB\-Wcomment\fR" 4
6063.IX Item "-Wcomment"
6064.PD 0
6065.IP "\fB\-Wcomments\fR" 4
6066.IX Item "-Wcomments"
6067.PD
6068Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
6069comment, or whenever a backslash-newline appears in a \fB//\fR comment.
6070(Both forms have the same effect.)
6071.IP "\fB\-Wtrigraphs\fR" 4
6072.IX Item "-Wtrigraphs"
6073Most trigraphs in comments cannot affect the meaning of the program.
6074However, a trigraph that would form an escaped newline (\fB??/\fR at
6075the end of a line) can, by changing where the comment begins or ends.
6076Therefore, only trigraphs that would form escaped newlines produce
6077warnings inside a comment.
6078.Sp
6079This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
6080given, this option is still enabled unless trigraphs are enabled. To
6081get trigraph conversion without warnings, but get the other
6082\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
6083.IP "\fB\-Wtraditional\fR" 4
6084.IX Item "-Wtraditional"
6085Warn about certain constructs that behave differently in traditional and
6086\&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
6087equivalent, and problematic constructs which should be avoided.
6088.IP "\fB\-Wimport\fR" 4
6089.IX Item "-Wimport"
6090Warn the first time \fB#import\fR is used.
6091.IP "\fB\-Wundef\fR" 4
6092.IX Item "-Wundef"
6093Warn whenever an identifier which is not a macro is encountered in an
6094\&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
6095replaced with zero.
6096.IP "\fB\-Wunused\-macros\fR" 4
6097.IX Item "-Wunused-macros"
6098Warn about macros defined in the main file that are unused. A macro
6099is \fIused\fR if it is expanded or tested for existence at least once.
6100The preprocessor will also warn if the macro has not been used at the
6101time it is redefined or undefined.
6102.Sp
6103Built-in macros, macros defined on the command line, and macros
6104defined in include files are not warned about.
6105.Sp
6106\&\fINote:\fR If a macro is actually used, but only used in skipped
6107conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
6108warning in such a case, you might improve the scope of the macro's
6109definition by, for example, moving it into the first skipped block.
6110Alternatively, you could provide a dummy use with something like:
6111.Sp
6112.Vb 2
6113\& #if defined the_macro_causing_the_warning
6114\& #endif
6115.Ve
6116.IP "\fB\-Wendif\-labels\fR" 4
6117.IX Item "-Wendif-labels"
6118Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
6119This usually happens in code of the form
6120.Sp
6121.Vb 5
6122\& #if FOO
6123\& ...
6124\& #else FOO
6125\& ...
6126\& #endif FOO
6127.Ve
6128.Sp
6129The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
6130in older programs. This warning is on by default.
6131.IP "\fB\-Werror\fR" 4
6132.IX Item "-Werror"
6133Make all warnings into hard errors. Source code which triggers warnings
6134will be rejected.
6135.IP "\fB\-Wsystem\-headers\fR" 4
6136.IX Item "-Wsystem-headers"
6137Issue warnings for code in system headers. These are normally unhelpful
6138in finding bugs in your own code, therefore suppressed. If you are
6139responsible for the system library, you may want to see them.
6140.IP "\fB\-w\fR" 4
6141.IX Item "-w"
6142Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
6143.IP "\fB\-pedantic\fR" 4
6144.IX Item "-pedantic"
6145Issue all the mandatory diagnostics listed in the C standard. Some of
6146them are left out by default, since they trigger frequently on harmless
6147code.
6148.IP "\fB\-pedantic\-errors\fR" 4
6149.IX Item "-pedantic-errors"
6150Issue all the mandatory diagnostics, and make all mandatory diagnostics
6151into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
6152without \fB\-pedantic\fR but treats as warnings.
6153.IP "\fB\-M\fR" 4
6154.IX Item "-M"
6155Instead of outputting the result of preprocessing, output a rule
6156suitable for \fBmake\fR describing the dependencies of the main
6157source file. The preprocessor outputs one \fBmake\fR rule containing
6158the object file name for that source file, a colon, and the names of all
6159the included files, including those coming from \fB\-include\fR or
6160\&\fB\-imacros\fR command line options.
6161.Sp
6162Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
6163object file name consists of the basename of the source file with any
6164suffix replaced with object file suffix. If there are many included
6165files then the rule is split into several lines using \fB\e\fR\-newline.
6166The rule has no commands.
6167.Sp
6168This option does not suppress the preprocessor's debug output, such as
6169\&\fB\-dM\fR. To avoid mixing such debug output with the dependency
6170rules you should explicitly specify the dependency output file with
6171\&\fB\-MF\fR, or use an environment variable like
6172\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
6173will still be sent to the regular output stream as normal.
6174.Sp
6175Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
6176warnings with an implicit \fB\-w\fR.
6177.IP "\fB\-MM\fR" 4
6178.IX Item "-MM"
6179Like \fB\-M\fR but do not mention header files that are found in
6180system header directories, nor header files that are included,
6181directly or indirectly, from such a header.
6182.Sp
6183This implies that the choice of angle brackets or double quotes in an
6184\&\fB#include\fR directive does not in itself determine whether that
6185header will appear in \fB\-MM\fR dependency output. This is a
6186slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
6187.IP "\fB\-MF\fR \fIfile\fR" 4
6188.IX Item "-MF file"
6189When used with \fB\-M\fR or \fB\-MM\fR, specifies a
6190file to write the dependencies to. If no \fB\-MF\fR switch is given
6191the preprocessor sends the rules to the same place it would have sent
6192preprocessed output.
6193.Sp
6194When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
6195\&\fB\-MF\fR overrides the default dependency output file.
6196.IP "\fB\-MG\fR" 4
6197.IX Item "-MG"
6198In conjunction with an option such as \fB\-M\fR requesting
6199dependency generation, \fB\-MG\fR assumes missing header files are
6200generated files and adds them to the dependency list without raising
6201an error. The dependency filename is taken directly from the
6202\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
6203also suppresses preprocessed output, as a missing header file renders
6204this useless.
6205.Sp
6206This feature is used in automatic updating of makefiles.
6207.IP "\fB\-MP\fR" 4
6208.IX Item "-MP"
6209This option instructs \s-1CPP\s0 to add a phony target for each dependency
6210other than the main file, causing each to depend on nothing. These
6211dummy rules work around errors \fBmake\fR gives if you remove header
6212files without updating the \fIMakefile\fR to match.
6213.Sp
6214This is typical output:
6215.Sp
6216.Vb 1
6217\& test.o: test.c test.h
6218.Ve
6219.Sp
6220.Vb 1
6221\& test.h:
6222.Ve
6223.IP "\fB\-MT\fR \fItarget\fR" 4
6224.IX Item "-MT target"
6225Change the target of the rule emitted by dependency generation. By
6226default \s-1CPP\s0 takes the name of the main input file, including any path,
6227deletes any file suffix such as \fB.c\fR, and appends the platform's
6228usual object suffix. The result is the target.
6229.Sp
6230An \fB\-MT\fR option will set the target to be exactly the string you
6231specify. If you want multiple targets, you can specify them as a single
6232argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
6233.Sp
6234For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
6235.Sp
6236.Vb 1
6237\& $(objpfx)foo.o: foo.c
6238.Ve
6239.IP "\fB\-MQ\fR \fItarget\fR" 4
6240.IX Item "-MQ target"
6241Same as \fB\-MT\fR, but it quotes any characters which are special to
6242Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
6243.Sp
6244.Vb 1
6245\& $$(objpfx)foo.o: foo.c
6246.Ve
6247.Sp
6248The default target is automatically quoted, as if it were given with
6249\&\fB\-MQ\fR.
6250.IP "\fB\-MD\fR" 4
6251.IX Item "-MD"
6252\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
6253\&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
6254whether an \fB\-o\fR option is given. If it is, the driver uses its
6255argument but with a suffix of \fI.d\fR, otherwise it take the
6256basename of the input file and applies a \fI.d\fR suffix.
6257.Sp
6258If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
6259\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
6260is understood to specify a target object file.
6261.Sp
6262Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
6263a dependency output file as a side-effect of the compilation process.
6264.IP "\fB\-MMD\fR" 4
6265.IX Item "-MMD"
6266Like \fB\-MD\fR except mention only user header files, not system
6267header files.
6268.IP "\fB\-fpch\-deps\fR" 4
6269.IX Item "-fpch-deps"
6270When using precompiled headers, this flag
6271will cause the dependency-output flags to also list the files from the
6272precompiled header's dependencies. If not specified only the
6273precompiled header would be listed and not the files that were used to
6274create it because those files are not consulted when a precompiled
6275header is used.
6276.IP "\fB\-fpch\-preprocess\fR" 4
6277.IX Item "-fpch-preprocess"
6278This option allows use of a precompiled header together with \fB\-E\fR. It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
6279\&\f(CW\*(C`#pragma GCC pch_preprocess "<filename>"\*(C'\fR in the output to mark
6280the place where the precompiled header was found, and its filename. When
6281\&\fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR and
6282loads the \s-1PCH\s0.
6283.Sp
6284This option is off by default, because the resulting preprocessed output
6285is only really suitable as input to \s-1GCC\s0. It is switched on by
6286\&\fB\-save\-temps\fR.
6287.Sp
6288You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
6289safe to edit the filename if the \s-1PCH\s0 file is available in a different
6290location. The filename may be absolute or it may be relative to \s-1GCC\s0's
6291current directory.
6292.IP "\fB\-x c\fR" 4
6293.IX Item "-x c"
6294.PD 0
6295.IP "\fB\-x c++\fR" 4
6296.IX Item "-x c++"
6297.IP "\fB\-x objective-c\fR" 4
6298.IX Item "-x objective-c"
6299.IP "\fB\-x assembler-with-cpp\fR" 4
6300.IX Item "-x assembler-with-cpp"
6301.PD
6302Specify the source language: C, \*(C+, Objective\-C, or assembly. This has
6303nothing to do with standards conformance or extensions; it merely
6304selects which base syntax to expect. If you give none of these options,
6305cpp will deduce the language from the extension of the source file:
6306\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
6307extensions for \*(C+ and assembly are also recognized. If cpp does not
6308recognize the extension, it will treat the file as C; this is the most
6309generic mode.
6310.Sp
6311\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
6312which selected both the language and the standards conformance level.
6313This option has been removed, because it conflicts with the \fB\-l\fR
6314option.
6315.IP "\fB\-std=\fR\fIstandard\fR" 4
6316.IX Item "-std=standard"
6317.PD 0
6318.IP "\fB\-ansi\fR" 4
6319.IX Item "-ansi"
6320.PD
6321Specify the standard to which the code should conform. Currently \s-1CPP\s0
6322knows about C and \*(C+ standards; others may be added in the future.
6323.Sp
6324\&\fIstandard\fR
6325may be one of:
6326.RS 4
6327.ie n .IP """iso9899:1990""" 4
6328.el .IP "\f(CWiso9899:1990\fR" 4
6329.IX Item "iso9899:1990"
6330.PD 0
6331.ie n .IP """c89""" 4
6332.el .IP "\f(CWc89\fR" 4
6333.IX Item "c89"
6334.PD
6335The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
6336this version of the standard.
6337.Sp
6338The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
6339.ie n .IP """iso9899:199409""" 4
6340.el .IP "\f(CWiso9899:199409\fR" 4
6341.IX Item "iso9899:199409"
6342The 1990 C standard, as amended in 1994.
6343.ie n .IP """iso9899:1999""" 4
6344.el .IP "\f(CWiso9899:1999\fR" 4
6345.IX Item "iso9899:1999"
6346.PD 0
6347.ie n .IP """c99""" 4
6348.el .IP "\f(CWc99\fR" 4
6349.IX Item "c99"
6350.ie n .IP """iso9899:199x""" 4
6351.el .IP "\f(CWiso9899:199x\fR" 4
6352.IX Item "iso9899:199x"
6353.ie n .IP """c9x""" 4
6354.el .IP "\f(CWc9x\fR" 4
6355.IX Item "c9x"
6356.PD
6357The revised \s-1ISO\s0 C standard, published in December 1999. Before
6358publication, this was known as C9X.
6359.ie n .IP """gnu89""" 4
6360.el .IP "\f(CWgnu89\fR" 4
6361.IX Item "gnu89"
6362The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
6363.ie n .IP """gnu99""" 4
6364.el .IP "\f(CWgnu99\fR" 4
6365.IX Item "gnu99"
6366.PD 0
6367.ie n .IP """gnu9x""" 4
6368.el .IP "\f(CWgnu9x\fR" 4
6369.IX Item "gnu9x"
6370.PD
6371The 1999 C standard plus \s-1GNU\s0 extensions.
6372.ie n .IP """c++98""" 4
6373.el .IP "\f(CWc++98\fR" 4
6374.IX Item "c++98"
6375The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
6376.ie n .IP """gnu++98""" 4
6377.el .IP "\f(CWgnu++98\fR" 4
6378.IX Item "gnu++98"
6379The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
6380default for \*(C+ code.
6381.RE
6382.RS 4
6383.RE
6384.IP "\fB\-I\-\fR" 4
6385.IX Item "-I-"
6386Split the include path. Any directories specified with \fB\-I\fR
6387options before \fB\-I\-\fR are searched only for headers requested with
6388\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
6389\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
6390specified with \fB\-I\fR options after the \fB\-I\-\fR, those
6391directories are searched for all \fB#include\fR directives.
6392.Sp
6393In addition, \fB\-I\-\fR inhibits the use of the directory of the current
6394file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
6395This option has been deprecated.
6396.IP "\fB\-nostdinc\fR" 4
6397.IX Item "-nostdinc"
6398Do not search the standard system directories for header files.
6399Only the directories you have specified with \fB\-I\fR options
6400(and the directory of the current file, if appropriate) are searched.
6401.IP "\fB\-nostdinc++\fR" 4
6402.IX Item "-nostdinc++"
6403Do not search for header files in the \*(C+\-specific standard directories,
6404but do still search the other standard directories. (This option is
6405used when building the \*(C+ library.)
6406.IP "\fB\-include\fR \fIfile\fR" 4
6407.IX Item "-include file"
6408Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
6409line of the primary source file. However, the first directory searched
6410for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
6411the directory containing the main source file. If not found there, it
6412is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
6413chain as normal.
6414.Sp
6415If multiple \fB\-include\fR options are given, the files are included
6416in the order they appear on the command line.
6417.IP "\fB\-imacros\fR \fIfile\fR" 4
6418.IX Item "-imacros file"
6419Exactly like \fB\-include\fR, except that any output produced by
6420scanning \fIfile\fR is thrown away. Macros it defines remain defined.
6421This allows you to acquire all the macros from a header without also
6422processing its declarations.
6423.Sp
6424All files specified by \fB\-imacros\fR are processed before all files
6425specified by \fB\-include\fR.
6426.IP "\fB\-idirafter\fR \fIdir\fR" 4
6427.IX Item "-idirafter dir"
6428Search \fIdir\fR for header files, but do it \fIafter\fR all
6429directories specified with \fB\-I\fR and the standard system directories
6430have been exhausted. \fIdir\fR is treated as a system include directory.
6431.IP "\fB\-iprefix\fR \fIprefix\fR" 4
6432.IX Item "-iprefix prefix"
6433Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
6434options. If the prefix represents a directory, you should include the
6435final \fB/\fR.
6436.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
6437.IX Item "-iwithprefix dir"
6438.PD 0
6439.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
6440.IX Item "-iwithprefixbefore dir"
6441.PD
6442Append \fIdir\fR to the prefix specified previously with
6443\&\fB\-iprefix\fR, and add the resulting directory to the include search
6444path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
6445would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
6446.IP "\fB\-isysroot\fR \fIdir\fR" 4
6447.IX Item "-isysroot dir"
6448This option is like the \fB\-\-sysroot\fR option, but applies only to
6449header files. See the \fB\-\-sysroot\fR option for more information.
6450.IP "\fB\-imultilib\fR \fIdir\fR" 4
6451.IX Item "-imultilib dir"
6452Use \fIdir\fR as a subdirectory of the directory containing
6453target-specific \*(C+ headers.
6454.IP "\fB\-isystem\fR \fIdir\fR" 4
6455.IX Item "-isystem dir"
6456Search \fIdir\fR for header files, after all directories specified by
6457\&\fB\-I\fR but before the standard system directories. Mark it
6458as a system directory, so that it gets the same special treatment as
6459is applied to the standard system directories.
6460.IP "\fB\-iquote\fR \fIdir\fR" 4
6461.IX Item "-iquote dir"
6462Search \fIdir\fR only for header files requested with
6463\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
6464\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
6465\&\fB\-I\fR and before the standard system directories.
6466.IP "\fB\-fdollars\-in\-identifiers\fR" 4
6467.IX Item "-fdollars-in-identifiers"
6468Accept \fB$\fR in identifiers.
6469.IP "\fB\-fextended\-identifiers\fR" 4
6470.IX Item "-fextended-identifiers"
6471Accept universal character names in identifiers. This option is
6472experimental; in a future version of \s-1GCC\s0, it will be enabled by
6473default for C99 and \*(C+.
6474.IP "\fB\-fpreprocessed\fR" 4
6475.IX Item "-fpreprocessed"
6476Indicate to the preprocessor that the input file has already been
6477preprocessed. This suppresses things like macro expansion, trigraph
6478conversion, escaped newline splicing, and processing of most directives.
6479The preprocessor still recognizes and removes comments, so that you can
6480pass a file preprocessed with \fB\-C\fR to the compiler without
6481problems. In this mode the integrated preprocessor is little more than
6482a tokenizer for the front ends.
6483.Sp
6484\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
6485extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
6486extensions that \s-1GCC\s0 uses for preprocessed files created by
6487\&\fB\-save\-temps\fR.
6488.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
6489.IX Item "-ftabstop=width"
6490Set the distance between tab stops. This helps the preprocessor report
6491correct column numbers in warnings or errors, even if tabs appear on the
6492line. If the value is less than 1 or greater than 100, the option is
6493ignored. The default is 8.
6494.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
6495.IX Item "-fexec-charset=charset"
6496Set the execution character set, used for string and character
6497constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
6498supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
6499.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
6500.IX Item "-fwide-exec-charset=charset"
6501Set the wide execution character set, used for wide string and
6502character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
6503corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
6504\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
6505by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
6506problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
6507.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
6508.IX Item "-finput-charset=charset"
6509Set the input character set, used for translation from the character
6510set of the input file to the source character set used by \s-1GCC\s0. If the
6511locale does not specify, or \s-1GCC\s0 cannot get this information from the
6512locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
6513or this command line option. Currently the command line option takes
6514precedence if there's a conflict. \fIcharset\fR can be any encoding
6515supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
6516.IP "\fB\-fworking\-directory\fR" 4
6517.IX Item "-fworking-directory"
6518Enable generation of linemarkers in the preprocessor output that will
6519let the compiler know the current working directory at the time of
6520preprocessing. When this option is enabled, the preprocessor will
6521emit, after the initial linemarker, a second linemarker with the
6522current working directory followed by two slashes. \s-1GCC\s0 will use this
6523directory, when it's present in the preprocessed input, as the
6524directory emitted as the current working directory in some debugging
6525information formats. This option is implicitly enabled if debugging
6526information is enabled, but this can be inhibited with the negated
6527form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
6528present in the command line, this option has no effect, since no
6529\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
6530.IP "\fB\-fno\-show\-column\fR" 4
6531.IX Item "-fno-show-column"
6532Do not print column numbers in diagnostics. This may be necessary if
6533diagnostics are being scanned by a program that does not understand the
6534column numbers, such as \fBdejagnu\fR.
6535.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
6536.IX Item "-A predicate=answer"
6537Make an assertion with the predicate \fIpredicate\fR and answer
6538\&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
6539\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
6540it does not use shell special characters.
6541.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
6542.IX Item "-A -predicate=answer"
6543Cancel an assertion with the predicate \fIpredicate\fR and answer
6544\&\fIanswer\fR.
6545.IP "\fB\-dCHARS\fR" 4
6546.IX Item "-dCHARS"
6547\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
6548and must not be preceded by a space. Other characters are interpreted
6549by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
6550are silently ignored. If you specify characters whose behavior
6551conflicts, the result is undefined.
6552.RS 4
6553.IP "\fBM\fR" 4
6554.IX Item "M"
6555Instead of the normal output, generate a list of \fB#define\fR
6556directives for all the macros defined during the execution of the
6557preprocessor, including predefined macros. This gives you a way of
6558finding out what is predefined in your version of the preprocessor.
6559Assuming you have no file \fIfoo.h\fR, the command
6560.Sp
6561.Vb 1
6562\& touch foo.h; cpp -dM foo.h
6563.Ve
6564.Sp
6565will show all the predefined macros.
6566.IP "\fBD\fR" 4
6567.IX Item "D"
6568Like \fBM\fR except in two respects: it does \fInot\fR include the
6569predefined macros, and it outputs \fIboth\fR the \fB#define\fR
6570directives and the result of preprocessing. Both kinds of output go to
6571the standard output file.
6572.IP "\fBN\fR" 4
6573.IX Item "N"
6574Like \fBD\fR, but emit only the macro names, not their expansions.
6575.IP "\fBI\fR" 4
6576.IX Item "I"
6577Output \fB#include\fR directives in addition to the result of
6578preprocessing.
6579.RE
6580.RS 4
6581.RE
6582.IP "\fB\-P\fR" 4
6583.IX Item "-P"
6584Inhibit generation of linemarkers in the output from the preprocessor.
6585This might be useful when running the preprocessor on something that is
6586not C code, and will be sent to a program which might be confused by the
6587linemarkers.
6588.IP "\fB\-C\fR" 4
6589.IX Item "-C"
6590Do not discard comments. All comments are passed through to the output
6591file, except for comments in processed directives, which are deleted
6592along with the directive.
6593.Sp
6594You should be prepared for side effects when using \fB\-C\fR; it
6595causes the preprocessor to treat comments as tokens in their own right.
6596For example, comments appearing at the start of what would be a
6597directive line have the effect of turning that line into an ordinary
6598source line, since the first token on the line is no longer a \fB#\fR.
6599.IP "\fB\-CC\fR" 4
6600.IX Item "-CC"
6601Do not discard comments, including during macro expansion. This is
6602like \fB\-C\fR, except that comments contained within macros are
6603also passed through to the output file where the macro is expanded.
6604.Sp
6605In addition to the side-effects of the \fB\-C\fR option, the
6606\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
6607to be converted to C\-style comments. This is to prevent later use
6608of that macro from inadvertently commenting out the remainder of
6609the source line.
6610.Sp
6611The \fB\-CC\fR option is generally used to support lint comments.
6612.IP "\fB\-traditional\-cpp\fR" 4
6613.IX Item "-traditional-cpp"
6614Try to imitate the behavior of old-fashioned C preprocessors, as
6615opposed to \s-1ISO\s0 C preprocessors.
6616.IP "\fB\-trigraphs\fR" 4
6617.IX Item "-trigraphs"
6618Process trigraph sequences.
6619These are three-character sequences, all starting with \fB??\fR, that
6620are defined by \s-1ISO\s0 C to stand for single characters. For example,
6621\&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
6622constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in
6623standard-conforming modes it converts them. See the \fB\-std\fR and
6624\&\fB\-ansi\fR options.
6625.Sp
6626The nine trigraphs and their replacements are
6627.Sp
6628.Vb 2
6629\& Trigraph: ??( ??) ??< ??> ??= ??/ ??' ??! ??-
6630\& Replacement: [ ] { } # \e ^ | ~
6631.Ve
6632.IP "\fB\-remap\fR" 4
6633.IX Item "-remap"
6634Enable special code to work around file systems which only permit very
6635short file names, such as \s-1MS\-DOS\s0.
6636.IP "\fB\-\-help\fR" 4
6637.IX Item "--help"
6638.PD 0
6639.IP "\fB\-\-target\-help\fR" 4
6640.IX Item "--target-help"
6641.PD
6642Print text describing all the command line options instead of
6643preprocessing anything.
6644.IP "\fB\-v\fR" 4
6645.IX Item "-v"
6646Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
6647execution, and report the final form of the include path.
6648.IP "\fB\-H\fR" 4
6649.IX Item "-H"
6650Print the name of each header file used, in addition to other normal
6651activities. Each name is indented to show how deep in the
6652\&\fB#include\fR stack it is. Precompiled header files are also
6653printed, even if they are found to be invalid; an invalid precompiled
6654header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
6655.IP "\fB\-version\fR" 4
6656.IX Item "-version"
6657.PD 0
6658.IP "\fB\-\-version\fR" 4
6659.IX Item "--version"
6660.PD
6661Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
6662preprocess as normal. With two dashes, exit immediately.
6663.Sh "Passing Options to the Assembler"
6664.IX Subsection "Passing Options to the Assembler"
6665You can pass options to the assembler.
6666.IP "\fB\-Wa,\fR\fIoption\fR" 4
6667.IX Item "-Wa,option"
6668Pass \fIoption\fR as an option to the assembler. If \fIoption\fR
6669contains commas, it is split into multiple options at the commas.
6670.IP "\fB\-Xassembler\fR \fIoption\fR" 4
6671.IX Item "-Xassembler option"
6672Pass \fIoption\fR as an option to the assembler. You can use this to
6673supply system-specific assembler options which \s-1GCC\s0 does not know how to
6674recognize.
6675.Sp
6676If you want to pass an option that takes an argument, you must use
6677\&\fB\-Xassembler\fR twice, once for the option and once for the argument.
6678.Sh "Options for Linking"
6679.IX Subsection "Options for Linking"
6680These options come into play when the compiler links object files into
6681an executable output file. They are meaningless if the compiler is
6682not doing a link step.
6683.IP "\fIobject-file-name\fR" 4
6684.IX Item "object-file-name"
6685A file name that does not end in a special recognized suffix is
6686considered to name an object file or library. (Object files are
6687distinguished from libraries by the linker according to the file
6688contents.) If linking is done, these object files are used as input
6689to the linker.
6690.IP "\fB\-c\fR" 4
6691.IX Item "-c"
6692.PD 0
6693.IP "\fB\-S\fR" 4
6694.IX Item "-S"
6695.IP "\fB\-E\fR" 4
6696.IX Item "-E"
6697.PD
6698If any of these options is used, then the linker is not run, and
6699object file names should not be used as arguments.
6700.IP "\fB\-l\fR\fIlibrary\fR" 4
6701.IX Item "-llibrary"
6702.PD 0
6703.IP "\fB\-l\fR \fIlibrary\fR" 4
6704.IX Item "-l library"
6705.PD
6706Search the library named \fIlibrary\fR when linking. (The second
6707alternative with the library as a separate argument is only for
6708\&\s-1POSIX\s0 compliance and is not recommended.)
6709.Sp
6710It makes a difference where in the command you write this option; the
6711linker searches and processes libraries and object files in the order they
6712are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
6713after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers
6714to functions in \fBz\fR, those functions may not be loaded.
6715.Sp
6716The linker searches a standard list of directories for the library,
6717which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker
6718then uses this file as if it had been specified precisely by name.
6719.Sp
6720The directories searched include several standard system directories
6721plus any that you specify with \fB\-L\fR.
6722.Sp
6723Normally the files found this way are library files\-\-\-archive files
6724whose members are object files. The linker handles an archive file by
6725scanning through it for members which define symbols that have so far
6726been referenced but not defined. But if the file that is found is an
6727ordinary object file, it is linked in the usual fashion. The only
6728difference between using an \fB\-l\fR option and specifying a file name
6729is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
6730and searches several directories.
6731.IP "\fB\-lobjc\fR" 4
6732.IX Item "-lobjc"
6733You need this special case of the \fB\-l\fR option in order to
6734link an Objective-C or Objective\-\*(C+ program.
6735.IP "\fB\-nostartfiles\fR" 4
6736.IX Item "-nostartfiles"
6737Do not use the standard system startup files when linking.
6738The standard system libraries are used normally, unless \fB\-nostdlib\fR
6739or \fB\-nodefaultlibs\fR is used.
6740.IP "\fB\-nodefaultlibs\fR" 4
6741.IX Item "-nodefaultlibs"
6742Do not use the standard system libraries when linking.
6743Only the libraries you specify will be passed to the linker.
6744The standard startup files are used normally, unless \fB\-nostartfiles\fR
6745is used. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
6746\&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
6747These entries are usually resolved by entries in
6748libc. These entry points should be supplied through some other
6749mechanism when this option is specified.
6750.IP "\fB\-nostdlib\fR" 4
6751.IX Item "-nostdlib"
6752Do not use the standard system startup files or libraries when linking.
6753No startup files and only the libraries you specify will be passed to
6754the linker. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
6755\&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
6756These entries are usually resolved by entries in
6757libc. These entry points should be supplied through some other
6758mechanism when this option is specified.
6759.Sp
6760One of the standard libraries bypassed by \fB\-nostdlib\fR and
6761\&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
6762that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
6763needs for some languages.
6764.Sp
6765In most cases, you need \fIlibgcc.a\fR even when you want to avoid
6766other standard libraries. In other words, when you specify \fB\-nostdlib\fR
6767or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
6768This ensures that you have no unresolved references to internal \s-1GCC\s0
6769library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+
6770constructors will be called.)
6771.IP "\fB\-pie\fR" 4
6772.IX Item "-pie"
6773Produce a position independent executable on targets which support it.
6774For predictable results, you must also specify the same set of options
6775that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
6776or model suboptions) when you specify this option.
6777.IP "\fB\-rdynamic\fR" 4
6778.IX Item "-rdynamic"
6779Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
6780that support it. This instructs the linker to add all symbols, not
6781only used ones, to the dynamic symbol table. This option is needed
6782for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
6783from within a program.
6784.IP "\fB\-s\fR" 4
6785.IX Item "-s"
6786Remove all symbol table and relocation information from the executable.
6787.IP "\fB\-static\fR" 4
6788.IX Item "-static"
6789On systems that support dynamic linking, this prevents linking with the shared
6790libraries. On other systems, this option has no effect.
6791.IP "\fB\-shared\fR" 4
6792.IX Item "-shared"
6793Produce a shared object which can then be linked with other objects to
6794form an executable. Not all systems support this option. For predictable
6795results, you must also specify the same set of options that were used to
6796generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
6797when you specify this option.[1]
6798.IP "\fB\-shared\-libgcc\fR" 4
6799.IX Item "-shared-libgcc"
6800.PD 0
6801.IP "\fB\-static\-libgcc\fR" 4
6802.IX Item "-static-libgcc"
6803.PD
6804On systems that provide \fIlibgcc\fR as a shared library, these options
6805force the use of either the shared or static version respectively.
6806If no shared version of \fIlibgcc\fR was built when the compiler was
6807configured, these options have no effect.
6808.Sp
6809There are several situations in which an application should use the
6810shared \fIlibgcc\fR instead of the static version. The most common
6811of these is when the application wishes to throw and catch exceptions
6812across different shared libraries. In that case, each of the libraries
6813as well as the application itself should use the shared \fIlibgcc\fR.
6814.Sp
6815Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
6816\&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
6817executable, because \*(C+ and Java programs typically use exceptions, so
6818this is the right thing to do.
6819.Sp
6820If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
6821find that they will not always be linked with the shared \fIlibgcc\fR.
6822If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
6823or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
6824it will link the shared version of \fIlibgcc\fR into shared libraries
6825by default. Otherwise, it will take advantage of the linker and optimize
6826away the linking with the shared version of \fIlibgcc\fR, linking with
6827the static version of libgcc by default. This allows exceptions to
6828propagate through such shared libraries, without incurring relocation
6829costs at library load time.
6830.Sp
6831However, if a library or main executable is supposed to throw or catch
6832exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
6833for the languages used in the program, or using the option
6834\&\fB\-shared\-libgcc\fR, such that it is linked with the shared
6835\&\fIlibgcc\fR.
6836.IP "\fB\-symbolic\fR" 4
6837.IX Item "-symbolic"
6838Bind references to global symbols when building a shared object. Warn
6839about any unresolved references (unless overridden by the link editor
6840option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support
6841this option.
6842.IP "\fB\-Xlinker\fR \fIoption\fR" 4
6843.IX Item "-Xlinker option"
6844Pass \fIoption\fR as an option to the linker. You can use this to
6845supply system-specific linker options which \s-1GCC\s0 does not know how to
6846recognize.
6847.Sp
6848If you want to pass an option that takes an argument, you must use
6849\&\fB\-Xlinker\fR twice, once for the option and once for the argument.
6850For example, to pass \fB\-assert definitions\fR, you must write
6851\&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write
6852\&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
6853string as a single argument, which is not what the linker expects.
6854.IP "\fB\-Wl,\fR\fIoption\fR" 4
6855.IX Item "-Wl,option"
6856Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains
6857commas, it is split into multiple options at the commas.
6858.IP "\fB\-u\fR \fIsymbol\fR" 4
6859.IX Item "-u symbol"
6860Pretend the symbol \fIsymbol\fR is undefined, to force linking of
6861library modules to define it. You can use \fB\-u\fR multiple times with
6862different symbols to force loading of additional library modules.
6863.Sh "Options for Directory Search"
6864.IX Subsection "Options for Directory Search"
6865These options specify directories to search for header files, for
6866libraries and for parts of the compiler:
6867.IP "\fB\-I\fR\fIdir\fR" 4
6868.IX Item "-Idir"
6869Add the directory \fIdir\fR to the head of the list of directories to be
6870searched for header files. This can be used to override a system header
6871file, substituting your own version, since these directories are
6872searched before the system header file directories. However, you should
6873not use this option to add directories that contain vendor-supplied
6874system header files (use \fB\-isystem\fR for that). If you use more than
6875one \fB\-I\fR option, the directories are scanned in left-to-right
6876order; the standard system directories come after.
6877.Sp
6878If a standard system include directory, or a directory specified with
6879\&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
6880option will be ignored. The directory will still be searched but as a
6881system directory at its normal position in the system include chain.
6882This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
6883the ordering for the include_next directive are not inadvertently changed.
6884If you really need to change the search order for system directories,
6885use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
6886.IP "\fB\-iquote\fR\fIdir\fR" 4
6887.IX Item "-iquotedir"
6888Add the directory \fIdir\fR to the head of the list of directories to
6889be searched for header files only for the case of \fB#include
6890"\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
6891otherwise just like \fB\-I\fR.
6892.IP "\fB\-L\fR\fIdir\fR" 4
6893.IX Item "-Ldir"
6894Add directory \fIdir\fR to the list of directories to be searched
6895for \fB\-l\fR.
6896.IP "\fB\-B\fR\fIprefix\fR" 4
6897.IX Item "-Bprefix"
6898This option specifies where to find the executables, libraries,
6899include files, and data files of the compiler itself.
6900.Sp
6901The compiler driver program runs one or more of the subprograms
6902\&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries
6903\&\fIprefix\fR as a prefix for each program it tries to run, both with and
6904without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
6905.Sp
6906For each subprogram to be run, the compiler driver first tries the
6907\&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR
6908was not specified, the driver tries two standard prefixes, which are
6909\&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of
6910those results in a file name that is found, the unmodified program
6911name is searched for using the directories specified in your
6912\&\fB\s-1PATH\s0\fR environment variable.
6913.Sp
6914The compiler will check to see if the path provided by the \fB\-B\fR
6915refers to a directory, and if necessary it will add a directory
6916separator character at the end of the path.
6917.Sp
6918\&\fB\-B\fR prefixes that effectively specify directory names also apply
6919to libraries in the linker, because the compiler translates these
6920options into \fB\-L\fR options for the linker. They also apply to
6921includes files in the preprocessor, because the compiler translates these
6922options into \fB\-isystem\fR options for the preprocessor. In this case,
6923the compiler appends \fBinclude\fR to the prefix.
6924.Sp
6925The run-time support file \fIlibgcc.a\fR can also be searched for using
6926the \fB\-B\fR prefix, if needed. If it is not found there, the two
6927standard prefixes above are tried, and that is all. The file is left
6928out of the link if it is not found by those means.
6929.Sp
6930Another way to specify a prefix much like the \fB\-B\fR prefix is to use
6931the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
6932.Sp
6933As a special kludge, if the path provided by \fB\-B\fR is
6934\&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
69359, then it will be replaced by \fI[dir/]include\fR. This is to help
6936with boot-strapping the compiler.
6937.IP "\fB\-specs=\fR\fIfile\fR" 4
6938.IX Item "-specs=file"
6939Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
6940file, in order to override the defaults that the \fIgcc\fR driver
6941program uses when determining what switches to pass to \fIcc1\fR,
6942\&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one
6943\&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
6944are processed in order, from left to right.
6945.IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
6946.IX Item "--sysroot=dir"
6947Use \fIdir\fR as the logical root directory for headers and libraries.
6948For example, if the compiler would normally search for headers in
6949\&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
6950search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
6951.Sp
6952If you use both this option and the \fB\-isysroot\fR option, then
6953the \fB\-\-sysroot\fR option will apply to libraries, but the
6954\&\fB\-isysroot\fR option will apply to header files.
6955.Sp
6956The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
6957for this option. If your linker does not support this option, the
6958header file aspect of \fB\-\-sysroot\fR will still work, but the
6959library aspect will not.
6960.IP "\fB\-I\-\fR" 4
6961.IX Item "-I-"
6962This option has been deprecated. Please use \fB\-iquote\fR instead for
6963\&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
6964Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
6965option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
6966they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
6967.Sp
6968If additional directories are specified with \fB\-I\fR options after
6969the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
6970directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used
6971this way.)
6972.Sp
6973In addition, the \fB\-I\-\fR option inhibits the use of the current
6974directory (where the current input file came from) as the first search
6975directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to
6976override this effect of \fB\-I\-\fR. With \fB\-I.\fR you can specify
6977searching the directory which was current when the compiler was
6978invoked. That is not exactly the same as what the preprocessor does
6979by default, but it is often satisfactory.
6980.Sp
6981\&\fB\-I\-\fR does not inhibit the use of the standard system directories
6982for header files. Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
6983independent.
6984.Sh "Specifying Target Machine and Compiler Version"
6985.IX Subsection "Specifying Target Machine and Compiler Version"
6986The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or
6987\&\fI<machine>\-gcc\fR when cross\-compiling, or
6988\&\fI<machine>\-gcc\-<version>\fR to run a version other than the one that
6989was installed last. Sometimes this is inconvenient, so \s-1GCC\s0 provides
6990options that will switch to another cross-compiler or version.
6991.IP "\fB\-b\fR \fImachine\fR" 4
6992.IX Item "-b machine"
6993The argument \fImachine\fR specifies the target machine for compilation.
6994.Sp
6995The value to use for \fImachine\fR is the same as was specified as the
6996machine type when configuring \s-1GCC\s0 as a cross\-compiler. For
6997example, if a cross-compiler was configured with \fBconfigure
6998arm-elf\fR, meaning to compile for an arm processor with elf binaries,
6999then you would specify \fB\-b arm-elf\fR to run that cross compiler.
7000Because there are other options beginning with \fB\-b\fR, the
7001configuration must contain a hyphen.
7002.IP "\fB\-V\fR \fIversion\fR" 4
7003.IX Item "-V version"
7004The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run.
7005This is useful when multiple versions are installed. For example,
7006\&\fIversion\fR might be \fB4.0\fR, meaning to run \s-1GCC\s0 version 4.0.
7007.PP
7008The \fB\-V\fR and \fB\-b\fR options work by running the
7009\&\fI<machine>\-gcc\-<version>\fR executable, so there's no real reason to
7010use them if you can just run that directly.
7011.Sh "Hardware Models and Configurations"
7012.IX Subsection "Hardware Models and Configurations"
7013Earlier we discussed the standard option \fB\-b\fR which chooses among
7014different installed compilers for completely different target
7015machines, such as \s-1VAX\s0 vs. 68000 vs. 80386.
7016.PP
7017In addition, each of these target machine types can have its own
7018special options, starting with \fB\-m\fR, to choose among various
7019hardware models or configurations\-\-\-for example, 68010 vs 68020,
7020floating coprocessor or none. A single installed version of the
7021compiler can compile for any model or configuration, according to the
7022options specified.
7023.PP
7024Some configurations of the compiler also support additional special
7025options, usually for compatibility with other compilers on the same
7026platform.
7027.PP
7028\fI\s-1ARC\s0 Options\fR
7029.IX Subsection "ARC Options"
7030.PP
7031These options are defined for \s-1ARC\s0 implementations:
7032.IP "\fB\-EL\fR" 4
7033.IX Item "-EL"
7034Compile code for little endian mode. This is the default.
7035.IP "\fB\-EB\fR" 4
7036.IX Item "-EB"
7037Compile code for big endian mode.
7038.IP "\fB\-mmangle\-cpu\fR" 4
7039.IX Item "-mmangle-cpu"
7040Prepend the name of the cpu to all public symbol names.
7041In multiple-processor systems, there are many \s-1ARC\s0 variants with different
7042instruction and register set characteristics. This flag prevents code
7043compiled for one cpu to be linked with code compiled for another.
7044No facility exists for handling variants that are \*(L"almost identical\*(R".
7045This is an all or nothing option.
7046.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
7047.IX Item "-mcpu=cpu"
7048Compile code for \s-1ARC\s0 variant \fIcpu\fR.
7049Which variants are supported depend on the configuration.
7050All variants support \fB\-mcpu=base\fR, this is the default.
7051.IP "\fB\-mtext=\fR\fItext-section\fR" 4
7052.IX Item "-mtext=text-section"
7053.PD 0
7054.IP "\fB\-mdata=\fR\fIdata-section\fR" 4
7055.IX Item "-mdata=data-section"
7056.IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
7057.IX Item "-mrodata=readonly-data-section"
7058.PD
7059Put functions, data, and readonly data in \fItext-section\fR,
7060\&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
7061by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
7062.PP
7063\fI\s-1ARM\s0 Options\fR
7064.IX Subsection "ARM Options"
7065.PP
7066These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
7067architectures:
7068.IP "\fB\-mabi=\fR\fIname\fR" 4
7069.IX Item "-mabi=name"
7070Generate code for the specified \s-1ABI\s0. Permissible values are: \fBapcs-gnu\fR,
7071\&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
7072.IP "\fB\-mapcs\-frame\fR" 4
7073.IX Item "-mapcs-frame"
7074Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
7075Standard for all functions, even if this is not strictly necessary for
7076correct execution of the code. Specifying \fB\-fomit\-frame\-pointer\fR
7077with this option will cause the stack frames not to be generated for
7078leaf functions. The default is \fB\-mno\-apcs\-frame\fR.
7079.IP "\fB\-mapcs\fR" 4
7080.IX Item "-mapcs"
7081This is a synonym for \fB\-mapcs\-frame\fR.
7082.IP "\fB\-mthumb\-interwork\fR" 4
7083.IX Item "-mthumb-interwork"
7084Generate code which supports calling between the \s-1ARM\s0 and Thumb
7085instruction sets. Without this option the two instruction sets cannot
7086be reliably used inside one program. The default is
7087\&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
7088when \fB\-mthumb\-interwork\fR is specified.
7089.IP "\fB\-mno\-sched\-prolog\fR" 4
7090.IX Item "-mno-sched-prolog"
7091Prevent the reordering of instructions in the function prolog, or the
7092merging of those instruction with the instructions in the function's
7093body. This means that all functions will start with a recognizable set
7094of instructions (or in fact one of a choice from a small set of
7095different function prologues), and this information can be used to
7096locate the start if functions inside an executable piece of code. The
7097default is \fB\-msched\-prolog\fR.
7098.IP "\fB\-mhard\-float\fR" 4
7099.IX Item "-mhard-float"
7100Generate output containing floating point instructions. This is the
7101default.
7102.IP "\fB\-msoft\-float\fR" 4
7103.IX Item "-msoft-float"
7104Generate output containing library calls for floating point.
7105\&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0
7106targets. Normally the facilities of the machine's usual C compiler are
7107used, but this cannot be done directly in cross\-compilation. You must make
7108your own arrangements to provide suitable library functions for
7109cross\-compilation.
7110.Sp
7111\&\fB\-msoft\-float\fR changes the calling convention in the output file;
7112therefore, it is only useful if you compile \fIall\fR of a program with
7113this option. In particular, you need to compile \fIlibgcc.a\fR, the
7114library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
7115this to work.
7116.IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
7117.IX Item "-mfloat-abi=name"
7118Specifies which \s-1ABI\s0 to use for floating point values. Permissible values
7119are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
7120.Sp
7121\&\fBsoft\fR and \fBhard\fR are equivalent to \fB\-msoft\-float\fR
7122and \fB\-mhard\-float\fR respectively. \fBsoftfp\fR allows the generation
7123of floating point instructions, but still uses the soft-float calling
7124conventions.
7125.IP "\fB\-mlittle\-endian\fR" 4
7126.IX Item "-mlittle-endian"
7127Generate code for a processor running in little-endian mode. This is
7128the default for all standard configurations.
7129.IP "\fB\-mbig\-endian\fR" 4
7130.IX Item "-mbig-endian"
7131Generate code for a processor running in big-endian mode; the default is
7132to compile code for a little-endian processor.
7133.IP "\fB\-mwords\-little\-endian\fR" 4
7134.IX Item "-mwords-little-endian"
7135This option only applies when generating code for big-endian processors.
7136Generate code for a little-endian word order but a big-endian byte
7137order. That is, a byte order of the form \fB32107654\fR. Note: this
7138option should only be used if you require compatibility with code for
7139big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
71402.8.
7141.IP "\fB\-mcpu=\fR\fIname\fR" 4
7142.IX Item "-mcpu=name"
7143This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
7144to determine what kind of instructions it can emit when generating
7145assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR,
7146\&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
7147\&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
7148\&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
7149\&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
7150\&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
7151\&\fBarm8\fR, \fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
7152\&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
7153\&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
7154\&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
7155\&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
7156\&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
7157\&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
7158\&\fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR, \fBxscale\fR, \fBiwmmxt\fR,
7159\&\fBep9312\fR.
7160.IP "\fB\-mtune=\fR\fIname\fR" 4
7161.IX Item "-mtune=name"
7162This option is very similar to the \fB\-mcpu=\fR option, except that
7163instead of specifying the actual target processor type, and hence
7164restricting which instructions can be used, it specifies that \s-1GCC\s0 should
7165tune the performance of the code as if the target were of the type
7166specified in this option, but still choosing the instructions that it
7167will generate based on the cpu specified by a \fB\-mcpu=\fR option.
7168For some \s-1ARM\s0 implementations better performance can be obtained by using
7169this option.
7170.IP "\fB\-march=\fR\fIname\fR" 4
7171.IX Item "-march=name"
7172This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
7173name to determine what kind of instructions it can emit when generating
7174assembly code. This option can be used in conjunction with or instead
7175of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR,
7176\&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
7177\&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5te\fR, \fBarmv6\fR, \fBarmv6j\fR,
7178\&\fBiwmmxt\fR, \fBep9312\fR.
7179.IP "\fB\-mfpu=\fR\fIname\fR" 4
7180.IX Item "-mfpu=name"
7181.PD 0
7182.IP "\fB\-mfpe=\fR\fInumber\fR" 4
7183.IX Item "-mfpe=number"
7184.IP "\fB\-mfp=\fR\fInumber\fR" 4
7185.IX Item "-mfp=number"
7186.PD
7187This specifies what floating point hardware (or hardware emulation) is
7188available on the target. Permissible names are: \fBfpa\fR, \fBfpe2\fR,
7189\&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR. \fB\-mfp\fR and \fB\-mfpe\fR
7190are synonyms for \fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility
7191with older versions of \s-1GCC\s0.
7192.Sp
7193If \fB\-msoft\-float\fR is specified this specifies the format of
7194floating point values.
7195.IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
7196.IX Item "-mstructure-size-boundary=n"
7197The size of all structures and unions will be rounded up to a multiple
7198of the number of bits set by this option. Permissible values are 8, 32
7199and 64. The default value varies for different toolchains. For the \s-1COFF\s0
7200targeted toolchain the default value is 8. A value of 64 is only allowed
7201if the underlying \s-1ABI\s0 supports it.
7202.Sp
7203Specifying the larger number can produce faster, more efficient code, but
7204can also increase the size of the program. Different values are potentially
7205incompatible. Code compiled with one value cannot necessarily expect to
7206work with code or libraries compiled with another value, if they exchange
7207information using structures or unions.
7208.IP "\fB\-mabort\-on\-noreturn\fR" 4
7209.IX Item "-mabort-on-noreturn"
7210Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
7211\&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to
7212return.
7213.IP "\fB\-mlong\-calls\fR" 4
7214.IX Item "-mlong-calls"
7215.PD 0
7216.IP "\fB\-mno\-long\-calls\fR" 4
7217.IX Item "-mno-long-calls"
7218.PD
7219Tells the compiler to perform function calls by first loading the
7220address of the function into a register and then performing a subroutine
7221call on this register. This switch is needed if the target function
7222will lie outside of the 64 megabyte addressing range of the offset based
7223version of subroutine call instruction.
7224.Sp
7225Even if this switch is enabled, not all function calls will be turned
7226into long calls. The heuristic is that static functions, functions
7227which have the \fBshort-call\fR attribute, functions that are inside
7228the scope of a \fB#pragma no_long_calls\fR directive and functions whose
7229definitions have already been compiled within the current compilation
7230unit, will not be turned into long calls. The exception to this rule is
7231that weak function definitions, functions with the \fBlong-call\fR
7232attribute or the \fBsection\fR attribute, and functions that are within
7233the scope of a \fB#pragma long_calls\fR directive, will always be
7234turned into long calls.
7235.Sp
7236This feature is not enabled by default. Specifying
7237\&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
7238placing the function calls within the scope of a \fB#pragma
7239long_calls_off\fR directive. Note these switches have no effect on how
7240the compiler generates code to handle function calls via function
7241pointers.
7242.IP "\fB\-mnop\-fun\-dllimport\fR" 4
7243.IX Item "-mnop-fun-dllimport"
7244Disable support for the \f(CW\*(C`dllimport\*(C'\fR attribute.
7245.IP "\fB\-msingle\-pic\-base\fR" 4
7246.IX Item "-msingle-pic-base"
7247Treat the register used for \s-1PIC\s0 addressing as read\-only, rather than
7248loading it in the prologue for each function. The run-time system is
7249responsible for initializing this register with an appropriate value
7250before execution begins.
7251.IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
7252.IX Item "-mpic-register=reg"
7253Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
7254unless stack-checking is enabled, when R9 is used.
7255.IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
7256.IX Item "-mcirrus-fix-invalid-insns"
7257Insert NOPs into the instruction stream to in order to work around
7258problems with invalid Maverick instruction combinations. This option
7259is only valid if the \fB\-mcpu=ep9312\fR option has been used to
7260enable generation of instructions for the Cirrus Maverick floating
7261point co\-processor. This option is not enabled by default, since the
7262problem is only present in older Maverick implementations. The default
7263can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
7264switch.
7265.IP "\fB\-mpoke\-function\-name\fR" 4
7266.IX Item "-mpoke-function-name"
7267Write the name of each function into the text section, directly
7268preceding the function prologue. The generated code is similar to this:
7269.Sp
7270.Vb 9
7271\& t0
7272\& .ascii "arm_poke_function_name", 0
7273\& .align
7274\& t1
7275\& .word 0xff000000 + (t1 - t0)
7276\& arm_poke_function_name
7277\& mov ip, sp
7278\& stmfd sp!, {fp, ip, lr, pc}
7279\& sub fp, ip, #4
7280.Ve
7281.Sp
7282When performing a stack backtrace, code can inspect the value of
7283\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
7284location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
7285there is a function name embedded immediately preceding this location
7286and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
7287.IP "\fB\-mthumb\fR" 4
7288.IX Item "-mthumb"
7289Generate code for the 16\-bit Thumb instruction set. The default is to
7290use the 32\-bit \s-1ARM\s0 instruction set.
7291.IP "\fB\-mtpcs\-frame\fR" 4
7292.IX Item "-mtpcs-frame"
7293Generate a stack frame that is compliant with the Thumb Procedure Call
7294Standard for all non-leaf functions. (A leaf function is one that does
7295not call any other functions.) The default is \fB\-mno\-tpcs\-frame\fR.
7296.IP "\fB\-mtpcs\-leaf\-frame\fR" 4
7297.IX Item "-mtpcs-leaf-frame"
7298Generate a stack frame that is compliant with the Thumb Procedure Call
7299Standard for all leaf functions. (A leaf function is one that does
7300not call any other functions.) The default is \fB\-mno\-apcs\-leaf\-frame\fR.
7301.IP "\fB\-mcallee\-super\-interworking\fR" 4
7302.IX Item "-mcallee-super-interworking"
7303Gives all externally visible functions in the file being compiled an \s-1ARM\s0
7304instruction set header which switches to Thumb mode before executing the
7305rest of the function. This allows these functions to be called from
7306non-interworking code.
7307.IP "\fB\-mcaller\-super\-interworking\fR" 4
7308.IX Item "-mcaller-super-interworking"
7309Allows calls via function pointers (including virtual functions) to
7310execute correctly regardless of whether the target code has been
7311compiled for interworking or not. There is a small overhead in the cost
7312of executing a function pointer if this option is enabled.
7313.IP "\fB\-mtp=\fR\fIname\fR" 4
7314.IX Item "-mtp=name"
7315Specify the access model for the thread local storage pointer. The valid
7316models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
7317\&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
7318(supported in the arm6k architecture), and \fBauto\fR, which uses the
7319best available method for the selected processor. The default setting is
7320\&\fBauto\fR.
7321.PP
7322\fI\s-1AVR\s0 Options\fR
7323.IX Subsection "AVR Options"
7324.PP
7325These options are defined for \s-1AVR\s0 implementations:
7326.IP "\fB\-mmcu=\fR\fImcu\fR" 4
7327.IX Item "-mmcu=mcu"
7328Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
7329.Sp
7330Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
7331compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
7332attiny11, attiny12, attiny15, attiny28).
7333.Sp
7334Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
73358K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
7336at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
7337at90c8534, at90s8535).
7338.Sp
7339Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
7340memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
7341.Sp
7342Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
7343memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
7344.Sp
7345Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
7346memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
7347atmega64, atmega128, at43usb355, at94k).
7348.IP "\fB\-msize\fR" 4
7349.IX Item "-msize"
7350Output instruction sizes to the asm file.
7351.IP "\fB\-minit\-stack=\fR\fIN\fR" 4
7352.IX Item "-minit-stack=N"
7353Specify the initial stack address, which may be a symbol or numeric value,
7354\&\fB_\|_stack\fR is the default.
7355.IP "\fB\-mno\-interrupts\fR" 4
7356.IX Item "-mno-interrupts"
7357Generated code is not compatible with hardware interrupts.
7358Code size will be smaller.
7359.IP "\fB\-mcall\-prologues\fR" 4
7360.IX Item "-mcall-prologues"
7361Functions prologues/epilogues expanded as call to appropriate
7362subroutines. Code size will be smaller.
7363.IP "\fB\-mno\-tablejump\fR" 4
7364.IX Item "-mno-tablejump"
7365Do not generate tablejump insns which sometimes increase code size.
7366.IP "\fB\-mtiny\-stack\fR" 4
7367.IX Item "-mtiny-stack"
7368Change only the low 8 bits of the stack pointer.
7369.IP "\fB\-mint8\fR" 4
7370.IX Item "-mint8"
7371Assume int to be 8 bit integer. This affects the sizes of all types: A
7372char will be 1 byte, an int will be 1 byte, an long will be 2 bytes
7373and long long will be 4 bytes. Please note that this option does not
7374comply to the C standards, but it will provide you with smaller code
7375size.
7376.PP
7377\fIBlackfin Options\fR
7378.IX Subsection "Blackfin Options"
7379.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
7380.IX Item "-momit-leaf-frame-pointer"
7381Don't keep the frame pointer in a register for leaf functions. This
7382avoids the instructions to save, set up and restore frame pointers and
7383makes an extra register available in leaf functions. The option
7384\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
7385which might make debugging harder.
7386.IP "\fB\-mspecld\-anomaly\fR" 4
7387.IX Item "-mspecld-anomaly"
7388When enabled, the compiler will ensure that the generated code does not
7389contain speculative loads after jump instructions. This option is enabled
7390by default.
7391.IP "\fB\-mno\-specld\-anomaly\fR" 4
7392.IX Item "-mno-specld-anomaly"
7393Don't generate extra code to prevent speculative loads from occurring.
7394.IP "\fB\-mcsync\-anomaly\fR" 4
7395.IX Item "-mcsync-anomaly"
7396When enabled, the compiler will ensure that the generated code does not
7397contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
7398This option is enabled by default.
7399.IP "\fB\-mno\-csync\-anomaly\fR" 4
7400.IX Item "-mno-csync-anomaly"
7401Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
7402occurring too soon after a conditional branch.
7403.IP "\fB\-mlow\-64k\fR" 4
7404.IX Item "-mlow-64k"
7405When enabled, the compiler is free to take advantage of the knowledge that
7406the entire program fits into the low 64k of memory.
7407.IP "\fB\-mno\-low\-64k\fR" 4
7408.IX Item "-mno-low-64k"
7409Assume that the program is arbitrarily large. This is the default.
7410.IP "\fB\-mid\-shared\-library\fR" 4
7411.IX Item "-mid-shared-library"
7412Generate code that supports shared libraries via the library \s-1ID\s0 method.
7413This allows for execute in place and shared libraries in an environment
7414without virtual memory management. This option implies \fB\-fPIC\fR.
7415.IP "\fB\-mno\-id\-shared\-library\fR" 4
7416.IX Item "-mno-id-shared-library"
7417Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
7418This is the default.
7419.IP "\fB\-mshared\-library\-id=n\fR" 4
7420.IX Item "-mshared-library-id=n"
7421Specified the identification number of the \s-1ID\s0 based shared library being
7422compiled. Specifying a value of 0 will generate more compact code, specifying
7423other values will force the allocation of that number to the current
7424library but is no more space or time efficient than omitting this option.
7425.IP "\fB\-mlong\-calls\fR" 4
7426.IX Item "-mlong-calls"
7427.PD 0
7428.IP "\fB\-mno\-long\-calls\fR" 4
7429.IX Item "-mno-long-calls"
7430.PD
7431Tells the compiler to perform function calls by first loading the
7432address of the function into a register and then performing a subroutine
7433call on this register. This switch is needed if the target function
7434will lie outside of the 24 bit addressing range of the offset based
7435version of subroutine call instruction.
7436.Sp
7437This feature is not enabled by default. Specifying
7438\&\fB\-mno\-long\-calls\fR will restore the default behavior. Note these
7439switches have no effect on how the compiler generates code to handle
7440function calls via function pointers.
7441.PP
7442\fI\s-1CRIS\s0 Options\fR
7443.IX Subsection "CRIS Options"
7444.PP
7445These options are defined specifically for the \s-1CRIS\s0 ports.
7446.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
7447.IX Item "-march=architecture-type"
7448.PD 0
7449.IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
7450.IX Item "-mcpu=architecture-type"
7451.PD
7452Generate code for the specified architecture. The choices for
7453\&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
7454respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
7455Default is \fBv0\fR except for cris\-axis\-linux\-gnu, where the default is
7456\&\fBv10\fR.
7457.IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
7458.IX Item "-mtune=architecture-type"
7459Tune to \fIarchitecture-type\fR everything applicable about the generated
7460code, except for the \s-1ABI\s0 and the set of available instructions. The
7461choices for \fIarchitecture-type\fR are the same as for
7462\&\fB\-march=\fR\fIarchitecture-type\fR.
7463.IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
7464.IX Item "-mmax-stack-frame=n"
7465Warn when the stack frame of a function exceeds \fIn\fR bytes.
7466.IP "\fB\-melinux\-stacksize=\fR\fIn\fR" 4
7467.IX Item "-melinux-stacksize=n"
7468Only available with the \fBcris-axis-aout\fR target. Arranges for
7469indications in the program to the kernel loader that the stack of the
7470program should be set to \fIn\fR bytes.
7471.IP "\fB\-metrax4\fR" 4
7472.IX Item "-metrax4"
7473.PD 0
7474.IP "\fB\-metrax100\fR" 4
7475.IX Item "-metrax100"
7476.PD
7477The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
7478\&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
7479.IP "\fB\-mmul\-bug\-workaround\fR" 4
7480.IX Item "-mmul-bug-workaround"
7481.PD 0
7482.IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
7483.IX Item "-mno-mul-bug-workaround"
7484.PD
7485Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
7486models where it applies. This option is active by default.
7487.IP "\fB\-mpdebug\fR" 4
7488.IX Item "-mpdebug"
7489Enable CRIS-specific verbose debug-related information in the assembly
7490code. This option also has the effect to turn off the \fB#NO_APP\fR
7491formatted-code indicator to the assembler at the beginning of the
7492assembly file.
7493.IP "\fB\-mcc\-init\fR" 4
7494.IX Item "-mcc-init"
7495Do not use condition-code results from previous instruction; always emit
7496compare and test instructions before use of condition codes.
7497.IP "\fB\-mno\-side\-effects\fR" 4
7498.IX Item "-mno-side-effects"
7499Do not emit instructions with side-effects in addressing modes other than
7500post\-increment.
7501.IP "\fB\-mstack\-align\fR" 4
7502.IX Item "-mstack-align"
7503.PD 0
7504.IP "\fB\-mno\-stack\-align\fR" 4
7505.IX Item "-mno-stack-align"
7506.IP "\fB\-mdata\-align\fR" 4
7507.IX Item "-mdata-align"
7508.IP "\fB\-mno\-data\-align\fR" 4
7509.IX Item "-mno-data-align"
7510.IP "\fB\-mconst\-align\fR" 4
7511.IX Item "-mconst-align"
7512.IP "\fB\-mno\-const\-align\fR" 4
7513.IX Item "-mno-const-align"
7514.PD
7515These options (no\-options) arranges (eliminate arrangements) for the
7516stack\-frame, individual data and constants to be aligned for the maximum
7517single data access size for the chosen \s-1CPU\s0 model. The default is to
7518arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are
7519not affected by these options.
7520.IP "\fB\-m32\-bit\fR" 4
7521.IX Item "-m32-bit"
7522.PD 0
7523.IP "\fB\-m16\-bit\fR" 4
7524.IX Item "-m16-bit"
7525.IP "\fB\-m8\-bit\fR" 4
7526.IX Item "-m8-bit"
7527.PD
7528Similar to the stack\- data\- and const-align options above, these options
7529arrange for stack\-frame, writable data and constants to all be 32\-bit,
753016\-bit or 8\-bit aligned. The default is 32\-bit alignment.
7531.IP "\fB\-mno\-prologue\-epilogue\fR" 4
7532.IX Item "-mno-prologue-epilogue"
7533.PD 0
7534.IP "\fB\-mprologue\-epilogue\fR" 4
7535.IX Item "-mprologue-epilogue"
7536.PD
7537With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
7538epilogue that sets up the stack-frame are omitted and no return
7539instructions or return sequences are generated in the code. Use this
7540option only together with visual inspection of the compiled code: no
7541warnings or errors are generated when call-saved registers must be saved,
7542or storage for local variable needs to be allocated.
7543.IP "\fB\-mno\-gotplt\fR" 4
7544.IX Item "-mno-gotplt"
7545.PD 0
7546.IP "\fB\-mgotplt\fR" 4
7547.IX Item "-mgotplt"
7548.PD
7549With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
7550instruction sequences that load addresses for functions from the \s-1PLT\s0 part
7551of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
7552\&\s-1PLT\s0. The default is \fB\-mgotplt\fR.
7553.IP "\fB\-maout\fR" 4
7554.IX Item "-maout"
7555Legacy no-op option only recognized with the cris-axis-aout target.
7556.IP "\fB\-melf\fR" 4
7557.IX Item "-melf"
7558Legacy no-op option only recognized with the cris-axis-elf and
7559cris-axis-linux-gnu targets.
7560.IP "\fB\-melinux\fR" 4
7561.IX Item "-melinux"
7562Only recognized with the cris-axis-aout target, where it selects a
7563GNU/linux\-like multilib, include files and instruction set for
7564\&\fB\-march=v8\fR.
7565.IP "\fB\-mlinux\fR" 4
7566.IX Item "-mlinux"
7567Legacy no-op option only recognized with the cris-axis-linux-gnu target.
7568.IP "\fB\-sim\fR" 4
7569.IX Item "-sim"
7570This option, recognized for the cris-axis-aout and cris-axis-elf arranges
7571to link with input-output functions from a simulator library. Code,
7572initialized data and zero-initialized data are allocated consecutively.
7573.IP "\fB\-sim2\fR" 4
7574.IX Item "-sim2"
7575Like \fB\-sim\fR, but pass linker options to locate initialized data at
75760x40000000 and zero-initialized data at 0x80000000.
7577.PP
7578\fI\s-1CRX\s0 Options\fR
7579.IX Subsection "CRX Options"
7580.PP
7581These options are defined specifically for the \s-1CRX\s0 ports.
7582.IP "\fB\-mmac\fR" 4
7583.IX Item "-mmac"
7584Enable the use of multiply-accumulate instructions. Disabled by default.
7585.IP "\fB\-mpush\-args\fR" 4
7586.IX Item "-mpush-args"
7587Push instructions will be used to pass outgoing arguments when functions
7588are called. Enabled by default.
7589.PP
7590\fIDarwin Options\fR
7591.IX Subsection "Darwin Options"
7592.PP
7593These options are defined for all architectures running the Darwin operating
7594system.
7595.PP
7596\&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
7597an object file for the single architecture that it was built to
7598target. Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
7599\&\fB\-arch\fR options are used; it does so by running the compiler or
7600linker multiple times and joining the results together with
7601\&\fIlipo\fR.
7602.PP
7603The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
7604\&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
7605that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR. The
7606\&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
7607.PP
7608The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
7609mismatch. The assembler, \fIas\fR, will only permit instructions to
7610be used that are valid for the subtype of the file it is generating,
7611so you cannot put 64\-bit instructions in an \fBppc750\fR object file.
7612The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
7613and print an error if asked to create a shared library with a less
7614restrictive subtype than its input files (for instance, trying to put
7615a \fBppc970\fR object file in a \fBppc7400\fR library). The linker
7616for executables, \fIld\fR, will quietly give the executable the most
7617restrictive subtype of any of its input files.
7618.IP "\fB\-F\fR\fIdir\fR" 4
7619.IX Item "-Fdir"
7620Add the framework directory \fIdir\fR to the head of the list of
7621directories to be searched for header files. These directories are
7622interleaved with those specified by \fB\-I\fR options and are
7623scanned in a left-to-right order.
7624.Sp
7625A framework directory is a directory with frameworks in it. A
7626framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
7627\&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
7628in \fB\*(L".framework\*(R"\fR. The name of a framework is the name of this
7629directory excluding the \fB\*(L".framework\*(R"\fR. Headers associated with
7630the framework are found in one of those two directories, with
7631\&\fB\*(L"Headers\*(R"\fR being searched first. A subframework is a framework
7632directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
7633Includes of subframework headers can only appear in a header of a
7634framework that contains the subframework, or in a sibling subframework
7635header. Two subframeworks are siblings if they occur in the same
7636framework. A subframework should not have the same name as a
7637framework, a warning will be issued if this is violated. Currently a
7638subframework cannot have subframeworks, in the future, the mechanism
7639may be extended to support this. The standard frameworks can be found
7640in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
7641\&\fB\*(L"/Library/Frameworks\*(R"\fR. An example include looks like
7642\&\f(CW\*(C`#include <Framework/header.h>\*(C'\fR, where \fBFramework\fR denotes
7643the name of the framework and header.h is found in the
7644\&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
7645.IP "\fB\-gused\fR" 4
7646.IX Item "-gused"
7647Emit debugging information for symbols that are used. For \s-1STABS\s0
7648debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
7649This is by default \s-1ON\s0.
7650.IP "\fB\-gfull\fR" 4
7651.IX Item "-gfull"
7652Emit debugging information for all symbols and types.
7653.IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
7654.IX Item "-mmacosx-version-min=version"
7655The earliest version of MacOS X that this executable will run on
7656is \fIversion\fR. Typical values of \fIversion\fR include \f(CW10.1\fR,
7657\&\f(CW10.2\fR, and \f(CW10.3.9\fR.
7658.Sp
7659The default for this option is to make choices that seem to be most
7660useful.
7661.IP "\fB\-mkernel\fR" 4
7662.IX Item "-mkernel"
7663Enable kernel development mode. The \fB\-mkernel\fR option sets
7664\&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
7665\&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
7666\&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
7667applicable. This mode also sets \fB\-mno\-altivec\fR,
7668\&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
7669\&\fB\-mlong\-branch\fR for PowerPC targets.
7670.IP "\fB\-mone\-byte\-bool\fR" 4
7671.IX Item "-mone-byte-bool"
7672Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
7673By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
7674Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
7675option has no effect on x86.
7676.Sp
7677\&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
7678to generate code that is not binary compatible with code generated
7679without that switch. Using this switch may require recompiling all
7680other modules in a program, including system libraries. Use this
7681switch to conform to a non-default data model.
7682.IP "\fB\-mfix\-and\-continue\fR" 4
7683.IX Item "-mfix-and-continue"
7684.PD 0
7685.IP "\fB\-ffix\-and\-continue\fR" 4
7686.IX Item "-ffix-and-continue"
7687.IP "\fB\-findirect\-data\fR" 4
7688.IX Item "-findirect-data"
7689.PD
7690Generate code suitable for fast turn around development. Needed to
7691enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
7692programs. \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
7693are provided for backwards compatibility.
7694.IP "\fB\-all_load\fR" 4
7695.IX Item "-all_load"
7696Loads all members of static archive libraries.
7697See man \fIld\fR\|(1) for more information.
7698.IP "\fB\-arch_errors_fatal\fR" 4
7699.IX Item "-arch_errors_fatal"
7700Cause the errors having to do with files that have the wrong architecture
7701to be fatal.
7702.IP "\fB\-bind_at_load\fR" 4
7703.IX Item "-bind_at_load"
7704Causes the output file to be marked such that the dynamic linker will
7705bind all undefined references when the file is loaded or launched.
7706.IP "\fB\-bundle\fR" 4
7707.IX Item "-bundle"
7708Produce a Mach-o bundle format file.
7709See man \fIld\fR\|(1) for more information.
7710.IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
7711.IX Item "-bundle_loader executable"
7712This option specifies the \fIexecutable\fR that will be loading the build
7713output file being linked. See man \fIld\fR\|(1) for more information.
7714.IP "\fB\-dynamiclib\fR" 4
7715.IX Item "-dynamiclib"
7716When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
7717an executable when linking, using the Darwin \fIlibtool\fR command.
7718.IP "\fB\-force_cpusubtype_ALL\fR" 4
7719.IX Item "-force_cpusubtype_ALL"
7720This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
7721one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
7722.IP "\fB\-allowable_client\fR \fIclient_name\fR" 4
7723.IX Item "-allowable_client client_name"
7724.PD 0
7725.IP "\fB\-client_name\fR" 4
7726.IX Item "-client_name"
7727.IP "\fB\-compatibility_version\fR" 4
7728.IX Item "-compatibility_version"
7729.IP "\fB\-current_version\fR" 4
7730.IX Item "-current_version"
7731.IP "\fB\-dead_strip\fR" 4
7732.IX Item "-dead_strip"
7733.IP "\fB\-dependency\-file\fR" 4
7734.IX Item "-dependency-file"
7735.IP "\fB\-dylib_file\fR" 4
7736.IX Item "-dylib_file"
7737.IP "\fB\-dylinker_install_name\fR" 4
7738.IX Item "-dylinker_install_name"
7739.IP "\fB\-dynamic\fR" 4
7740.IX Item "-dynamic"
7741.IP "\fB\-exported_symbols_list\fR" 4
7742.IX Item "-exported_symbols_list"
7743.IP "\fB\-filelist\fR" 4
7744.IX Item "-filelist"
7745.IP "\fB\-flat_namespace\fR" 4
7746.IX Item "-flat_namespace"
7747.IP "\fB\-force_flat_namespace\fR" 4
7748.IX Item "-force_flat_namespace"
7749.IP "\fB\-headerpad_max_install_names\fR" 4
7750.IX Item "-headerpad_max_install_names"
7751.IP "\fB\-image_base\fR" 4
7752.IX Item "-image_base"
7753.IP "\fB\-init\fR" 4
7754.IX Item "-init"
7755.IP "\fB\-install_name\fR" 4
7756.IX Item "-install_name"
7757.IP "\fB\-keep_private_externs\fR" 4
7758.IX Item "-keep_private_externs"
7759.IP "\fB\-multi_module\fR" 4
7760.IX Item "-multi_module"
7761.IP "\fB\-multiply_defined\fR" 4
7762.IX Item "-multiply_defined"
7763.IP "\fB\-multiply_defined_unused\fR" 4
7764.IX Item "-multiply_defined_unused"
7765.IP "\fB\-noall_load\fR" 4
7766.IX Item "-noall_load"
7767.IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
7768.IX Item "-no_dead_strip_inits_and_terms"
7769.IP "\fB\-nofixprebinding\fR" 4
7770.IX Item "-nofixprebinding"
7771.IP "\fB\-nomultidefs\fR" 4
7772.IX Item "-nomultidefs"
7773.IP "\fB\-noprebind\fR" 4
7774.IX Item "-noprebind"
7775.IP "\fB\-noseglinkedit\fR" 4
7776.IX Item "-noseglinkedit"
7777.IP "\fB\-pagezero_size\fR" 4
7778.IX Item "-pagezero_size"
7779.IP "\fB\-prebind\fR" 4
7780.IX Item "-prebind"
7781.IP "\fB\-prebind_all_twolevel_modules\fR" 4
7782.IX Item "-prebind_all_twolevel_modules"
7783.IP "\fB\-private_bundle\fR" 4
7784.IX Item "-private_bundle"
7785.IP "\fB\-read_only_relocs\fR" 4
7786.IX Item "-read_only_relocs"
7787.IP "\fB\-sectalign\fR" 4
7788.IX Item "-sectalign"
7789.IP "\fB\-sectobjectsymbols\fR" 4
7790.IX Item "-sectobjectsymbols"
7791.IP "\fB\-whyload\fR" 4
7792.IX Item "-whyload"
7793.IP "\fB\-seg1addr\fR" 4
7794.IX Item "-seg1addr"
7795.IP "\fB\-sectcreate\fR" 4
7796.IX Item "-sectcreate"
7797.IP "\fB\-sectobjectsymbols\fR" 4
7798.IX Item "-sectobjectsymbols"
7799.IP "\fB\-sectorder\fR" 4
7800.IX Item "-sectorder"
7801.IP "\fB\-segaddr\fR" 4
7802.IX Item "-segaddr"
7803.IP "\fB\-segs_read_only_addr\fR" 4
7804.IX Item "-segs_read_only_addr"
7805.IP "\fB\-segs_read_write_addr\fR" 4
7806.IX Item "-segs_read_write_addr"
7807.IP "\fB\-seg_addr_table\fR" 4
7808.IX Item "-seg_addr_table"
7809.IP "\fB\-seg_addr_table_filename\fR" 4
7810.IX Item "-seg_addr_table_filename"
7811.IP "\fB\-seglinkedit\fR" 4
7812.IX Item "-seglinkedit"
7813.IP "\fB\-segprot\fR" 4
7814.IX Item "-segprot"
7815.IP "\fB\-segs_read_only_addr\fR" 4
7816.IX Item "-segs_read_only_addr"
7817.IP "\fB\-segs_read_write_addr\fR" 4
7818.IX Item "-segs_read_write_addr"
7819.IP "\fB\-single_module\fR" 4
7820.IX Item "-single_module"
7821.IP "\fB\-static\fR" 4
7822.IX Item "-static"
7823.IP "\fB\-sub_library\fR" 4
7824.IX Item "-sub_library"
7825.IP "\fB\-sub_umbrella\fR" 4
7826.IX Item "-sub_umbrella"
7827.IP "\fB\-twolevel_namespace\fR" 4
7828.IX Item "-twolevel_namespace"
7829.IP "\fB\-umbrella\fR" 4
7830.IX Item "-umbrella"
7831.IP "\fB\-undefined\fR" 4
7832.IX Item "-undefined"
7833.IP "\fB\-unexported_symbols_list\fR" 4
7834.IX Item "-unexported_symbols_list"
7835.IP "\fB\-weak_reference_mismatches\fR" 4
7836.IX Item "-weak_reference_mismatches"
7837.IP "\fB\-whatsloaded\fR" 4
7838.IX Item "-whatsloaded"
7839.PD
7840These options are passed to the Darwin linker. The Darwin linker man page
7841describes them in detail.
7842.PP
7843\fI\s-1DEC\s0 Alpha Options\fR
7844.IX Subsection "DEC Alpha Options"
7845.PP
7846These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
7847.IP "\fB\-mno\-soft\-float\fR" 4
7848.IX Item "-mno-soft-float"
7849.PD 0
7850.IP "\fB\-msoft\-float\fR" 4
7851.IX Item "-msoft-float"
7852.PD
7853Use (do not use) the hardware floating-point instructions for
7854floating-point operations. When \fB\-msoft\-float\fR is specified,
7855functions in \fIlibgcc.a\fR will be used to perform floating-point
7856operations. Unless they are replaced by routines that emulate the
7857floating-point operations, or compiled in such a way as to call such
7858emulations routines, these routines will issue floating-point
7859operations. If you are compiling for an Alpha without floating-point
7860operations, you must ensure that the library is built so as not to call
7861them.
7862.Sp
7863Note that Alpha implementations without floating-point operations are
7864required to have floating-point registers.
7865.IP "\fB\-mfp\-reg\fR" 4
7866.IX Item "-mfp-reg"
7867.PD 0
7868.IP "\fB\-mno\-fp\-regs\fR" 4
7869.IX Item "-mno-fp-regs"
7870.PD
7871Generate code that uses (does not use) the floating-point register set.
7872\&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR. If the floating-point
7873register set is not used, floating point operands are passed in integer
7874registers as if they were integers and floating-point results are passed
7875in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence,
7876so any function with a floating-point argument or return value called by code
7877compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
7878option.
7879.Sp
7880A typical use of this option is building a kernel that does not use,
7881and hence need not save and restore, any floating-point registers.
7882.IP "\fB\-mieee\fR" 4
7883.IX Item "-mieee"
7884The Alpha architecture implements floating-point hardware optimized for
7885maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating
7886point standard. However, for full compliance, software assistance is
7887required. This option generates code fully \s-1IEEE\s0 compliant code
7888\&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
7889If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
7890defined during compilation. The resulting code is less efficient but is
7891able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
7892values such as not-a-number and plus/minus infinity. Other Alpha
7893compilers call this option \fB\-ieee_with_no_inexact\fR.
7894.IP "\fB\-mieee\-with\-inexact\fR" 4
7895.IX Item "-mieee-with-inexact"
7896This is like \fB\-mieee\fR except the generated code also maintains
7897the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the
7898generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to
7899\&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
7900macro. On some Alpha implementations the resulting code may execute
7901significantly slower than the code generated by default. Since there is
7902very little code that depends on the \fIinexact-flag\fR, you should
7903normally not specify this option. Other Alpha compilers call this
7904option \fB\-ieee_with_inexact\fR.
7905.IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
7906.IX Item "-mfp-trap-mode=trap-mode"
7907This option controls what floating-point related traps are enabled.
7908Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
7909The trap mode can be set to one of four values:
7910.RS 4
7911.IP "\fBn\fR" 4
7912.IX Item "n"
7913This is the default (normal) setting. The only traps that are enabled
7914are the ones that cannot be disabled in software (e.g., division by zero
7915trap).
7916.IP "\fBu\fR" 4
7917.IX Item "u"
7918In addition to the traps enabled by \fBn\fR, underflow traps are enabled
7919as well.
7920.IP "\fBsu\fR" 4
7921.IX Item "su"
7922Like \fBu\fR, but the instructions are marked to be safe for software
7923completion (see Alpha architecture manual for details).
7924.IP "\fBsui\fR" 4
7925.IX Item "sui"
7926Like \fBsu\fR, but inexact traps are enabled as well.
7927.RE
7928.RS 4
7929.RE
7930.IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
7931.IX Item "-mfp-rounding-mode=rounding-mode"
7932Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option
7933\&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one
7934of:
7935.RS 4
7936.IP "\fBn\fR" 4
7937.IX Item "n"
7938Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards
7939the nearest machine number or towards the even machine number in case
7940of a tie.
7941.IP "\fBm\fR" 4
7942.IX Item "m"
7943Round towards minus infinity.
7944.IP "\fBc\fR" 4
7945.IX Item "c"
7946Chopped rounding mode. Floating point numbers are rounded towards zero.
7947.IP "\fBd\fR" 4
7948.IX Item "d"
7949Dynamic rounding mode. A field in the floating point control register
7950(\fIfpcr\fR, see Alpha architecture reference manual) controls the
7951rounding mode in effect. The C library initializes this register for
7952rounding towards plus infinity. Thus, unless your program modifies the
7953\&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
7954.RE
7955.RS 4
7956.RE
7957.IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
7958.IX Item "-mtrap-precision=trap-precision"
7959In the Alpha architecture, floating point traps are imprecise. This
7960means without software assistance it is impossible to recover from a
7961floating trap and program execution normally needs to be terminated.
7962\&\s-1GCC\s0 can generate code that can assist operating system trap handlers
7963in determining the exact location that caused a floating point trap.
7964Depending on the requirements of an application, different levels of
7965precisions can be selected:
7966.RS 4
7967.IP "\fBp\fR" 4
7968.IX Item "p"
7969Program precision. This option is the default and means a trap handler
7970can only identify which program caused a floating point exception.
7971.IP "\fBf\fR" 4
7972.IX Item "f"
7973Function precision. The trap handler can determine the function that
7974caused a floating point exception.
7975.IP "\fBi\fR" 4
7976.IX Item "i"
7977Instruction precision. The trap handler can determine the exact
7978instruction that caused a floating point exception.
7979.RE
7980.RS 4
7981.Sp
7982Other Alpha compilers provide the equivalent options called
7983\&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
7984.RE
7985.IP "\fB\-mieee\-conformant\fR" 4
7986.IX Item "-mieee-conformant"
7987This option marks the generated code as \s-1IEEE\s0 conformant. You must not
7988use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
7989\&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR. Its only effect
7990is to emit the line \fB.eflag 48\fR in the function prologue of the
7991generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that
7992IEEE-conformant math library routines will be linked in.
7993.IP "\fB\-mbuild\-constants\fR" 4
7994.IX Item "-mbuild-constants"
7995Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
7996see if it can construct it from smaller constants in two or three
7997instructions. If it cannot, it will output the constant as a literal and
7998generate code to load it from the data segment at runtime.
7999.Sp
8000Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
8001using code, even if it takes more instructions (the maximum is six).
8002.Sp
8003You would typically use this option to build a shared library dynamic
8004loader. Itself a shared library, it must relocate itself in memory
8005before it can find the variables and constants in its own data segment.
8006.IP "\fB\-malpha\-as\fR" 4
8007.IX Item "-malpha-as"
8008.PD 0
8009.IP "\fB\-mgas\fR" 4
8010.IX Item "-mgas"
8011.PD
8012Select whether to generate code to be assembled by the vendor-supplied
8013assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
8014.IP "\fB\-mbwx\fR" 4
8015.IX Item "-mbwx"
8016.PD 0
8017.IP "\fB\-mno\-bwx\fR" 4
8018.IX Item "-mno-bwx"
8019.IP "\fB\-mcix\fR" 4
8020.IX Item "-mcix"
8021.IP "\fB\-mno\-cix\fR" 4
8022.IX Item "-mno-cix"
8023.IP "\fB\-mfix\fR" 4
8024.IX Item "-mfix"
8025.IP "\fB\-mno\-fix\fR" 4
8026.IX Item "-mno-fix"
8027.IP "\fB\-mmax\fR" 4
8028.IX Item "-mmax"
8029.IP "\fB\-mno\-max\fR" 4
8030.IX Item "-mno-max"
8031.PD
8032Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
8033\&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction
8034sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
8035of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
8036.IP "\fB\-mfloat\-vax\fR" 4
8037.IX Item "-mfloat-vax"
8038.PD 0
8039.IP "\fB\-mfloat\-ieee\fR" 4
8040.IX Item "-mfloat-ieee"
8041.PD
8042Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
8043arithmetic instead of \s-1IEEE\s0 single and double precision.
8044.IP "\fB\-mexplicit\-relocs\fR" 4
8045.IX Item "-mexplicit-relocs"
8046.PD 0
8047.IP "\fB\-mno\-explicit\-relocs\fR" 4
8048.IX Item "-mno-explicit-relocs"
8049.PD
8050Older Alpha assemblers provided no way to generate symbol relocations
8051except via assembler macros. Use of these macros does not allow
8052optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12
8053supports a new syntax that allows the compiler to explicitly mark
8054which relocations should apply to which instructions. This option
8055is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
8056the assembler when it is built and sets the default accordingly.
8057.IP "\fB\-msmall\-data\fR" 4
8058.IX Item "-msmall-data"
8059.PD 0
8060.IP "\fB\-mlarge\-data\fR" 4
8061.IX Item "-mlarge-data"
8062.PD
8063When \fB\-mexplicit\-relocs\fR is in effect, static data is
8064accessed via \fIgp-relative\fR relocations. When \fB\-msmall\-data\fR
8065is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
8066(the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
806716\-bit relocations off of the \f(CW$gp\fR register. This limits the
8068size of the small data area to 64KB, but allows the variables to be
8069directly accessed via a single instruction.
8070.Sp
8071The default is \fB\-mlarge\-data\fR. With this option the data area
8072is limited to just below 2GB. Programs that require more than 2GB of
8073data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
8074heap instead of in the program's data segment.
8075.Sp
8076When generating code for shared libraries, \fB\-fpic\fR implies
8077\&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
8078.IP "\fB\-msmall\-text\fR" 4
8079.IX Item "-msmall-text"
8080.PD 0
8081.IP "\fB\-mlarge\-text\fR" 4
8082.IX Item "-mlarge-text"
8083.PD
8084When \fB\-msmall\-text\fR is used, the compiler assumes that the
8085code of the entire program (or shared library) fits in 4MB, and is
8086thus reachable with a branch instruction. When \fB\-msmall\-data\fR
8087is used, the compiler can assume that all local symbols share the
8088same \f(CW$gp\fR value, and thus reduce the number of instructions
8089required for a function call from 4 to 1.
8090.Sp
8091The default is \fB\-mlarge\-text\fR.
8092.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
8093.IX Item "-mcpu=cpu_type"
8094Set the instruction set and instruction scheduling parameters for
8095machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR
8096style name or the corresponding chip number. \s-1GCC\s0 supports scheduling
8097parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
8098choose the default values for the instruction set from the processor
8099you specify. If you do not specify a processor type, \s-1GCC\s0 will default
8100to the processor on which the compiler was built.
8101.Sp
8102Supported values for \fIcpu_type\fR are
8103.RS 4
8104.IP "\fBev4\fR" 4
8105.IX Item "ev4"
8106.PD 0
8107.IP "\fBev45\fR" 4
8108.IX Item "ev45"
8109.IP "\fB21064\fR" 4
8110.IX Item "21064"
8111.PD
8112Schedules as an \s-1EV4\s0 and has no instruction set extensions.
8113.IP "\fBev5\fR" 4
8114.IX Item "ev5"
8115.PD 0
8116.IP "\fB21164\fR" 4
8117.IX Item "21164"
8118.PD
8119Schedules as an \s-1EV5\s0 and has no instruction set extensions.
8120.IP "\fBev56\fR" 4
8121.IX Item "ev56"
8122.PD 0
8123.IP "\fB21164a\fR" 4
8124.IX Item "21164a"
8125.PD
8126Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
8127.IP "\fBpca56\fR" 4
8128.IX Item "pca56"
8129.PD 0
8130.IP "\fB21164pc\fR" 4
8131.IX Item "21164pc"
8132.IP "\fB21164PC\fR" 4
8133.IX Item "21164PC"
8134.PD
8135Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
8136.IP "\fBev6\fR" 4
8137.IX Item "ev6"
8138.PD 0
8139.IP "\fB21264\fR" 4
8140.IX Item "21264"
8141.PD
8142Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
8143.IP "\fBev67\fR" 4
8144.IX Item "ev67"
8145.PD 0
8146.IP "\fB21264a\fR" 4
8147.IX Item "21264a"
8148.PD
8149Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
8150.RE
8151.RS 4
8152.RE
8153.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
8154.IX Item "-mtune=cpu_type"
8155Set only the instruction scheduling parameters for machine type
8156\&\fIcpu_type\fR. The instruction set is not changed.
8157.IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
8158.IX Item "-mmemory-latency=time"
8159Sets the latency the scheduler should assume for typical memory
8160references as seen by the application. This number is highly
8161dependent on the memory access patterns used by the application
8162and the size of the external cache on the machine.
8163.Sp
8164Valid options for \fItime\fR are
8165.RS 4
8166.IP "\fInumber\fR" 4
8167.IX Item "number"
8168A decimal number representing clock cycles.
8169.IP "\fBL1\fR" 4
8170.IX Item "L1"
8171.PD 0
8172.IP "\fBL2\fR" 4
8173.IX Item "L2"
8174.IP "\fBL3\fR" 4
8175.IX Item "L3"
8176.IP "\fBmain\fR" 4
8177.IX Item "main"
8178.PD
8179The compiler contains estimates of the number of clock cycles for
8180\&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
8181(also called Dcache, Scache, and Bcache), as well as to main memory.
8182Note that L3 is only valid for \s-1EV5\s0.
8183.RE
8184.RS 4
8185.RE
8186.PP
8187\fI\s-1DEC\s0 Alpha/VMS Options\fR
8188.IX Subsection "DEC Alpha/VMS Options"
8189.PP
8190These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
8191.IP "\fB\-mvms\-return\-codes\fR" 4
8192.IX Item "-mvms-return-codes"
8193Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
8194style condition (e.g. error) codes.
8195.PP
8196\fI\s-1FRV\s0 Options\fR
8197.IX Subsection "FRV Options"
8198.IP "\fB\-mgpr\-32\fR" 4
8199.IX Item "-mgpr-32"
8200Only use the first 32 general purpose registers.
8201.IP "\fB\-mgpr\-64\fR" 4
8202.IX Item "-mgpr-64"
8203Use all 64 general purpose registers.
8204.IP "\fB\-mfpr\-32\fR" 4
8205.IX Item "-mfpr-32"
8206Use only the first 32 floating point registers.
8207.IP "\fB\-mfpr\-64\fR" 4
8208.IX Item "-mfpr-64"
8209Use all 64 floating point registers
8210.IP "\fB\-mhard\-float\fR" 4
8211.IX Item "-mhard-float"
8212Use hardware instructions for floating point operations.
8213.IP "\fB\-msoft\-float\fR" 4
8214.IX Item "-msoft-float"
8215Use library routines for floating point operations.
8216.IP "\fB\-malloc\-cc\fR" 4
8217.IX Item "-malloc-cc"
8218Dynamically allocate condition code registers.
8219.IP "\fB\-mfixed\-cc\fR" 4
8220.IX Item "-mfixed-cc"
8221Do not try to dynamically allocate condition code registers, only
8222use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
8223.IP "\fB\-mdword\fR" 4
8224.IX Item "-mdword"
8225Change \s-1ABI\s0 to use double word insns.
8226.IP "\fB\-mno\-dword\fR" 4
8227.IX Item "-mno-dword"
8228Do not use double word instructions.
8229.IP "\fB\-mdouble\fR" 4
8230.IX Item "-mdouble"
8231Use floating point double instructions.
8232.IP "\fB\-mno\-double\fR" 4
8233.IX Item "-mno-double"
8234Do not use floating point double instructions.
8235.IP "\fB\-mmedia\fR" 4
8236.IX Item "-mmedia"
8237Use media instructions.
8238.IP "\fB\-mno\-media\fR" 4
8239.IX Item "-mno-media"
8240Do not use media instructions.
8241.IP "\fB\-mmuladd\fR" 4
8242.IX Item "-mmuladd"
8243Use multiply and add/subtract instructions.
8244.IP "\fB\-mno\-muladd\fR" 4
8245.IX Item "-mno-muladd"
8246Do not use multiply and add/subtract instructions.
8247.IP "\fB\-mfdpic\fR" 4
8248.IX Item "-mfdpic"
8249Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
8250pointers to functions. Without any PIC/PIE\-related options, it
8251implies \fB\-fPIE\fR. With \fB\-fpic\fR or \fB\-fpie\fR, it
8252assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
8253\&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
8254are computed with 32 bits.
8255.IP "\fB\-minline\-plt\fR" 4
8256.IX Item "-minline-plt"
8257Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
8258not known to bind locally. It has no effect without \fB\-mfdpic\fR.
8259It's enabled by default if optimizing for speed and compiling for
8260shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
8261optimization option such as \fB\-O3\fR or above is present in the
8262command line.
8263.IP "\fB\-mTLS\fR" 4
8264.IX Item "-mTLS"
8265Assume a large \s-1TLS\s0 segment when generating thread-local code.
8266.IP "\fB\-mtls\fR" 4
8267.IX Item "-mtls"
8268Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
8269.IP "\fB\-mgprel\-ro\fR" 4
8270.IX Item "-mgprel-ro"
8271Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
8272that is known to be in read-only sections. It's enabled by default,
8273except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
8274make the global offset table smaller, it trades 1 instruction for 4.
8275With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
8276one of which may be shared by multiple symbols, and it avoids the need
8277for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
8278win. If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
8279.IP "\fB\-multilib\-library\-pic\fR" 4
8280.IX Item "-multilib-library-pic"
8281Link with the (library, not \s-1FD\s0) pic libraries. It's implied by
8282\&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
8283\&\fB\-fpic\fR without \fB\-mfdpic\fR. You should never have to use
8284it explicitly.
8285.IP "\fB\-mlinked\-fp\fR" 4
8286.IX Item "-mlinked-fp"
8287Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
8288a stack frame is allocated. This option is enabled by default and can
8289be disabled with \fB\-mno\-linked\-fp\fR.
8290.IP "\fB\-mlong\-calls\fR" 4
8291.IX Item "-mlong-calls"
8292Use indirect addressing to call functions outside the current
8293compilation unit. This allows the functions to be placed anywhere
8294within the 32\-bit address space.
8295.IP "\fB\-malign\-labels\fR" 4
8296.IX Item "-malign-labels"
8297Try to align labels to an 8\-byte boundary by inserting nops into the
8298previous packet. This option only has an effect when \s-1VLIW\s0 packing
8299is enabled. It doesn't create new packets; it merely adds nops to
8300existing ones.
8301.IP "\fB\-mlibrary\-pic\fR" 4
8302.IX Item "-mlibrary-pic"
8303Generate position-independent \s-1EABI\s0 code.
8304.IP "\fB\-macc\-4\fR" 4
8305.IX Item "-macc-4"
8306Use only the first four media accumulator registers.
8307.IP "\fB\-macc\-8\fR" 4
8308.IX Item "-macc-8"
8309Use all eight media accumulator registers.
8310.IP "\fB\-mpack\fR" 4
8311.IX Item "-mpack"
8312Pack \s-1VLIW\s0 instructions.
8313.IP "\fB\-mno\-pack\fR" 4
8314.IX Item "-mno-pack"
8315Do not pack \s-1VLIW\s0 instructions.
8316.IP "\fB\-mno\-eflags\fR" 4
8317.IX Item "-mno-eflags"
8318Do not mark \s-1ABI\s0 switches in e_flags.
8319.IP "\fB\-mcond\-move\fR" 4
8320.IX Item "-mcond-move"
8321Enable the use of conditional-move instructions (default).
8322.Sp
8323This switch is mainly for debugging the compiler and will likely be removed
8324in a future version.
8325.IP "\fB\-mno\-cond\-move\fR" 4
8326.IX Item "-mno-cond-move"
8327Disable the use of conditional-move instructions.
8328.Sp
8329This switch is mainly for debugging the compiler and will likely be removed
8330in a future version.
8331.IP "\fB\-mscc\fR" 4
8332.IX Item "-mscc"
8333Enable the use of conditional set instructions (default).
8334.Sp
8335This switch is mainly for debugging the compiler and will likely be removed
8336in a future version.
8337.IP "\fB\-mno\-scc\fR" 4
8338.IX Item "-mno-scc"
8339Disable the use of conditional set instructions.
8340.Sp
8341This switch is mainly for debugging the compiler and will likely be removed
8342in a future version.
8343.IP "\fB\-mcond\-exec\fR" 4
8344.IX Item "-mcond-exec"
8345Enable the use of conditional execution (default).
8346.Sp
8347This switch is mainly for debugging the compiler and will likely be removed
8348in a future version.
8349.IP "\fB\-mno\-cond\-exec\fR" 4
8350.IX Item "-mno-cond-exec"
8351Disable the use of conditional execution.
8352.Sp
8353This switch is mainly for debugging the compiler and will likely be removed
8354in a future version.
8355.IP "\fB\-mvliw\-branch\fR" 4
8356.IX Item "-mvliw-branch"
8357Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
8358.Sp
8359This switch is mainly for debugging the compiler and will likely be removed
8360in a future version.
8361.IP "\fB\-mno\-vliw\-branch\fR" 4
8362.IX Item "-mno-vliw-branch"
8363Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
8364.Sp
8365This switch is mainly for debugging the compiler and will likely be removed
8366in a future version.
8367.IP "\fB\-mmulti\-cond\-exec\fR" 4
8368.IX Item "-mmulti-cond-exec"
8369Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
8370(default).
8371.Sp
8372This switch is mainly for debugging the compiler and will likely be removed
8373in a future version.
8374.IP "\fB\-mno\-multi\-cond\-exec\fR" 4
8375.IX Item "-mno-multi-cond-exec"
8376Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
8377.Sp
8378This switch is mainly for debugging the compiler and will likely be removed
8379in a future version.
8380.IP "\fB\-mnested\-cond\-exec\fR" 4
8381.IX Item "-mnested-cond-exec"
8382Enable nested conditional execution optimizations (default).
8383.Sp
8384This switch is mainly for debugging the compiler and will likely be removed
8385in a future version.
8386.IP "\fB\-mno\-nested\-cond\-exec\fR" 4
8387.IX Item "-mno-nested-cond-exec"
8388Disable nested conditional execution optimizations.
8389.Sp
8390This switch is mainly for debugging the compiler and will likely be removed
8391in a future version.
8392.IP "\fB\-moptimize\-membar\fR" 4
8393.IX Item "-moptimize-membar"
8394This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
8395compiler generated code. It is enabled by default.
8396.IP "\fB\-mno\-optimize\-membar\fR" 4
8397.IX Item "-mno-optimize-membar"
8398This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
8399instructions from the generated code.
8400.IP "\fB\-mtomcat\-stats\fR" 4
8401.IX Item "-mtomcat-stats"
8402Cause gas to print out tomcat statistics.
8403.IP "\fB\-mcpu=\fR\fIcpu\fR" 4
8404.IX Item "-mcpu=cpu"
8405Select the processor type for which to generate code. Possible values are
8406\&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
8407\&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
8408.PP
8409\fIGNU/Linux Options\fR
8410.IX Subsection "GNU/Linux Options"
8411.PP
8412These \fB\-m\fR options are defined for GNU/Linux targets:
8413.IP "\fB\-mglibc\fR" 4
8414.IX Item "-mglibc"
8415Use the \s-1GNU\s0 C library instead of uClibc. This is the default except
8416on \fB*\-*\-linux\-*uclibc*\fR targets.
8417.IP "\fB\-muclibc\fR" 4
8418.IX Item "-muclibc"
8419Use uClibc instead of the \s-1GNU\s0 C library. This is the default on
8420\&\fB*\-*\-linux\-*uclibc*\fR targets.
8421.PP
8422\fIH8/300 Options\fR
8423.IX Subsection "H8/300 Options"
8424.PP
8425These \fB\-m\fR options are defined for the H8/300 implementations:
8426.IP "\fB\-mrelax\fR" 4
8427.IX Item "-mrelax"
8428Shorten some address references at link time, when possible; uses the
8429linker option \fB\-relax\fR.
8430.IP "\fB\-mh\fR" 4
8431.IX Item "-mh"
8432Generate code for the H8/300H.
8433.IP "\fB\-ms\fR" 4
8434.IX Item "-ms"
8435Generate code for the H8S.
8436.IP "\fB\-mn\fR" 4
8437.IX Item "-mn"
8438Generate code for the H8S and H8/300H in the normal mode. This switch
8439must be used either with \fB\-mh\fR or \fB\-ms\fR.
8440.IP "\fB\-ms2600\fR" 4
8441.IX Item "-ms2600"
8442Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR.
8443.IP "\fB\-mint32\fR" 4
8444.IX Item "-mint32"
8445Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
8446.IP "\fB\-malign\-300\fR" 4
8447.IX Item "-malign-300"
8448On the H8/300H and H8S, use the same alignment rules as for the H8/300.
8449The default for the H8/300H and H8S is to align longs and floats on 4
8450byte boundaries.
8451\&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
8452This option has no effect on the H8/300.
8453.PP
8454\fI\s-1HPPA\s0 Options\fR
8455.IX Subsection "HPPA Options"
8456.PP
8457These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
8458.IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
8459.IX Item "-march=architecture-type"
8460Generate code for the specified architecture. The choices for
8461\&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
84621.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to
8463\&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
8464architecture option for your machine. Code compiled for lower numbered
8465architectures will run on higher numbered architectures, but not the
8466other way around.
8467.IP "\fB\-mpa\-risc\-1\-0\fR" 4
8468.IX Item "-mpa-risc-1-0"
8469.PD 0
8470.IP "\fB\-mpa\-risc\-1\-1\fR" 4
8471.IX Item "-mpa-risc-1-1"
8472.IP "\fB\-mpa\-risc\-2\-0\fR" 4
8473.IX Item "-mpa-risc-2-0"
8474.PD
8475Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
8476.IP "\fB\-mbig\-switch\fR" 4
8477.IX Item "-mbig-switch"
8478Generate code suitable for big switch tables. Use this option only if
8479the assembler/linker complain about out of range branches within a switch
8480table.
8481.IP "\fB\-mjump\-in\-delay\fR" 4
8482.IX Item "-mjump-in-delay"
8483Fill delay slots of function calls with unconditional jump instructions
8484by modifying the return pointer for the function call to be the target
8485of the conditional jump.
8486.IP "\fB\-mdisable\-fpregs\fR" 4
8487.IX Item "-mdisable-fpregs"
8488Prevent floating point registers from being used in any manner. This is
8489necessary for compiling kernels which perform lazy context switching of
8490floating point registers. If you use this option and attempt to perform
8491floating point operations, the compiler will abort.
8492.IP "\fB\-mdisable\-indexing\fR" 4
8493.IX Item "-mdisable-indexing"
8494Prevent the compiler from using indexing address modes. This avoids some
8495rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
8496.IP "\fB\-mno\-space\-regs\fR" 4
8497.IX Item "-mno-space-regs"
8498Generate code that assumes the target has no space registers. This allows
8499\&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
8500.Sp
8501Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
8502.IP "\fB\-mfast\-indirect\-calls\fR" 4
8503.IX Item "-mfast-indirect-calls"
8504Generate code that assumes calls never cross space boundaries. This
8505allows \s-1GCC\s0 to emit code which performs faster indirect calls.
8506.Sp
8507This option will not work in the presence of shared libraries or nested
8508functions.
8509.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
8510.IX Item "-mfixed-range=register-range"
8511Generate code treating the given register range as fixed registers.
8512A fixed register is one that the register allocator can not use. This is
8513useful when compiling kernel code. A register range is specified as
8514two registers separated by a dash. Multiple register ranges can be
8515specified separated by a comma.
8516.IP "\fB\-mlong\-load\-store\fR" 4
8517.IX Item "-mlong-load-store"
8518Generate 3\-instruction load and store sequences as sometimes required by
8519the HP-UX 10 linker. This is equivalent to the \fB+k\fR option to
8520the \s-1HP\s0 compilers.
8521.IP "\fB\-mportable\-runtime\fR" 4
8522.IX Item "-mportable-runtime"
8523Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
8524.IP "\fB\-mgas\fR" 4
8525.IX Item "-mgas"
8526Enable the use of assembler directives only \s-1GAS\s0 understands.
8527.IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
8528.IX Item "-mschedule=cpu-type"
8529Schedule code according to the constraints for the machine type
8530\&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR
8531\&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer
8532to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
8533proper scheduling option for your machine. The default scheduling is
8534\&\fB8000\fR.
8535.IP "\fB\-mlinker\-opt\fR" 4
8536.IX Item "-mlinker-opt"
8537Enable the optimization pass in the HP-UX linker. Note this makes symbolic
8538debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
8539linkers in which they give bogus error messages when linking some programs.
8540.IP "\fB\-msoft\-float\fR" 4
8541.IX Item "-msoft-float"
8542Generate output containing library calls for floating point.
8543\&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
8544targets. Normally the facilities of the machine's usual C compiler are
8545used, but this cannot be done directly in cross\-compilation. You must make
8546your own arrangements to provide suitable library functions for
8547cross\-compilation. The embedded target \fBhppa1.1\-*\-pro\fR
8548does provide software floating point support.
8549.Sp
8550\&\fB\-msoft\-float\fR changes the calling convention in the output file;
8551therefore, it is only useful if you compile \fIall\fR of a program with
8552this option. In particular, you need to compile \fIlibgcc.a\fR, the
8553library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
8554this to work.
8555.IP "\fB\-msio\fR" 4
8556.IX Item "-msio"
8557Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is
8558\&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
8559\&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These
8560options are available under HP-UX and \s-1HI\-UX\s0.
8561.IP "\fB\-mgnu\-ld\fR" 4
8562.IX Item "-mgnu-ld"
8563Use \s-1GNU\s0 ld specific options. This passes \fB\-shared\fR to ld when
8564building a shared library. It is the default when \s-1GCC\s0 is configured,
8565explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not
8566have any affect on which ld is called, it only changes what parameters
8567are passed to that ld. The ld that is called is determined by the
8568\&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
8569finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed
8570using \fBwhich `gcc \-print\-prog\-name=ld`\fR. This option is only available
8571on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
8572.IP "\fB\-mhp\-ld\fR" 4
8573.IX Item "-mhp-ld"
8574Use \s-1HP\s0 ld specific options. This passes \fB\-b\fR to ld when building
8575a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
8576links. It is the default when \s-1GCC\s0 is configured, explicitly or
8577implicitly, with the \s-1HP\s0 linker. This option does not have any affect on
8578which ld is called, it only changes what parameters are passed to that
8579ld. The ld that is called is determined by the \fB\-\-with\-ld\fR
8580configure option, \s-1GCC\s0's program search path, and finally by the user's
8581\&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich
8582`gcc \-print\-prog\-name=ld`\fR. This option is only available on the 64 bit
8583HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
8584.IP "\fB\-mlong\-calls\fR" 4
8585.IX Item "-mlong-calls"
8586Generate code that uses long call sequences. This ensures that a call
8587is always able to reach linker generated stubs. The default is to generate
8588long calls only when the distance from the call site to the beginning
8589of the function or translation unit, as the case may be, exceeds a
8590predefined limit set by the branch type being used. The limits for
8591normal calls are 7,600,000 and 240,000 bytes, respectively for the
8592\&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at
8593240,000 bytes.
8594.Sp
8595Distances are measured from the beginning of functions when using the
8596\&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
8597and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
8598the \s-1SOM\s0 linker.
8599.Sp
8600It is normally not desirable to use this option as it will degrade
8601performance. However, it may be useful in large applications,
8602particularly when partial linking is used to build the application.
8603.Sp
8604The types of long calls used depends on the capabilities of the
8605assembler and linker, and the type of code being generated. The
8606impact on systems that support long absolute calls, and long pic
8607symbol-difference or pc-relative calls should be relatively small.
8608However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
8609and it is quite long.
8610.IP "\fB\-munix=\fR\fIunix-std\fR" 4
8611.IX Item "-munix=unix-std"
8612Generate compiler predefines and select a startfile for the specified
8613\&\s-1UNIX\s0 standard. The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
8614and \fB98\fR. \fB93\fR is supported on all HP-UX versions. \fB95\fR
8615is available on HP-UX 10.10 and later. \fB98\fR is available on HP-UX
861611.11 and later. The default values are \fB93\fR for HP-UX 10.00,
8617\&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
8618and later.
8619.Sp
8620\&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
8621\&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
8622and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
8623\&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
8624\&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
8625\&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
8626.Sp
8627It is \fIimportant\fR to note that this option changes the interfaces
8628for various library routines. It also affects the operational behavior
8629of the C library. Thus, \fIextreme\fR care is needed in using this
8630option.
8631.Sp
8632Library code that is intended to operate with more than one \s-1UNIX\s0
8633standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
8634as appropriate. Most \s-1GNU\s0 software doesn't provide this capability.
8635.IP "\fB\-nolibdld\fR" 4
8636.IX Item "-nolibdld"
8637Suppress the generation of link options to search libdld.sl when the
8638\&\fB\-static\fR option is specified on HP-UX 10 and later.
8639.IP "\fB\-static\fR" 4
8640.IX Item "-static"
8641The HP-UX implementation of setlocale in libc has a dependency on
8642libdld.sl. There isn't an archive version of libdld.sl. Thus,
8643when the \fB\-static\fR option is specified, special link options
8644are needed to resolve this dependency.
8645.Sp
8646On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
8647link with libdld.sl when the \fB\-static\fR option is specified.
8648This causes the resulting binary to be dynamic. On the 64\-bit port,
8649the linkers generate dynamic binaries by default in any case. The
8650\&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
8651adding these link options.
8652.IP "\fB\-threads\fR" 4
8653.IX Item "-threads"
8654Add support for multithreading with the \fIdce thread\fR library
8655under \s-1HP\-UX\s0. This option sets flags for both the preprocessor and
8656linker.
8657.PP
8658\fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
8659.IX Subsection "Intel 386 and AMD x86-64 Options"
8660.PP
8661These \fB\-m\fR options are defined for the i386 and x86\-64 family of
8662computers:
8663.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
8664.IX Item "-mtune=cpu-type"
8665Tune to \fIcpu-type\fR everything applicable about the generated code, except
8666for the \s-1ABI\s0 and the set of available instructions. The choices for
8667\&\fIcpu-type\fR are:
8668.RS 4
8669.IP "\fIgeneric\fR" 4
8670.IX Item "generic"
8671Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
8672If you know the \s-1CPU\s0 on which your code will run, then you should use
8673the corresponding \fB\-mtune\fR option instead of
8674\&\fB\-mtune=generic\fR. But, if you do not know exactly what \s-1CPU\s0 users
8675of your application will have, then you should use this option.
8676.Sp
8677As new processors are deployed in the marketplace, the behavior of this
8678option will change. Therefore, if you upgrade to a newer version of
8679\&\s-1GCC\s0, the code generated option will change to reflect the processors
8680that were most common when that version of \s-1GCC\s0 was released.
8681.Sp
8682There is no \fB\-march=generic\fR option because \fB\-march\fR
8683indicates the instruction set the compiler can use, and there is no
8684generic instruction set applicable to all processors. In contrast,
8685\&\fB\-mtune\fR indicates the processor (or, in this case, collection of
8686processors) for which the code is optimized.
8687.IP "\fInative\fR" 4
8688.IX Item "native"
8689This selects the \s-1CPU\s0 to tune for at compilation time by determining
8690the processor type of the compiling machine. Using \fB\-mtune=native\fR
8691will produce code optimized for the local machine under the constraints
8692of the selected instruction set. Using \fB\-march=native\fR will
8693enable all instruction subsets supported by the local machine (hence
8694the result might not run on different machines).
8695.IP "\fIi386\fR" 4
8696.IX Item "i386"
8697Original Intel's i386 \s-1CPU\s0.
8698.IP "\fIi486\fR" 4
8699.IX Item "i486"
8700Intel's i486 \s-1CPU\s0. (No scheduling is implemented for this chip.)
8701.IP "\fIi586, pentium\fR" 4
8702.IX Item "i586, pentium"
8703Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
8704.IP "\fIpentium-mmx\fR" 4
8705.IX Item "pentium-mmx"
8706Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
8707.IP "\fIpentiumpro\fR" 4
8708.IX Item "pentiumpro"
8709Intel PentiumPro \s-1CPU\s0.
8710.IP "\fIi686\fR" 4
8711.IX Item "i686"
8712Same as \f(CW\*(C`generic\*(C'\fR, but when used as \f(CW\*(C`march\*(C'\fR option, PentiumPro
8713instruction set will be used, so the code will run on all i686 family chips.
8714.IP "\fIpentium2\fR" 4
8715.IX Item "pentium2"
8716Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
8717.IP "\fIpentium3, pentium3m\fR" 4
8718.IX Item "pentium3, pentium3m"
8719Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
8720support.
8721.IP "\fIpentium-m\fR" 4
8722.IX Item "pentium-m"
8723Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
8724support. Used by Centrino notebooks.
8725.IP "\fIpentium4, pentium4m\fR" 4
8726.IX Item "pentium4, pentium4m"
8727Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
8728.IP "\fIprescott\fR" 4
8729.IX Item "prescott"
8730Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
8731set support.
8732.IP "\fInocona\fR" 4
8733.IX Item "nocona"
8734Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
8735\&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
8736.IP "\fIcore2\fR" 4
8737.IX Item "core2"
8738Intel Core2 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and \s-1SSSE3\s0
8739instruction set support.
8740.IP "\fIk6\fR" 4
8741.IX Item "k6"
8742\&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
8743.IP "\fIk6\-2, k6\-3\fR" 4
8744.IX Item "k6-2, k6-3"
8745Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
8746.IP "\fIathlon, athlon-tbird\fR" 4
8747.IX Item "athlon, athlon-tbird"
8748\&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions
8749support.
8750.IP "\fIathlon\-4, athlon\-xp, athlon-mp\fR" 4
8751.IX Item "athlon-4, athlon-xp, athlon-mp"
8752Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0
8753instruction set support.
8754.IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
8755.IX Item "k8, opteron, athlon64, athlon-fx"
8756\&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support. (This supersets
8757\&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
8758.IP "\fIk8-sse3, opteron-sse3, athlon64-sse3\fR" 4
8759.IX Item "k8-sse3, opteron-sse3, athlon64-sse3"
8760Improved versions of k8, opteron and athlon64 with \s-1SSE3\s0 instruction set support.
8761.IP "\fIwinchip\-c6\fR" 4
8762.IX Item "winchip-c6"
8763\&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
8764set support.
8765.IP "\fIwinchip2\fR" 4
8766.IX Item "winchip2"
8767\&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW!
8768instruction set support.
8769.IP "\fIc3\fR" 4
8770.IX Item "c3"
8771Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. (No scheduling is
8772implemented for this chip.)
8773.IP "\fIc3\-2\fR" 4
8774.IX Item "c3-2"
8775Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support. (No scheduling is
8776implemented for this chip.)
8777.IP "\fIgeode\fR" 4
8778.IX Item "geode"
8779Embedded AMD \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
8780.RE
8781.RS 4
8782.Sp
8783While picking a specific \fIcpu-type\fR will schedule things appropriately
8784for that particular chip, the compiler will not generate any code that
8785does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
8786being used.
8787.RE
8788.IP "\fB\-march=\fR\fIcpu-type\fR" 4
8789.IX Item "-march=cpu-type"
8790Generate instructions for the machine type \fIcpu-type\fR. The choices
8791for \fIcpu-type\fR are the same as for \fB\-mtune\fR. Moreover,
8792specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
8793.IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
8794.IX Item "-mcpu=cpu-type"
8795A deprecated synonym for \fB\-mtune\fR.
8796.IP "\fB\-m386\fR" 4
8797.IX Item "-m386"
8798.PD 0
8799.IP "\fB\-m486\fR" 4
8800.IX Item "-m486"
8801.IP "\fB\-mpentium\fR" 4
8802.IX Item "-mpentium"
8803.IP "\fB\-mpentiumpro\fR" 4
8804.IX Item "-mpentiumpro"
8805.PD
8806These options are synonyms for \fB\-mtune=i386\fR, \fB\-mtune=i486\fR,
8807\&\fB\-mtune=pentium\fR, and \fB\-mtune=pentiumpro\fR respectively.
8808These synonyms are deprecated.
8809.IP "\fB\-mfpmath=\fR\fIunit\fR" 4
8810.IX Item "-mfpmath=unit"
8811Generate floating point arithmetics for selected unit \fIunit\fR. The choices
8812for \fIunit\fR are:
8813.RS 4
8814.IP "\fB387\fR" 4
8815.IX Item "387"
8816Use the standard 387 floating point coprocessor present majority of chips and
8817emulated otherwise. Code compiled with this option will run almost everywhere.
8818The temporary results are computed in 80bit precision instead of precision
8819specified by the type resulting in slightly different results compared to most
8820of other chips. See \fB\-ffloat\-store\fR for more detailed description.
8821.Sp
8822This is the default choice for i386 compiler.
8823.IP "\fBsse\fR" 4
8824.IX Item "sse"
8825Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
8826This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
8827by Athlon\-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0
8828instruction set supports only single precision arithmetics, thus the double and
8829extended precision arithmetics is still done using 387. Later version, present
8830only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
8831arithmetics too.
8832.Sp
8833For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
8834or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
8835effective. For the x86\-64 compiler, these extensions are enabled by default.
8836.Sp
8837The resulting code should be considerably faster in the majority of cases and avoid
8838the numerical instability problems of 387 code, but may break some existing
8839code that expects temporaries to be 80bit.
8840.Sp
8841This is the default choice for the x86\-64 compiler.
8842.IP "\fBsse,387\fR" 4
8843.IX Item "sse,387"
8844Attempt to utilize both instruction sets at once. This effectively double the
8845amount of available registers and on chips with separate execution units for
8846387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is
8847still experimental, because the \s-1GCC\s0 register allocator does not model separate
8848functional units well resulting in instable performance.
8849.RE
8850.RS 4
8851.RE
8852.IP "\fB\-masm=\fR\fIdialect\fR" 4
8853.IX Item "-masm=dialect"
8854Output asm instructions using selected \fIdialect\fR. Supported
8855choices are \fBintel\fR or \fBatt\fR (the default one). Darwin does
8856not support \fBintel\fR.
8857.IP "\fB\-mieee\-fp\fR" 4
8858.IX Item "-mieee-fp"
8859.PD 0
8860.IP "\fB\-mno\-ieee\-fp\fR" 4
8861.IX Item "-mno-ieee-fp"
8862.PD
8863Control whether or not the compiler uses \s-1IEEE\s0 floating point
8864comparisons. These handle correctly the case where the result of a
8865comparison is unordered.
8866.IP "\fB\-msoft\-float\fR" 4
8867.IX Item "-msoft-float"
8868Generate output containing library calls for floating point.
8869\&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
8870Normally the facilities of the machine's usual C compiler are used, but
8871this can't be done directly in cross\-compilation. You must make your
8872own arrangements to provide suitable library functions for
8873cross\-compilation.
8874.Sp
8875On machines where a function returns floating point results in the 80387
8876register stack, some floating point opcodes may be emitted even if
8877\&\fB\-msoft\-float\fR is used.
8878.IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
8879.IX Item "-mno-fp-ret-in-387"
8880Do not use the \s-1FPU\s0 registers for return values of functions.
8881.Sp
8882The usual calling convention has functions return values of types
8883\&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
8884is no \s-1FPU\s0. The idea is that the operating system should emulate
8885an \s-1FPU\s0.
8886.Sp
8887The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
8888in ordinary \s-1CPU\s0 registers instead.
8889.IP "\fB\-mno\-fancy\-math\-387\fR" 4
8890.IX Item "-mno-fancy-math-387"
8891Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
8892\&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid
8893generating those instructions. This option is the default on FreeBSD,
8894OpenBSD and NetBSD. This option is overridden when \fB\-march\fR
8895indicates that the target cpu will always have an \s-1FPU\s0 and so the
8896instruction will not need emulation. As of revision 2.6.1, these
8897instructions are not generated unless you also use the
8898\&\fB\-funsafe\-math\-optimizations\fR switch.
8899.IP "\fB\-malign\-double\fR" 4
8900.IX Item "-malign-double"
8901.PD 0
8902.IP "\fB\-mno\-align\-double\fR" 4
8903.IX Item "-mno-align-double"
8904.PD
8905Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
8906\&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
8907boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
8908produce code that runs somewhat faster on a \fBPentium\fR at the
8909expense of more memory.
8910.Sp
8911On x86\-64, \fB\-malign\-double\fR is enabled by default.
8912.Sp
8913\&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
8914structures containing the above types will be aligned differently than
8915the published application binary interface specifications for the 386
8916and will not be binary compatible with structures in code compiled
8917without that switch.
8918.IP "\fB\-m96bit\-long\-double\fR" 4
8919.IX Item "-m96bit-long-double"
8920.PD 0
8921.IP "\fB\-m128bit\-long\-double\fR" 4
8922.IX Item "-m128bit-long-double"
8923.PD
8924These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
8925application binary interface specifies the size to be 96 bits,
8926so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
8927.Sp
8928Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
8929to be aligned to an 8 or 16 byte boundary. In arrays or structures
8930conforming to the \s-1ABI\s0, this would not be possible. So specifying a
8931\&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
8932to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
893332 bit zero.
8934.Sp
8935In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
8936its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
8937.Sp
8938Notice that neither of these options enable any extra precision over the x87
8939standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
8940.Sp
8941\&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
8942structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
8943their size as well as function calling convention for function taking
8944\&\f(CW\*(C`long double\*(C'\fR will be modified. Hence they will not be binary
8945compatible with arrays or structures in code compiled without that switch.
8946.IP "\fB\-mmlarge\-data\-threshold=\fR\fInumber\fR" 4
8947.IX Item "-mmlarge-data-threshold=number"
8948When \fB\-mcmodel=medium\fR is specified, the data greater than
8949\&\fIthreshold\fR are placed in large data section. This value must be the
8950same across all object linked into the binary and defaults to 65535.
8951.IP "\fB\-msvr3\-shlib\fR" 4
8952.IX Item "-msvr3-shlib"
8953.PD 0
8954.IP "\fB\-mno\-svr3\-shlib\fR" 4
8955.IX Item "-mno-svr3-shlib"
8956.PD
8957Control whether \s-1GCC\s0 places uninitialized local variables into the
8958\&\f(CW\*(C`bss\*(C'\fR or \f(CW\*(C`data\*(C'\fR segments. \fB\-msvr3\-shlib\fR places them
8959into \f(CW\*(C`bss\*(C'\fR. These options are meaningful only on System V Release 3.
8960.IP "\fB\-mrtd\fR" 4
8961.IX Item "-mrtd"
8962Use a different function-calling convention, in which functions that
8963take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
8964instruction, which pops their arguments while returning. This saves one
8965instruction in the caller since there is no need to pop the arguments
8966there.
8967.Sp
8968You can specify that an individual function is called with this calling
8969sequence with the function attribute \fBstdcall\fR. You can also
8970override the \fB\-mrtd\fR option by using the function attribute
8971\&\fBcdecl\fR.
8972.Sp
8973\&\fBWarning:\fR this calling convention is incompatible with the one
8974normally used on Unix, so you cannot use it if you need to call
8975libraries compiled with the Unix compiler.
8976.Sp
8977Also, you must provide function prototypes for all functions that
8978take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
8979otherwise incorrect code will be generated for calls to those
8980functions.
8981.Sp
8982In addition, seriously incorrect code will result if you call a
8983function with too many arguments. (Normally, extra arguments are
8984harmlessly ignored.)
8985.IP "\fB\-mregparm=\fR\fInum\fR" 4
8986.IX Item "-mregparm=num"
8987Control how many registers are used to pass integer arguments. By
8988default, no registers are used to pass arguments, and at most 3
8989registers can be used. You can control this behavior for a specific
8990function by using the function attribute \fBregparm\fR.
8991.Sp
8992\&\fBWarning:\fR if you use this switch, and
8993\&\fInum\fR is nonzero, then you must build all modules with the same
8994value, including any libraries. This includes the system libraries and
8995startup modules.
8996.IP "\fB\-msseregparm\fR" 4
8997.IX Item "-msseregparm"
8998Use \s-1SSE\s0 register passing conventions for float and double arguments
8999and return values. You can control this behavior for a specific
9000function by using the function attribute \fBsseregparm\fR.
9001.Sp
9002\&\fBWarning:\fR if you use this switch then you must build all
9003modules with the same value, including any libraries. This includes
9004the system libraries and startup modules.
9005.IP "\fB\-mstackrealign\fR" 4
9006.IX Item "-mstackrealign"
9007Realign the stack at entry. On the Intel x86, the
9008\&\fB\-mstackrealign\fR option will generate an alternate prologue and
9009epilogue that realigns the runtime stack. This supports mixing legacy
9010codes that keep a 4\-byte aligned stack with modern codes that keep a
901116\-byte stack for \s-1SSE\s0 compatibility. The alternate prologue and
9012epilogue are slower and bigger than the regular ones, and the
9013alternate prologue requires an extra scratch register; this lowers the
9014number of registers available if used in conjunction with the
9015\&\f(CW\*(C`regparm\*(C'\fR attribute. The \fB\-mstackrealign\fR option is
9016incompatible with the nested function prologue; this is considered a
9017hard error. See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
9018applicable to individual functions.
9019.IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
9020.IX Item "-mpreferred-stack-boundary=num"
9021Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
9022byte boundary. If \fB\-mpreferred\-stack\-boundary\fR is not specified,
9023the default is 4 (16 bytes or 128 bits).
9024.Sp
9025On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
9026should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
9027suffer significant run time performance penalties. On Pentium \s-1III\s0, the
9028Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
9029properly if it is not 16 byte aligned.
9030.Sp
9031To ensure proper alignment of this values on the stack, the stack boundary
9032must be as aligned as that required by any value stored on the stack.
9033Further, every function must be generated such that it keeps the stack
9034aligned. Thus calling a function compiled with a higher preferred
9035stack boundary from a function compiled with a lower preferred stack
9036boundary will most likely misalign the stack. It is recommended that
9037libraries that use callbacks always use the default setting.
9038.Sp
9039This extra alignment does consume extra stack space, and generally
9040increases code size. Code that is sensitive to stack space usage, such
9041as embedded systems and operating system kernels, may want to reduce the
9042preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
9043.IP "\fB\-mmmx\fR" 4
9044.IX Item "-mmmx"
9045.PD 0
9046.IP "\fB\-mno\-mmx\fR" 4
9047.IX Item "-mno-mmx"
9048.IP "\fB\-msse\fR" 4
9049.IX Item "-msse"
9050.IP "\fB\-mno\-sse\fR" 4
9051.IX Item "-mno-sse"
9052.IP "\fB\-msse2\fR" 4
9053.IX Item "-msse2"
9054.IP "\fB\-mno\-sse2\fR" 4
9055.IX Item "-mno-sse2"
9056.IP "\fB\-msse3\fR" 4
9057.IX Item "-msse3"
9058.IP "\fB\-mno\-sse3\fR" 4
9059.IX Item "-mno-sse3"
9060.IP "\fB\-mssse3\fR" 4
9061.IX Item "-mssse3"
9062.IP "\fB\-mno\-ssse3\fR" 4
9063.IX Item "-mno-ssse3"
9064.IP "\fB\-m3dnow\fR" 4
9065.IX Item "-m3dnow"
9066.IP "\fB\-mno\-3dnow\fR" 4
9067.IX Item "-mno-3dnow"
9068.PD
9069These switches enable or disable the use of instructions in the \s-1MMX\s0,
9070\&\s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0, \s-1SSSE3\s0 or 3DNow! extended instruction sets.
9071These extensions are also available as built-in functions: see
9072\fBX86 Built-in Functions\fR, for details of the functions enabled and
9073disabled by these switches.
9074.Sp
9075To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
9076code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
9077.Sp
9078These options will enable \s-1GCC\s0 to use these extended instructions in
9079generated code, even without \fB\-mfpmath=sse\fR. Applications which
9080perform runtime \s-1CPU\s0 detection must compile separate files for each
9081supported architecture, using the appropriate flags. In particular,
9082the file containing the \s-1CPU\s0 detection code should be compiled without
9083these options.
9084.IP "\fB\-mpush\-args\fR" 4
9085.IX Item "-mpush-args"
9086.PD 0
9087.IP "\fB\-mno\-push\-args\fR" 4
9088.IX Item "-mno-push-args"
9089.PD
9090Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter
9091and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
9092by default. In some cases disabling it may improve performance because of
9093improved scheduling and reduced dependencies.
9094.IP "\fB\-maccumulate\-outgoing\-args\fR" 4
9095.IX Item "-maccumulate-outgoing-args"
9096If enabled, the maximum amount of space required for outgoing arguments will be
9097computed in the function prologue. This is faster on most modern CPUs
9098because of reduced dependencies, improved scheduling and reduced stack usage
9099when preferred stack boundary is not equal to 2. The drawback is a notable
9100increase in code size. This switch implies \fB\-mno\-push\-args\fR.
9101.IP "\fB\-mthreads\fR" 4
9102.IX Item "-mthreads"
9103Support thread-safe exception handling on \fBMingw32\fR. Code that relies
9104on thread-safe exception handling must compile and link all code with the
9105\&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines
9106\&\fB\-D_MT\fR; when linking, it links in a special thread helper library
9107\&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
9108.IP "\fB\-mno\-align\-stringops\fR" 4
9109.IX Item "-mno-align-stringops"
9110Do not align destination of inlined string operations. This switch reduces
9111code size and improves performance in case the destination is already aligned,
9112but \s-1GCC\s0 doesn't know about it.
9113.IP "\fB\-minline\-all\-stringops\fR" 4
9114.IX Item "-minline-all-stringops"
9115By default \s-1GCC\s0 inlines string operations only when destination is known to be
9116aligned at least to 4 byte boundary. This enables more inlining, increase code
9117size, but may improve performance of code that depends on fast memcpy, strlen
9118and memset for short lengths.
9119.IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
9120.IX Item "-momit-leaf-frame-pointer"
9121Don't keep the frame pointer in a register for leaf functions. This
9122avoids the instructions to save, set up and restore frame pointers and
9123makes an extra register available in leaf functions. The option
9124\&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
9125which might make debugging harder.
9126.IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
9127.IX Item "-mtls-direct-seg-refs"
9128.PD 0
9129.IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
9130.IX Item "-mno-tls-direct-seg-refs"
9131.PD
9132Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
9133\&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
9134or whether the thread base pointer must be added. Whether or not this
9135is legal depends on the operating system, and whether it maps the
9136segment to cover the entire \s-1TLS\s0 area.
9137.Sp
9138For systems that use \s-1GNU\s0 libc, the default is on.
9139.PP
9140These \fB\-m\fR switches are supported in addition to the above
9141on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
9142.IP "\fB\-m32\fR" 4
9143.IX Item "-m32"
9144.PD 0
9145.IP "\fB\-m64\fR" 4
9146.IX Item "-m64"
9147.PD
9148Generate code for a 32\-bit or 64\-bit environment.
9149The 32\-bit environment sets int, long and pointer to 32 bits and
9150generates code that runs on any i386 system.
9151The 64\-bit environment sets int to 32 bits and long and pointer
9152to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. For
9153darwin only the \-m64 option turns off the \fB\-fno\-pic\fR and
9154\&\fB\-mdynamic\-no\-pic\fR options.
9155.IP "\fB\-mno\-red\-zone\fR" 4
9156.IX Item "-mno-red-zone"
9157Do not use a so called red zone for x86\-64 code. The red zone is mandated
9158by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
9159stack pointer that will not be modified by signal or interrupt handlers
9160and therefore can be used for temporary data without adjusting the stack
9161pointer. The flag \fB\-mno\-red\-zone\fR disables this red zone.
9162.IP "\fB\-mcmodel=small\fR" 4
9163.IX Item "-mcmodel=small"
9164Generate code for the small code model: the program and its symbols must
9165be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits.
9166Programs can be statically or dynamically linked. This is the default
9167code model.
9168.IP "\fB\-mcmodel=kernel\fR" 4
9169.IX Item "-mcmodel=kernel"
9170Generate code for the kernel code model. The kernel runs in the
9171negative 2 \s-1GB\s0 of the address space.
9172This model has to be used for Linux kernel code.
9173.IP "\fB\-mcmodel=medium\fR" 4
9174.IX Item "-mcmodel=medium"
9175Generate code for the medium model: The program is linked in the lower 2
9176\&\s-1GB\s0 of the address space but symbols can be located anywhere in the
9177address space. Programs can be statically or dynamically linked, but
9178building of shared libraries are not supported with the medium model.
9179.IP "\fB\-mcmodel=large\fR" 4
9180.IX Item "-mcmodel=large"
9181Generate code for the large model: This model makes no assumptions
9182about addresses and sizes of sections. Currently \s-1GCC\s0 does not implement
9183this model.
9184.PP
9185\fI\s-1IA\-64\s0 Options\fR
9186.IX Subsection "IA-64 Options"
9187.PP
9188These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
9189.IP "\fB\-mbig\-endian\fR" 4
9190.IX Item "-mbig-endian"
9191Generate code for a big endian target. This is the default for \s-1HP\-UX\s0.
9192.IP "\fB\-mlittle\-endian\fR" 4
9193.IX Item "-mlittle-endian"
9194Generate code for a little endian target. This is the default for \s-1AIX5\s0
9195and GNU/Linux.
9196.IP "\fB\-mgnu\-as\fR" 4
9197.IX Item "-mgnu-as"
9198.PD 0
9199.IP "\fB\-mno\-gnu\-as\fR" 4
9200.IX Item "-mno-gnu-as"
9201.PD
9202Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default.
9203.IP "\fB\-mgnu\-ld\fR" 4
9204.IX Item "-mgnu-ld"
9205.PD 0
9206.IP "\fB\-mno\-gnu\-ld\fR" 4
9207.IX Item "-mno-gnu-ld"
9208.PD
9209Generate (or don't) code for the \s-1GNU\s0 linker. This is the default.
9210.IP "\fB\-mno\-pic\fR" 4
9211.IX Item "-mno-pic"
9212Generate code that does not use a global pointer register. The result
9213is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
9214.IP "\fB\-mvolatile\-asm\-stop\fR" 4
9215.IX Item "-mvolatile-asm-stop"
9216.PD 0
9217.IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
9218.IX Item "-mno-volatile-asm-stop"
9219.PD
9220Generate (or don't) a stop bit immediately before and after volatile asm
9221statements.
9222.IP "\fB\-mregister\-names\fR" 4
9223.IX Item "-mregister-names"
9224.PD 0
9225.IP "\fB\-mno\-register\-names\fR" 4
9226.IX Item "-mno-register-names"
9227.PD
9228Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
9229the stacked registers. This may make assembler output more readable.
9230.IP "\fB\-mno\-sdata\fR" 4
9231.IX Item "-mno-sdata"
9232.PD 0
9233.IP "\fB\-msdata\fR" 4
9234.IX Item "-msdata"
9235.PD
9236Disable (or enable) optimizations that use the small data section. This may
9237be useful for working around optimizer bugs.
9238.IP "\fB\-mconstant\-gp\fR" 4
9239.IX Item "-mconstant-gp"
9240Generate code that uses a single constant global pointer value. This is
9241useful when compiling kernel code.
9242.IP "\fB\-mauto\-pic\fR" 4
9243.IX Item "-mauto-pic"
9244Generate code that is self\-relocatable. This implies \fB\-mconstant\-gp\fR.
9245This is useful when compiling firmware code.
9246.IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
9247.IX Item "-minline-float-divide-min-latency"
9248Generate code for inline divides of floating point values
9249using the minimum latency algorithm.
9250.IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
9251.IX Item "-minline-float-divide-max-throughput"
9252Generate code for inline divides of floating point values
9253using the maximum throughput algorithm.
9254.IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
9255.IX Item "-minline-int-divide-min-latency"
9256Generate code for inline divides of integer values
9257using the minimum latency algorithm.
9258.IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
9259.IX Item "-minline-int-divide-max-throughput"
9260Generate code for inline divides of integer values
9261using the maximum throughput algorithm.
9262.IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
9263.IX Item "-minline-sqrt-min-latency"
9264Generate code for inline square roots
9265using the minimum latency algorithm.
9266.IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
9267.IX Item "-minline-sqrt-max-throughput"
9268Generate code for inline square roots
9269using the maximum throughput algorithm.
9270.IP "\fB\-mno\-dwarf2\-asm\fR" 4
9271.IX Item "-mno-dwarf2-asm"
9272.PD 0
9273.IP "\fB\-mdwarf2\-asm\fR" 4
9274.IX Item "-mdwarf2-asm"
9275.PD
9276Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
9277info. This may be useful when not using the \s-1GNU\s0 assembler.
9278.IP "\fB\-mearly\-stop\-bits\fR" 4
9279.IX Item "-mearly-stop-bits"
9280.PD 0
9281.IP "\fB\-mno\-early\-stop\-bits\fR" 4
9282.IX Item "-mno-early-stop-bits"
9283.PD
9284Allow stop bits to be placed earlier than immediately preceding the
9285instruction that triggered the stop bit. This can improve instruction
9286scheduling, but does not always do so.
9287.IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
9288.IX Item "-mfixed-range=register-range"
9289Generate code treating the given register range as fixed registers.
9290A fixed register is one that the register allocator can not use. This is
9291useful when compiling kernel code. A register range is specified as
9292two registers separated by a dash. Multiple register ranges can be
9293specified separated by a comma.
9294.IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
9295.IX Item "-mtls-size=tls-size"
9296Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and
929764.
9298.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
9299.IX Item "-mtune=cpu-type"
9300Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
9301itanium, itanium1, merced, itanium2, and mckinley.
9302.IP "\fB\-mt\fR" 4
9303.IX Item "-mt"
9304.PD 0
9305.IP "\fB\-pthread\fR" 4
9306.IX Item "-pthread"
9307.PD
9308Add support for multithreading using the \s-1POSIX\s0 threads library. This
9309option sets flags for both the preprocessor and linker. It does
9310not affect the thread safety of object code produced by the compiler or
9311that of libraries supplied with it. These are HP-UX specific flags.
9312.IP "\fB\-milp32\fR" 4
9313.IX Item "-milp32"
9314.PD 0
9315.IP "\fB\-mlp64\fR" 4
9316.IX Item "-mlp64"
9317.PD
9318Generate code for a 32\-bit or 64\-bit environment.
9319The 32\-bit environment sets int, long and pointer to 32 bits.
9320The 64\-bit environment sets int to 32 bits and long and pointer
9321to 64 bits. These are HP-UX specific flags.
9322.IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
9323.IX Item "-mno-sched-br-data-spec"
9324.PD 0
9325.IP "\fB\-msched\-br\-data\-spec\fR" 4
9326.IX Item "-msched-br-data-spec"
9327.PD
9328(Dis/En)able data speculative scheduling before reload.
9329This will result in generation of the ld.a instructions and
9330the corresponding check instructions (ld.c / chk.a).
9331The default is 'disable'.
9332.IP "\fB\-msched\-ar\-data\-spec\fR" 4
9333.IX Item "-msched-ar-data-spec"
9334.PD 0
9335.IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
9336.IX Item "-mno-sched-ar-data-spec"
9337.PD
9338(En/Dis)able data speculative scheduling after reload.
9339This will result in generation of the ld.a instructions and
9340the corresponding check instructions (ld.c / chk.a).
9341The default is 'enable'.
9342.IP "\fB\-mno\-sched\-control\-spec\fR" 4
9343.IX Item "-mno-sched-control-spec"
9344.PD 0
9345.IP "\fB\-msched\-control\-spec\fR" 4
9346.IX Item "-msched-control-spec"
9347.PD
9348(Dis/En)able control speculative scheduling. This feature is
9349available only during region scheduling (i.e. before reload).
9350This will result in generation of the ld.s instructions and
9351the corresponding check instructions chk.s .
9352The default is 'disable'.
9353.IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
9354.IX Item "-msched-br-in-data-spec"
9355.PD 0
9356.IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
9357.IX Item "-mno-sched-br-in-data-spec"
9358.PD
9359(En/Dis)able speculative scheduling of the instructions that
9360are dependent on the data speculative loads before reload.
9361This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
9362The default is 'enable'.
9363.IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
9364.IX Item "-msched-ar-in-data-spec"
9365.PD 0
9366.IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
9367.IX Item "-mno-sched-ar-in-data-spec"
9368.PD
9369(En/Dis)able speculative scheduling of the instructions that
9370are dependent on the data speculative loads after reload.
9371This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
9372The default is 'enable'.
9373.IP "\fB\-msched\-in\-control\-spec\fR" 4
9374.IX Item "-msched-in-control-spec"
9375.PD 0
9376.IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
9377.IX Item "-mno-sched-in-control-spec"
9378.PD
9379(En/Dis)able speculative scheduling of the instructions that
9380are dependent on the control speculative loads.
9381This is effective only with \fB\-msched\-control\-spec\fR enabled.
9382The default is 'enable'.
9383.IP "\fB\-msched\-ldc\fR" 4
9384.IX Item "-msched-ldc"
9385.PD 0
9386.IP "\fB\-mno\-sched\-ldc\fR" 4
9387.IX Item "-mno-sched-ldc"
9388.PD
9389(En/Dis)able use of simple data speculation checks ld.c .
9390If disabled, only chk.a instructions will be emitted to check
9391data speculative loads.
9392The default is 'enable'.
9393.IP "\fB\-mno\-sched\-control\-ldc\fR" 4
9394.IX Item "-mno-sched-control-ldc"
9395.PD 0
9396.IP "\fB\-msched\-control\-ldc\fR" 4
9397.IX Item "-msched-control-ldc"
9398.PD
9399(Dis/En)able use of ld.c instructions to check control speculative loads.
9400If enabled, in case of control speculative load with no speculatively
9401scheduled dependent instructions this load will be emitted as ld.sa and
9402ld.c will be used to check it.
9403The default is 'disable'.
9404.IP "\fB\-mno\-sched\-spec\-verbose\fR" 4
9405.IX Item "-mno-sched-spec-verbose"
9406.PD 0
9407.IP "\fB\-msched\-spec\-verbose\fR" 4
9408.IX Item "-msched-spec-verbose"
9409.PD
9410(Dis/En)able printing of the information about speculative motions.
9411.IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
9412.IX Item "-mno-sched-prefer-non-data-spec-insns"
9413.PD 0
9414.IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
9415.IX Item "-msched-prefer-non-data-spec-insns"
9416.PD
9417If enabled, data speculative instructions will be chosen for schedule
9418only if there are no other choices at the moment. This will make
9419the use of the data speculation much more conservative.
9420The default is 'disable'.
9421.IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
9422.IX Item "-mno-sched-prefer-non-control-spec-insns"
9423.PD 0
9424.IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
9425.IX Item "-msched-prefer-non-control-spec-insns"
9426.PD
9427If enabled, control speculative instructions will be chosen for schedule
9428only if there are no other choices at the moment. This will make
9429the use of the control speculation much more conservative.
9430The default is 'disable'.
9431.IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
9432.IX Item "-mno-sched-count-spec-in-critical-path"
9433.PD 0
9434.IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
9435.IX Item "-msched-count-spec-in-critical-path"
9436.PD
9437If enabled, speculative dependencies will be considered during
9438computation of the instructions priorities. This will make the use of the
9439speculation a bit more conservative.
9440The default is 'disable'.
9441.PP
9442\fIM32C Options\fR
9443.IX Subsection "M32C Options"
9444.IP "\fB\-mcpu=\fR\fIname\fR" 4
9445.IX Item "-mcpu=name"
9446Select the \s-1CPU\s0 for which code is generated. \fIname\fR may be one of
9447\&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
9448/60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
9449the M32C/80 series.
9450.IP "\fB\-msim\fR" 4
9451.IX Item "-msim"
9452Specifies that the program will be run on the simulator. This causes
9453an alternate runtime library to be linked in which supports, for
9454example, file I/O. You must not use this option when generating
9455programs that will run on real hardware; you must provide your own
9456runtime library for whatever I/O functions are needed.
9457.IP "\fB\-memregs=\fR\fInumber\fR" 4
9458.IX Item "-memregs=number"
9459Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
9460during code generation. These pseudo-registers will be used like real
9461registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
9462code into available registers, and the performance penalty of using
9463memory instead of registers. Note that all modules in a program must
9464be compiled with the same value for this option. Because of that, you
9465must not use this option with the default runtime libraries gcc
9466builds.
9467.PP
9468\fIM32R/D Options\fR
9469.IX Subsection "M32R/D Options"
9470.PP
9471These \fB\-m\fR options are defined for Renesas M32R/D architectures:
9472.IP "\fB\-m32r2\fR" 4
9473.IX Item "-m32r2"
9474Generate code for the M32R/2.
9475.IP "\fB\-m32rx\fR" 4
9476.IX Item "-m32rx"
9477Generate code for the M32R/X.
9478.IP "\fB\-m32r\fR" 4
9479.IX Item "-m32r"
9480Generate code for the M32R. This is the default.
9481.IP "\fB\-mmodel=small\fR" 4
9482.IX Item "-mmodel=small"
9483Assume all objects live in the lower 16MB of memory (so that their addresses
9484can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
9485are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
9486This is the default.
9487.Sp
9488The addressability of a particular object can be set with the
9489\&\f(CW\*(C`model\*(C'\fR attribute.
9490.IP "\fB\-mmodel=medium\fR" 4
9491.IX Item "-mmodel=medium"
9492Assume objects may be anywhere in the 32\-bit address space (the compiler
9493will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
9494assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
9495.IP "\fB\-mmodel=large\fR" 4
9496.IX Item "-mmodel=large"
9497Assume objects may be anywhere in the 32\-bit address space (the compiler
9498will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
9499assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
9500(the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
9501instruction sequence).
9502.IP "\fB\-msdata=none\fR" 4
9503.IX Item "-msdata=none"
9504Disable use of the small data area. Variables will be put into
9505one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
9506\&\f(CW\*(C`section\*(C'\fR attribute has been specified).
9507This is the default.
9508.Sp
9509The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
9510Objects may be explicitly put in the small data area with the
9511\&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
9512.IP "\fB\-msdata=sdata\fR" 4
9513.IX Item "-msdata=sdata"
9514Put small global and static data in the small data area, but do not
9515generate special code to reference them.
9516.IP "\fB\-msdata=use\fR" 4
9517.IX Item "-msdata=use"
9518Put small global and static data in the small data area, and generate
9519special instructions to reference them.
9520.IP "\fB\-G\fR \fInum\fR" 4
9521.IX Item "-G num"
9522Put global and static objects less than or equal to \fInum\fR bytes
9523into the small data or bss sections instead of the normal data or bss
9524sections. The default value of \fInum\fR is 8.
9525The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
9526for this option to have any effect.
9527.Sp
9528All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
9529Compiling with different values of \fInum\fR may or may not work; if it
9530doesn't the linker will give an error message\-\-\-incorrect code will not be
9531generated.
9532.IP "\fB\-mdebug\fR" 4
9533.IX Item "-mdebug"
9534Makes the M32R specific code in the compiler display some statistics
9535that might help in debugging programs.
9536.IP "\fB\-malign\-loops\fR" 4
9537.IX Item "-malign-loops"
9538Align all loops to a 32\-byte boundary.
9539.IP "\fB\-mno\-align\-loops\fR" 4
9540.IX Item "-mno-align-loops"
9541Do not enforce a 32\-byte alignment for loops. This is the default.
9542.IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
9543.IX Item "-missue-rate=number"
9544Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1
9545or 2.
9546.IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
9547.IX Item "-mbranch-cost=number"
9548\&\fInumber\fR can only be 1 or 2. If it is 1 then branches will be
9549preferred over conditional code, if it is 2, then the opposite will
9550apply.
9551.IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
9552.IX Item "-mflush-trap=number"
9553Specifies the trap number to use to flush the cache. The default is
955412. Valid numbers are between 0 and 15 inclusive.
9555.IP "\fB\-mno\-flush\-trap\fR" 4
9556.IX Item "-mno-flush-trap"
9557Specifies that the cache cannot be flushed by using a trap.
9558.IP "\fB\-mflush\-func=\fR\fIname\fR" 4
9559.IX Item "-mflush-func=name"
9560Specifies the name of the operating system function to call to flush
9561the cache. The default is \fI_flush_cache\fR, but a function call
9562will only be used if a trap is not available.
9563.IP "\fB\-mno\-flush\-func\fR" 4
9564.IX Item "-mno-flush-func"
9565Indicates that there is no \s-1OS\s0 function for flushing the cache.
9566.PP
9567\fIM680x0 Options\fR
9568.IX Subsection "M680x0 Options"
9569.PP
9570These are the \fB\-m\fR options defined for the 68000 series. The default
9571values for these options depends on which style of 68000 was selected when
9572the compiler was configured; the defaults for the most common choices are
9573given below.
9574.IP "\fB\-m68000\fR" 4
9575.IX Item "-m68000"
9576.PD 0
9577.IP "\fB\-mc68000\fR" 4
9578.IX Item "-mc68000"
9579.PD
9580Generate output for a 68000. This is the default
9581when the compiler is configured for 68000\-based systems.
9582.Sp
9583Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
9584including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
9585.IP "\fB\-m68020\fR" 4
9586.IX Item "-m68020"
9587.PD 0
9588.IP "\fB\-mc68020\fR" 4
9589.IX Item "-mc68020"
9590.PD
9591Generate output for a 68020. This is the default
9592when the compiler is configured for 68020\-based systems.
9593.IP "\fB\-m68881\fR" 4
9594.IX Item "-m68881"
9595Generate output containing 68881 instructions for floating point.
9596This is the default for most 68020 systems unless \fB\-\-nfp\fR was
9597specified when the compiler was configured.
9598.IP "\fB\-m68030\fR" 4
9599.IX Item "-m68030"
9600Generate output for a 68030. This is the default when the compiler is
9601configured for 68030\-based systems.
9602.IP "\fB\-m68040\fR" 4
9603.IX Item "-m68040"
9604Generate output for a 68040. This is the default when the compiler is
9605configured for 68040\-based systems.
9606.Sp
9607This option inhibits the use of 68881/68882 instructions that have to be
9608emulated by software on the 68040. Use this option if your 68040 does not
9609have code to emulate those instructions.
9610.IP "\fB\-m68060\fR" 4
9611.IX Item "-m68060"
9612Generate output for a 68060. This is the default when the compiler is
9613configured for 68060\-based systems.
9614.Sp
9615This option inhibits the use of 68020 and 68881/68882 instructions that
9616have to be emulated by software on the 68060. Use this option if your 68060
9617does not have code to emulate those instructions.
9618.IP "\fB\-mcpu32\fR" 4
9619.IX Item "-mcpu32"
9620Generate output for a \s-1CPU32\s0. This is the default
9621when the compiler is configured for CPU32\-based systems.
9622.Sp
9623Use this option for microcontrollers with a
9624\&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
962568336, 68340, 68341, 68349 and 68360.
9626.IP "\fB\-m5200\fR" 4
9627.IX Item "-m5200"
9628Generate output for a 520X \*(L"coldfire\*(R" family cpu. This is the default
9629when the compiler is configured for 520X\-based systems.
9630.Sp
9631Use this option for microcontroller with a 5200 core, including
9632the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0.
9633.IP "\fB\-mcfv4e\fR" 4
9634.IX Item "-mcfv4e"
9635Generate output for a ColdFire V4e family cpu (e.g. 547x/548x).
9636This includes use of hardware floating point instructions.
9637.IP "\fB\-m68020\-40\fR" 4
9638.IX Item "-m68020-40"
9639Generate output for a 68040, without using any of the new instructions.
9640This results in code which can run relatively efficiently on either a
964168020/68881 or a 68030 or a 68040. The generated code does use the
964268881 instructions that are emulated on the 68040.
9643.IP "\fB\-m68020\-60\fR" 4
9644.IX Item "-m68020-60"
9645Generate output for a 68060, without using any of the new instructions.
9646This results in code which can run relatively efficiently on either a
964768020/68881 or a 68030 or a 68040. The generated code does use the
964868881 instructions that are emulated on the 68060.
9649.IP "\fB\-msoft\-float\fR" 4
9650.IX Item "-msoft-float"
9651Generate output containing library calls for floating point.
9652\&\fBWarning:\fR the requisite libraries are not available for all m68k
9653targets. Normally the facilities of the machine's usual C compiler are
9654used, but this can't be done directly in cross\-compilation. You must
9655make your own arrangements to provide suitable library functions for
9656cross\-compilation. The embedded targets \fBm68k\-*\-aout\fR and
9657\&\fBm68k\-*\-coff\fR do provide software floating point support.
9658.IP "\fB\-mshort\fR" 4
9659.IX Item "-mshort"
9660Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
9661Additionally, parameters passed on the stack are also aligned to a
966216\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
9663.IP "\fB\-mnobitfield\fR" 4
9664.IX Item "-mnobitfield"
9665Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR
9666and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
9667.IP "\fB\-mbitfield\fR" 4
9668.IX Item "-mbitfield"
9669Do use the bit-field instructions. The \fB\-m68020\fR option implies
9670\&\fB\-mbitfield\fR. This is the default if you use a configuration
9671designed for a 68020.
9672.IP "\fB\-mrtd\fR" 4
9673.IX Item "-mrtd"
9674Use a different function-calling convention, in which functions
9675that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
9676instruction, which pops their arguments while returning. This
9677saves one instruction in the caller since there is no need to pop
9678the arguments there.
9679.Sp
9680This calling convention is incompatible with the one normally
9681used on Unix, so you cannot use it if you need to call libraries
9682compiled with the Unix compiler.
9683.Sp
9684Also, you must provide function prototypes for all functions that
9685take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
9686otherwise incorrect code will be generated for calls to those
9687functions.
9688.Sp
9689In addition, seriously incorrect code will result if you call a
9690function with too many arguments. (Normally, extra arguments are
9691harmlessly ignored.)
9692.Sp
9693The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
969468040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
9695.IP "\fB\-malign\-int\fR" 4
9696.IX Item "-malign-int"
9697.PD 0
9698.IP "\fB\-mno\-align\-int\fR" 4
9699.IX Item "-mno-align-int"
9700.PD
9701Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
9702\&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
9703boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
9704Aligning variables on 32\-bit boundaries produces code that runs somewhat
9705faster on processors with 32\-bit busses at the expense of more memory.
9706.Sp
9707\&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
9708align structures containing the above types differently than
9709most published application binary interface specifications for the m68k.
9710.IP "\fB\-mpcrel\fR" 4
9711.IX Item "-mpcrel"
9712Use the pc-relative addressing mode of the 68000 directly, instead of
9713using a global offset table. At present, this option implies \fB\-fpic\fR,
9714allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is
9715not presently supported with \fB\-mpcrel\fR, though this could be supported for
971668020 and higher processors.
9717.IP "\fB\-mno\-strict\-align\fR" 4
9718.IX Item "-mno-strict-align"
9719.PD 0
9720.IP "\fB\-mstrict\-align\fR" 4
9721.IX Item "-mstrict-align"
9722.PD
9723Do not (do) assume that unaligned memory references will be handled by
9724the system.
9725.IP "\fB\-msep\-data\fR" 4
9726.IX Item "-msep-data"
9727Generate code that allows the data segment to be located in a different
9728area of memory from the text segment. This allows for execute in place in
9729an environment without virtual memory management. This option implies
9730\&\fB\-fPIC\fR.
9731.IP "\fB\-mno\-sep\-data\fR" 4
9732.IX Item "-mno-sep-data"
9733Generate code that assumes that the data segment follows the text segment.
9734This is the default.
9735.IP "\fB\-mid\-shared\-library\fR" 4
9736.IX Item "-mid-shared-library"
9737Generate code that supports shared libraries via the library \s-1ID\s0 method.
9738This allows for execute in place and shared libraries in an environment
9739without virtual memory management. This option implies \fB\-fPIC\fR.
9740.IP "\fB\-mno\-id\-shared\-library\fR" 4
9741.IX Item "-mno-id-shared-library"
9742Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
9743This is the default.
9744.IP "\fB\-mshared\-library\-id=n\fR" 4
9745.IX Item "-mshared-library-id=n"
9746Specified the identification number of the \s-1ID\s0 based shared library being
9747compiled. Specifying a value of 0 will generate more compact code, specifying
9748other values will force the allocation of that number to the current
9749library but is no more space or time efficient than omitting this option.
9750.PP
9751\fIM68hc1x Options\fR
9752.IX Subsection "M68hc1x Options"
9753.PP
9754These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
9755microcontrollers. The default values for these options depends on
9756which style of microcontroller was selected when the compiler was configured;
9757the defaults for the most common choices are given below.
9758.IP "\fB\-m6811\fR" 4
9759.IX Item "-m6811"
9760.PD 0
9761.IP "\fB\-m68hc11\fR" 4
9762.IX Item "-m68hc11"
9763.PD
9764Generate output for a 68HC11. This is the default
9765when the compiler is configured for 68HC11\-based systems.
9766.IP "\fB\-m6812\fR" 4
9767.IX Item "-m6812"
9768.PD 0
9769.IP "\fB\-m68hc12\fR" 4
9770.IX Item "-m68hc12"
9771.PD
9772Generate output for a 68HC12. This is the default
9773when the compiler is configured for 68HC12\-based systems.
9774.IP "\fB\-m68S12\fR" 4
9775.IX Item "-m68S12"
9776.PD 0
9777.IP "\fB\-m68hcs12\fR" 4
9778.IX Item "-m68hcs12"
9779.PD
9780Generate output for a 68HCS12.
9781.IP "\fB\-mauto\-incdec\fR" 4
9782.IX Item "-mauto-incdec"
9783Enable the use of 68HC12 pre and post auto-increment and auto-decrement
9784addressing modes.
9785.IP "\fB\-minmax\fR" 4
9786.IX Item "-minmax"
9787.PD 0
9788.IP "\fB\-nominmax\fR" 4
9789.IX Item "-nominmax"
9790.PD
9791Enable the use of 68HC12 min and max instructions.
9792.IP "\fB\-mlong\-calls\fR" 4
9793.IX Item "-mlong-calls"
9794.PD 0
9795.IP "\fB\-mno\-long\-calls\fR" 4
9796.IX Item "-mno-long-calls"
9797.PD
9798Treat all calls as being far away (near). If calls are assumed to be
9799far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
9800call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
9801.IP "\fB\-mshort\fR" 4
9802.IX Item "-mshort"
9803Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
9804.IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
9805.IX Item "-msoft-reg-count=count"
9806Specify the number of pseudo-soft registers which are used for the
9807code generation. The maximum number is 32. Using more pseudo-soft
9808register may or may not result in better code depending on the program.
9809The default is 4 for 68HC11 and 2 for 68HC12.
9810.PP
9811\fIMCore Options\fR
9812.IX Subsection "MCore Options"
9813.PP
9814These are the \fB\-m\fR options defined for the Motorola M*Core
9815processors.
9816.IP "\fB\-mhardlit\fR" 4
9817.IX Item "-mhardlit"
9818.PD 0
9819.IP "\fB\-mno\-hardlit\fR" 4
9820.IX Item "-mno-hardlit"
9821.PD
9822Inline constants into the code stream if it can be done in two
9823instructions or less.
9824.IP "\fB\-mdiv\fR" 4
9825.IX Item "-mdiv"
9826.PD 0
9827.IP "\fB\-mno\-div\fR" 4
9828.IX Item "-mno-div"
9829.PD
9830Use the divide instruction. (Enabled by default).
9831.IP "\fB\-mrelax\-immediate\fR" 4
9832.IX Item "-mrelax-immediate"
9833.PD 0
9834.IP "\fB\-mno\-relax\-immediate\fR" 4
9835.IX Item "-mno-relax-immediate"
9836.PD
9837Allow arbitrary sized immediates in bit operations.
9838.IP "\fB\-mwide\-bitfields\fR" 4
9839.IX Item "-mwide-bitfields"
9840.PD 0
9841.IP "\fB\-mno\-wide\-bitfields\fR" 4
9842.IX Item "-mno-wide-bitfields"
9843.PD
9844Always treat bit-fields as int\-sized.
9845.IP "\fB\-m4byte\-functions\fR" 4
9846.IX Item "-m4byte-functions"
9847.PD 0
9848.IP "\fB\-mno\-4byte\-functions\fR" 4
9849.IX Item "-mno-4byte-functions"
9850.PD
9851Force all functions to be aligned to a four byte boundary.
9852.IP "\fB\-mcallgraph\-data\fR" 4
9853.IX Item "-mcallgraph-data"
9854.PD 0
9855.IP "\fB\-mno\-callgraph\-data\fR" 4
9856.IX Item "-mno-callgraph-data"
9857.PD
9858Emit callgraph information.
9859.IP "\fB\-mslow\-bytes\fR" 4
9860.IX Item "-mslow-bytes"
9861.PD 0
9862.IP "\fB\-mno\-slow\-bytes\fR" 4
9863.IX Item "-mno-slow-bytes"
9864.PD
9865Prefer word access when reading byte quantities.
9866.IP "\fB\-mlittle\-endian\fR" 4
9867.IX Item "-mlittle-endian"
9868.PD 0
9869.IP "\fB\-mbig\-endian\fR" 4
9870.IX Item "-mbig-endian"
9871.PD
9872Generate code for a little endian target.
9873.IP "\fB\-m210\fR" 4
9874.IX Item "-m210"
9875.PD 0
9876.IP "\fB\-m340\fR" 4
9877.IX Item "-m340"
9878.PD
9879Generate code for the 210 processor.
9880.PP
9881\fI\s-1MIPS\s0 Options\fR
9882.IX Subsection "MIPS Options"
9883.IP "\fB\-EB\fR" 4
9884.IX Item "-EB"
9885Generate big-endian code.
9886.IP "\fB\-EL\fR" 4
9887.IX Item "-EL"
9888Generate little-endian code. This is the default for \fBmips*el\-*\-*\fR
9889configurations.
9890.IP "\fB\-march=\fR\fIarch\fR" 4
9891.IX Item "-march=arch"
9892Generate code that will run on \fIarch\fR, which can be the name of a
9893generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
9894The \s-1ISA\s0 names are:
9895\&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
9896\&\fBmips32\fR, \fBmips32r2\fR, and \fBmips64\fR.
9897The processor names are:
9898\&\fB4kc\fR, \fB4km\fR, \fB4kp\fR,
9899\&\fB5kc\fR, \fB5kf\fR,
9900\&\fB20kc\fR,
9901\&\fB24k\fR, \fB24kc\fR, \fB24kf\fR, \fB24kx\fR,
9902\&\fBm4k\fR,
9903\&\fBorion\fR,
9904\&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
9905\&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
9906\&\fBrm7000\fR, \fBrm9000\fR,
9907\&\fBsb1\fR,
9908\&\fBsr71000\fR,
9909\&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
9910\&\fBvr5000\fR, \fBvr5400\fR and \fBvr5500\fR.
9911The special value \fBfrom-abi\fR selects the
9912most compatible architecture for the selected \s-1ABI\s0 (that is,
9913\&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
9914.Sp
9915In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
9916(for example, \fB\-march=r2k\fR). Prefixes are optional, and
9917\&\fBvr\fR may be written \fBr\fR.
9918.Sp
9919\&\s-1GCC\s0 defines two macros based on the value of this option. The first
9920is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
9921a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
9922where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
9923For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
9924to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
9925.Sp
9926Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
9927above. In other words, it will have the full prefix and will not
9928abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR,
9929the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
9930\&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no
9931\&\fB\-march\fR option is given.
9932.IP "\fB\-mtune=\fR\fIarch\fR" 4
9933.IX Item "-mtune=arch"
9934Optimize for \fIarch\fR. Among other things, this option controls
9935the way instructions are scheduled, and the perceived cost of arithmetic
9936operations. The list of \fIarch\fR values is the same as for
9937\&\fB\-march\fR.
9938.Sp
9939When this option is not used, \s-1GCC\s0 will optimize for the processor
9940specified by \fB\-march\fR. By using \fB\-march\fR and
9941\&\fB\-mtune\fR together, it is possible to generate code that will
9942run on a family of processors, but optimize the code for one
9943particular member of that family.
9944.Sp
9945\&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
9946\&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
9947\&\fB\-march\fR ones described above.
9948.IP "\fB\-mips1\fR" 4
9949.IX Item "-mips1"
9950Equivalent to \fB\-march=mips1\fR.
9951.IP "\fB\-mips2\fR" 4
9952.IX Item "-mips2"
9953Equivalent to \fB\-march=mips2\fR.
9954.IP "\fB\-mips3\fR" 4
9955.IX Item "-mips3"
9956Equivalent to \fB\-march=mips3\fR.
9957.IP "\fB\-mips4\fR" 4
9958.IX Item "-mips4"
9959Equivalent to \fB\-march=mips4\fR.
9960.IP "\fB\-mips32\fR" 4
9961.IX Item "-mips32"
9962Equivalent to \fB\-march=mips32\fR.
9963.IP "\fB\-mips32r2\fR" 4
9964.IX Item "-mips32r2"
9965Equivalent to \fB\-march=mips32r2\fR.
9966.IP "\fB\-mips64\fR" 4
9967.IX Item "-mips64"
9968Equivalent to \fB\-march=mips64\fR.
9969.IP "\fB\-mips16\fR" 4
9970.IX Item "-mips16"
9971.PD 0
9972.IP "\fB\-mno\-mips16\fR" 4
9973.IX Item "-mno-mips16"
9974.PD
9975Generate (do not generate) \s-1MIPS16\s0 code. If \s-1GCC\s0 is targetting a
9976\&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
9977.IP "\fB\-mabi=32\fR" 4
9978.IX Item "-mabi=32"
9979.PD 0
9980.IP "\fB\-mabi=o64\fR" 4
9981.IX Item "-mabi=o64"
9982.IP "\fB\-mabi=n32\fR" 4
9983.IX Item "-mabi=n32"
9984.IP "\fB\-mabi=64\fR" 4
9985.IX Item "-mabi=64"
9986.IP "\fB\-mabi=eabi\fR" 4
9987.IX Item "-mabi=eabi"
9988.PD
9989Generate code for the given \s-1ABI\s0.
9990.Sp
9991Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally
9992generates 64\-bit code when you select a 64\-bit architecture, but you
9993can use \fB\-mgp32\fR to get 32\-bit code instead.
9994.Sp
9995For information about the O64 \s-1ABI\s0, see
9996<\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
9997.IP "\fB\-mabicalls\fR" 4
9998.IX Item "-mabicalls"
9999.PD 0
10000.IP "\fB\-mno\-abicalls\fR" 4
10001.IX Item "-mno-abicalls"
10002.PD
10003Generate (do not generate) code that is suitable for SVR4\-style
10004dynamic objects. \fB\-mabicalls\fR is the default for SVR4\-based
10005systems.
10006.IP "\fB\-mshared\fR" 4
10007.IX Item "-mshared"
10008.PD 0
10009.IP "\fB\-mno\-shared\fR" 4
10010.IX Item "-mno-shared"
10011.PD
10012Generate (do not generate) code that is fully position\-independent,
10013and that can therefore be linked into shared libraries. This option
10014only affects \fB\-mabicalls\fR.
10015.Sp
10016All \fB\-mabicalls\fR code has traditionally been position\-independent,
10017regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR. However,
10018as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
10019accesses for locally-binding symbols. It can also use shorter \s-1GP\s0
10020initialization sequences and generate direct calls to locally-defined
10021functions. This mode is selected by \fB\-mno\-shared\fR.
10022.Sp
10023\&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
10024objects that can only be linked by the \s-1GNU\s0 linker. However, the option
10025does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
10026of relocatable objects. Using \fB\-mno\-shared\fR will generally make
10027executables both smaller and quicker.
10028.Sp
10029\&\fB\-mshared\fR is the default.
10030.IP "\fB\-mxgot\fR" 4
10031.IX Item "-mxgot"
10032.PD 0
10033.IP "\fB\-mno\-xgot\fR" 4
10034.IX Item "-mno-xgot"
10035.PD
10036Lift (do not lift) the usual restrictions on the size of the global
10037offset table.
10038.Sp
10039\&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
10040While this is relatively efficient, it will only work if the \s-1GOT\s0
10041is smaller than about 64k. Anything larger will cause the linker
10042to report an error such as:
10043.Sp
10044.Vb 1
10045\& relocation truncated to fit: R_MIPS_GOT16 foobar
10046.Ve
10047.Sp
10048If this happens, you should recompile your code with \fB\-mxgot\fR.
10049It should then work with very large GOTs, although it will also be
10050less efficient, since it will take three instructions to fetch the
10051value of a global symbol.
10052.Sp
10053Note that some linkers can create multiple GOTs. If you have such a
10054linker, you should only need to use \fB\-mxgot\fR when a single object
10055file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do.
10056.Sp
10057These options have no effect unless \s-1GCC\s0 is generating position
10058independent code.
10059.IP "\fB\-mgp32\fR" 4
10060.IX Item "-mgp32"
10061Assume that general-purpose registers are 32 bits wide.
10062.IP "\fB\-mgp64\fR" 4
10063.IX Item "-mgp64"
10064Assume that general-purpose registers are 64 bits wide.
10065.IP "\fB\-mfp32\fR" 4
10066.IX Item "-mfp32"
10067Assume that floating-point registers are 32 bits wide.
10068.IP "\fB\-mfp64\fR" 4
10069.IX Item "-mfp64"
10070Assume that floating-point registers are 64 bits wide.
10071.IP "\fB\-mhard\-float\fR" 4
10072.IX Item "-mhard-float"
10073Use floating-point coprocessor instructions.
10074.IP "\fB\-msoft\-float\fR" 4
10075.IX Item "-msoft-float"
10076Do not use floating-point coprocessor instructions. Implement
10077floating-point calculations using library calls instead.
10078.IP "\fB\-msingle\-float\fR" 4
10079.IX Item "-msingle-float"
10080Assume that the floating-point coprocessor only supports single-precision
10081operations.
10082.IP "\fB\-mdouble\-float\fR" 4
10083.IX Item "-mdouble-float"
10084Assume that the floating-point coprocessor supports double-precision
10085operations. This is the default.
10086.IP "\fB\-mdsp\fR" 4
10087.IX Item "-mdsp"
10088.PD 0
10089.IP "\fB\-mno\-dsp\fR" 4
10090.IX Item "-mno-dsp"
10091.PD
10092Use (do not use) the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
10093.IP "\fB\-mpaired\-single\fR" 4
10094.IX Item "-mpaired-single"
10095.PD 0
10096.IP "\fB\-mno\-paired\-single\fR" 4
10097.IX Item "-mno-paired-single"
10098.PD
10099Use (do not use) paired-single floating-point instructions.
10100 This option can only be used
10101when generating 64\-bit code and requires hardware floating-point
10102support to be enabled.
10103.IP "\fB\-mips3d\fR" 4
10104.IX Item "-mips3d"
10105.PD 0
10106.IP "\fB\-mno\-mips3d\fR" 4
10107.IX Item "-mno-mips3d"
10108.PD
10109Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.
10110The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
10111.IP "\fB\-mlong64\fR" 4
10112.IX Item "-mlong64"
10113Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for
10114an explanation of the default and the way that the pointer size is
10115determined.
10116.IP "\fB\-mlong32\fR" 4
10117.IX Item "-mlong32"
10118Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
10119.Sp
10120The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
10121the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0
10122uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
1012332\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
10124or the same size as integer registers, whichever is smaller.
10125.IP "\fB\-msym32\fR" 4
10126.IX Item "-msym32"
10127.PD 0
10128.IP "\fB\-mno\-sym32\fR" 4
10129.IX Item "-mno-sym32"
10130.PD
10131Assume (do not assume) that all symbols have 32\-bit values, regardless
10132of the selected \s-1ABI\s0. This option is useful in combination with
10133\&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
10134to generate shorter and faster references to symbolic addresses.
10135.IP "\fB\-G\fR \fInum\fR" 4
10136.IX Item "-G num"
10137Put global and static items less than or equal to \fInum\fR bytes into
10138the small data or bss section instead of the normal data or bss section.
10139This allows the data to be accessed using a single instruction.
10140.Sp
10141All modules should be compiled with the same \fB\-G\fR \fInum\fR
10142value.
10143.IP "\fB\-membedded\-data\fR" 4
10144.IX Item "-membedded-data"
10145.PD 0
10146.IP "\fB\-mno\-embedded\-data\fR" 4
10147.IX Item "-mno-embedded-data"
10148.PD
10149Allocate variables to the read-only data section first if possible, then
10150next in the small data section if possible, otherwise in data. This gives
10151slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
10152when executing, and thus may be preferred for some embedded systems.
10153.IP "\fB\-muninit\-const\-in\-rodata\fR" 4
10154.IX Item "-muninit-const-in-rodata"
10155.PD 0
10156.IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
10157.IX Item "-mno-uninit-const-in-rodata"
10158.PD
10159Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
10160This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
10161.IP "\fB\-msplit\-addresses\fR" 4
10162.IX Item "-msplit-addresses"
10163.PD 0
10164.IP "\fB\-mno\-split\-addresses\fR" 4
10165.IX Item "-mno-split-addresses"
10166.PD
10167Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
10168relocation operators. This option has been superseded by
10169\&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
10170.IP "\fB\-mexplicit\-relocs\fR" 4
10171.IX Item "-mexplicit-relocs"
10172.PD 0
10173.IP "\fB\-mno\-explicit\-relocs\fR" 4
10174.IX Item "-mno-explicit-relocs"
10175.PD
10176Use (do not use) assembler relocation operators when dealing with symbolic
10177addresses. The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
10178is to use assembler macros instead.
10179.Sp
10180\&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
10181to use an assembler that supports relocation operators.
10182.IP "\fB\-mcheck\-zero\-division\fR" 4
10183.IX Item "-mcheck-zero-division"
10184.PD 0
10185.IP "\fB\-mno\-check\-zero\-division\fR" 4
10186.IX Item "-mno-check-zero-division"
10187.PD
10188Trap (do not trap) on integer division by zero. The default is
10189\&\fB\-mcheck\-zero\-division\fR.
10190.IP "\fB\-mdivide\-traps\fR" 4
10191.IX Item "-mdivide-traps"
10192.PD 0
10193.IP "\fB\-mdivide\-breaks\fR" 4
10194.IX Item "-mdivide-breaks"
10195.PD
10196\&\s-1MIPS\s0 systems check for division by zero by generating either a
10197conditional trap or a break instruction. Using traps results in
10198smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later. Also, some
10199versions of the Linux kernel have a bug that prevents trap from
10200generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR). Use \fB\-mdivide\-traps\fR to
10201allow conditional traps on architectures that support them and
10202\&\fB\-mdivide\-breaks\fR to force the use of breaks.
10203.Sp
10204The default is usually \fB\-mdivide\-traps\fR, but this can be
10205overridden at configure time using \fB\-\-with\-divide=breaks\fR.
10206Divide-by-zero checks can be completely disabled using
10207\&\fB\-mno\-check\-zero\-division\fR.
10208.IP "\fB\-mmemcpy\fR" 4
10209.IX Item "-mmemcpy"
10210.PD 0
10211.IP "\fB\-mno\-memcpy\fR" 4
10212.IX Item "-mno-memcpy"
10213.PD
10214Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
10215moves. The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
10216most constant-sized copies.
10217.IP "\fB\-mlong\-calls\fR" 4
10218.IX Item "-mlong-calls"
10219.PD 0
10220.IP "\fB\-mno\-long\-calls\fR" 4
10221.IX Item "-mno-long-calls"
10222.PD
10223Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling
10224functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
10225and callee to be in the same 256 megabyte segment.
10226.Sp
10227This option has no effect on abicalls code. The default is
10228\&\fB\-mno\-long\-calls\fR.
10229.IP "\fB\-mmad\fR" 4
10230.IX Item "-mmad"
10231.PD 0
10232.IP "\fB\-mno\-mad\fR" 4
10233.IX Item "-mno-mad"
10234.PD
10235Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
10236instructions, as provided by the R4650 \s-1ISA\s0.
10237.IP "\fB\-mfused\-madd\fR" 4
10238.IX Item "-mfused-madd"
10239.PD 0
10240.IP "\fB\-mno\-fused\-madd\fR" 4
10241.IX Item "-mno-fused-madd"
10242.PD
10243Enable (disable) use of the floating point multiply-accumulate
10244instructions, when they are available. The default is
10245\&\fB\-mfused\-madd\fR.
10246.Sp
10247When multiply-accumulate instructions are used, the intermediate
10248product is calculated to infinite precision and is not subject to
10249the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some
10250circumstances.
10251.IP "\fB\-nocpp\fR" 4
10252.IX Item "-nocpp"
10253Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
10254assembler files (with a \fB.s\fR suffix) when assembling them.
10255.IP "\fB\-mfix\-r4000\fR" 4
10256.IX Item "-mfix-r4000"
10257.PD 0
10258.IP "\fB\-mno\-fix\-r4000\fR" 4
10259.IX Item "-mno-fix-r4000"
10260.PD
10261Work around certain R4000 \s-1CPU\s0 errata:
10262.RS 4
10263.IP "\-" 4
10264A double-word or a variable shift may give an incorrect result if executed
10265immediately after starting an integer division.
10266.IP "\-" 4
10267A double-word or a variable shift may give an incorrect result if executed
10268while an integer multiplication is in progress.
10269.IP "\-" 4
10270An integer division may give an incorrect result if started in a delay slot
10271of a taken branch or a jump.
10272.RE
10273.RS 4
10274.RE
10275.IP "\fB\-mfix\-r4400\fR" 4
10276.IX Item "-mfix-r4400"
10277.PD 0
10278.IP "\fB\-mno\-fix\-r4400\fR" 4
10279.IX Item "-mno-fix-r4400"
10280.PD
10281Work around certain R4400 \s-1CPU\s0 errata:
10282.RS 4
10283.IP "\-" 4
10284A double-word or a variable shift may give an incorrect result if executed
10285immediately after starting an integer division.
10286.RE
10287.RS 4
10288.RE
10289.IP "\fB\-mfix\-vr4120\fR" 4
10290.IX Item "-mfix-vr4120"
10291.PD 0
10292.IP "\fB\-mno\-fix\-vr4120\fR" 4
10293.IX Item "-mno-fix-vr4120"
10294.PD
10295Work around certain \s-1VR4120\s0 errata:
10296.RS 4
10297.IP "\-" 4
10298\&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
10299.IP "\-" 4
10300\&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
10301of the operands is negative.
10302.RE
10303.RS 4
10304.Sp
10305The workarounds for the division errata rely on special functions in
10306\&\fIlibgcc.a\fR. At present, these functions are only provided by
10307the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
10308.Sp
10309Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
10310instructions. These errata are handled by the assembler, not by \s-1GCC\s0 itself.
10311.RE
10312.IP "\fB\-mfix\-vr4130\fR" 4
10313.IX Item "-mfix-vr4130"
10314Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata. The
10315workarounds are implemented by the assembler rather than by \s-1GCC\s0,
10316although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
10317\&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
10318instructions are available instead.
10319.IP "\fB\-mfix\-sb1\fR" 4
10320.IX Item "-mfix-sb1"
10321.PD 0
10322.IP "\fB\-mno\-fix\-sb1\fR" 4
10323.IX Item "-mno-fix-sb1"
10324.PD
10325Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
10326(This flag currently works around the \s-1SB\-1\s0 revision 2
10327\&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
10328.IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
10329.IX Item "-mflush-func=func"
10330.PD 0
10331.IP "\fB\-mno\-flush\-func\fR" 4
10332.IX Item "-mno-flush-func"
10333.PD
10334Specifies the function to call to flush the I and D caches, or to not
10335call any such function. If called, the function must take the same
10336arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
10337memory range for which the cache is being flushed, the size of the
10338memory range, and the number 3 (to flush both caches). The default
10339depends on the target \s-1GCC\s0 was configured for, but commonly is either
10340\&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
10341.IP "\fB\-mbranch\-likely\fR" 4
10342.IX Item "-mbranch-likely"
10343.PD 0
10344.IP "\fB\-mno\-branch\-likely\fR" 4
10345.IX Item "-mno-branch-likely"
10346.PD
10347Enable or disable use of Branch Likely instructions, regardless of the
10348default for the selected architecture. By default, Branch Likely
10349instructions may be generated if they are supported by the selected
10350architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
10351and processors which implement those architectures; for those, Branch
10352Likely instructions will not be generated by default because the \s-1MIPS32\s0
10353and \s-1MIPS64\s0 architectures specifically deprecate their use.
10354.IP "\fB\-mfp\-exceptions\fR" 4
10355.IX Item "-mfp-exceptions"
10356.PD 0
10357.IP "\fB\-mno\-fp\-exceptions\fR" 4
10358.IX Item "-mno-fp-exceptions"
10359.PD
10360Specifies whether \s-1FP\s0 exceptions are enabled. This affects how we schedule
10361\&\s-1FP\s0 instructions for some processors. The default is that \s-1FP\s0 exceptions are
10362enabled.
10363.Sp
10364For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
1036564\-bit code, then we can use both \s-1FP\s0 pipes. Otherwise, we can only use one
10366\&\s-1FP\s0 pipe.
10367.IP "\fB\-mvr4130\-align\fR" 4
10368.IX Item "-mvr4130-align"
10369.PD 0
10370.IP "\fB\-mno\-vr4130\-align\fR" 4
10371.IX Item "-mno-vr4130-align"
10372.PD
10373The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
10374instructions together if the first one is 8\-byte aligned. When this
10375option is enabled, \s-1GCC\s0 will align pairs of instructions that it
10376thinks should execute in parallel.
10377.Sp
10378This option only has an effect when optimizing for the \s-1VR4130\s0.
10379It normally makes code faster, but at the expense of making it bigger.
10380It is enabled by default at optimization level \fB\-O3\fR.
10381.PP
10382\fI\s-1MMIX\s0 Options\fR
10383.IX Subsection "MMIX Options"
10384.PP
10385These options are defined for the \s-1MMIX:\s0
10386.IP "\fB\-mlibfuncs\fR" 4
10387.IX Item "-mlibfuncs"
10388.PD 0
10389.IP "\fB\-mno\-libfuncs\fR" 4
10390.IX Item "-mno-libfuncs"
10391.PD
10392Specify that intrinsic library functions are being compiled, passing all
10393values in registers, no matter the size.
10394.IP "\fB\-mepsilon\fR" 4
10395.IX Item "-mepsilon"
10396.PD 0
10397.IP "\fB\-mno\-epsilon\fR" 4
10398.IX Item "-mno-epsilon"
10399.PD
10400Generate floating-point comparison instructions that compare with respect
10401to the \f(CW\*(C`rE\*(C'\fR epsilon register.
10402.IP "\fB\-mabi=mmixware\fR" 4
10403.IX Item "-mabi=mmixware"
10404.PD 0
10405.IP "\fB\-mabi=gnu\fR" 4
10406.IX Item "-mabi=gnu"
10407.PD
10408Generate code that passes function parameters and return values that (in
10409the called function) are seen as registers \f(CW$0\fR and up, as opposed to
10410the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
10411.IP "\fB\-mzero\-extend\fR" 4
10412.IX Item "-mzero-extend"
10413.PD 0
10414.IP "\fB\-mno\-zero\-extend\fR" 4
10415.IX Item "-mno-zero-extend"
10416.PD
10417When reading data from memory in sizes shorter than 64 bits, use (do not
10418use) zero-extending load instructions by default, rather than
10419sign-extending ones.
10420.IP "\fB\-mknuthdiv\fR" 4
10421.IX Item "-mknuthdiv"
10422.PD 0
10423.IP "\fB\-mno\-knuthdiv\fR" 4
10424.IX Item "-mno-knuthdiv"
10425.PD
10426Make the result of a division yielding a remainder have the same sign as
10427the divisor. With the default, \fB\-mno\-knuthdiv\fR, the sign of the
10428remainder follows the sign of the dividend. Both methods are
10429arithmetically valid, the latter being almost exclusively used.
10430.IP "\fB\-mtoplevel\-symbols\fR" 4
10431.IX Item "-mtoplevel-symbols"
10432.PD 0
10433.IP "\fB\-mno\-toplevel\-symbols\fR" 4
10434.IX Item "-mno-toplevel-symbols"
10435.PD
10436Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
10437code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
10438.IP "\fB\-melf\fR" 4
10439.IX Item "-melf"
10440Generate an executable in the \s-1ELF\s0 format, rather than the default
10441\&\fBmmo\fR format used by the \fBmmix\fR simulator.
10442.IP "\fB\-mbranch\-predict\fR" 4
10443.IX Item "-mbranch-predict"
10444.PD 0
10445.IP "\fB\-mno\-branch\-predict\fR" 4
10446.IX Item "-mno-branch-predict"
10447.PD
10448Use (do not use) the probable-branch instructions, when static branch
10449prediction indicates a probable branch.
10450.IP "\fB\-mbase\-addresses\fR" 4
10451.IX Item "-mbase-addresses"
10452.PD 0
10453.IP "\fB\-mno\-base\-addresses\fR" 4
10454.IX Item "-mno-base-addresses"
10455.PD
10456Generate (do not generate) code that uses \fIbase addresses\fR. Using a
10457base address automatically generates a request (handled by the assembler
10458and the linker) for a constant to be set up in a global register. The
10459register is used for one or more base address requests within the range 0
10460to 255 from the value held in the register. The generally leads to short
10461and fast code, but the number of different data items that can be
10462addressed is limited. This means that a program that uses lots of static
10463data may require \fB\-mno\-base\-addresses\fR.
10464.IP "\fB\-msingle\-exit\fR" 4
10465.IX Item "-msingle-exit"
10466.PD 0
10467.IP "\fB\-mno\-single\-exit\fR" 4
10468.IX Item "-mno-single-exit"
10469.PD
10470Force (do not force) generated code to have a single exit point in each
10471function.
10472.PP
10473\fI\s-1MN10300\s0 Options\fR
10474.IX Subsection "MN10300 Options"
10475.PP
10476These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
10477.IP "\fB\-mmult\-bug\fR" 4
10478.IX Item "-mmult-bug"
10479Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
10480processors. This is the default.
10481.IP "\fB\-mno\-mult\-bug\fR" 4
10482.IX Item "-mno-mult-bug"
10483Do not generate code to avoid bugs in the multiply instructions for the
10484\&\s-1MN10300\s0 processors.
10485.IP "\fB\-mam33\fR" 4
10486.IX Item "-mam33"
10487Generate code which uses features specific to the \s-1AM33\s0 processor.
10488.IP "\fB\-mno\-am33\fR" 4
10489.IX Item "-mno-am33"
10490Do not generate code which uses features specific to the \s-1AM33\s0 processor. This
10491is the default.
10492.IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
10493.IX Item "-mreturn-pointer-on-d0"
10494When generating a function which returns a pointer, return the pointer
10495in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR. Otherwise, the pointer is returned
10496only in a0, and attempts to call such functions without a prototype
10497would result in errors. Note that this option is on by default; use
10498\&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
10499.IP "\fB\-mno\-crt0\fR" 4
10500.IX Item "-mno-crt0"
10501Do not link in the C run-time initialization object file.
10502.IP "\fB\-mrelax\fR" 4
10503.IX Item "-mrelax"
10504Indicate to the linker that it should perform a relaxation optimization pass
10505to shorten branches, calls and absolute memory addresses. This option only
10506has an effect when used on the command line for the final link step.
10507.Sp
10508This option makes symbolic debugging impossible.
10509.PP
10510\fI\s-1MT\s0 Options\fR
10511.IX Subsection "MT Options"
10512.PP
10513These \fB\-m\fR options are defined for Morpho \s-1MT\s0 architectures:
10514.IP "\fB\-march=\fR\fIcpu-type\fR" 4
10515.IX Item "-march=cpu-type"
10516Generate code that will run on \fIcpu-type\fR, which is the name of a system
10517representing a certain processor type. Possible values for
10518\&\fIcpu-type\fR are \fBms1\-64\-001\fR, \fBms1\-16\-002\fR,
10519\&\fBms1\-16\-003\fR and \fBms2\fR.
10520.Sp
10521When this option is not used, the default is \fB\-march=ms1\-16\-002\fR.
10522.IP "\fB\-mbacc\fR" 4
10523.IX Item "-mbacc"
10524Use byte loads and stores when generating code.
10525.IP "\fB\-mno\-bacc\fR" 4
10526.IX Item "-mno-bacc"
10527Do not use byte loads and stores when generating code.
10528.IP "\fB\-msim\fR" 4
10529.IX Item "-msim"
10530Use simulator runtime
10531.IP "\fB\-mno\-crt0\fR" 4
10532.IX Item "-mno-crt0"
10533Do not link in the C run-time initialization object file
10534\&\fIcrti.o\fR. Other run-time initialization and termination files
10535such as \fIstartup.o\fR and \fIexit.o\fR are still included on the
10536linker command line.
10537.PP
10538\fI\s-1PDP\-11\s0 Options\fR
10539.IX Subsection "PDP-11 Options"
10540.PP
10541These options are defined for the \s-1PDP\-11:\s0
10542.IP "\fB\-mfpu\fR" 4
10543.IX Item "-mfpu"
10544Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating
10545point on the \s-1PDP\-11/40\s0 is not supported.)
10546.IP "\fB\-msoft\-float\fR" 4
10547.IX Item "-msoft-float"
10548Do not use hardware floating point.
10549.IP "\fB\-mac0\fR" 4
10550.IX Item "-mac0"
10551Return floating-point results in ac0 (fr0 in Unix assembler syntax).
10552.IP "\fB\-mno\-ac0\fR" 4
10553.IX Item "-mno-ac0"
10554Return floating-point results in memory. This is the default.
10555.IP "\fB\-m40\fR" 4
10556.IX Item "-m40"
10557Generate code for a \s-1PDP\-11/40\s0.
10558.IP "\fB\-m45\fR" 4
10559.IX Item "-m45"
10560Generate code for a \s-1PDP\-11/45\s0. This is the default.
10561.IP "\fB\-m10\fR" 4
10562.IX Item "-m10"
10563Generate code for a \s-1PDP\-11/10\s0.
10564.IP "\fB\-mbcopy\-builtin\fR" 4
10565.IX Item "-mbcopy-builtin"
10566Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory. This is the
10567default.
10568.IP "\fB\-mbcopy\fR" 4
10569.IX Item "-mbcopy"
10570Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
10571.IP "\fB\-mint16\fR" 4
10572.IX Item "-mint16"
10573.PD 0
10574.IP "\fB\-mno\-int32\fR" 4
10575.IX Item "-mno-int32"
10576.PD
10577Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default.
10578.IP "\fB\-mint32\fR" 4
10579.IX Item "-mint32"
10580.PD 0
10581.IP "\fB\-mno\-int16\fR" 4
10582.IX Item "-mno-int16"
10583.PD
10584Use 32\-bit \f(CW\*(C`int\*(C'\fR.
10585.IP "\fB\-mfloat64\fR" 4
10586.IX Item "-mfloat64"
10587.PD 0
10588.IP "\fB\-mno\-float32\fR" 4
10589.IX Item "-mno-float32"
10590.PD
10591Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default.
10592.IP "\fB\-mfloat32\fR" 4
10593.IX Item "-mfloat32"
10594.PD 0
10595.IP "\fB\-mno\-float64\fR" 4
10596.IX Item "-mno-float64"
10597.PD
10598Use 32\-bit \f(CW\*(C`float\*(C'\fR.
10599.IP "\fB\-mabshi\fR" 4
10600.IX Item "-mabshi"
10601Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default.
10602.IP "\fB\-mno\-abshi\fR" 4
10603.IX Item "-mno-abshi"
10604Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
10605.IP "\fB\-mbranch\-expensive\fR" 4
10606.IX Item "-mbranch-expensive"
10607Pretend that branches are expensive. This is for experimenting with
10608code generation only.
10609.IP "\fB\-mbranch\-cheap\fR" 4
10610.IX Item "-mbranch-cheap"
10611Do not pretend that branches are expensive. This is the default.
10612.IP "\fB\-msplit\fR" 4
10613.IX Item "-msplit"
10614Generate code for a system with split I&D.
10615.IP "\fB\-mno\-split\fR" 4
10616.IX Item "-mno-split"
10617Generate code for a system without split I&D. This is the default.
10618.IP "\fB\-munix\-asm\fR" 4
10619.IX Item "-munix-asm"
10620Use Unix assembler syntax. This is the default when configured for
10621\&\fBpdp11\-*\-bsd\fR.
10622.IP "\fB\-mdec\-asm\fR" 4
10623.IX Item "-mdec-asm"
10624Use \s-1DEC\s0 assembler syntax. This is the default when configured for any
10625\&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
10626.PP
10627\fIPowerPC Options\fR
10628.IX Subsection "PowerPC Options"
10629.PP
10630These are listed under
10631.PP
10632\fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
10633.IX Subsection "IBM RS/6000 and PowerPC Options"
10634.PP
10635These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
10636.IP "\fB\-mpower\fR" 4
10637.IX Item "-mpower"
10638.PD 0
10639.IP "\fB\-mno\-power\fR" 4
10640.IX Item "-mno-power"
10641.IP "\fB\-mpower2\fR" 4
10642.IX Item "-mpower2"
10643.IP "\fB\-mno\-power2\fR" 4
10644.IX Item "-mno-power2"
10645.IP "\fB\-mpowerpc\fR" 4
10646.IX Item "-mpowerpc"
10647.IP "\fB\-mno\-powerpc\fR" 4
10648.IX Item "-mno-powerpc"
10649.IP "\fB\-mpowerpc\-gpopt\fR" 4
10650.IX Item "-mpowerpc-gpopt"
10651.IP "\fB\-mno\-powerpc\-gpopt\fR" 4
10652.IX Item "-mno-powerpc-gpopt"
10653.IP "\fB\-mpowerpc\-gfxopt\fR" 4
10654.IX Item "-mpowerpc-gfxopt"
10655.IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
10656.IX Item "-mno-powerpc-gfxopt"
10657.IP "\fB\-mpowerpc64\fR" 4
10658.IX Item "-mpowerpc64"
10659.IP "\fB\-mno\-powerpc64\fR" 4
10660.IX Item "-mno-powerpc64"
10661.IP "\fB\-mmfcrf\fR" 4
10662.IX Item "-mmfcrf"
10663.IP "\fB\-mno\-mfcrf\fR" 4
10664.IX Item "-mno-mfcrf"
10665.IP "\fB\-mpopcntb\fR" 4
10666.IX Item "-mpopcntb"
10667.IP "\fB\-mno\-popcntb\fR" 4
10668.IX Item "-mno-popcntb"
10669.IP "\fB\-mfprnd\fR" 4
10670.IX Item "-mfprnd"
10671.IP "\fB\-mno\-fprnd\fR" 4
10672.IX Item "-mno-fprnd"
10673.PD
10674\&\s-1GCC\s0 supports two related instruction set architectures for the
10675\&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those
10676instructions supported by the \fBrios\fR chip set used in the original
10677\&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
10678architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
10679the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
10680.Sp
10681Neither architecture is a subset of the other. However there is a
10682large common subset of instructions supported by both. An \s-1MQ\s0
10683register is included in processors supporting the \s-1POWER\s0 architecture.
10684.Sp
10685You use these options to specify which instructions are available on the
10686processor you are using. The default value of these options is
10687determined when configuring \s-1GCC\s0. Specifying the
10688\&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
10689options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
10690rather than the options listed above.
10691.Sp
10692The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
10693are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
10694Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
10695to generate instructions that are present in the \s-1POWER2\s0 architecture but
10696not the original \s-1POWER\s0 architecture.
10697.Sp
10698The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
10699are found only in the 32\-bit subset of the PowerPC architecture.
10700Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
10701\&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
10702General Purpose group, including floating-point square root. Specifying
10703\&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
10704use the optional PowerPC architecture instructions in the Graphics
10705group, including floating-point select.
10706.Sp
10707The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
10708condition register field instruction implemented on the \s-1POWER4\s0
10709processor and other processors that support the PowerPC V2.01
10710architecture.
10711The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
10712double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
10713\&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
10714architecture.
10715The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
10716integer instructions implemented on the \s-1POWER5+\s0 processor and other
10717processors that support the PowerPC V2.03 architecture.
10718.Sp
10719The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
1072064\-bit instructions that are found in the full PowerPC64 architecture
10721and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to
10722\&\fB\-mno\-powerpc64\fR.
10723.Sp
10724If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
10725will use only the instructions in the common subset of both
10726architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
10727the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
10728permits \s-1GCC\s0 to use any instruction from either architecture and to
10729allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
10730.IP "\fB\-mnew\-mnemonics\fR" 4
10731.IX Item "-mnew-mnemonics"
10732.PD 0
10733.IP "\fB\-mold\-mnemonics\fR" 4
10734.IX Item "-mold-mnemonics"
10735.PD
10736Select which mnemonics to use in the generated assembler code. With
10737\&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
10738the PowerPC architecture. With \fB\-mold\-mnemonics\fR it uses the
10739assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions
10740defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
10741mnemonic irrespective of which of these options is specified.
10742.Sp
10743\&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
10744use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
10745value of these option. Unless you are building a cross\-compiler, you
10746should normally not specify either \fB\-mnew\-mnemonics\fR or
10747\&\fB\-mold\-mnemonics\fR, but should instead accept the default.
10748.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
10749.IX Item "-mcpu=cpu_type"
10750Set architecture type, register usage, choice of mnemonics, and
10751instruction scheduling parameters for machine type \fIcpu_type\fR.
10752Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
10753\&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB505\fR,
10754\&\fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR,
10755\&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR,
10756\&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
10757\&\fB860\fR, \fB970\fR, \fB8540\fR, \fBec603e\fR, \fBG3\fR,
10758\&\fBG4\fR, \fBG5\fR, \fBpower\fR, \fBpower2\fR, \fBpower3\fR,
10759\&\fBpower4\fR, \fBpower5\fR, \fBpower5+\fR, \fBpower6\fR,
10760\&\fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR,
10761\&\fBrios\fR, \fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
10762.Sp
10763\&\fB\-mcpu=common\fR selects a completely generic processor. Code
10764generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
10765\&\s-1GCC\s0 will use only the instructions in the common subset of both
10766architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic
10767processor model for scheduling purposes.
10768.Sp
10769\&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
10770\&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
10771PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
10772types, with an appropriate, generic processor model assumed for
10773scheduling purposes.
10774.Sp
10775The other options specify a specific processor. Code generated under
10776those options will run best on that processor, and may not run at all on
10777others.
10778.Sp
10779The \fB\-mcpu\fR options automatically enable or disable the
10780following options: \fB\-maltivec\fR, \fB\-mfprnd\fR,
10781\&\fB\-mhard\-float\fR, \fB\-mmfcrf\fR, \fB\-mmultiple\fR,
10782\&\fB\-mnew\-mnemonics\fR, \fB\-mpopcntb\fR, \fB\-mpower\fR,
10783\&\fB\-mpower2\fR, \fB\-mpowerpc64\fR, \fB\-mpowerpc\-gpopt\fR,
10784\&\fB\-mpowerpc\-gfxopt\fR, \fB\-mstring\fR, \fB\-mmulhw\fR, \fB\-mdlmzb\fR.
10785The particular options
10786set for any particular \s-1CPU\s0 will vary between compiler versions,
10787depending on what setting seems to produce optimal code for that \s-1CPU\s0;
10788it doesn't necessarily reflect the actual hardware's capabilities. If
10789you wish to set an individual option to a particular value, you may
10790specify it after the \fB\-mcpu\fR option, like \fB\-mcpu=970
10791\&\-mno\-altivec\fR.
10792.Sp
10793On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
10794not enabled or disabled by the \fB\-mcpu\fR option at present because
10795\&\s-1AIX\s0 does not have full support for these options. You may still
10796enable or disable them individually if you're sure it'll work in your
10797environment.
10798.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
10799.IX Item "-mtune=cpu_type"
10800Set the instruction scheduling parameters for machine type
10801\&\fIcpu_type\fR, but do not set the architecture type, register usage, or
10802choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same
10803values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
10804\&\fB\-mcpu\fR. If both are specified, the code generated will use the
10805architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
10806scheduling parameters set by \fB\-mtune\fR.
10807.IP "\fB\-mswdiv\fR" 4
10808.IX Item "-mswdiv"
10809.PD 0
10810.IP "\fB\-mno\-swdiv\fR" 4
10811.IX Item "-mno-swdiv"
10812.PD
10813Generate code to compute division as reciprocal estimate and iterative
10814refinement, creating opportunities for increased throughput. This
10815feature requires: optional PowerPC Graphics instruction set for single
10816precision and \s-1FRE\s0 instruction for double precision, assuming divides
10817cannot generate user-visible traps, and the domain values not include
10818Infinities, denormals or zero denominator.
10819.IP "\fB\-maltivec\fR" 4
10820.IX Item "-maltivec"
10821.PD 0
10822.IP "\fB\-mno\-altivec\fR" 4
10823.IX Item "-mno-altivec"
10824.PD
10825Generate code that uses (does not use) AltiVec instructions, and also
10826enable the use of built-in functions that allow more direct access to
10827the AltiVec instruction set. You may also need to set
10828\&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
10829enhancements.
10830.IP "\fB\-mvrsave\fR" 4
10831.IX Item "-mvrsave"
10832.PD 0
10833.IP "\fB\-mno\-vrsave\fR" 4
10834.IX Item "-mno-vrsave"
10835.PD
10836Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
10837.IP "\fB\-msecure\-plt\fR" 4
10838.IX Item "-msecure-plt"
10839Generate code that allows ld and ld.so to build executables and shared
10840libraries with non-exec .plt and .got sections. This is a PowerPC
1084132\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
10842.IP "\fB\-mbss\-plt\fR" 4
10843.IX Item "-mbss-plt"
10844Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
10845requires .plt and .got sections that are both writable and executable.
10846This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
10847.IP "\fB\-misel\fR" 4
10848.IX Item "-misel"
10849.PD 0
10850.IP "\fB\-mno\-isel\fR" 4
10851.IX Item "-mno-isel"
10852.PD
10853This switch enables or disables the generation of \s-1ISEL\s0 instructions.
10854.IP "\fB\-misel=\fR\fIyes/no\fR" 4
10855.IX Item "-misel=yes/no"
10856This switch has been deprecated. Use \fB\-misel\fR and
10857\&\fB\-mno\-isel\fR instead.
10858.IP "\fB\-mspe\fR" 4
10859.IX Item "-mspe"
10860.PD 0
10861.IP "\fB\-mno\-spe\fR" 4
10862.IX Item "-mno-spe"
10863.PD
10864This switch enables or disables the generation of \s-1SPE\s0 simd
10865instructions.
10866.IP "\fB\-mspe=\fR\fIyes/no\fR" 4
10867.IX Item "-mspe=yes/no"
10868This option has been deprecated. Use \fB\-mspe\fR and
10869\&\fB\-mno\-spe\fR instead.
10870.IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
10871.IX Item "-mfloat-gprs=yes/single/double/no"
10872.PD 0
10873.IP "\fB\-mfloat\-gprs\fR" 4
10874.IX Item "-mfloat-gprs"
10875.PD
10876This switch enables or disables the generation of floating point
10877operations on the general purpose registers for architectures that
10878support it.
10879.Sp
10880The argument \fIyes\fR or \fIsingle\fR enables the use of
10881single-precision floating point operations.
10882.Sp
10883The argument \fIdouble\fR enables the use of single and
10884double-precision floating point operations.
10885.Sp
10886The argument \fIno\fR disables floating point operations on the
10887general purpose registers.
10888.Sp
10889This option is currently only available on the MPC854x.
10890.IP "\fB\-m32\fR" 4
10891.IX Item "-m32"
10892.PD 0
10893.IP "\fB\-m64\fR" 4
10894.IX Item "-m64"
10895.PD
10896Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
10897targets (including GNU/Linux). The 32\-bit environment sets int, long
10898and pointer to 32 bits and generates code that runs on any PowerPC
10899variant. The 64\-bit environment sets int to 32 bits and long and
10900pointer to 64 bits, and generates code for PowerPC64, as for
10901\&\fB\-mpowerpc64\fR.
10902.IP "\fB\-mfull\-toc\fR" 4
10903.IX Item "-mfull-toc"
10904.PD 0
10905.IP "\fB\-mno\-fp\-in\-toc\fR" 4
10906.IX Item "-mno-fp-in-toc"
10907.IP "\fB\-mno\-sum\-in\-toc\fR" 4
10908.IX Item "-mno-sum-in-toc"
10909.IP "\fB\-mminimal\-toc\fR" 4
10910.IX Item "-mminimal-toc"
10911.PD
10912Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
10913every executable file. The \fB\-mfull\-toc\fR option is selected by
10914default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
10915each unique non-automatic variable reference in your program. \s-1GCC\s0
10916will also place floating-point constants in the \s-1TOC\s0. However, only
1091716,384 entries are available in the \s-1TOC\s0.
10918.Sp
10919If you receive a linker error message that saying you have overflowed
10920the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
10921with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
10922\&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
10923constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
10924generate code to calculate the sum of an address and a constant at
10925run-time instead of putting that sum into the \s-1TOC\s0. You may specify one
10926or both of these options. Each causes \s-1GCC\s0 to produce very slightly
10927slower and larger code at the expense of conserving \s-1TOC\s0 space.
10928.Sp
10929If you still run out of space in the \s-1TOC\s0 even when you specify both of
10930these options, specify \fB\-mminimal\-toc\fR instead. This option causes
10931\&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this
10932option, \s-1GCC\s0 will produce code that is slower and larger but which
10933uses extremely little \s-1TOC\s0 space. You may wish to use this option
10934only on files that contain less frequently executed code.
10935.IP "\fB\-maix64\fR" 4
10936.IX Item "-maix64"
10937.PD 0
10938.IP "\fB\-maix32\fR" 4
10939.IX Item "-maix32"
10940.PD
10941Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
10942\&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
10943Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
10944\&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
10945implies \fB\-mno\-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR.
10946.IP "\fB\-mxl\-compat\fR" 4
10947.IX Item "-mxl-compat"
10948.PD 0
10949.IP "\fB\-mno\-xl\-compat\fR" 4
10950.IX Item "-mno-xl-compat"
10951.PD
10952Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
10953when using AIX-compatible \s-1ABI\s0. Pass floating-point arguments to
10954prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
10955in addition to argument FPRs. Do not assume that most significant
10956double in 128\-bit long double value is properly rounded when comparing
10957values and converting to double. Use \s-1XL\s0 symbol names for long double
10958support routines.
10959.Sp
10960The \s-1AIX\s0 calling convention was extended but not initially documented to
10961handle an obscure K&R C case of calling a function that takes the
10962address of its arguments with fewer arguments than declared. \s-1IBM\s0 \s-1XL\s0
10963compilers access floating point arguments which do not fit in the
10964\&\s-1RSA\s0 from the stack when a subroutine is compiled without
10965optimization. Because always storing floating-point arguments on the
10966stack is inefficient and rarely needed, this option is not enabled by
10967default and only is necessary when calling subroutines compiled by \s-1IBM\s0
10968\&\s-1XL\s0 compilers without optimization.
10969.IP "\fB\-mpe\fR" 4
10970.IX Item "-mpe"
10971Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an
10972application written to use message passing with special startup code to
10973enable the application to run. The system must have \s-1PE\s0 installed in the
10974standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
10975must be overridden with the \fB\-specs=\fR option to specify the
10976appropriate directory location. The Parallel Environment does not
10977support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
10978option are incompatible.
10979.IP "\fB\-malign\-natural\fR" 4
10980.IX Item "-malign-natural"
10981.PD 0
10982.IP "\fB\-malign\-power\fR" 4
10983.IX Item "-malign-power"
10984.PD
10985On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
10986\&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
10987types, such as floating-point doubles, on their natural size-based boundary.
10988The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
10989alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
10990.Sp
10991On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
10992is not supported.
10993.IP "\fB\-msoft\-float\fR" 4
10994.IX Item "-msoft-float"
10995.PD 0
10996.IP "\fB\-mhard\-float\fR" 4
10997.IX Item "-mhard-float"
10998.PD
10999Generate code that does not use (uses) the floating-point register set.
11000Software floating point emulation is provided if you use the
11001\&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
11002.IP "\fB\-mmultiple\fR" 4
11003.IX Item "-mmultiple"
11004.PD 0
11005.IP "\fB\-mno\-multiple\fR" 4
11006.IX Item "-mno-multiple"
11007.PD
11008Generate code that uses (does not use) the load multiple word
11009instructions and the store multiple word instructions. These
11010instructions are generated by default on \s-1POWER\s0 systems, and not
11011generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little
11012endian PowerPC systems, since those instructions do not work when the
11013processor is in little endian mode. The exceptions are \s-1PPC740\s0 and
11014\&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
11015.IP "\fB\-mstring\fR" 4
11016.IX Item "-mstring"
11017.PD 0
11018.IP "\fB\-mno\-string\fR" 4
11019.IX Item "-mno-string"
11020.PD
11021Generate code that uses (does not use) the load string instructions
11022and the store string word instructions to save multiple registers and
11023do small block moves. These instructions are generated by default on
11024\&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
11025\&\fB\-mstring\fR on little endian PowerPC systems, since those
11026instructions do not work when the processor is in little endian mode.
11027The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
11028usage in little endian mode.
11029.IP "\fB\-mupdate\fR" 4
11030.IX Item "-mupdate"
11031.PD 0
11032.IP "\fB\-mno\-update\fR" 4
11033.IX Item "-mno-update"
11034.PD
11035Generate code that uses (does not use) the load or store instructions
11036that update the base register to the address of the calculated memory
11037location. These instructions are generated by default. If you use
11038\&\fB\-mno\-update\fR, there is a small window between the time that the
11039stack pointer is updated and the address of the previous frame is
11040stored, which means code that walks the stack frame across interrupts or
11041signals may get corrupted data.
11042.IP "\fB\-mfused\-madd\fR" 4
11043.IX Item "-mfused-madd"
11044.PD 0
11045.IP "\fB\-mno\-fused\-madd\fR" 4
11046.IX Item "-mno-fused-madd"
11047.PD
11048Generate code that uses (does not use) the floating point multiply and
11049accumulate instructions. These instructions are generated by default if
11050hardware floating is used.
11051.IP "\fB\-mmulhw\fR" 4
11052.IX Item "-mmulhw"
11053.PD 0
11054.IP "\fB\-mno\-mulhw\fR" 4
11055.IX Item "-mno-mulhw"
11056.PD
11057Generate code that uses (does not use) the half-word multiply and
11058multiply-accumulate instructions on the \s-1IBM\s0 405 and 440 processors.
11059These instructions are generated by default when targetting those
11060processors.
11061.IP "\fB\-mdlmzb\fR" 4
11062.IX Item "-mdlmzb"
11063.PD 0
11064.IP "\fB\-mno\-dlmzb\fR" 4
11065.IX Item "-mno-dlmzb"
11066.PD
11067Generate code that uses (does not use) the string-search \fBdlmzb\fR
11068instruction on the \s-1IBM\s0 405 and 440 processors. This instruction is
11069generated by default when targetting those processors.
11070.IP "\fB\-mno\-bit\-align\fR" 4
11071.IX Item "-mno-bit-align"
11072.PD 0
11073.IP "\fB\-mbit\-align\fR" 4
11074.IX Item "-mbit-align"
11075.PD
11076On System V.4 and embedded PowerPC systems do not (do) force structures
11077and unions that contain bit-fields to be aligned to the base type of the
11078bit\-field.
11079.Sp
11080For example, by default a structure containing nothing but 8
11081\&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
11082boundary and have a size of 4 bytes. By using \fB\-mno\-bit\-align\fR,
11083the structure would be aligned to a 1 byte boundary and be one byte in
11084size.
11085.IP "\fB\-mno\-strict\-align\fR" 4
11086.IX Item "-mno-strict-align"
11087.PD 0
11088.IP "\fB\-mstrict\-align\fR" 4
11089.IX Item "-mstrict-align"
11090.PD
11091On System V.4 and embedded PowerPC systems do not (do) assume that
11092unaligned memory references will be handled by the system.
11093.IP "\fB\-mrelocatable\fR" 4
11094.IX Item "-mrelocatable"
11095.PD 0
11096.IP "\fB\-mno\-relocatable\fR" 4
11097.IX Item "-mno-relocatable"
11098.PD
11099On embedded PowerPC systems generate code that allows (does not allow)
11100the program to be relocated to a different address at runtime. If you
11101use \fB\-mrelocatable\fR on any module, all objects linked together must
11102be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
11103.IP "\fB\-mrelocatable\-lib\fR" 4
11104.IX Item "-mrelocatable-lib"
11105.PD 0
11106.IP "\fB\-mno\-relocatable\-lib\fR" 4
11107.IX Item "-mno-relocatable-lib"
11108.PD
11109On embedded PowerPC systems generate code that allows (does not allow)
11110the program to be relocated to a different address at runtime. Modules
11111compiled with \fB\-mrelocatable\-lib\fR can be linked with either modules
11112compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable\-lib\fR or
11113with modules compiled with the \fB\-mrelocatable\fR options.
11114.IP "\fB\-mno\-toc\fR" 4
11115.IX Item "-mno-toc"
11116.PD 0
11117.IP "\fB\-mtoc\fR" 4
11118.IX Item "-mtoc"
11119.PD
11120On System V.4 and embedded PowerPC systems do not (do) assume that
11121register 2 contains a pointer to a global area pointing to the addresses
11122used in the program.
11123.IP "\fB\-mlittle\fR" 4
11124.IX Item "-mlittle"
11125.PD 0
11126.IP "\fB\-mlittle\-endian\fR" 4
11127.IX Item "-mlittle-endian"
11128.PD
11129On System V.4 and embedded PowerPC systems compile code for the
11130processor in little endian mode. The \fB\-mlittle\-endian\fR option is
11131the same as \fB\-mlittle\fR.
11132.IP "\fB\-mbig\fR" 4
11133.IX Item "-mbig"
11134.PD 0
11135.IP "\fB\-mbig\-endian\fR" 4
11136.IX Item "-mbig-endian"
11137.PD
11138On System V.4 and embedded PowerPC systems compile code for the
11139processor in big endian mode. The \fB\-mbig\-endian\fR option is
11140the same as \fB\-mbig\fR.
11141.IP "\fB\-mdynamic\-no\-pic\fR" 4
11142.IX Item "-mdynamic-no-pic"
11143On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
11144relocatable, but that its external references are relocatable. The
11145resulting code is suitable for applications, but not shared
11146libraries.
11147.IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
11148.IX Item "-mprioritize-restricted-insns=priority"
11149This option controls the priority that is assigned to
11150dispatch-slot restricted instructions during the second scheduling
11151pass. The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
11152\&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
11153instructions.
11154.IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
11155.IX Item "-msched-costly-dep=dependence_type"
11156This option controls which dependences are considered costly
11157by the target during instruction scheduling. The argument
11158\&\fIdependence_type\fR takes one of the following values:
11159\&\fIno\fR: no dependence is costly,
11160\&\fIall\fR: all dependences are costly,
11161\&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
11162\&\fIstore_to_load\fR: any dependence from store to load is costly,
11163\&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
11164.IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
11165.IX Item "-minsert-sched-nops=scheme"
11166This option controls which nop insertion scheme will be used during
11167the second scheduling pass. The argument \fIscheme\fR takes one of the
11168following values:
11169\&\fIno\fR: Don't insert nops.
11170\&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
11171according to the scheduler's grouping.
11172\&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
11173separate groups. Insert exactly as many nops as needed to force an insn
11174to a new group, according to the estimated processor grouping.
11175\&\fInumber\fR: Insert nops to force costly dependent insns into
11176separate groups. Insert \fInumber\fR nops to force an insn to a new group.
11177.IP "\fB\-mcall\-sysv\fR" 4
11178.IX Item "-mcall-sysv"
11179On System V.4 and embedded PowerPC systems compile code using calling
11180conventions that adheres to the March 1995 draft of the System V
11181Application Binary Interface, PowerPC processor supplement. This is the
11182default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
11183.IP "\fB\-mcall\-sysv\-eabi\fR" 4
11184.IX Item "-mcall-sysv-eabi"
11185Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
11186.IP "\fB\-mcall\-sysv\-noeabi\fR" 4
11187.IX Item "-mcall-sysv-noeabi"
11188Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
11189.IP "\fB\-mcall\-solaris\fR" 4
11190.IX Item "-mcall-solaris"
11191On System V.4 and embedded PowerPC systems compile code for the Solaris
11192operating system.
11193.IP "\fB\-mcall\-linux\fR" 4
11194.IX Item "-mcall-linux"
11195On System V.4 and embedded PowerPC systems compile code for the
11196Linux-based \s-1GNU\s0 system.
11197.IP "\fB\-mcall\-gnu\fR" 4
11198.IX Item "-mcall-gnu"
11199On System V.4 and embedded PowerPC systems compile code for the
11200Hurd-based \s-1GNU\s0 system.
11201.IP "\fB\-mcall\-netbsd\fR" 4
11202.IX Item "-mcall-netbsd"
11203On System V.4 and embedded PowerPC systems compile code for the
11204NetBSD operating system.
11205.IP "\fB\-maix\-struct\-return\fR" 4
11206.IX Item "-maix-struct-return"
11207Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
11208.IP "\fB\-msvr4\-struct\-return\fR" 4
11209.IX Item "-msvr4-struct-return"
11210Return structures smaller than 8 bytes in registers (as specified by the
11211\&\s-1SVR4\s0 \s-1ABI\s0).
11212.IP "\fB\-mabi=\fR\fIabi-type\fR" 4
11213.IX Item "-mabi=abi-type"
11214Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
11215Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
11216\&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
11217.IP "\fB\-mabi=spe\fR" 4
11218.IX Item "-mabi=spe"
11219Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change
11220the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
11221\&\s-1ABI\s0.
11222.IP "\fB\-mabi=no\-spe\fR" 4
11223.IX Item "-mabi=no-spe"
11224Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
11225.IP "\fB\-mabi=ibmlongdouble\fR" 4
11226.IX Item "-mabi=ibmlongdouble"
11227Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
11228This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
11229.IP "\fB\-mabi=ieeelongdouble\fR" 4
11230.IX Item "-mabi=ieeelongdouble"
11231Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
11232This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
11233.IP "\fB\-mprototype\fR" 4
11234.IX Item "-mprototype"
11235.PD 0
11236.IP "\fB\-mno\-prototype\fR" 4
11237.IX Item "-mno-prototype"
11238.PD
11239On System V.4 and embedded PowerPC systems assume that all calls to
11240variable argument functions are properly prototyped. Otherwise, the
11241compiler must insert an instruction before every non prototyped call to
11242set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
11243indicate whether floating point values were passed in the floating point
11244registers in case the function takes a variable arguments. With
11245\&\fB\-mprototype\fR, only calls to prototyped variable argument functions
11246will set or clear the bit.
11247.IP "\fB\-msim\fR" 4
11248.IX Item "-msim"
11249On embedded PowerPC systems, assume that the startup module is called
11250\&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
11251\&\fIlibc.a\fR. This is the default for \fBpowerpc\-*\-eabisim\fR.
11252configurations.
11253.IP "\fB\-mmvme\fR" 4
11254.IX Item "-mmvme"
11255On embedded PowerPC systems, assume that the startup module is called
11256\&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
11257\&\fIlibc.a\fR.
11258.IP "\fB\-mads\fR" 4
11259.IX Item "-mads"
11260On embedded PowerPC systems, assume that the startup module is called
11261\&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
11262\&\fIlibc.a\fR.
11263.IP "\fB\-myellowknife\fR" 4
11264.IX Item "-myellowknife"
11265On embedded PowerPC systems, assume that the startup module is called
11266\&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
11267\&\fIlibc.a\fR.
11268.IP "\fB\-mvxworks\fR" 4
11269.IX Item "-mvxworks"
11270On System V.4 and embedded PowerPC systems, specify that you are
11271compiling for a VxWorks system.
11272.IP "\fB\-mwindiss\fR" 4
11273.IX Item "-mwindiss"
11274Specify that you are compiling for the WindISS simulation environment.
11275.IP "\fB\-memb\fR" 4
11276.IX Item "-memb"
11277On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
11278header to indicate that \fBeabi\fR extended relocations are used.
11279.IP "\fB\-meabi\fR" 4
11280.IX Item "-meabi"
11281.PD 0
11282.IP "\fB\-mno\-eabi\fR" 4
11283.IX Item "-mno-eabi"
11284.PD
11285On System V.4 and embedded PowerPC systems do (do not) adhere to the
11286Embedded Applications Binary Interface (eabi) which is a set of
11287modifications to the System V.4 specifications. Selecting \fB\-meabi\fR
11288means that the stack is aligned to an 8 byte boundary, a function
11289\&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
11290environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
11291\&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting
11292\&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
11293do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
11294\&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
11295small data area. The \fB\-meabi\fR option is on by default if you
11296configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
11297.IP "\fB\-msdata=eabi\fR" 4
11298.IX Item "-msdata=eabi"
11299On System V.4 and embedded PowerPC systems, put small initialized
11300\&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
11301is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized
11302non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
11303which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized
11304global and static data in the \fB.sbss\fR section, which is adjacent to
11305the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is
11306incompatible with the \fB\-mrelocatable\fR option. The
11307\&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
11308.IP "\fB\-msdata=sysv\fR" 4
11309.IX Item "-msdata=sysv"
11310On System V.4 and embedded PowerPC systems, put small global and static
11311data in the \fB.sdata\fR section, which is pointed to by register
11312\&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the
11313\&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
11314The \fB\-msdata=sysv\fR option is incompatible with the
11315\&\fB\-mrelocatable\fR option.
11316.IP "\fB\-msdata=default\fR" 4
11317.IX Item "-msdata=default"
11318.PD 0
11319.IP "\fB\-msdata\fR" 4
11320.IX Item "-msdata"
11321.PD
11322On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
11323compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
11324same as \fB\-msdata=sysv\fR.
11325.IP "\fB\-msdata\-data\fR" 4
11326.IX Item "-msdata-data"
11327On System V.4 and embedded PowerPC systems, put small global
11328data in the \fB.sdata\fR section. Put small uninitialized global
11329data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR
11330to address small data however. This is the default behavior unless
11331other \fB\-msdata\fR options are used.
11332.IP "\fB\-msdata=none\fR" 4
11333.IX Item "-msdata=none"
11334.PD 0
11335.IP "\fB\-mno\-sdata\fR" 4
11336.IX Item "-mno-sdata"
11337.PD
11338On embedded PowerPC systems, put all initialized global and static data
11339in the \fB.data\fR section, and all uninitialized data in the
11340\&\fB.bss\fR section.
11341.IP "\fB\-G\fR \fInum\fR" 4
11342.IX Item "-G num"
11343On embedded PowerPC systems, put global and static items less than or
11344equal to \fInum\fR bytes into the small data or bss sections instead of
11345the normal data or bss section. By default, \fInum\fR is 8. The
11346\&\fB\-G\fR \fInum\fR switch is also passed to the linker.
11347All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
11348.IP "\fB\-mregnames\fR" 4
11349.IX Item "-mregnames"
11350.PD 0
11351.IP "\fB\-mno\-regnames\fR" 4
11352.IX Item "-mno-regnames"
11353.PD
11354On System V.4 and embedded PowerPC systems do (do not) emit register
11355names in the assembly language output using symbolic forms.
11356.IP "\fB\-mlongcall\fR" 4
11357.IX Item "-mlongcall"
11358.PD 0
11359.IP "\fB\-mno\-longcall\fR" 4
11360.IX Item "-mno-longcall"
11361.PD
11362By default assume that all calls are far away so that a longer more
11363expensive calling sequence is required. This is required for calls
11364further than 32 megabytes (33,554,432 bytes) from the current location.
11365A short call will be generated if the compiler knows
11366the call cannot be that far away. This setting can be overridden by
11367the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
11368longcall(0)\*(C'\fR.
11369.Sp
11370Some linkers are capable of detecting out-of-range calls and generating
11371glue code on the fly. On these systems, long calls are unnecessary and
11372generate slower code. As of this writing, the \s-1AIX\s0 linker can do this,
11373as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature
11374to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
11375.Sp
11376On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
11377callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code). The two target
11378addresses represent the callee and the \*(L"branch island\*(R". The
11379Darwin/PPC linker will prefer the first address and generate a \*(L"bl
11380callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
11381otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
11382island\*(R". The \*(L"branch island\*(R" is appended to the body of the
11383calling function; it computes the full 32\-bit address of the callee
11384and jumps to it.
11385.Sp
11386On Mach-O (Darwin) systems, this option directs the compiler emit to
11387the glue for every direct call, and the Darwin linker decides whether
11388to use or discard it.
11389.Sp
11390In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
11391when the linker is known to generate glue.
11392.IP "\fB\-pthread\fR" 4
11393.IX Item "-pthread"
11394Adds support for multithreading with the \fIpthreads\fR library.
11395This option sets flags for both the preprocessor and linker.
11396.PP
11397\fIS/390 and zSeries Options\fR
11398.IX Subsection "S/390 and zSeries Options"
11399.PP
11400These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
11401.IP "\fB\-mhard\-float\fR" 4
11402.IX Item "-mhard-float"
11403.PD 0
11404.IP "\fB\-msoft\-float\fR" 4
11405.IX Item "-msoft-float"
11406.PD
11407Use (do not use) the hardware floating-point instructions and registers
11408for floating-point operations. When \fB\-msoft\-float\fR is specified,
11409functions in \fIlibgcc.a\fR will be used to perform floating-point
11410operations. When \fB\-mhard\-float\fR is specified, the compiler
11411generates \s-1IEEE\s0 floating-point instructions. This is the default.
11412.IP "\fB\-mlong\-double\-64\fR" 4
11413.IX Item "-mlong-double-64"
11414.PD 0
11415.IP "\fB\-mlong\-double\-128\fR" 4
11416.IX Item "-mlong-double-128"
11417.PD
11418These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
11419of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
11420type. This is the default.
11421.IP "\fB\-mbackchain\fR" 4
11422.IX Item "-mbackchain"
11423.PD 0
11424.IP "\fB\-mno\-backchain\fR" 4
11425.IX Item "-mno-backchain"
11426.PD
11427Store (do not store) the address of the caller's frame as backchain pointer
11428into the callee's stack frame.
11429A backchain may be needed to allow debugging using tools that do not understand
11430\&\s-1DWARF\-2\s0 call frame information.
11431When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
11432at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
11433the backchain is placed into the topmost word of the 96/160 byte register
11434save area.
11435.Sp
11436In general, code compiled with \fB\-mbackchain\fR is call-compatible with
11437code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
11438for debugging purposes usually requires that the whole binary is built with
11439\&\fB\-mbackchain\fR. Note that the combination of \fB\-mbackchain\fR,
11440\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
11441to build a linux kernel use \fB\-msoft\-float\fR.
11442.Sp
11443The default is to not maintain the backchain.
11444.IP "\fB\-mpacked\-stack\fR" 4
11445.IX Item "-mpacked-stack"
11446.PD 0
11447.IP "\fB\-mno\-packed\-stack\fR" 4
11448.IX Item "-mno-packed-stack"
11449.PD
11450Use (do not use) the packed stack layout. When \fB\-mno\-packed\-stack\fR is
11451specified, the compiler uses the all fields of the 96/160 byte register save
11452area only for their default purpose; unused fields still take up stack space.
11453When \fB\-mpacked\-stack\fR is specified, register save slots are densely
11454packed at the top of the register save area; unused space is reused for other
11455purposes, allowing for more efficient use of the available stack space.
11456However, when \fB\-mbackchain\fR is also in effect, the topmost word of
11457the save area is always used to store the backchain, and the return address
11458register is always saved two words below the backchain.
11459.Sp
11460As long as the stack frame backchain is not used, code generated with
11461\&\fB\-mpacked\-stack\fR is call-compatible with code generated with
11462\&\fB\-mno\-packed\-stack\fR. Note that some non-FSF releases of \s-1GCC\s0 2.95 for
11463S/390 or zSeries generated code that uses the stack frame backchain at run
11464time, not just for debugging purposes. Such code is not call-compatible
11465with code compiled with \fB\-mpacked\-stack\fR. Also, note that the
11466combination of \fB\-mbackchain\fR,
11467\&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
11468to build a linux kernel use \fB\-msoft\-float\fR.
11469.Sp
11470The default is to not use the packed stack layout.
11471.IP "\fB\-msmall\-exec\fR" 4
11472.IX Item "-msmall-exec"
11473.PD 0
11474.IP "\fB\-mno\-small\-exec\fR" 4
11475.IX Item "-mno-small-exec"
11476.PD
11477Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
11478to do subroutine calls.
11479This only works reliably if the total executable size does not
11480exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
11481which does not have this limitation.
11482.IP "\fB\-m64\fR" 4
11483.IX Item "-m64"
11484.PD 0
11485.IP "\fB\-m31\fR" 4
11486.IX Item "-m31"
11487.PD
11488When \fB\-m31\fR is specified, generate code compliant to the
11489GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate
11490code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in
11491particular to generate 64\-bit instructions. For the \fBs390\fR
11492targets, the default is \fB\-m31\fR, while the \fBs390x\fR
11493targets default to \fB\-m64\fR.
11494.IP "\fB\-mzarch\fR" 4
11495.IX Item "-mzarch"
11496.PD 0
11497.IP "\fB\-mesa\fR" 4
11498.IX Item "-mesa"
11499.PD
11500When \fB\-mzarch\fR is specified, generate code using the
11501instructions available on z/Architecture.
11502When \fB\-mesa\fR is specified, generate code using the
11503instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
11504not possible with \fB\-m64\fR.
11505When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
11506the default is \fB\-mesa\fR. When generating code compliant
11507to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
11508.IP "\fB\-mmvcle\fR" 4
11509.IX Item "-mmvcle"
11510.PD 0
11511.IP "\fB\-mno\-mvcle\fR" 4
11512.IX Item "-mno-mvcle"
11513.PD
11514Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
11515to perform block moves. When \fB\-mno\-mvcle\fR is specified,
11516use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default unless optimizing for
11517size.
11518.IP "\fB\-mdebug\fR" 4
11519.IX Item "-mdebug"
11520.PD 0
11521.IP "\fB\-mno\-debug\fR" 4
11522.IX Item "-mno-debug"
11523.PD
11524Print (or do not print) additional debug information when compiling.
11525The default is to not print debug information.
11526.IP "\fB\-march=\fR\fIcpu-type\fR" 4
11527.IX Item "-march=cpu-type"
11528Generate code that will run on \fIcpu-type\fR, which is the name of a system
11529representing a certain processor type. Possible values for
11530\&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, and \fBz990\fR.
11531When generating code using the instructions available on z/Architecture,
11532the default is \fB\-march=z900\fR. Otherwise, the default is
11533\&\fB\-march=g5\fR.
11534.IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
11535.IX Item "-mtune=cpu-type"
11536Tune to \fIcpu-type\fR everything applicable about the generated code,
11537except for the \s-1ABI\s0 and the set of available instructions.
11538The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
11539The default is the value used for \fB\-march\fR.
11540.IP "\fB\-mtpf\-trace\fR" 4
11541.IX Item "-mtpf-trace"
11542.PD 0
11543.IP "\fB\-mno\-tpf\-trace\fR" 4
11544.IX Item "-mno-tpf-trace"
11545.PD
11546Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
11547routines in the operating system. This option is off by default, even
11548when compiling for the \s-1TPF\s0 \s-1OS\s0.
11549.IP "\fB\-mfused\-madd\fR" 4
11550.IX Item "-mfused-madd"
11551.PD 0
11552.IP "\fB\-mno\-fused\-madd\fR" 4
11553.IX Item "-mno-fused-madd"
11554.PD
11555Generate code that uses (does not use) the floating point multiply and
11556accumulate instructions. These instructions are generated by default if
11557hardware floating point is used.
11558.IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
11559.IX Item "-mwarn-framesize=framesize"
11560Emit a warning if the current function exceeds the given frame size. Because
11561this is a compile time check it doesn't need to be a real problem when the program
11562runs. It is intended to identify functions which most probably cause
11563a stack overflow. It is useful to be used in an environment with limited stack
11564size e.g. the linux kernel.
11565.IP "\fB\-mwarn\-dynamicstack\fR" 4
11566.IX Item "-mwarn-dynamicstack"
11567Emit a warning if the function calls alloca or uses dynamically
11568sized arrays. This is generally a bad idea with a limited stack size.
11569.IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
11570.IX Item "-mstack-guard=stack-guard"
11571.PD 0
11572.IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
11573.IX Item "-mstack-size=stack-size"
11574.PD
11575These arguments always have to be used in conjunction. If they are present the s390
11576back end emits additional instructions in the function prologue which trigger a trap
11577if the stack size is \fIstack-guard\fR bytes above the \fIstack-size\fR
11578(remember that the stack on s390 grows downward). These options are intended to
11579be used to help debugging stack overflow problems. The additionally emitted code
11580causes only little overhead and hence can also be used in production like systems
11581without greater performance degradation. The given values have to be exact
11582powers of 2 and \fIstack-size\fR has to be greater than \fIstack-guard\fR without
11583exceeding 64k.
11584In order to be efficient the extra code makes the assumption that the stack starts
11585at an address aligned to the value given by \fIstack-size\fR.
11586.PP
11587\fIScore Options\fR
11588.IX Subsection "Score Options"
11589.PP
11590These options are defined for Score implementations:
11591.IP "\fB\-meb\fR" 4
11592.IX Item "-meb"
11593Compile code for big endian mode. This is the default.
11594.IP "\fB\-mel\fR" 4
11595.IX Item "-mel"
11596Compile code for little endian mode.
11597.IP "\fB\-mnhwloop\fR" 4
11598.IX Item "-mnhwloop"
11599Disable generate bcnz instruction.
11600.IP "\fB\-muls\fR" 4
11601.IX Item "-muls"
11602Enable generate unaligned load and store instruction.
11603.IP "\fB\-mmac\fR" 4
11604.IX Item "-mmac"
11605Enable the use of multiply-accumulate instructions. Disabled by default.
11606.IP "\fB\-mscore5\fR" 4
11607.IX Item "-mscore5"
11608Specify the \s-1SCORE5\s0 as the target architecture.
11609.IP "\fB\-mscore5u\fR" 4
11610.IX Item "-mscore5u"
11611Specify the \s-1SCORE5U\s0 of the target architecture.
11612.IP "\fB\-mscore7\fR" 4
11613.IX Item "-mscore7"
11614Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
11615.IP "\fB\-mscore7d\fR" 4
11616.IX Item "-mscore7d"
11617Specify the \s-1SCORE7D\s0 as the target architecture.
11618.PP
11619\fI\s-1SH\s0 Options\fR
11620.IX Subsection "SH Options"
11621.PP
11622These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
11623.IP "\fB\-m1\fR" 4
11624.IX Item "-m1"
11625Generate code for the \s-1SH1\s0.
11626.IP "\fB\-m2\fR" 4
11627.IX Item "-m2"
11628Generate code for the \s-1SH2\s0.
11629.IP "\fB\-m2e\fR" 4
11630.IX Item "-m2e"
11631Generate code for the SH2e.
11632.IP "\fB\-m3\fR" 4
11633.IX Item "-m3"
11634Generate code for the \s-1SH3\s0.
11635.IP "\fB\-m3e\fR" 4
11636.IX Item "-m3e"
11637Generate code for the SH3e.
11638.IP "\fB\-m4\-nofpu\fR" 4
11639.IX Item "-m4-nofpu"
11640Generate code for the \s-1SH4\s0 without a floating-point unit.
11641.IP "\fB\-m4\-single\-only\fR" 4
11642.IX Item "-m4-single-only"
11643Generate code for the \s-1SH4\s0 with a floating-point unit that only
11644supports single-precision arithmetic.
11645.IP "\fB\-m4\-single\fR" 4
11646.IX Item "-m4-single"
11647Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
11648single-precision mode by default.
11649.IP "\fB\-m4\fR" 4
11650.IX Item "-m4"
11651Generate code for the \s-1SH4\s0.
11652.IP "\fB\-m4a\-nofpu\fR" 4
11653.IX Item "-m4a-nofpu"
11654Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
11655floating-point unit is not used.
11656.IP "\fB\-m4a\-single\-only\fR" 4
11657.IX Item "-m4a-single-only"
11658Generate code for the SH4a, in such a way that no double-precision
11659floating point operations are used.
11660.IP "\fB\-m4a\-single\fR" 4
11661.IX Item "-m4a-single"
11662Generate code for the SH4a assuming the floating-point unit is in
11663single-precision mode by default.
11664.IP "\fB\-m4a\fR" 4
11665.IX Item "-m4a"
11666Generate code for the SH4a.
11667.IP "\fB\-m4al\fR" 4
11668.IX Item "-m4al"
11669Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
11670\&\fB\-dsp\fR to the assembler. \s-1GCC\s0 doesn't generate any \s-1DSP\s0
11671instructions at the moment.
11672.IP "\fB\-mb\fR" 4
11673.IX Item "-mb"
11674Compile code for the processor in big endian mode.
11675.IP "\fB\-ml\fR" 4
11676.IX Item "-ml"
11677Compile code for the processor in little endian mode.
11678.IP "\fB\-mdalign\fR" 4
11679.IX Item "-mdalign"
11680Align doubles at 64\-bit boundaries. Note that this changes the calling
11681conventions, and thus some functions from the standard C library will
11682not work unless you recompile it first with \fB\-mdalign\fR.
11683.IP "\fB\-mrelax\fR" 4
11684.IX Item "-mrelax"
11685Shorten some address references at link time, when possible; uses the
11686linker option \fB\-relax\fR.
11687.IP "\fB\-mbigtable\fR" 4
11688.IX Item "-mbigtable"
11689Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use
1169016\-bit offsets.
11691.IP "\fB\-mfmovd\fR" 4
11692.IX Item "-mfmovd"
11693Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.
11694.IP "\fB\-mhitachi\fR" 4
11695.IX Item "-mhitachi"
11696Comply with the calling conventions defined by Renesas.
11697.IP "\fB\-mrenesas\fR" 4
11698.IX Item "-mrenesas"
11699Comply with the calling conventions defined by Renesas.
11700.IP "\fB\-mno\-renesas\fR" 4
11701.IX Item "-mno-renesas"
11702Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
11703conventions were available. This option is the default for all
11704targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
11705.IP "\fB\-mnomacsave\fR" 4
11706.IX Item "-mnomacsave"
11707Mark the \f(CW\*(C`MAC\*(C'\fR register as call\-clobbered, even if
11708\&\fB\-mhitachi\fR is given.
11709.IP "\fB\-mieee\fR" 4
11710.IX Item "-mieee"
11711Increase IEEE-compliance of floating-point code.
11712At the moment, this is equivalent to \fB\-fno\-finite\-math\-only\fR.
11713When generating 16 bit \s-1SH\s0 opcodes, getting IEEE-conforming results for
11714comparisons of NANs / infinities incurs extra overhead in every
11715floating point comparison, therefore the default is set to
11716\&\fB\-ffinite\-math\-only\fR.
11717.IP "\fB\-misize\fR" 4
11718.IX Item "-misize"
11719Dump instruction size and location in the assembly code.
11720.IP "\fB\-mpadstruct\fR" 4
11721.IX Item "-mpadstruct"
11722This option is deprecated. It pads structures to multiple of 4 bytes,
11723which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
11724.IP "\fB\-mspace\fR" 4
11725.IX Item "-mspace"
11726Optimize for space instead of speed. Implied by \fB\-Os\fR.
11727.IP "\fB\-mprefergot\fR" 4
11728.IX Item "-mprefergot"
11729When generating position-independent code, emit function calls using
11730the Global Offset Table instead of the Procedure Linkage Table.
11731.IP "\fB\-musermode\fR" 4
11732.IX Item "-musermode"
11733Generate a library function call to invalidate instruction cache
11734entries, after fixing up a trampoline. This library function call
11735doesn't assume it can write to the whole memory address space. This
11736is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
11737.IP "\fB\-multcost=\fR\fInumber\fR" 4
11738.IX Item "-multcost=number"
11739Set the cost to assume for a multiply insn.
11740.IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
11741.IX Item "-mdiv=strategy"
11742Set the division strategy to use for SHmedia code. \fIstrategy\fR must be
11743one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
11744inv:call2, inv:fp .
11745\&\*(L"fp\*(R" performs the operation in floating point. This has a very high latency,
11746but needs only a few instructions, so it might be a good choice if
11747your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
11748schedule the floating point instructions together with other instructions.
11749Division by zero causes a floating point exception.
11750\&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
11751and then multiplies the dividend with the inverse. This strategy allows
11752cse and hoisting of the inverse calculation. Division by zero calculates
11753an unspecified result, but does not trap.
11754\&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
11755have been found, or if the entire operation has been hoisted to the same
11756place, the last stages of the inverse calculation are intertwined with the
11757final multiply to reduce the overall latency, at the expense of using a few
11758more instructions, and thus offering fewer scheduling opportunities with
11759other code.
11760\&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
11761strategy.
11762This gives high code density for m5\-*media\-nofpu compilations.
11763\&\*(L"call2\*(R" uses a different entry point of the same library function, where it
11764assumes that a pointer to a lookup table has already been set up, which
11765exposes the pointer load to cse / code hoisting optimizations.
11766\&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
11767code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
11768\&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively. Note that the
11769potentially-trapping side effect of division by zero is carried by a
11770separate instruction, so it is possible that all the integer instructions
11771are hoisted out, but the marker for the side effect stays where it is.
11772A recombination to fp operations or a call is not possible in that case.
11773\&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy. In the case
11774that the inverse calculation was nor separated from the multiply, they speed
11775up division where the dividend fits into 20 bits (plus sign where applicable),
11776by inserting a test to skip a number of operations in this case; this test
11777slows down the case of larger dividends. inv20u assumes the case of a such
11778a small dividend to be unlikely, and inv20l assumes it to be likely.
11779.IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
11780.IX Item "-mdivsi3_libfunc=name"
11781Set the name of the library function used for 32 bit signed division to
11782\&\fIname\fR. This only affect the name used in the call and inv:call
11783division strategies, and the compiler will still expect the same
11784sets of input/output/clobbered registers as if this option was not present.
11785.IP "\fB\-madjust\-unroll\fR" 4
11786.IX Item "-madjust-unroll"
11787Throttle unrolling to avoid thrashing target registers.
11788This option only has an effect if the gcc code base supports the
11789\&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
11790.IP "\fB\-mindexed\-addressing\fR" 4
11791.IX Item "-mindexed-addressing"
11792Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
11793This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
11794semantics for the indexed addressing mode. The architecture allows the
11795implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
11796get 32 bit addressing, but since no current hardware implementation supports
11797this or any other way to make the indexed addressing mode safe to use in
11798the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
11799.IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
11800.IX Item "-mgettrcost=number"
11801Set the cost assumed for the gettr instruction to \fInumber\fR.
11802The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
11803.IP "\fB\-mpt\-fixed\fR" 4
11804.IX Item "-mpt-fixed"
11805Assume pt* instructions won't trap. This will generally generate better
11806scheduled code, but is unsafe on current hardware. The current architecture
11807definition says that ptabs and ptrel trap when the target anded with 3 is 3.
11808This has the unintentional effect of making it unsafe to schedule ptabs /
11809ptrel before a branch, or hoist it out of a loop. For example,
11810_\|_do_global_ctors, a part of libgcc that runs constructors at program
11811startup, calls functions in a list which is delimited by \-1. With the
11812\&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
11813That means that all the constructors will be run a bit quicker, but when
11814the loop comes to the end of the list, the program crashes because ptabs
11815loads \-1 into a target register. Since this option is unsafe for any
11816hardware implementing the current architecture specification, the default
11817is \-mno\-pt\-fixed. Unless the user specifies a specific cost with
11818\&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
11819this deters register allocation using target registers for storing
11820ordinary integers.
11821.IP "\fB\-minvalid\-symbols\fR" 4
11822.IX Item "-minvalid-symbols"
11823Assume symbols might be invalid. Ordinary function symbols generated by
11824the compiler will always be valid to load with movi/shori/ptabs or
11825movi/shori/ptrel, but with assembler and/or linker tricks it is possible
11826to generate symbols that will cause ptabs / ptrel to trap.
11827This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
11828It will then prevent cross-basic-block cse, hoisting and most scheduling
11829of symbol loads. The default is \fB\-mno\-invalid\-symbols\fR.
11830.PP
11831\fI\s-1SPARC\s0 Options\fR
11832.IX Subsection "SPARC Options"
11833.PP
11834These \fB\-m\fR options are supported on the \s-1SPARC:\s0
11835.IP "\fB\-mno\-app\-regs\fR" 4
11836.IX Item "-mno-app-regs"
11837.PD 0
11838.IP "\fB\-mapp\-regs\fR" 4
11839.IX Item "-mapp-regs"
11840.PD
11841Specify \fB\-mapp\-regs\fR to generate output using the global registers
118422 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This
11843is the default.
11844.Sp
11845To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
11846specify \fB\-mno\-app\-regs\fR. You should compile libraries and system
11847software with this option.
11848.IP "\fB\-mfpu\fR" 4
11849.IX Item "-mfpu"
11850.PD 0
11851.IP "\fB\-mhard\-float\fR" 4
11852.IX Item "-mhard-float"
11853.PD
11854Generate output containing floating point instructions. This is the
11855default.
11856.IP "\fB\-mno\-fpu\fR" 4
11857.IX Item "-mno-fpu"
11858.PD 0
11859.IP "\fB\-msoft\-float\fR" 4
11860.IX Item "-msoft-float"
11861.PD
11862Generate output containing library calls for floating point.
11863\&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
11864targets. Normally the facilities of the machine's usual C compiler are
11865used, but this cannot be done directly in cross\-compilation. You must make
11866your own arrangements to provide suitable library functions for
11867cross\-compilation. The embedded targets \fBsparc\-*\-aout\fR and
11868\&\fBsparclite\-*\-*\fR do provide software floating point support.
11869.Sp
11870\&\fB\-msoft\-float\fR changes the calling convention in the output file;
11871therefore, it is only useful if you compile \fIall\fR of a program with
11872this option. In particular, you need to compile \fIlibgcc.a\fR, the
11873library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
11874this to work.
11875.IP "\fB\-mhard\-quad\-float\fR" 4
11876.IX Item "-mhard-quad-float"
11877Generate output containing quad-word (long double) floating point
11878instructions.
11879.IP "\fB\-msoft\-quad\-float\fR" 4
11880.IX Item "-msoft-quad-float"
11881Generate output containing library calls for quad-word (long double)
11882floating point instructions. The functions called are those specified
11883in the \s-1SPARC\s0 \s-1ABI\s0. This is the default.
11884.Sp
11885As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
11886support for the quad-word floating point instructions. They all invoke
11887a trap handler for one of these instructions, and then the trap handler
11888emulates the effect of the instruction. Because of the trap handler overhead,
11889this is much slower than calling the \s-1ABI\s0 library routines. Thus the
11890\&\fB\-msoft\-quad\-float\fR option is the default.
11891.IP "\fB\-mno\-unaligned\-doubles\fR" 4
11892.IX Item "-mno-unaligned-doubles"
11893.PD 0
11894.IP "\fB\-munaligned\-doubles\fR" 4
11895.IX Item "-munaligned-doubles"
11896.PD
11897Assume that doubles have 8 byte alignment. This is the default.
11898.Sp
11899With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
11900alignment only if they are contained in another type, or if they have an
11901absolute address. Otherwise, it assumes they have 4 byte alignment.
11902Specifying this option avoids some rare compatibility problems with code
11903generated by other compilers. It is not the default because it results
11904in a performance loss, especially for floating point code.
11905.IP "\fB\-mno\-faster\-structs\fR" 4
11906.IX Item "-mno-faster-structs"
11907.PD 0
11908.IP "\fB\-mfaster\-structs\fR" 4
11909.IX Item "-mfaster-structs"
11910.PD
11911With \fB\-mfaster\-structs\fR, the compiler assumes that structures
11912should have 8 byte alignment. This enables the use of pairs of
11913\&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
11914assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
11915However, the use of this changed alignment directly violates the \s-1SPARC\s0
11916\&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer
11917acknowledges that their resulting code will not be directly in line with
11918the rules of the \s-1ABI\s0.
11919.IP "\fB\-mimpure\-text\fR" 4
11920.IX Item "-mimpure-text"
11921\&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
11922the compiler to not pass \fB\-z text\fR to the linker when linking a
11923shared object. Using this option, you can link position-dependent
11924code into a shared object.
11925.Sp
11926\&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
11927allocatable but non-writable sections\*(R" linker error message.
11928However, the necessary relocations will trigger copy\-on\-write, and the
11929shared object is not actually shared across processes. Instead of
11930using \fB\-mimpure\-text\fR, you should compile all source code with
11931\&\fB\-fpic\fR or \fB\-fPIC\fR.
11932.Sp
11933This option is only available on SunOS and Solaris.
11934.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
11935.IX Item "-mcpu=cpu_type"
11936Set the instruction set, register set, and instruction scheduling parameters
11937for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are
11938\&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
11939\&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
11940\&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
11941\&\fBultrasparc3\fR, and \fBniagara\fR.
11942.Sp
11943Default instruction scheduling parameters are used for values that select
11944an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR,
11945\&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
11946.Sp
11947Here is a list of each supported architecture and their supported
11948implementations.
11949.Sp
11950.Vb 5
11951\& v7: cypress
11952\& v8: supersparc, hypersparc
11953\& sparclite: f930, f934, sparclite86x
11954\& sparclet: tsc701
11955\& v9: ultrasparc, ultrasparc3, niagara
11956.Ve
11957.Sp
11958By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
11959variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler
11960additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
11961SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
11962SPARCStation 1, 2, \s-1IPX\s0 etc.
11963.Sp
11964With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
11965architecture. The only difference from V7 code is that the compiler emits
11966the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
11967but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally
11968optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
119692000 series.
11970.Sp
11971With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
11972the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step
11973and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
11974With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
11975Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With
11976\&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
11977\&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
11978.Sp
11979With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
11980the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate,
11981integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
11982but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally
11983optimizes it for the \s-1TEMIC\s0 SPARClet chip.
11984.Sp
11985With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
11986architecture. This adds 64\-bit integer and floating-point move instructions,
119873 additional floating-point condition code registers and conditional move
11988instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally
11989optimizes it for the Sun UltraSPARC I/II/IIi chips. With
11990\&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
11991Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
11992\&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
11993Sun UltraSPARC T1 chips.
11994.IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
11995.IX Item "-mtune=cpu_type"
11996Set the instruction scheduling parameters for machine type
11997\&\fIcpu_type\fR, but do not set the instruction set or register set that the
11998option \fB\-mcpu=\fR\fIcpu_type\fR would.
11999.Sp
12000The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
12001\&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
12002that select a particular cpu implementation. Those are \fBcypress\fR,
12003\&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
12004\&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR,
12005\&\fBultrasparc3\fR, and \fBniagara\fR.
12006.IP "\fB\-mv8plus\fR" 4
12007.IX Item "-mv8plus"
12008.PD 0
12009.IP "\fB\-mno\-v8plus\fR" 4
12010.IX Item "-mno-v8plus"
12011.PD
12012With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0. The
12013difference from the V8 \s-1ABI\s0 is that the global and out registers are
12014considered 64\-bit wide. This is enabled by default on Solaris in 32\-bit
12015mode for all \s-1SPARC\-V9\s0 processors.
12016.IP "\fB\-mvis\fR" 4
12017.IX Item "-mvis"
12018.PD 0
12019.IP "\fB\-mno\-vis\fR" 4
12020.IX Item "-mno-vis"
12021.PD
12022With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
12023Visual Instruction Set extensions. The default is \fB\-mno\-vis\fR.
12024.PP
12025These \fB\-m\fR options are supported in addition to the above
12026on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
12027.IP "\fB\-mlittle\-endian\fR" 4
12028.IX Item "-mlittle-endian"
12029Generate code for a processor running in little-endian mode. It is only
12030available for a few configurations and most notably not on Solaris and Linux.
12031.IP "\fB\-m32\fR" 4
12032.IX Item "-m32"
12033.PD 0
12034.IP "\fB\-m64\fR" 4
12035.IX Item "-m64"
12036.PD
12037Generate code for a 32\-bit or 64\-bit environment.
12038The 32\-bit environment sets int, long and pointer to 32 bits.
12039The 64\-bit environment sets int to 32 bits and long and pointer
12040to 64 bits.
12041.IP "\fB\-mcmodel=medlow\fR" 4
12042.IX Item "-mcmodel=medlow"
12043Generate code for the Medium/Low code model: 64\-bit addresses, programs
12044must be linked in the low 32 bits of memory. Programs can be statically
12045or dynamically linked.
12046.IP "\fB\-mcmodel=medmid\fR" 4
12047.IX Item "-mcmodel=medmid"
12048Generate code for the Medium/Middle code model: 64\-bit addresses, programs
12049must be linked in the low 44 bits of memory, the text and data segments must
12050be less than 2GB in size and the data segment must be located within 2GB of
12051the text segment.
12052.IP "\fB\-mcmodel=medany\fR" 4
12053.IX Item "-mcmodel=medany"
12054Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
12055may be linked anywhere in memory, the text and data segments must be less
12056than 2GB in size and the data segment must be located within 2GB of the
12057text segment.
12058.IP "\fB\-mcmodel=embmedany\fR" 4
12059.IX Item "-mcmodel=embmedany"
12060Generate code for the Medium/Anywhere code model for embedded systems:
1206164\-bit addresses, the text and data segments must be less than 2GB in
12062size, both starting anywhere in memory (determined at link time). The
12063global register \f(CW%g4\fR points to the base of the data segment. Programs
12064are statically linked and \s-1PIC\s0 is not supported.
12065.IP "\fB\-mstack\-bias\fR" 4
12066.IX Item "-mstack-bias"
12067.PD 0
12068.IP "\fB\-mno\-stack\-bias\fR" 4
12069.IX Item "-mno-stack-bias"
12070.PD
12071With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
12072frame pointer if present, are offset by \-2047 which must be added back
12073when making stack frame references. This is the default in 64\-bit mode.
12074Otherwise, assume no such offset is present.
12075.PP
12076These switches are supported in addition to the above on Solaris:
12077.IP "\fB\-threads\fR" 4
12078.IX Item "-threads"
12079Add support for multithreading using the Solaris threads library. This
12080option sets flags for both the preprocessor and linker. This option does
12081not affect the thread safety of object code produced by the compiler or
12082that of libraries supplied with it.
12083.IP "\fB\-pthreads\fR" 4
12084.IX Item "-pthreads"
12085Add support for multithreading using the \s-1POSIX\s0 threads library. This
12086option sets flags for both the preprocessor and linker. This option does
12087not affect the thread safety of object code produced by the compiler or
12088that of libraries supplied with it.
12089.IP "\fB\-pthread\fR" 4
12090.IX Item "-pthread"
12091This is a synonym for \fB\-pthreads\fR.
12092.PP
12093\fIOptions for System V\fR
12094.IX Subsection "Options for System V"
12095.PP
12096These additional options are available on System V Release 4 for
12097compatibility with other compilers on those systems:
12098.IP "\fB\-G\fR" 4
12099.IX Item "-G"
12100Create a shared object.
12101It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
12102.IP "\fB\-Qy\fR" 4
12103.IX Item "-Qy"
12104Identify the versions of each tool used by the compiler, in a
12105\&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
12106.IP "\fB\-Qn\fR" 4
12107.IX Item "-Qn"
12108Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
12109the default).
12110.IP "\fB\-YP,\fR\fIdirs\fR" 4
12111.IX Item "-YP,dirs"
12112Search the directories \fIdirs\fR, and no others, for libraries
12113specified with \fB\-l\fR.
12114.IP "\fB\-Ym,\fR\fIdir\fR" 4
12115.IX Item "-Ym,dir"
12116Look in the directory \fIdir\fR to find the M4 preprocessor.
12117The assembler uses this option.
12118.PP
12119\fITMS320C3x/C4x Options\fR
12120.IX Subsection "TMS320C3x/C4x Options"
12121.PP
12122These \fB\-m\fR options are defined for TMS320C3x/C4x implementations:
12123.IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
12124.IX Item "-mcpu=cpu_type"
12125Set the instruction set, register set, and instruction scheduling
12126parameters for machine type \fIcpu_type\fR. Supported values for
12127\&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and
12128\&\fBc44\fR. The default is \fBc40\fR to generate code for the
12129\&\s-1TMS320C40\s0.
12130.IP "\fB\-mbig\-memory\fR" 4
12131.IX Item "-mbig-memory"
12132.PD 0
12133.IP "\fB\-mbig\fR" 4
12134.IX Item "-mbig"
12135.IP "\fB\-msmall\-memory\fR" 4
12136.IX Item "-msmall-memory"
12137.IP "\fB\-msmall\fR" 4
12138.IX Item "-msmall"
12139.PD
12140Generates code for the big or small memory model. The small memory
12141model assumed that all data fits into one 64K word page. At run-time
12142the data page (\s-1DP\s0) register must be set to point to the 64K page
12143containing the .bss and .data program sections. The big memory model is
12144the default and requires reloading of the \s-1DP\s0 register for every direct
12145memory access.
12146.IP "\fB\-mbk\fR" 4
12147.IX Item "-mbk"
12148.PD 0
12149.IP "\fB\-mno\-bk\fR" 4
12150.IX Item "-mno-bk"
12151.PD
12152Allow (disallow) allocation of general integer operands into the block
12153count register \s-1BK\s0.
12154.IP "\fB\-mdb\fR" 4
12155.IX Item "-mdb"
12156.PD 0
12157.IP "\fB\-mno\-db\fR" 4
12158.IX Item "-mno-db"
12159.PD
12160Enable (disable) generation of code using decrement and branch,
12161DBcond(D), instructions. This is enabled by default for the C4x. To be
12162on the safe side, this is disabled for the C3x, since the maximum
12163iteration count on the C3x is 2^{23 + 1} (but who iterates loops more than
121642^{23} times on the C3x?). Note that \s-1GCC\s0 will try to reverse a loop so
12165that it can utilize the decrement and branch instruction, but will give
12166up if there is more than one memory reference in the loop. Thus a loop
12167where the loop counter is decremented can generate slightly more
12168efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilized.
12169.IP "\fB\-mdp\-isr\-reload\fR" 4
12170.IX Item "-mdp-isr-reload"
12171.PD 0
12172.IP "\fB\-mparanoid\fR" 4
12173.IX Item "-mparanoid"
12174.PD
12175Force the \s-1DP\s0 register to be saved on entry to an interrupt service
12176routine (\s-1ISR\s0), reloaded to point to the data section, and restored on
12177exit from the \s-1ISR\s0. This should not be required unless someone has
12178violated the small memory model by modifying the \s-1DP\s0 register, say within
12179an object library.
12180.IP "\fB\-mmpyi\fR" 4
12181.IX Item "-mmpyi"
12182.PD 0
12183.IP "\fB\-mno\-mpyi\fR" 4
12184.IX Item "-mno-mpyi"
12185.PD
12186For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies
12187instead of a library call to guarantee 32\-bit results. Note that if one
12188of the operands is a constant, then the multiplication will be performed
12189using shifts and adds. If the \fB\-mmpyi\fR option is not specified for the C3x,
12190then squaring operations are performed inline instead of a library call.
12191.IP "\fB\-mfast\-fix\fR" 4
12192.IX Item "-mfast-fix"
12193.PD 0
12194.IP "\fB\-mno\-fast\-fix\fR" 4
12195.IX Item "-mno-fast-fix"
12196.PD
12197The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an
12198integer value chooses the nearest integer less than or equal to the
12199floating point value rather than to the nearest integer. Thus if the
12200floating point number is negative, the result will be incorrectly
12201truncated an additional code is necessary to detect and correct this
12202case. This option can be used to disable generation of the additional
12203code required to correct the result.
12204.IP "\fB\-mrptb\fR" 4
12205.IX Item "-mrptb"
12206.PD 0
12207.IP "\fB\-mno\-rptb\fR" 4
12208.IX Item "-mno-rptb"
12209.PD
12210Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0
12211instruction for zero overhead looping. The \s-1RPTB\s0 construct is only used
12212for innermost loops that do not call functions or jump across the loop
12213boundaries. There is no advantage having nested \s-1RPTB\s0 loops due to the
12214overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers.
12215This is enabled by default with \fB\-O2\fR.
12216.IP "\fB\-mrpts=\fR\fIcount\fR" 4
12217.IX Item "-mrpts=count"
12218.PD 0
12219.IP "\fB\-mno\-rpts\fR" 4
12220.IX Item "-mno-rpts"
12221.PD
12222Enable (disable) the use of the single instruction repeat instruction
12223\&\s-1RPTS\s0. If a repeat block contains a single instruction, and the loop
12224count can be guaranteed to be less than the value \fIcount\fR, \s-1GCC\s0 will
12225emit a \s-1RPTS\s0 instruction instead of a \s-1RPTB\s0. If no value is specified,
12226then a \s-1RPTS\s0 will be emitted even if the loop count cannot be determined
12227at compile time. Note that the repeated instruction following \s-1RPTS\s0 does
12228not have to be reloaded from memory each iteration, thus freeing up the
12229\&\s-1CPU\s0 buses for operands. However, since interrupts are blocked by this
12230instruction, it is disabled by default.
12231.IP "\fB\-mloop\-unsigned\fR" 4
12232.IX Item "-mloop-unsigned"
12233.PD 0
12234.IP "\fB\-mno\-loop\-unsigned\fR" 4
12235.IX Item "-mno-loop-unsigned"
12236.PD
12237The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40)
12238is 2^{31 + 1} since these instructions test if the iteration count is
12239negative to terminate the loop. If the iteration count is unsigned
12240there is a possibility than the 2^{31 + 1} maximum iteration count may be
12241exceeded. This switch allows an unsigned iteration count.
12242.IP "\fB\-mti\fR" 4
12243.IX Item "-mti"
12244Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy
12245with. This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0
12246C3x C compiler. For example, long doubles are passed as structures
12247rather than in floating point registers.
12248.IP "\fB\-mregparm\fR" 4
12249.IX Item "-mregparm"
12250.PD 0
12251.IP "\fB\-mmemparm\fR" 4
12252.IX Item "-mmemparm"
12253.PD
12254Generate code that uses registers (stack) for passing arguments to functions.
12255By default, arguments are passed in registers where possible rather
12256than by pushing arguments on to the stack.
12257.IP "\fB\-mparallel\-insns\fR" 4
12258.IX Item "-mparallel-insns"
12259.PD 0
12260.IP "\fB\-mno\-parallel\-insns\fR" 4
12261.IX Item "-mno-parallel-insns"
12262.PD
12263Allow the generation of parallel instructions. This is enabled by
12264default with \fB\-O2\fR.
12265.IP "\fB\-mparallel\-mpy\fR" 4
12266.IX Item "-mparallel-mpy"
12267.PD 0
12268.IP "\fB\-mno\-parallel\-mpy\fR" 4
12269.IX Item "-mno-parallel-mpy"
12270.PD
12271Allow the generation of MPY||ADD and MPY||SUB parallel instructions,
12272provided \fB\-mparallel\-insns\fR is also specified. These instructions have
12273tight register constraints which can pessimize the code generation
12274of large functions.
12275.PP
12276\fIV850 Options\fR
12277.IX Subsection "V850 Options"
12278.PP
12279These \fB\-m\fR options are defined for V850 implementations:
12280.IP "\fB\-mlong\-calls\fR" 4
12281.IX Item "-mlong-calls"
12282.PD 0
12283.IP "\fB\-mno\-long\-calls\fR" 4
12284.IX Item "-mno-long-calls"
12285.PD
12286Treat all calls as being far away (near). If calls are assumed to be
12287far away, the compiler will always load the functions address up into a
12288register, and call indirect through the pointer.
12289.IP "\fB\-mno\-ep\fR" 4
12290.IX Item "-mno-ep"
12291.PD 0
12292.IP "\fB\-mep\fR" 4
12293.IX Item "-mep"
12294.PD
12295Do not optimize (do optimize) basic blocks that use the same index
12296pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
12297use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR
12298option is on by default if you optimize.
12299.IP "\fB\-mno\-prolog\-function\fR" 4
12300.IX Item "-mno-prolog-function"
12301.PD 0
12302.IP "\fB\-mprolog\-function\fR" 4
12303.IX Item "-mprolog-function"
12304.PD
12305Do not use (do use) external functions to save and restore registers
12306at the prologue and epilogue of a function. The external functions
12307are slower, but use less code space if more than one function saves
12308the same number of registers. The \fB\-mprolog\-function\fR option
12309is on by default if you optimize.
12310.IP "\fB\-mspace\fR" 4
12311.IX Item "-mspace"
12312Try to make the code as small as possible. At present, this just turns
12313on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
12314.IP "\fB\-mtda=\fR\fIn\fR" 4
12315.IX Item "-mtda=n"
12316Put static or global variables whose size is \fIn\fR bytes or less into
12317the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data
12318area can hold up to 256 bytes in total (128 bytes for byte references).
12319.IP "\fB\-msda=\fR\fIn\fR" 4
12320.IX Item "-msda=n"
12321Put static or global variables whose size is \fIn\fR bytes or less into
12322the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data
12323area can hold up to 64 kilobytes.
12324.IP "\fB\-mzda=\fR\fIn\fR" 4
12325.IX Item "-mzda=n"
12326Put static or global variables whose size is \fIn\fR bytes or less into
12327the first 32 kilobytes of memory.
12328.IP "\fB\-mv850\fR" 4
12329.IX Item "-mv850"
12330Specify that the target processor is the V850.
12331.IP "\fB\-mbig\-switch\fR" 4
12332.IX Item "-mbig-switch"
12333Generate code suitable for big switch tables. Use this option only if
12334the assembler/linker complain about out of range branches within a switch
12335table.
12336.IP "\fB\-mapp\-regs\fR" 4
12337.IX Item "-mapp-regs"
12338This option will cause r2 and r5 to be used in the code generated by
12339the compiler. This setting is the default.
12340.IP "\fB\-mno\-app\-regs\fR" 4
12341.IX Item "-mno-app-regs"
12342This option will cause r2 and r5 to be treated as fixed registers.
12343.IP "\fB\-mv850e1\fR" 4
12344.IX Item "-mv850e1"
12345Specify that the target processor is the V850E1. The preprocessor
12346constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
12347this option is used.
12348.IP "\fB\-mv850e\fR" 4
12349.IX Item "-mv850e"
12350Specify that the target processor is the V850E. The preprocessor
12351constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
12352.Sp
12353If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
12354are defined then a default target processor will be chosen and the
12355relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
12356.Sp
12357The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
12358defined, regardless of which processor variant is the target.
12359.IP "\fB\-mdisable\-callt\fR" 4
12360.IX Item "-mdisable-callt"
12361This option will suppress generation of the \s-1CALLT\s0 instruction for the
12362v850e and v850e1 flavors of the v850 architecture. The default is
12363\&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
12364.PP
12365\fI\s-1VAX\s0 Options\fR
12366.IX Subsection "VAX Options"
12367.PP
12368These \fB\-m\fR options are defined for the \s-1VAX:\s0
12369.IP "\fB\-munix\fR" 4
12370.IX Item "-munix"
12371Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
12372that the Unix assembler for the \s-1VAX\s0 cannot handle across long
12373ranges.
12374.IP "\fB\-mgnu\fR" 4
12375.IX Item "-mgnu"
12376Do output those jump instructions, on the assumption that you
12377will assemble with the \s-1GNU\s0 assembler.
12378.IP "\fB\-mg\fR" 4
12379.IX Item "-mg"
12380Output code for g\-format floating point numbers instead of d\-format.
12381.PP
12382\fIx86\-64 Options\fR
12383.IX Subsection "x86-64 Options"
12384.PP
12385These are listed under
12386.PP
12387\fIXstormy16 Options\fR
12388.IX Subsection "Xstormy16 Options"
12389.PP
12390These options are defined for Xstormy16:
12391.IP "\fB\-msim\fR" 4
12392.IX Item "-msim"
12393Choose startup files and linker script suitable for the simulator.
12394.PP
12395\fIXtensa Options\fR
12396.IX Subsection "Xtensa Options"
12397.PP
12398These options are supported for Xtensa targets:
12399.IP "\fB\-mconst16\fR" 4
12400.IX Item "-mconst16"
12401.PD 0
12402.IP "\fB\-mno\-const16\fR" 4
12403.IX Item "-mno-const16"
12404.PD
12405Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
12406constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
12407standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR
12408instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
12409instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
12410the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
12411.IP "\fB\-mfused\-madd\fR" 4
12412.IX Item "-mfused-madd"
12413.PD 0
12414.IP "\fB\-mno\-fused\-madd\fR" 4
12415.IX Item "-mno-fused-madd"
12416.PD
12417Enable or disable use of fused multiply/add and multiply/subtract
12418instructions in the floating-point option. This has no effect if the
12419floating-point option is not also enabled. Disabling fused multiply/add
12420and multiply/subtract instructions forces the compiler to use separate
12421instructions for the multiply and add/subtract operations. This may be
12422desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
12423required: the fused multiply add/subtract instructions do not round the
12424intermediate result, thereby producing results with \fImore\fR bits of
12425precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply
12426add/subtract instructions also ensures that the program output is not
12427sensitive to the compiler's ability to combine multiply and add/subtract
12428operations.
12429.IP "\fB\-mtext\-section\-literals\fR" 4
12430.IX Item "-mtext-section-literals"
12431.PD 0
12432.IP "\fB\-mno\-text\-section\-literals\fR" 4
12433.IX Item "-mno-text-section-literals"
12434.PD
12435Control the treatment of literal pools. The default is
12436\&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
12437section in the output file. This allows the literal pool to be placed
12438in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
12439pools from separate object files to remove redundant literals and
12440improve code size. With \fB\-mtext\-section\-literals\fR, the literals
12441are interspersed in the text section in order to keep them as close as
12442possible to their references. This may be necessary for large assembly
12443files.
12444.IP "\fB\-mtarget\-align\fR" 4
12445.IX Item "-mtarget-align"
12446.PD 0
12447.IP "\fB\-mno\-target\-align\fR" 4
12448.IX Item "-mno-target-align"
12449.PD
12450When this option is enabled, \s-1GCC\s0 instructs the assembler to
12451automatically align instructions to reduce branch penalties at the
12452expense of some code density. The assembler attempts to widen density
12453instructions to align branch targets and the instructions following call
12454instructions. If there are not enough preceding safe density
12455instructions to align a target, no widening will be performed. The
12456default is \fB\-mtarget\-align\fR. These options do not affect the
12457treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
12458assembler will always align, either by widening density instructions or
12459by inserting no-op instructions.
12460.IP "\fB\-mlongcalls\fR" 4
12461.IX Item "-mlongcalls"
12462.PD 0
12463.IP "\fB\-mno\-longcalls\fR" 4
12464.IX Item "-mno-longcalls"
12465.PD
12466When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
12467direct calls to indirect calls unless it can determine that the target
12468of a direct call is in the range allowed by the call instruction. This
12469translation typically occurs for calls to functions in other source
12470files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
12471instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
12472The default is \fB\-mno\-longcalls\fR. This option should be used in
12473programs where the call target can potentially be out of range. This
12474option is implemented in the assembler, not the compiler, so the
12475assembly code generated by \s-1GCC\s0 will still show direct call
12476instructions\-\-\-look at the disassembled object code to see the actual
12477instructions. Note that the assembler will use an indirect call for
12478every cross-file call, not just those that really will be out of range.
12479.PP
12480\fIzSeries Options\fR
12481.IX Subsection "zSeries Options"
12482.PP
12483These are listed under
12484.Sh "Options for Code Generation Conventions"
12485.IX Subsection "Options for Code Generation Conventions"
12486These machine-independent options control the interface conventions
12487used in code generation.
12488.PP
12489Most of them have both positive and negative forms; the negative form
12490of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table below, only
12491one of the forms is listed\-\-\-the one which is not the default. You
12492can figure out the other form by either removing \fBno\-\fR or adding
12493it.
12494.IP "\fB\-fbounds\-check\fR" 4
12495.IX Item "-fbounds-check"
12496For front-ends that support it, generate additional code to check that
12497indices used to access arrays are within the declared range. This is
12498currently only supported by the Java and Fortran front\-ends, where
12499this option defaults to true and false respectively.
12500.IP "\fB\-ftrapv\fR" 4
12501.IX Item "-ftrapv"
12502This option generates traps for signed overflow on addition, subtraction,
12503multiplication operations.
12504.IP "\fB\-fwrapv\fR" 4
12505.IX Item "-fwrapv"
12506This option instructs the compiler to assume that signed arithmetic
12507overflow of addition, subtraction and multiplication wraps around
12508using twos-complement representation. This flag enables some optimizations
12509and disables others. This option is enabled by default for the Java
12510front\-end, as required by the Java language specification.
12511.IP "\fB\-fexceptions\fR" 4
12512.IX Item "-fexceptions"
12513Enable exception handling. Generates extra code needed to propagate
12514exceptions. For some targets, this implies \s-1GCC\s0 will generate frame
12515unwind information for all functions, which can produce significant data
12516size overhead, although it does not affect execution. If you do not
12517specify this option, \s-1GCC\s0 will enable it by default for languages like
12518\&\*(C+ which normally require exception handling, and disable it for
12519languages like C that do not normally require it. However, you may need
12520to enable this option when compiling C code that needs to interoperate
12521properly with exception handlers written in \*(C+. You may also wish to
12522disable this option if you are compiling older \*(C+ programs that don't
12523use exception handling.
12524.IP "\fB\-fnon\-call\-exceptions\fR" 4
12525.IX Item "-fnon-call-exceptions"
12526Generate code that allows trapping instructions to throw exceptions.
12527Note that this requires platform-specific runtime support that does
12528not exist everywhere. Moreover, it only allows \fItrapping\fR
12529instructions to throw exceptions, i.e. memory references or floating
12530point instructions. It does not allow exceptions to be thrown from
12531arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
12532.IP "\fB\-funwind\-tables\fR" 4
12533.IX Item "-funwind-tables"
12534Similar to \fB\-fexceptions\fR, except that it will just generate any needed
12535static data, but will not affect the generated code in any other way.
12536You will normally not enable this option; instead, a language processor
12537that needs this handling would enable it on your behalf.
12538.IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
12539.IX Item "-fasynchronous-unwind-tables"
12540Generate unwind table in dwarf2 format, if supported by target machine. The
12541table is exact at each instruction boundary, so it can be used for stack
12542unwinding from asynchronous events (such as debugger or garbage collector).
12543.IP "\fB\-fpcc\-struct\-return\fR" 4
12544.IX Item "-fpcc-struct-return"
12545Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
12546longer ones, rather than in registers. This convention is less
12547efficient, but it has the advantage of allowing intercallability between
12548GCC-compiled files and files compiled with other compilers, particularly
12549the Portable C Compiler (pcc).
12550.Sp
12551The precise convention for returning structures in memory depends
12552on the target configuration macros.
12553.Sp
12554Short structures and unions are those whose size and alignment match
12555that of some integer type.
12556.Sp
12557\&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
12558switch is not binary compatible with code compiled with the
12559\&\fB\-freg\-struct\-return\fR switch.
12560Use it to conform to a non-default application binary interface.
12561.IP "\fB\-freg\-struct\-return\fR" 4
12562.IX Item "-freg-struct-return"
12563Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
12564This is more efficient for small structures than
12565\&\fB\-fpcc\-struct\-return\fR.
12566.Sp
12567If you specify neither \fB\-fpcc\-struct\-return\fR nor
12568\&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
12569standard for the target. If there is no standard convention, \s-1GCC\s0
12570defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
12571the principal compiler. In those cases, we can choose the standard, and
12572we chose the more efficient register return alternative.
12573.Sp
12574\&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
12575switch is not binary compatible with code compiled with the
12576\&\fB\-fpcc\-struct\-return\fR switch.
12577Use it to conform to a non-default application binary interface.
12578.IP "\fB\-fshort\-enums\fR" 4
12579.IX Item "-fshort-enums"
12580Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
12581declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type
12582will be equivalent to the smallest integer type which has enough room.
12583.Sp
12584\&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
12585code that is not binary compatible with code generated without that switch.
12586Use it to conform to a non-default application binary interface.
12587.IP "\fB\-fshort\-double\fR" 4
12588.IX Item "-fshort-double"
12589Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
12590.Sp
12591\&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
12592code that is not binary compatible with code generated without that switch.
12593Use it to conform to a non-default application binary interface.
12594.IP "\fB\-fshort\-wchar\fR" 4
12595.IX Item "-fshort-wchar"
12596Override the underlying type for \fBwchar_t\fR to be \fBshort
12597unsigned int\fR instead of the default for the target. This option is
12598useful for building programs to run under \s-1WINE\s0.
12599.Sp
12600\&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
12601code that is not binary compatible with code generated without that switch.
12602Use it to conform to a non-default application binary interface.
12603.IP "\fB\-fno\-common\fR" 4
12604.IX Item "-fno-common"
12605In C, allocate even uninitialized global variables in the data section of the
12606object file, rather than generating them as common blocks. This has the
12607effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in
12608two different compilations, you will get an error when you link them.
12609The only reason this might be useful is if you wish to verify that the
12610program will work on other systems which always work this way.
12611.IP "\fB\-fno\-ident\fR" 4
12612.IX Item "-fno-ident"
12613Ignore the \fB#ident\fR directive.
12614.IP "\fB\-finhibit\-size\-directive\fR" 4
12615.IX Item "-finhibit-size-directive"
12616Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
12617would cause trouble if the function is split in the middle, and the
12618two halves are placed at locations far apart in memory. This option is
12619used when compiling \fIcrtstuff.c\fR; you should not need to use it
12620for anything else.
12621.IP "\fB\-fverbose\-asm\fR" 4
12622.IX Item "-fverbose-asm"
12623Put extra commentary information in the generated assembly code to
12624make it more readable. This option is generally only of use to those
12625who actually need to read the generated assembly code (perhaps while
12626debugging the compiler itself).
12627.Sp
12628\&\fB\-fno\-verbose\-asm\fR, the default, causes the
12629extra information to be omitted and is useful when comparing two assembler
12630files.
12631.IP "\fB\-fpic\fR" 4
12632.IX Item "-fpic"
12633Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
12634library, if supported for the target machine. Such code accesses all
12635constant addresses through a global offset table (\s-1GOT\s0). The dynamic
12636loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
12637loader is not part of \s-1GCC\s0; it is part of the operating system). If
12638the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
12639maximum size, you get an error message from the linker indicating that
12640\&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
12641instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k
12642on the m68k and \s-1RS/6000\s0. The 386 has no such limit.)
12643.Sp
12644Position-independent code requires special support, and therefore works
12645only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
12646but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
12647position\-independent.
12648.Sp
12649When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
12650are defined to 1.
12651.IP "\fB\-fPIC\fR" 4
12652.IX Item "-fPIC"
12653If supported for the target machine, emit position-independent code,
12654suitable for dynamic linking and avoiding any limit on the size of the
12655global offset table. This option makes a difference on the m68k,
12656PowerPC and \s-1SPARC\s0.
12657.Sp
12658Position-independent code requires special support, and therefore works
12659only on certain machines.
12660.Sp
12661When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
12662are defined to 2.
12663.IP "\fB\-fpie\fR" 4
12664.IX Item "-fpie"
12665.PD 0
12666.IP "\fB\-fPIE\fR" 4
12667.IX Item "-fPIE"
12668.PD
12669These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
12670generated position independent code can be only linked into executables.
12671Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
12672used during linking.
12673.IP "\fB\-fno\-jump\-tables\fR" 4
12674.IX Item "-fno-jump-tables"
12675Do not use jump tables for switch statements even where it would be
12676more efficient than other code generation strategies. This option is
12677of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
12678building code which forms part of a dynamic linker and cannot
12679reference the address of a jump table. On some targets, jump tables
12680do not require a \s-1GOT\s0 and this option is not needed.
12681.IP "\fB\-ffixed\-\fR\fIreg\fR" 4
12682.IX Item "-ffixed-reg"
12683Treat the register named \fIreg\fR as a fixed register; generated code
12684should never refer to it (except perhaps as a stack pointer, frame
12685pointer or in some other fixed role).
12686.Sp
12687\&\fIreg\fR must be the name of a register. The register names accepted
12688are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
12689macro in the machine description macro file.
12690.Sp
12691This flag does not have a negative form, because it specifies a
12692three-way choice.
12693.IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
12694.IX Item "-fcall-used-reg"
12695Treat the register named \fIreg\fR as an allocable register that is
12696clobbered by function calls. It may be allocated for temporaries or
12697variables that do not live across a call. Functions compiled this way
12698will not save and restore the register \fIreg\fR.
12699.Sp
12700It is an error to used this flag with the frame pointer or stack pointer.
12701Use of this flag for other registers that have fixed pervasive roles in
12702the machine's execution model will produce disastrous results.
12703.Sp
12704This flag does not have a negative form, because it specifies a
12705three-way choice.
12706.IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
12707.IX Item "-fcall-saved-reg"
12708Treat the register named \fIreg\fR as an allocable register saved by
12709functions. It may be allocated even for temporaries or variables that
12710live across a call. Functions compiled this way will save and restore
12711the register \fIreg\fR if they use it.
12712.Sp
12713It is an error to used this flag with the frame pointer or stack pointer.
12714Use of this flag for other registers that have fixed pervasive roles in
12715the machine's execution model will produce disastrous results.
12716.Sp
12717A different sort of disaster will result from the use of this flag for
12718a register in which function values may be returned.
12719.Sp
12720This flag does not have a negative form, because it specifies a
12721three-way choice.
12722.IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
12723.IX Item "-fpack-struct[=n]"
12724Without a value specified, pack all structure members together without
12725holes. When a value is specified (which must be a small power of two), pack
12726structure members according to this value, representing the maximum
12727alignment (that is, objects with default alignment requirements larger than
12728this will be output potentially unaligned at the next fitting location.
12729.Sp
12730\&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
12731code that is not binary compatible with code generated without that switch.
12732Additionally, it makes the code suboptimal.
12733Use it to conform to a non-default application binary interface.
12734.IP "\fB\-finstrument\-functions\fR" 4
12735.IX Item "-finstrument-functions"
12736Generate instrumentation calls for entry and exit to functions. Just
12737after function entry and just before function exit, the following
12738profiling functions will be called with the address of the current
12739function and its call site. (On some platforms,
12740\&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
12741function, so the call site information may not be available to the
12742profiling functions otherwise.)
12743.Sp
12744.Vb 4
12745\& void __cyg_profile_func_enter (void *this_fn,
12746\& void *call_site);
12747\& void __cyg_profile_func_exit (void *this_fn,
12748\& void *call_site);
12749.Ve
12750.Sp
12751The first argument is the address of the start of the current function,
12752which may be looked up exactly in the symbol table.
12753.Sp
12754This instrumentation is also done for functions expanded inline in other
12755functions. The profiling calls will indicate where, conceptually, the
12756inline function is entered and exited. This means that addressable
12757versions of such functions must be available. If all your uses of a
12758function are expanded inline, this may mean an additional expansion of
12759code size. If you use \fBextern inline\fR in your C code, an
12760addressable version of such functions must be provided. (This is
12761normally the case anyways, but if you get lucky and the optimizer always
12762expands the functions inline, you might have gotten away without
12763providing static copies.)
12764.Sp
12765A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
12766which case this instrumentation will not be done. This can be used, for
12767example, for the profiling functions listed above, high-priority
12768interrupt routines, and any functions from which the profiling functions
12769cannot safely be called (perhaps signal handlers, if the profiling
12770routines generate output or allocate memory).
12771.IP "\fB\-fstack\-check\fR" 4
12772.IX Item "-fstack-check"
12773Generate code to verify that you do not go beyond the boundary of the
12774stack. You should specify this flag if you are running in an
12775environment with multiple threads, but only rarely need to specify it in
12776a single-threaded environment since stack overflow is automatically
12777detected on nearly all systems if there is only one stack.
12778.Sp
12779Note that this switch does not actually cause checking to be done; the
12780operating system must do that. The switch causes generation of code
12781to ensure that the operating system sees the stack being extended.
12782.IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
12783.IX Item "-fstack-limit-register=reg"
12784.PD 0
12785.IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
12786.IX Item "-fstack-limit-symbol=sym"
12787.IP "\fB\-fno\-stack\-limit\fR" 4
12788.IX Item "-fno-stack-limit"
12789.PD
12790Generate code to ensure that the stack does not grow beyond a certain value,
12791either the value of a register or the address of a symbol. If the stack
12792would grow beyond the value, a signal is raised. For most targets,
12793the signal is raised before the stack overruns the boundary, so
12794it is possible to catch the signal without taking special precautions.
12795.Sp
12796For instance, if the stack starts at absolute address \fB0x80000000\fR
12797and grows downwards, you can use the flags
12798\&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
12799\&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
12800of 128KB. Note that this may only work with the \s-1GNU\s0 linker.
12801.IP "\fB\-fargument\-alias\fR" 4
12802.IX Item "-fargument-alias"
12803.PD 0
12804.IP "\fB\-fargument\-noalias\fR" 4
12805.IX Item "-fargument-noalias"
12806.IP "\fB\-fargument\-noalias\-global\fR" 4
12807.IX Item "-fargument-noalias-global"
12808.IP "\fB\-fargument\-noalias\-anything\fR" 4
12809.IX Item "-fargument-noalias-anything"
12810.PD
12811Specify the possible relationships among parameters and between
12812parameters and global data.
12813.Sp
12814\&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
12815alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
12816each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
12817alias each other and do not alias global storage.
12818\&\fB\-fargument\-noalias\-anything\fR specifies that arguments do not
12819alias any other storage.
12820.Sp
12821Each language will automatically use whatever option is required by
12822the language standard. You should not need to use these options yourself.
12823.IP "\fB\-fleading\-underscore\fR" 4
12824.IX Item "-fleading-underscore"
12825This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
12826change the way C symbols are represented in the object file. One use
12827is to help link with legacy assembly code.
12828.Sp
12829\&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
12830generate code that is not binary compatible with code generated without that
12831switch. Use it to conform to a non-default application binary interface.
12832Not all targets provide complete support for this switch.
12833.IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
12834.IX Item "-ftls-model=model"
12835Alter the thread-local storage model to be used.
12836The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
12837\&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
12838.Sp
12839The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
12840\&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
12841.IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
12842.IX Item "-fvisibility=default|internal|hidden|protected"
12843Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
12844symbols will be marked with this unless overridden within the code.
12845Using this feature can very substantially improve linking and
12846load times of shared object libraries, produce more optimized
12847code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
12848It is \fBstrongly\fR recommended that you use this in any shared objects
12849you distribute.
12850.Sp
12851Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public ie;
12852available to be linked against from outside the shared object.
12853\&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
12854usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
12855The default if \fB\-fvisibility\fR isn't specified is
12856\&\f(CW\*(C`default\*(C'\fR, i.e., make every
12857symbol public\-\-\-this causes the same behavior as previous versions of
12858\&\s-1GCC\s0.
12859.Sp
12860A good explanation of the benefits offered by ensuring \s-1ELF\s0
12861symbols have the correct visibility is given by \*(L"How To Write
12862Shared Libraries\*(R" by Ulrich Drepper (which can be found at
12863<\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
12864solution made possible by this option to marking things hidden when
12865the default is public is to make the default hidden and mark things
12866public. This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
12867and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
12868\&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
12869identical syntax. This is a great boon to those working with
12870cross-platform projects.
12871.Sp
12872For those adding visibility support to existing code, you may find
12873\&\fB#pragma \s-1GCC\s0 visibility\fR of use. This works by you enclosing
12874the declarations you wish to set visibility for with (for example)
12875\&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
12876\&\fB#pragma \s-1GCC\s0 visibility pop\fR.
12877Bear in mind that symbol visibility should be viewed \fBas
12878part of the \s-1API\s0 interface contract\fR and thus all new code should
12879always specify visibility when it is not the default ie; declarations
12880only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
12881as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
12882abundantly clear also aids readability and self-documentation of the code.
12883Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
12884operator delete must always be of default visibility.
12885.Sp
12886Be aware that headers from outside your project, in particular system
12887headers and headers from any other library you use, may not be
12888expecting to be compiled with visibility other than the default. You
12889may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
12890before including any such headers.
12891.Sp
12892\&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
12893a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
12894no modifications. However, this means that calls to \fBextern\fR
12895functions with no explicit visibility will use the \s-1PLT\s0, so it is more
12896effective to use \fB_\|_attribute ((visibility))\fR and/or
12897\&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
12898declarations should be treated as hidden.
12899.Sp
12900Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
12901entities. This means that, for instance, an exception class that will
12902be thrown between DSOs must be explicitly marked with default
12903visibility so that the \fBtype_info\fR nodes will be unified between
12904the DSOs.
12905.Sp
12906An overview of these techniques, their benefits and how to use them
12907is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
12908.SH "ENVIRONMENT"
12909.IX Header "ENVIRONMENT"
12910This section describes several environment variables that affect how \s-1GCC\s0
12911operates. Some of them work by specifying directories or prefixes to use
12912when searching for various kinds of files. Some are used to specify other
12913aspects of the compilation environment.
12914.PP
12915Note that you can also specify places to search using options such as
12916\&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These
12917take precedence over places specified using environment variables, which
12918in turn take precedence over those specified by the configuration of \s-1GCC\s0.
12919.IP "\fB\s-1LANG\s0\fR" 4
12920.IX Item "LANG"
12921.PD 0
12922.IP "\fB\s-1LC_CTYPE\s0\fR" 4
12923.IX Item "LC_CTYPE"
12924.IP "\fB\s-1LC_MESSAGES\s0\fR" 4
12925.IX Item "LC_MESSAGES"
12926.IP "\fB\s-1LC_ALL\s0\fR" 4
12927.IX Item "LC_ALL"
12928.PD
12929These environment variables control the way that \s-1GCC\s0 uses
12930localization information that allow \s-1GCC\s0 to work with different
12931national conventions. \s-1GCC\s0 inspects the locale categories
12932\&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
12933so. These locale categories can be set to any value supported by your
12934installation. A typical value is \fBen_GB.UTF\-8\fR for English in the United
12935Kingdom encoded in \s-1UTF\-8\s0.
12936.Sp
12937The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
12938classification. \s-1GCC\s0 uses it to determine the character boundaries in
12939a string; this is needed for some multibyte encodings that contain quote
12940and escape characters that would otherwise be interpreted as a string
12941end or escape.
12942.Sp
12943The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
12944use in diagnostic messages.
12945.Sp
12946If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
12947of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
12948and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
12949environment variable. If none of these variables are set, \s-1GCC\s0
12950defaults to traditional C English behavior.
12951.IP "\fB\s-1TMPDIR\s0\fR" 4
12952.IX Item "TMPDIR"
12953If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
12954files. \s-1GCC\s0 uses temporary files to hold the output of one stage of
12955compilation which is to be used as input to the next stage: for example,
12956the output of the preprocessor, which is the input to the compiler
12957proper.
12958.IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
12959.IX Item "GCC_EXEC_PREFIX"
12960If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
12961names of the subprograms executed by the compiler. No slash is added
12962when this prefix is combined with the name of a subprogram, but you can
12963specify a prefix that ends with a slash if you wish.
12964.Sp
12965If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
12966an appropriate prefix to use based on the pathname it was invoked with.
12967.Sp
12968If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
12969tries looking in the usual places for the subprogram.
12970.Sp
12971The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
12972\&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the value
12973of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
12974.Sp
12975Other prefixes specified with \fB\-B\fR take precedence over this prefix.
12976.Sp
12977This prefix is also used for finding files such as \fIcrt0.o\fR that are
12978used for linking.
12979.Sp
12980In addition, the prefix is used in an unusual way in finding the
12981directories to search for header files. For each of the standard
12982directories whose name normally begins with \fB/usr/local/lib/gcc\fR
12983(more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
12984replacing that beginning with the specified prefix to produce an
12985alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
12986\&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
12987These alternate directories are searched first; the standard directories
12988come next.
12989.IP "\fB\s-1COMPILER_PATH\s0\fR" 4
12990.IX Item "COMPILER_PATH"
12991The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
12992directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus
12993specified when searching for subprograms, if it can't find the
12994subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
12995.IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
12996.IX Item "LIBRARY_PATH"
12997The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
12998directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler,
12999\&\s-1GCC\s0 tries the directories thus specified when searching for special
13000linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking
13001using \s-1GCC\s0 also uses these directories when searching for ordinary
13002libraries for the \fB\-l\fR option (but directories specified with
13003\&\fB\-L\fR come first).
13004.IP "\fB\s-1LANG\s0\fR" 4
13005.IX Item "LANG"
13006This variable is used to pass locale information to the compiler. One way in
13007which this information is used is to determine the character set to be used
13008when character literals, string literals and comments are parsed in C and \*(C+.
13009When the compiler is configured to allow multibyte characters,
13010the following values for \fB\s-1LANG\s0\fR are recognized:
13011.RS 4
13012.IP "\fBC\-JIS\fR" 4
13013.IX Item "C-JIS"
13014Recognize \s-1JIS\s0 characters.
13015.IP "\fBC\-SJIS\fR" 4
13016.IX Item "C-SJIS"
13017Recognize \s-1SJIS\s0 characters.
13018.IP "\fBC\-EUCJP\fR" 4
13019.IX Item "C-EUCJP"
13020Recognize \s-1EUCJP\s0 characters.
13021.RE
13022.RS 4
13023.Sp
13024If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
13025compiler will use mblen and mbtowc as defined by the default locale to
13026recognize and translate multibyte characters.
13027.RE
13028.PP
13029Some additional environments variables affect the behavior of the
13030preprocessor.
13031.IP "\fB\s-1CPATH\s0\fR" 4
13032.IX Item "CPATH"
13033.PD 0
13034.IP "\fBC_INCLUDE_PATH\fR" 4
13035.IX Item "C_INCLUDE_PATH"
13036.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
13037.IX Item "CPLUS_INCLUDE_PATH"
13038.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
13039.IX Item "OBJC_INCLUDE_PATH"
13040.PD
13041Each variable's value is a list of directories separated by a special
13042character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
13043The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
13044determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
13045semicolon, and for almost all other targets it is a colon.
13046.Sp
13047\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
13048specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
13049options on the command line. This environment variable is used
13050regardless of which language is being preprocessed.
13051.Sp
13052The remaining environment variables apply only when preprocessing the
13053particular language indicated. Each specifies a list of directories
13054to be searched as if specified with \fB\-isystem\fR, but after any
13055paths given with \fB\-isystem\fR options on the command line.
13056.Sp
13057In all these variables, an empty element instructs the compiler to
13058search its current working directory. Empty elements can appear at the
13059beginning or end of a path. For instance, if the value of
13060\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
13061effect as \fB\-I.\ \-I/special/include\fR.
13062.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
13063.IX Item "DEPENDENCIES_OUTPUT"
13064If this variable is set, its value specifies how to output
13065dependencies for Make based on the non-system header files processed
13066by the compiler. System header files are ignored in the dependency
13067output.
13068.Sp
13069The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
13070which case the Make rules are written to that file, guessing the target
13071name from the source file name. Or the value can have the form
13072\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
13073file \fIfile\fR using \fItarget\fR as the target name.
13074.Sp
13075In other words, this environment variable is equivalent to combining
13076the options \fB\-MM\fR and \fB\-MF\fR,
13077with an optional \fB\-MT\fR switch too.
13078.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
13079.IX Item "SUNPRO_DEPENDENCIES"
13080This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
13081except that system header files are not ignored, so it implies
13082\&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
13083main input file is omitted.
13084.SH "BUGS"
13085.IX Header "BUGS"
13086For instructions on reporting bugs, see
13087<\fBhttp://gcc.gnu.org/bugs.html\fR>.
13088.SH "FOOTNOTES"
13089.IX Header "FOOTNOTES"
13090.IP "1." 4
13091On some systems, \fBgcc \-shared\fR
13092needs to build supplementary stub code for constructors to work. On
13093multi-libbed systems, \fBgcc \-shared\fR must select the correct support
13094libraries to link against. Failing to supply the correct flags may lead
13095to subtle defects. Supplying them in cases where they are not necessary
13096is innocuous.
13097.SH "SEE ALSO"
13098.IX Header "SEE ALSO"
13099\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
13100\&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
13101and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
13102\&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
13103.SH "AUTHOR"
13104.IX Header "AUTHOR"
13105See the Info entry for \fBgcc\fR, or
13106<\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
13107for contributors to \s-1GCC\s0.
13108.SH "COPYRIGHT"
13109.IX Header "COPYRIGHT"
13110Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
131111999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
13112.PP
13113Permission is granted to copy, distribute and/or modify this document
13114under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
13115any later version published by the Free Software Foundation; with the
13116Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
13117Free Software\*(R", the Front-Cover texts being (a) (see below), and with
13118the Back-Cover Texts being (b) (see below). A copy of the license is
13119included in the \fIgfdl\fR\|(7) man page.
13120.PP
13121(a) The \s-1FSF\s0's Front-Cover Text is:
13122.PP
13123.Vb 1
13124\& A GNU Manual
13125.Ve
13126.PP
13127(b) The \s-1FSF\s0's Back-Cover Text is:
13128.PP
13129.Vb 3
13130\& You have freedom to copy and modify this GNU Manual, like GNU
13131\& software. Copies published by the Free Software Foundation raise
13132\& funds for GNU development.
13133.Ve