| c-arm.texi (60484) | c-arm.texi (61843) |
|---|---|
| 1@c Copyright (C) 1996, 1998, 1999 Free Software Foundation, Inc. | 1@c Copyright (C) 1996, 1998, 1999, 2000 Free Software Foundation, Inc. |
| 2@c This is part of the GAS manual. 3@c For copying conditions, see the file as.texinfo. 4 5@ifset GENERIC 6@page 7@node ARM-Dependent 8@chapter ARM Dependent Features 9@end ifset --- 12 unchanged lines hidden (view full) --- 22* ARM Directives:: ARM Machine Directives 23* ARM Opcodes:: Opcodes 24@end menu 25 26@node ARM Options 27@section Options 28@cindex ARM options (none) 29@cindex options for ARM (none) | 2@c This is part of the GAS manual. 3@c For copying conditions, see the file as.texinfo. 4 5@ifset GENERIC 6@page 7@node ARM-Dependent 8@chapter ARM Dependent Features 9@end ifset --- 12 unchanged lines hidden (view full) --- 22* ARM Directives:: ARM Machine Directives 23* ARM Opcodes:: Opcodes 24@end menu 25 26@node ARM Options 27@section Options 28@cindex ARM options (none) 29@cindex options for ARM (none) |
| 30 |
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| 30@table @code | 31@table @code |
| 32 |
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| 31@cindex @code{-marm} command line option, ARM | 33@cindex @code{-marm} command line option, ARM |
| 32@item -marm [@var{2}|@var{250}|@var{3}|@var{6}|@var{60}|@var{600}|@var{610}|@var{620}|@var{7}|@var{7m}|@var{7d}|@var{7dm}|@var{7di}|@var{7dmi}|@var{70}|@var{700}|@var{700i}|@var{710}|@var{710c}|@var{7100}|@var{7500}|@var{7500fe}|@var{7tdmi}|@var{8}|@var{810}|@var{9}|@var{9tdmi}|@var{920}|@var{strongarm}|@var{strongarm110}|@var{strongarm1100}] | 34@item -marm@code{[2|250|3|6|60|600|610|620|7|7m|7d|7dm|7di|7dmi|70|700|700i|710|710c|7100|7500|7500fe|7tdmi|8|810|9|9tdmi|920|strongarm|strongarm110|strongarm1100]} |
| 33This option specifies the target processor. The assembler will issue an 34error message if an attempt is made to assemble an instruction which 35will not execute on the target processor. | 35This option specifies the target processor. The assembler will issue an 36error message if an attempt is made to assemble an instruction which 37will not execute on the target processor. |
| 38 |
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| 36@cindex @code{-marmv} command line option, ARM | 39@cindex @code{-marmv} command line option, ARM |
| 37@item -marmv [@var{2}|@var{2a}|@var{3}|@var{3m}|@var{4}|@var{4t}|@var{5}|@var{5t}] | 40@item -marmv@code{[2|2a|3|3m|4|4t|5|5t]} |
| 38This option specifies the target architecture. The assembler will issue 39an error message if an attempt is made to assemble an instruction which 40will not execute on the target architecture. | 41This option specifies the target architecture. The assembler will issue 42an error message if an attempt is made to assemble an instruction which 43will not execute on the target architecture. |
| 44 |
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| 41@cindex @code{-mthumb} command line option, ARM 42@item -mthumb 43This option specifies that only Thumb instructions should be assembled. | 45@cindex @code{-mthumb} command line option, ARM 46@item -mthumb 47This option specifies that only Thumb instructions should be assembled. |
| 48 |
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| 44@cindex @code{-mall} command line option, ARM 45@item -mall 46This option specifies that any Arm or Thumb instruction should be assembled. | 49@cindex @code{-mall} command line option, ARM 50@item -mall 51This option specifies that any Arm or Thumb instruction should be assembled. |
| 52 |
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| 47@cindex @code{-mfpa} command line option, ARM | 53@cindex @code{-mfpa} command line option, ARM |
| 48@item -mfpa [@var{10}|@var{11}] | 54@item -mfpa @var{[10|11]} |
| 49This option specifies the floating point architecture in use on the 50target processor. | 55This option specifies the floating point architecture in use on the 56target processor. |
| 57 |
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| 51@cindex @code{-mfpe-old} command line option, ARM 52@item -mfpe-old 53Do not allow the assemble of floating point multiple instructions. | 58@cindex @code{-mfpe-old} command line option, ARM 59@item -mfpe-old 60Do not allow the assemble of floating point multiple instructions. |
| 61 |
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| 54@cindex @code{-mno-fpu} command line option, ARM 55@item -mno-fpu 56Do not allow the assembly of any floating point instructions. | 62@cindex @code{-mno-fpu} command line option, ARM 63@item -mno-fpu 64Do not allow the assembly of any floating point instructions. |
| 65 |
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| 57@cindex @code{-mthumb-interwork} command line option, ARM 58@item -mthumb-interwork 59This option specifies that the output generated by the assembler should 60be marked as supporting interworking. | 66@cindex @code{-mthumb-interwork} command line option, ARM 67@item -mthumb-interwork 68This option specifies that the output generated by the assembler should 69be marked as supporting interworking. |
| 70 |
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| 61@cindex @code{-mapcs} command line option, ARM | 71@cindex @code{-mapcs} command line option, ARM |
| 62@item -mapcs [@var{26}|@var{32}] | 72@item -mapcs @var{[26|32]} |
| 63This option specifies that the output generated by the assembler should 64be marked as supporting the indicated version of the Arm Procedure. 65Calling Standard. | 73This option specifies that the output generated by the assembler should 74be marked as supporting the indicated version of the Arm Procedure. 75Calling Standard. |
| 76 77@cindex @code{-mapcs-float} command line option, ARM |
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| 66@item -mapcs-float 67This indicates the the floating point variant of the APCS should be 68used. In this variant floating point arguments are passed in FP 69registers rather than integer registers. | 78@item -mapcs-float 79This indicates the the floating point variant of the APCS should be 80used. In this variant floating point arguments are passed in FP 81registers rather than integer registers. |
| 82 83@cindex @code{-mapcs-reentrant} command line option, ARM |
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| 70@item -mapcs-reentrant 71This indicates that the reentrant variant of the APCS should be used. 72This variant supports position independent code. | 84@item -mapcs-reentrant 85This indicates that the reentrant variant of the APCS should be used. 86This variant supports position independent code. |
| 87 |
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| 73@cindex @code{-EB} command line option, ARM 74@item -EB 75This option specifies that the output generated by the assembler should 76be marked as being encoded for a big-endian processor. | 88@cindex @code{-EB} command line option, ARM 89@item -EB 90This option specifies that the output generated by the assembler should 91be marked as being encoded for a big-endian processor. |
| 92 |
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| 77@cindex @code{-EL} command line option, ARM 78@item -EL 79This option specifies that the output generated by the assembler should 80be marked as being encoded for a little-endian processor. | 93@cindex @code{-EL} command line option, ARM 94@item -EL 95This option specifies that the output generated by the assembler should 96be marked as being encoded for a little-endian processor. |
| 97 |
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| 81@cindex @code{-k} command line option, ARM 82@cindex PIC code generation for ARM 83@item -k 84This option enables the generation of PIC (position independent code). | 98@cindex @code{-k} command line option, ARM 99@cindex PIC code generation for ARM 100@item -k 101This option enables the generation of PIC (position independent code). |
| 102 103@cindex @code{-moabi} command line option, ARM |
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| 85@item -moabi 86This indicates that the code should be assembled using the old ARM ELF 87conventions, based on a beta release release of the ARM-ELF 88specifications, rather than the default conventions which are based on 89the final release of the ARM-ELF specifications. | 104@item -moabi 105This indicates that the code should be assembled using the old ARM ELF 106conventions, based on a beta release release of the ARM-ELF 107specifications, rather than the default conventions which are based on 108the final release of the ARM-ELF specifications. |
| 109 |
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| 90@end table 91 92 93@node ARM Syntax 94@section Syntax 95@menu 96* ARM-Chars:: Special Characters 97* ARM-Regs:: Register Names --- 40 unchanged lines hidden (view full) --- 138 139@node ARM Directives 140@section ARM Machine Directives 141 142@cindex machine directives, ARM 143@cindex ARM machine directives 144@table @code 145 | 110@end table 111 112 113@node ARM Syntax 114@section Syntax 115@menu 116* ARM-Chars:: Special Characters 117* ARM-Regs:: Register Names --- 40 unchanged lines hidden (view full) --- 158 159@node ARM Directives 160@section ARM Machine Directives 161 162@cindex machine directives, ARM 163@cindex ARM machine directives 164@table @code 165 |
| 166@cindex @code{align} directive, ARM 167@item .align @var{expression} [, @var{expression}] 168This is the generic @var{.align} directive. For the ARM however if the 169first argument is zero (ie no alignment is needed) the assembler will 170behave as if the argument had been 2 (ie pad to the next four byte 171boundary). This is for compatability with ARM's own assembler. 172 |
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| 146@cindex @code{req} directive, ARM 147@item @var{name} .req @var{register name} 148This creates an alias for @var{register name} called @var{name}. For 149example: 150 151@smallexample 152 foo .req r0 153@end smallexample 154 155@cindex @code{code} directive, ARM | 173@cindex @code{req} directive, ARM 174@item @var{name} .req @var{register name} 175This creates an alias for @var{register name} called @var{name}. For 176example: 177 178@smallexample 179 foo .req r0 180@end smallexample 181 182@cindex @code{code} directive, ARM |
| 156@item .code [@var{16}|@var{32}] | 183@item .code @var{[16|32]} |
| 157This directive selects the instruction set being generated. The value 16 158selects Thumb, with the value 32 selecting ARM. 159 160@cindex @code{thumb} directive, ARM 161@item .thumb 162This performs the same action as @var{.code 16}. 163 164@cindex @code{arm} directive, ARM --- 103 unchanged lines hidden --- | 184This directive selects the instruction set being generated. The value 16 185selects Thumb, with the value 32 selecting ARM. 186 187@cindex @code{thumb} directive, ARM 188@item .thumb 189This performs the same action as @var{.code 16}. 190 191@cindex @code{arm} directive, ARM --- 103 unchanged lines hidden --- |