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bhyverun.c (268889) bhyverun.c (269008)
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 9 unchanged lines hidden (view full) ---

18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/usr.sbin/bhyve/bhyverun.c 268889 2014-07-19 20:59:08Z neel $
26 * $FreeBSD: head/usr.sbin/bhyve/bhyverun.c 269008 2014-07-23 04:28:51Z neel $
27 */
28
29#include <sys/cdefs.h>
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/usr.sbin/bhyve/bhyverun.c 268889 2014-07-19 20:59:08Z neel $");
30__FBSDID("$FreeBSD: head/usr.sbin/bhyve/bhyverun.c 269008 2014-07-23 04:28:51Z neel $");
31
32#include <sys/types.h>
33#include <sys/mman.h>
34#include <sys/time.h>
35
36#include <machine/atomic.h>
37#include <machine/segments.h>
38

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342 int error;
343
344 val = 0;
345 error = emulate_rdmsr(ctx, *pvcpu, vme->u.msr.code, &val);
346 if (error != 0) {
347 fprintf(stderr, "rdmsr to register %#x on vcpu %d\n",
348 vme->u.msr.code, *pvcpu);
349 if (strictmsr) {
31
32#include <sys/types.h>
33#include <sys/mman.h>
34#include <sys/time.h>
35
36#include <machine/atomic.h>
37#include <machine/segments.h>
38

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342 int error;
343
344 val = 0;
345 error = emulate_rdmsr(ctx, *pvcpu, vme->u.msr.code, &val);
346 if (error != 0) {
347 fprintf(stderr, "rdmsr to register %#x on vcpu %d\n",
348 vme->u.msr.code, *pvcpu);
349 if (strictmsr) {
350 error = vm_inject_exception2(ctx, *pvcpu, IDT_GP, 0);
351 assert(error == 0);
350 vm_inject_gp(ctx, *pvcpu, 0);
352 return (VMEXIT_RESTART);
353 }
354 }
355
356 eax = val;
357 error = vm_set_register(ctx, *pvcpu, VM_REG_GUEST_RAX, eax);
358 assert(error == 0);
359

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369{
370 int error;
371
372 error = emulate_wrmsr(ctx, *pvcpu, vme->u.msr.code, vme->u.msr.wval);
373 if (error != 0) {
374 fprintf(stderr, "wrmsr to register %#x(%#lx) on vcpu %d\n",
375 vme->u.msr.code, vme->u.msr.wval, *pvcpu);
376 if (strictmsr) {
351 return (VMEXIT_RESTART);
352 }
353 }
354
355 eax = val;
356 error = vm_set_register(ctx, *pvcpu, VM_REG_GUEST_RAX, eax);
357 assert(error == 0);
358

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368{
369 int error;
370
371 error = emulate_wrmsr(ctx, *pvcpu, vme->u.msr.code, vme->u.msr.wval);
372 if (error != 0) {
373 fprintf(stderr, "wrmsr to register %#x(%#lx) on vcpu %d\n",
374 vme->u.msr.code, vme->u.msr.wval, *pvcpu);
375 if (strictmsr) {
377 error = vm_inject_exception2(ctx, *pvcpu, IDT_GP, 0);
378 assert(error == 0);
376 vm_inject_gp(ctx, *pvcpu, 0);
379 return (VMEXIT_RESTART);
380 }
381 }
382 return (VMEXIT_CONTINUE);
383}
384
385static int
386vmexit_spinup_ap(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu)

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479
480static int
481vmexit_inst_emul(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
482{
483 int err;
484 stats.vmexit_inst_emul++;
485
486 err = emulate_mem(ctx, *pvcpu, vmexit->u.inst_emul.gpa,
377 return (VMEXIT_RESTART);
378 }
379 }
380 return (VMEXIT_CONTINUE);
381}
382
383static int
384vmexit_spinup_ap(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu)

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477
478static int
479vmexit_inst_emul(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
480{
481 int err;
482 stats.vmexit_inst_emul++;
483
484 err = emulate_mem(ctx, *pvcpu, vmexit->u.inst_emul.gpa,
487 &vmexit->u.inst_emul.vie);
485 &vmexit->u.inst_emul.vie, &vmexit->u.inst_emul.paging);
488
489 if (err) {
490 if (err == EINVAL) {
491 fprintf(stderr,
492 "Failed to emulate instruction at 0x%lx\n",
493 vmexit->rip);
494 } else if (err == ESRCH) {
495 fprintf(stderr, "Unhandled memory access to 0x%lx\n",

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486
487 if (err) {
488 if (err == EINVAL) {
489 fprintf(stderr,
490 "Failed to emulate instruction at 0x%lx\n",
491 vmexit->rip);
492 } else if (err == ESRCH) {
493 fprintf(stderr, "Unhandled memory access to 0x%lx\n",

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