| local_apic.c (327764) | local_apic.c (329462) |
|---|---|
| 1/*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * Copyright (c) 1996, by Steve Passe 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 18 unchanged lines hidden (view full) --- 27 * SUCH DAMAGE. 28 */ 29 30/* 31 * Local APIC support on Pentium and later processors. 32 */ 33 34#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * Copyright (c) 1996, by Steve Passe 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 18 unchanged lines hidden (view full) --- 27 * SUCH DAMAGE. 28 */ 29 30/* 31 * Local APIC support on Pentium and later processors. 32 */ 33 34#include <sys/cdefs.h> |
| 35__FBSDID("$FreeBSD: stable/11/sys/x86/x86/local_apic.c 327764 2018-01-10 08:10:18Z kib $"); | 35__FBSDID("$FreeBSD: stable/11/sys/x86/x86/local_apic.c 329462 2018-02-17 18:00:01Z kib $"); |
| 36 37#include "opt_atpic.h" 38#include "opt_hwpmc_hooks.h" 39 40#include "opt_ddb.h" 41 42#include <sys/param.h> 43#include <sys/systm.h> --- 117 unchanged lines hidden (view full) --- 161 IDTVEC(apic_isr2), /* 64 - 95 */ 162 IDTVEC(apic_isr3), /* 96 - 127 */ 163 IDTVEC(apic_isr4), /* 128 - 159 */ 164 IDTVEC(apic_isr5), /* 160 - 191 */ 165 IDTVEC(apic_isr6), /* 192 - 223 */ 166 IDTVEC(apic_isr7), /* 224 - 255 */ 167}; 168 | 36 37#include "opt_atpic.h" 38#include "opt_hwpmc_hooks.h" 39 40#include "opt_ddb.h" 41 42#include <sys/param.h> 43#include <sys/systm.h> --- 117 unchanged lines hidden (view full) --- 161 IDTVEC(apic_isr2), /* 64 - 95 */ 162 IDTVEC(apic_isr3), /* 96 - 127 */ 163 IDTVEC(apic_isr4), /* 128 - 159 */ 164 IDTVEC(apic_isr5), /* 160 - 191 */ 165 IDTVEC(apic_isr6), /* 192 - 223 */ 166 IDTVEC(apic_isr7), /* 224 - 255 */ 167}; 168 |
| 169static inthand_t *ioint_pti_handlers[] = { 170 NULL, /* 0 - 31 */ 171 IDTVEC(apic_isr1_pti), /* 32 - 63 */ 172 IDTVEC(apic_isr2_pti), /* 64 - 95 */ 173 IDTVEC(apic_isr3_pti), /* 96 - 127 */ 174 IDTVEC(apic_isr4_pti), /* 128 - 159 */ 175 IDTVEC(apic_isr5_pti), /* 160 - 191 */ 176 IDTVEC(apic_isr6_pti), /* 192 - 223 */ 177 IDTVEC(apic_isr7_pti), /* 224 - 255 */ 178}; |
|
| 169 170static u_int32_t lapic_timer_divisors[] = { 171 APIC_TDCR_1, APIC_TDCR_2, APIC_TDCR_4, APIC_TDCR_8, APIC_TDCR_16, 172 APIC_TDCR_32, APIC_TDCR_64, APIC_TDCR_128 173}; 174 | 179 180static u_int32_t lapic_timer_divisors[] = { 181 APIC_TDCR_1, APIC_TDCR_2, APIC_TDCR_4, APIC_TDCR_8, APIC_TDCR_16, 182 APIC_TDCR_32, APIC_TDCR_64, APIC_TDCR_128 183}; 184 |
| 175extern inthand_t IDTVEC(rsvd); | 185extern inthand_t IDTVEC(rsvd_pti), IDTVEC(rsvd); |
| 176 177volatile char *lapic_map; 178vm_paddr_t lapic_paddr; 179int x2apic_mode; 180int lapic_eoi_suppression; 181static int lapic_timer_tsc_deadline; 182static u_long lapic_timer_divisor, count_freq; 183static struct eventtimer lapic_et; --- 301 unchanged lines hidden (view full) --- 485 486 /* Perform basic initialization of the BSP's local APIC. */ 487 lapic_enable(); 488 489 /* Set BSP's per-CPU local APIC ID. */ 490 PCPU_SET(apic_id, lapic_id()); 491 492 /* Local APIC timer interrupt. */ | 186 187volatile char *lapic_map; 188vm_paddr_t lapic_paddr; 189int x2apic_mode; 190int lapic_eoi_suppression; 191static int lapic_timer_tsc_deadline; 192static u_long lapic_timer_divisor, count_freq; 193static struct eventtimer lapic_et; --- 301 unchanged lines hidden (view full) --- 495 496 /* Perform basic initialization of the BSP's local APIC. */ 497 lapic_enable(); 498 499 /* Set BSP's per-CPU local APIC ID. */ 500 PCPU_SET(apic_id, lapic_id()); 501 502 /* Local APIC timer interrupt. */ |
| 493 setidt(APIC_TIMER_INT, IDTVEC(timerint), SDT_APIC, SEL_KPL, GSEL_APIC); | 503 setidt(APIC_TIMER_INT, pti ? IDTVEC(timerint_pti) : IDTVEC(timerint), 504 SDT_APIC, SEL_KPL, GSEL_APIC); |
| 494 495 /* Local APIC error interrupt. */ | 505 506 /* Local APIC error interrupt. */ |
| 496 setidt(APIC_ERROR_INT, IDTVEC(errorint), SDT_APIC, SEL_KPL, GSEL_APIC); | 507 setidt(APIC_ERROR_INT, pti ? IDTVEC(errorint_pti) : IDTVEC(errorint), 508 SDT_APIC, SEL_KPL, GSEL_APIC); |
| 497 498 /* XXX: Thermal interrupt */ 499 500 /* Local APIC CMCI. */ | 509 510 /* XXX: Thermal interrupt */ 511 512 /* Local APIC CMCI. */ |
| 501 setidt(APIC_CMC_INT, IDTVEC(cmcint), SDT_APICT, SEL_KPL, GSEL_APIC); | 513 setidt(APIC_CMC_INT, pti ? IDTVEC(cmcint_pti) : IDTVEC(cmcint), 514 SDT_APICT, SEL_KPL, GSEL_APIC); |
| 502 503 if ((resource_int_value("apic", 0, "clock", &i) != 0 || i != 0)) { 504 arat = 0; 505 /* Intel CPUID 0x06 EAX[2] set if APIC timer runs in C3. */ 506 if (cpu_vendor_id == CPU_VENDOR_INTEL && cpu_high >= 6) { 507 do_cpuid(0x06, regs); 508 if ((regs[0] & CPUTPM1_ARAT) != 0) 509 arat = 1; --- 1047 unchanged lines hidden (view full) --- 1557 1558 KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry")); 1559 KASSERT(ioint_handlers[vector / 32] != NULL, 1560 ("No ISR handler for vector %u", vector)); 1561#ifdef KDTRACE_HOOKS 1562 KASSERT(vector != IDT_DTRACE_RET, 1563 ("Attempt to overwrite DTrace entry")); 1564#endif | 515 516 if ((resource_int_value("apic", 0, "clock", &i) != 0 || i != 0)) { 517 arat = 0; 518 /* Intel CPUID 0x06 EAX[2] set if APIC timer runs in C3. */ 519 if (cpu_vendor_id == CPU_VENDOR_INTEL && cpu_high >= 6) { 520 do_cpuid(0x06, regs); 521 if ((regs[0] & CPUTPM1_ARAT) != 0) 522 arat = 1; --- 1047 unchanged lines hidden (view full) --- 1570 1571 KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry")); 1572 KASSERT(ioint_handlers[vector / 32] != NULL, 1573 ("No ISR handler for vector %u", vector)); 1574#ifdef KDTRACE_HOOKS 1575 KASSERT(vector != IDT_DTRACE_RET, 1576 ("Attempt to overwrite DTrace entry")); 1577#endif |
| 1565 setidt(vector, ioint_handlers[vector / 32], SDT_APIC, SEL_KPL, 1566 GSEL_APIC); | 1578 setidt(vector, (pti ? ioint_pti_handlers : ioint_handlers)[vector / 32], 1579 SDT_APIC, SEL_KPL, GSEL_APIC); |
| 1567} 1568 1569static void 1570native_apic_disable_vector(u_int apic_id, u_int vector) 1571{ 1572 1573 KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry")); 1574#ifdef KDTRACE_HOOKS 1575 KASSERT(vector != IDT_DTRACE_RET, 1576 ("Attempt to overwrite DTrace entry")); 1577#endif 1578 KASSERT(ioint_handlers[vector / 32] != NULL, 1579 ("No ISR handler for vector %u", vector)); 1580#ifdef notyet 1581 /* 1582 * We can not currently clear the idt entry because other cpus 1583 * may have a valid vector at this offset. 1584 */ | 1580} 1581 1582static void 1583native_apic_disable_vector(u_int apic_id, u_int vector) 1584{ 1585 1586 KASSERT(vector != IDT_SYSCALL, ("Attempt to overwrite syscall entry")); 1587#ifdef KDTRACE_HOOKS 1588 KASSERT(vector != IDT_DTRACE_RET, 1589 ("Attempt to overwrite DTrace entry")); 1590#endif 1591 KASSERT(ioint_handlers[vector / 32] != NULL, 1592 ("No ISR handler for vector %u", vector)); 1593#ifdef notyet 1594 /* 1595 * We can not currently clear the idt entry because other cpus 1596 * may have a valid vector at this offset. 1597 */ |
| 1585 setidt(vector, &IDTVEC(rsvd), SDT_APICT, SEL_KPL, GSEL_APIC); | 1598 setidt(vector, pti ? &IDTVEC(rsvd_pti) : &IDTVEC(rsvd), SDT_APICT, 1599 SEL_KPL, GSEL_APIC); |
| 1586#endif 1587} 1588 1589/* Release an APIC vector when it's no longer in use. */ 1590static void 1591native_apic_free_vector(u_int apic_id, u_int vector, u_int irq) 1592{ 1593 struct thread *td; --- 486 unchanged lines hidden (view full) --- 2080 */ 2081static int 2082native_lapic_ipi_alloc(inthand_t *ipifunc) 2083{ 2084 struct gate_descriptor *ip; 2085 long func; 2086 int idx, vector; 2087 | 1600#endif 1601} 1602 1603/* Release an APIC vector when it's no longer in use. */ 1604static void 1605native_apic_free_vector(u_int apic_id, u_int vector, u_int irq) 1606{ 1607 struct thread *td; --- 486 unchanged lines hidden (view full) --- 2094 */ 2095static int 2096native_lapic_ipi_alloc(inthand_t *ipifunc) 2097{ 2098 struct gate_descriptor *ip; 2099 long func; 2100 int idx, vector; 2101 |
| 2088 KASSERT(ipifunc != &IDTVEC(rsvd), ("invalid ipifunc %p", ipifunc)); | 2102 KASSERT(ipifunc != &IDTVEC(rsvd) && ipifunc != &IDTVEC(rsvd_pti), 2103 ("invalid ipifunc %p", ipifunc)); |
| 2089 2090 vector = -1; 2091 mtx_lock_spin(&icu_lock); 2092 for (idx = IPI_DYN_FIRST; idx <= IPI_DYN_LAST; idx++) { 2093 ip = &idt[idx]; 2094 func = (ip->gd_hioffset << 16) | ip->gd_looffset; | 2104 2105 vector = -1; 2106 mtx_lock_spin(&icu_lock); 2107 for (idx = IPI_DYN_FIRST; idx <= IPI_DYN_LAST; idx++) { 2108 ip = &idt[idx]; 2109 func = (ip->gd_hioffset << 16) | ip->gd_looffset; |
| 2095 if (func == (uintptr_t)&IDTVEC(rsvd)) { | 2110 if ((!pti && func == (uintptr_t)&IDTVEC(rsvd)) || 2111 (pti && func == (uintptr_t)&IDTVEC(rsvd_pti))) { |
| 2096 vector = idx; 2097 setidt(vector, ipifunc, SDT_APIC, SEL_KPL, GSEL_APIC); 2098 break; 2099 } 2100 } 2101 mtx_unlock_spin(&icu_lock); 2102 return (vector); 2103} --- 5 unchanged lines hidden (view full) --- 2109 long func; 2110 2111 KASSERT(vector >= IPI_DYN_FIRST && vector <= IPI_DYN_LAST, 2112 ("%s: invalid vector %d", __func__, vector)); 2113 2114 mtx_lock_spin(&icu_lock); 2115 ip = &idt[vector]; 2116 func = (ip->gd_hioffset << 16) | ip->gd_looffset; | 2112 vector = idx; 2113 setidt(vector, ipifunc, SDT_APIC, SEL_KPL, GSEL_APIC); 2114 break; 2115 } 2116 } 2117 mtx_unlock_spin(&icu_lock); 2118 return (vector); 2119} --- 5 unchanged lines hidden (view full) --- 2125 long func; 2126 2127 KASSERT(vector >= IPI_DYN_FIRST && vector <= IPI_DYN_LAST, 2128 ("%s: invalid vector %d", __func__, vector)); 2129 2130 mtx_lock_spin(&icu_lock); 2131 ip = &idt[vector]; 2132 func = (ip->gd_hioffset << 16) | ip->gd_looffset; |
| 2117 KASSERT(func != (uintptr_t)&IDTVEC(rsvd), | 2133 KASSERT(func != (uintptr_t)&IDTVEC(rsvd) && 2134 func != (uintptr_t)&IDTVEC(rsvd_pti), |
| 2118 ("invalid idtfunc %#lx", func)); | 2135 ("invalid idtfunc %#lx", func)); |
| 2119 setidt(vector, &IDTVEC(rsvd), SDT_APICT, SEL_KPL, GSEL_APIC); | 2136 setidt(vector, pti ? &IDTVEC(rsvd_pti) : &IDTVEC(rsvd), SDT_APICT, 2137 SEL_KPL, GSEL_APIC); |
| 2120 mtx_unlock_spin(&icu_lock); 2121} | 2138 mtx_unlock_spin(&icu_lock); 2139} |