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cpu_machdep.c (355701) cpu_machdep.c (358582)
1/*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.

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34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 */
40
41#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.

--- 25 unchanged lines hidden (view full) ---

34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 */
40
41#include <sys/cdefs.h>
42__FBSDID("$FreeBSD: stable/11/sys/x86/x86/cpu_machdep.c 355701 2019-12-13 06:54:41Z scottl $");
42__FBSDID("$FreeBSD: stable/11/sys/x86/x86/cpu_machdep.c 358582 2020-03-03 15:12:00Z kib $");
43
44#include "opt_atpic.h"
45#include "opt_compat.h"
46#include "opt_cpu.h"
47#include "opt_ddb.h"
48#include "opt_inet.h"
49#include "opt_isa.h"
50#include "opt_kdb.h"

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880 if (nmi_is_broadcast) {
881 nmi_call_kdb_smp(type, frame);
882 return;
883 }
884#endif
885 nmi_call_kdb(PCPU_GET(cpuid), type, frame);
886}
887
43
44#include "opt_atpic.h"
45#include "opt_compat.h"
46#include "opt_cpu.h"
47#include "opt_ddb.h"
48#include "opt_inet.h"
49#include "opt_isa.h"
50#include "opt_kdb.h"

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880 if (nmi_is_broadcast) {
881 nmi_call_kdb_smp(type, frame);
882 return;
883 }
884#endif
885 nmi_call_kdb(PCPU_GET(cpuid), type, frame);
886}
887
888int hw_ibrs_active;
888static int hw_ibrs_active;
889int hw_ibrs_ibpb_active;
889int hw_ibrs_disable = 1;
890
891SYSCTL_INT(_hw, OID_AUTO, ibrs_active, CTLFLAG_RD, &hw_ibrs_active, 0,
892 "Indirect Branch Restricted Speculation active");
893
894void
890int hw_ibrs_disable = 1;
891
892SYSCTL_INT(_hw, OID_AUTO, ibrs_active, CTLFLAG_RD, &hw_ibrs_active, 0,
893 "Indirect Branch Restricted Speculation active");
894
895void
895hw_ibrs_recalculate(void)
896hw_ibrs_recalculate(bool for_all_cpus)
896{
897 if ((cpu_ia32_arch_caps & IA32_ARCH_CAP_IBRS_ALL) != 0) {
897{
898 if ((cpu_ia32_arch_caps & IA32_ARCH_CAP_IBRS_ALL) != 0) {
898 x86_msr_op(MSR_IA32_SPEC_CTRL, MSR_OP_LOCAL |
899 (hw_ibrs_disable ? MSR_OP_ANDNOT : MSR_OP_OR),
899 x86_msr_op(MSR_IA32_SPEC_CTRL, (for_all_cpus ?
900 MSR_OP_RENDEZVOUS : MSR_OP_LOCAL) |
901 (hw_ibrs_disable != 0 ? MSR_OP_ANDNOT : MSR_OP_OR),
900 IA32_SPEC_CTRL_IBRS);
902 IA32_SPEC_CTRL_IBRS);
901 return;
903 hw_ibrs_active = hw_ibrs_disable == 0;
904 hw_ibrs_ibpb_active = 0;
905 } else {
906 hw_ibrs_active = hw_ibrs_ibpb_active = (cpu_stdext_feature3 &
907 CPUID_STDEXT3_IBPB) != 0 && !hw_ibrs_disable;
902 }
908 }
903 hw_ibrs_active = (cpu_stdext_feature3 & CPUID_STDEXT3_IBPB) != 0 &&
904 !hw_ibrs_disable;
905}
906
907static int
908hw_ibrs_disable_handler(SYSCTL_HANDLER_ARGS)
909{
910 int error, val;
911
912 val = hw_ibrs_disable;
913 error = sysctl_handle_int(oidp, &val, 0, req);
914 if (error != 0 || req->newptr == NULL)
915 return (error);
916 hw_ibrs_disable = val != 0;
909}
910
911static int
912hw_ibrs_disable_handler(SYSCTL_HANDLER_ARGS)
913{
914 int error, val;
915
916 val = hw_ibrs_disable;
917 error = sysctl_handle_int(oidp, &val, 0, req);
918 if (error != 0 || req->newptr == NULL)
919 return (error);
920 hw_ibrs_disable = val != 0;
917 hw_ibrs_recalculate();
921 hw_ibrs_recalculate(true);
918 return (0);
919}
920SYSCTL_PROC(_hw, OID_AUTO, ibrs_disable, CTLTYPE_INT | CTLFLAG_RWTUN |
921 CTLFLAG_NOFETCH | CTLFLAG_MPSAFE, NULL, 0, hw_ibrs_disable_handler, "I",
922 "Disable Indirect Branch Restricted Speculation");
923
924int hw_ssb_active;
925int hw_ssb_disable;

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922 return (0);
923}
924SYSCTL_PROC(_hw, OID_AUTO, ibrs_disable, CTLTYPE_INT | CTLFLAG_RWTUN |
925 CTLFLAG_NOFETCH | CTLFLAG_MPSAFE, NULL, 0, hw_ibrs_disable_handler, "I",
926 "Disable Indirect Branch Restricted Speculation");
927
928int hw_ssb_active;
929int hw_ssb_disable;

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