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cpu_machdep.c (15543) cpu_machdep.c (15565)
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *

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30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *

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30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $Id: machdep.c,v 1.186 1996/05/01 08:38:36 bde Exp $
38 * $Id: machdep.c,v 1.187 1996/05/02 14:19:47 phk Exp $
39 */
40
41#include "npx.h"
42#include "isa.h"
43#include "opt_sysvipc.h"
44#include "opt_ddb.h"
45#include "opt_bounce.h"
46#include "opt_machdep.h"

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163#else
164int bouncepages = 0;
165#endif
166#endif /* BOUNCE_BUFFERS */
167
168extern int freebufspace;
169int msgbufmapped = 0; /* set when safe to use msgbuf */
170int _udatasel, _ucodesel;
39 */
40
41#include "npx.h"
42#include "isa.h"
43#include "opt_sysvipc.h"
44#include "opt_ddb.h"
45#include "opt_bounce.h"
46#include "opt_machdep.h"

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163#else
164int bouncepages = 0;
165#endif
166#endif /* BOUNCE_BUFFERS */
167
168extern int freebufspace;
169int msgbufmapped = 0; /* set when safe to use msgbuf */
170int _udatasel, _ucodesel;
171u_int atdevbase;
171
172
173int physmem = 0;
174int cold = 1;
175
176static int
177sysctl_hw_physmem SYSCTL_HANDLER_ARGS
178{

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1308 int gsel_tss;
1309 /* table descriptors - used to load tables by microp */
1310 struct region_descriptor r_gdt, r_idt;
1311 int pagesinbase, pagesinext;
1312 int target_page, pa_indx;
1313
1314 proc0.p_addr = proc0paddr;
1315
172
173
174int physmem = 0;
175int cold = 1;
176
177static int
178sysctl_hw_physmem SYSCTL_HANDLER_ARGS
179{

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1309 int gsel_tss;
1310 /* table descriptors - used to load tables by microp */
1311 struct region_descriptor r_gdt, r_idt;
1312 int pagesinbase, pagesinext;
1313 int target_page, pa_indx;
1314
1315 proc0.p_addr = proc0paddr;
1316
1317 atdevbase = ISA_HOLE_START + KERNBASE;
1318
1316 /*
1317 * Initialize the console before we print anything out.
1318 */
1319 cninit();
1320
1321 /*
1322 * make gdt memory segments, the code segment goes up to end of the
1323 * page with etext in it, the data segment goes to the end of

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1493 }
1494
1495 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) {
1496 int tmp, page_bad = FALSE;
1497
1498 /*
1499 * map page into kernel: valid, read/write, non-cacheable
1500 */
1319 /*
1320 * Initialize the console before we print anything out.
1321 */
1322 cninit();
1323
1324 /*
1325 * make gdt memory segments, the code segment goes up to end of the
1326 * page with etext in it, the data segment goes to the end of

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1496 }
1497
1498 for (target_page = avail_start; target_page < ptoa(Maxmem); target_page += PAGE_SIZE) {
1499 int tmp, page_bad = FALSE;
1500
1501 /*
1502 * map page into kernel: valid, read/write, non-cacheable
1503 */
1501 *(int *)CMAP1 = PG_V | PG_KW | PG_N | target_page;
1504 *(int *)CMAP1 = PG_V | PG_RW | PG_N | target_page;
1502 pmap_update();
1503
1504 tmp = *(int *)CADDR1;
1505 /*
1506 * Test for alternating 1's and 0's
1507 */
1508 *(volatile int *)CADDR1 = 0xaaaaaaaa;
1509 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) {

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1505 pmap_update();
1506
1507 tmp = *(int *)CADDR1;
1508 /*
1509 * Test for alternating 1's and 0's
1510 */
1511 *(volatile int *)CADDR1 = 0xaaaaaaaa;
1512 if (*(volatile int *)CADDR1 != 0xaaaaaaaa) {

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