1/*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.

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34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 */
40
41#include <sys/cdefs.h>
42__FBSDID("$FreeBSD: stable/11/sys/x86/x86/cpu_machdep.c 334044 2018-05-22 14:25:40Z kib $");
43
44#include "opt_atpic.h"
45#include "opt_compat.h"
46#include "opt_cpu.h"
47#include "opt_ddb.h"
48#include "opt_inet.h"
49#include "opt_isa.h"
50#include "opt_kdb.h"

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153 * NOTE: Interrupts will cause a wakeup; however, this function does
154 * not enable interrupt handling. The caller is responsible to enable
155 * interrupts.
156 */
157void
158acpi_cpu_idle_mwait(uint32_t mwait_hint)
159{
160 int *state;
161
162 /*
163 * A comment in Linux patch claims that 'CPUs run faster with
164 * speculation protection disabled. All CPU threads in a core
165 * must disable speculation protection for it to be
166 * disabled. Disable it while we are idle so the other
167 * hyperthread can run fast.'
168 *
169 * XXXKIB. Software coordination mode should be supported,
170 * but all Intel CPUs provide hardware coordination.
171 */
172
173 state = (int *)PCPU_PTR(monitorbuf);
174 KASSERT(atomic_load_int(state) == STATE_SLEEPING,
175 ("cpu_mwait_cx: wrong monitorbuf state"));
176 atomic_store_int(state, STATE_MWAIT);
177 handle_ibrs_exit();
178 cpu_monitor(state, 0, 0);
179 if (atomic_load_int(state) == STATE_MWAIT)
180 cpu_mwait(MWAIT_INTRBREAK, mwait_hint);
181 handle_ibrs_entry();
182
183 /*
184 * We should exit on any event that interrupts mwait, because
185 * that event might be a wanted interrupt.
186 */
187 atomic_store_int(state, STATE_RUNNING);
188}
189
190/* Get current clock frequency for the given cpu id. */
191int

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831 return (error);
832 hw_ibrs_disable = val != 0;
833 hw_ibrs_recalculate();
834 return (0);
835}
836SYSCTL_PROC(_hw, OID_AUTO, ibrs_disable, CTLTYPE_INT | CTLFLAG_RWTUN |
837 CTLFLAG_NOFETCH | CTLFLAG_MPSAFE, NULL, 0, hw_ibrs_disable_handler, "I",
838 "Disable Indirect Branch Restricted Speculation");