| clock.c (74914) | clock.c (76078) |
|---|---|
| 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz and Don Ahn. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 20 unchanged lines hidden (view full) --- 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 | 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz and Don Ahn. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 20 unchanged lines hidden (view full) --- 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 |
| 37 * $FreeBSD: head/sys/i386/isa/clock.c 74914 2001-03-28 09:17:56Z jhb $ | 37 * $FreeBSD: head/sys/i386/isa/clock.c 76078 2001-04-27 19:28:25Z jhb $ |
| 38 */ 39 40/* 41 * Routines to handle clock hardware. 42 */ 43 44/* 45 * inittodr, settodr and support routines written --- 160 unchanged lines hidden (view full) --- 206 else { 207 i8254_offset += timer0_max_count; 208 i8254_lastcount = 0; 209 } 210 clkintr_pending = 0; 211 mtx_unlock_spin(&clock_lock); 212 } 213 timer_func(&frame); | 38 */ 39 40/* 41 * Routines to handle clock hardware. 42 */ 43 44/* 45 * inittodr, settodr and support routines written --- 160 unchanged lines hidden (view full) --- 206 else { 207 i8254_offset += timer0_max_count; 208 i8254_lastcount = 0; 209 } 210 clkintr_pending = 0; 211 mtx_unlock_spin(&clock_lock); 212 } 213 timer_func(&frame); |
| 214#ifdef SMP 215 if (timer_func == hardclock) 216 forward_hardclock(); 217#endif |
|
| 214 switch (timer0_state) { 215 216 case RELEASED: 217 break; 218 219 case ACQUIRED: 220 if ((timer0_prescaler_count += timer0_max_count) 221 >= hardclock_max_count) { --- 26 unchanged lines hidden (view full) --- 248 TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 249 outb(TIMER_CNTR0, timer0_max_count & 0xff); 250 outb(TIMER_CNTR0, timer0_max_count >> 8); 251 mtx_unlock_spin(&clock_lock); 252 timer0_prescaler_count = 0; 253 timer_func = hardclock; 254 timer0_state = RELEASED; 255 hardclock(&frame); | 218 switch (timer0_state) { 219 220 case RELEASED: 221 break; 222 223 case ACQUIRED: 224 if ((timer0_prescaler_count += timer0_max_count) 225 >= hardclock_max_count) { --- 26 unchanged lines hidden (view full) --- 252 TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 253 outb(TIMER_CNTR0, timer0_max_count & 0xff); 254 outb(TIMER_CNTR0, timer0_max_count >> 8); 255 mtx_unlock_spin(&clock_lock); 256 timer0_prescaler_count = 0; 257 timer_func = hardclock; 258 timer0_state = RELEASED; 259 hardclock(&frame); |
| 260#ifdef SMP 261 forward_hardclock(); 262#endif |
|
| 256 } 257 break; 258 } 259#ifdef DEV_MCA 260 /* Reset clock interrupt by asserting bit 7 of port 0x61 */ 261 if (MCA_system) 262 outb(0x61, inb(0x61) | 0x80); 263#endif --- 105 unchanged lines hidden (view full) --- 369 * clock will halt, considerably degrading system performance. This is 370 * why we use 'while' rather than a more straightforward 'if' below. 371 * Stat clock ticks can still be lost, causing minor loss of accuracy 372 * in the statistics, but the stat clock will no longer stop. 373 */ 374static void 375rtcintr(struct clockframe frame) 376{ | 263 } 264 break; 265 } 266#ifdef DEV_MCA 267 /* Reset clock interrupt by asserting bit 7 of port 0x61 */ 268 if (MCA_system) 269 outb(0x61, inb(0x61) | 0x80); 270#endif --- 105 unchanged lines hidden (view full) --- 376 * clock will halt, considerably degrading system performance. This is 377 * why we use 'while' rather than a more straightforward 'if' below. 378 * Stat clock ticks can still be lost, causing minor loss of accuracy 379 * in the statistics, but the stat clock will no longer stop. 380 */ 381static void 382rtcintr(struct clockframe frame) 383{ |
| 377 while (rtcin(RTC_INTR) & RTCIR_PERIOD) | 384 while (rtcin(RTC_INTR) & RTCIR_PERIOD) { |
| 378 statclock(&frame); | 385 statclock(&frame); |
| 386#ifdef SMP 387 forward_statclock(); 388#endif 389 } |
|
| 379} 380 381#include "opt_ddb.h" 382#ifdef DDB 383#include <ddb/ddb.h> 384 385DB_SHOW_COMMAND(rtc, rtc) 386{ --- 882 unchanged lines hidden --- | 390} 391 392#include "opt_ddb.h" 393#ifdef DDB 394#include <ddb/ddb.h> 395 396DB_SHOW_COMMAND(rtc, rtc) 397{ --- 882 unchanged lines hidden --- |