| specialreg.h (349955) | specialreg.h (354651) |
|---|---|
| 1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 |
| 30 * $FreeBSD: stable/11/sys/x86/include/specialreg.h 349955 2019-07-12 20:05:30Z jhb $ | 30 * $FreeBSD: stable/11/sys/x86/include/specialreg.h 354651 2019-11-12 18:04:28Z kib $ |
| 31 */ 32 33#ifndef _MACHINE_SPECIALREG_H_ 34#define _MACHINE_SPECIALREG_H_ 35 36/* 37 * Bits in 386 special registers: 38 */ --- 362 unchanged lines hidden (view full) --- 401 402/* MSR IA32_ARCH_CAP(ABILITIES) bits */ 403#define IA32_ARCH_CAP_RDCL_NO 0x00000001 404#define IA32_ARCH_CAP_IBRS_ALL 0x00000002 405#define IA32_ARCH_CAP_RSBA 0x00000004 406#define IA32_ARCH_CAP_SKIP_L1DFL_VMENTRY 0x00000008 407#define IA32_ARCH_CAP_SSB_NO 0x00000010 408#define IA32_ARCH_CAP_MDS_NO 0x00000020 | 31 */ 32 33#ifndef _MACHINE_SPECIALREG_H_ 34#define _MACHINE_SPECIALREG_H_ 35 36/* 37 * Bits in 386 special registers: 38 */ --- 362 unchanged lines hidden (view full) --- 401 402/* MSR IA32_ARCH_CAP(ABILITIES) bits */ 403#define IA32_ARCH_CAP_RDCL_NO 0x00000001 404#define IA32_ARCH_CAP_IBRS_ALL 0x00000002 405#define IA32_ARCH_CAP_RSBA 0x00000004 406#define IA32_ARCH_CAP_SKIP_L1DFL_VMENTRY 0x00000008 407#define IA32_ARCH_CAP_SSB_NO 0x00000010 408#define IA32_ARCH_CAP_MDS_NO 0x00000020 |
| 409#define IA32_ARCH_CAP_IF_PSCHANGE_MC_NO 0x00000040 |
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| 409 410/* 411 * CPUID manufacturers identifiers 412 */ 413#define AMD_VENDOR_ID "AuthenticAMD" 414#define CENTAUR_VENDOR_ID "CentaurHauls" 415#define CYRIX_VENDOR_ID "CyrixInstead" 416#define INTEL_VENDOR_ID "GenuineIntel" --- 537 unchanged lines hidden --- | 410 411/* 412 * CPUID manufacturers identifiers 413 */ 414#define AMD_VENDOR_ID "AuthenticAMD" 415#define CENTAUR_VENDOR_ID "CentaurHauls" 416#define CYRIX_VENDOR_ID "CyrixInstead" 417#define INTEL_VENDOR_ID "GenuineIntel" --- 537 unchanged lines hidden --- |