specialreg.h (210577) | specialreg.h (210624) |
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1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 |
30 * $FreeBSD: head/sys/i386/include/specialreg.h 210577 2010-07-28 21:52:09Z jhb $ | 30 * $FreeBSD: head/sys/i386/include/specialreg.h 210624 2010-07-29 19:08:22Z delphij $ |
31 */ 32 33#ifndef _MACHINE_SPECIALREG_H_ 34#define _MACHINE_SPECIALREG_H_ 35 36/* 37 * Bits in 386 special registers: 38 */ --- 220 unchanged lines hidden (view full) --- 259#define MSR_MCG_STATUS 0x17a 260#define MSR_MCG_CTL 0x17b 261#define MSR_EVNTSEL0 0x186 262#define MSR_EVNTSEL1 0x187 263#define MSR_THERM_CONTROL 0x19a 264#define MSR_THERM_INTERRUPT 0x19b 265#define MSR_THERM_STATUS 0x19c 266#define MSR_IA32_MISC_ENABLE 0x1a0 | 31 */ 32 33#ifndef _MACHINE_SPECIALREG_H_ 34#define _MACHINE_SPECIALREG_H_ 35 36/* 37 * Bits in 386 special registers: 38 */ --- 220 unchanged lines hidden (view full) --- 259#define MSR_MCG_STATUS 0x17a 260#define MSR_MCG_CTL 0x17b 261#define MSR_EVNTSEL0 0x186 262#define MSR_EVNTSEL1 0x187 263#define MSR_THERM_CONTROL 0x19a 264#define MSR_THERM_INTERRUPT 0x19b 265#define MSR_THERM_STATUS 0x19c 266#define MSR_IA32_MISC_ENABLE 0x1a0 |
267#define MSR_IA32_TEMPERATURE_TARGET 0x1a2 |
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267#define MSR_DEBUGCTLMSR 0x1d9 268#define MSR_LASTBRANCHFROMIP 0x1db 269#define MSR_LASTBRANCHTOIP 0x1dc 270#define MSR_LASTINTFROMIP 0x1dd 271#define MSR_LASTINTTOIP 0x1de 272#define MSR_ROB_CR_BKUPTMPDR6 0x1e0 273#define MSR_MTRRVarBase 0x200 274#define MSR_MTRR64kBase 0x250 --- 320 unchanged lines hidden --- | 268#define MSR_DEBUGCTLMSR 0x1d9 269#define MSR_LASTBRANCHFROMIP 0x1db 270#define MSR_LASTBRANCHTOIP 0x1dc 271#define MSR_LASTINTFROMIP 0x1dd 272#define MSR_LASTINTTOIP 0x1de 273#define MSR_ROB_CR_BKUPTMPDR6 0x1e0 274#define MSR_MTRRVarBase 0x200 275#define MSR_MTRR64kBase 0x250 --- 320 unchanged lines hidden --- |