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intr.h (297230) intr.h (297539)
1/* $NetBSD: intr.h,v 1.7 2003/06/16 20:01:00 thorpej Exp $ */
2
3/*-
1/*-
4 * Copyright (c) 1997 Mark Brinicombe.
2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Mark Brinicombe
18 * for the NetBSD Project.
19 * 4. The name of the company nor the name of the author may be used to
20 * endorse or promote products derived from this software without specific
21 * prior written permission.
22 *
14 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
35 * $FreeBSD: head/sys/sys/intr.h 297230 2016-03-24 09:55:11Z skra $
36 *
27 * $FreeBSD: head/sys/sys/intr.h 297539 2016-04-04 09:15:25Z skra $
37 */
38
39#ifndef _SYS_INTR_H_
40#define _SYS_INTR_H_
41
42#include <sys/systm.h>
43
28 */
29
30#ifndef _SYS_INTR_H_
31#define _SYS_INTR_H_
32
33#include <sys/systm.h>
34
35enum intr_map_data_type {
36 INTR_MAP_DATA_ACPI,
37 INTR_MAP_DATA_FDT,
38};
39
40#ifdef DEV_ACPI
41struct intr_map_data_acpi {
42 u_int irq;
43 enum intr_polarity pol;
44 enum intr_trigger trig;
45};
46#endif
47#ifdef FDT
48struct intr_map_data_fdt {
49 u_int ncells;
50 pcell_t *cells;
51};
52#endif
53
54struct intr_map_data {
55 enum intr_map_data_type type;
56 union {
57#ifdef DEV_ACPI
58 struct intr_map_data_acpi acpi;
59#endif
60#ifdef FDT
61 struct intr_map_data_fdt fdt;
62#endif
63 };
64};
65
44#ifdef notyet
45#define INTR_SOLO INTR_MD1
46typedef int intr_irq_filter_t(void *arg, struct trapframe *tf);
47#else
48typedef int intr_irq_filter_t(void *arg);
49#endif
50
51#define INTR_ISRC_NAMELEN (MAXCOMLEN + 1)
52
66#ifdef notyet
67#define INTR_SOLO INTR_MD1
68typedef int intr_irq_filter_t(void *arg, struct trapframe *tf);
69#else
70typedef int intr_irq_filter_t(void *arg);
71#endif
72
73#define INTR_ISRC_NAMELEN (MAXCOMLEN + 1)
74
53enum intr_isrc_type {
54 INTR_ISRCT_NAMESPACE,
55 INTR_ISRCT_FDT
56};
57
58#define INTR_ISRCF_REGISTERED 0x01 /* registered in a controller */
59#define INTR_ISRCF_PERCPU 0x02 /* per CPU interrupt */
75#define INTR_ISRCF_IPI 0x01 /* IPI interrupt */
76#define INTR_ISRCF_PPI 0x02 /* PPI interrupt */
60#define INTR_ISRCF_BOUND 0x04 /* bound to a CPU */
61
62/* Interrupt source definition. */
63struct intr_irqsrc {
64 device_t isrc_dev; /* where isrc is mapped */
77#define INTR_ISRCF_BOUND 0x04 /* bound to a CPU */
78
79/* Interrupt source definition. */
80struct intr_irqsrc {
81 device_t isrc_dev; /* where isrc is mapped */
65 intptr_t isrc_xref; /* device reference key */
66 uintptr_t isrc_data; /* device data for isrc */
67 u_int isrc_irq; /* unique identificator */
82 u_int isrc_irq; /* unique identificator */
68 enum intr_isrc_type isrc_type; /* how is isrc decribed */
69 u_int isrc_flags;
70 char isrc_name[INTR_ISRC_NAMELEN];
83 u_int isrc_flags;
84 char isrc_name[INTR_ISRC_NAMELEN];
71 uint16_t isrc_nspc_type;
72 uint16_t isrc_nspc_num;
73 enum intr_trigger isrc_trig;
74 enum intr_polarity isrc_pol;
75 cpuset_t isrc_cpu; /* on which CPUs is enabled */
76 u_int isrc_index;
77 u_long * isrc_count;
78 u_int isrc_handlers;
79 struct intr_event * isrc_event;
80#ifdef INTR_SOLO
81 intr_irq_filter_t * isrc_filter;
82 void * isrc_arg;
83#endif
85 cpuset_t isrc_cpu; /* on which CPUs is enabled */
86 u_int isrc_index;
87 u_long * isrc_count;
88 u_int isrc_handlers;
89 struct intr_event * isrc_event;
90#ifdef INTR_SOLO
91 intr_irq_filter_t * isrc_filter;
92 void * isrc_arg;
93#endif
84#ifdef FDT
85 u_int isrc_ncells;
86 pcell_t isrc_cells[]; /* leave it last */
87#endif
88};
89
94};
95
90struct intr_irqsrc *intr_isrc_alloc(u_int type, u_int extsize);
91void intr_isrc_free(struct intr_irqsrc *isrc);
96/* Intr interface for PIC. */
97int intr_isrc_deregister(struct intr_irqsrc *);
98int intr_isrc_register(struct intr_irqsrc *, device_t, u_int, const char *, ...)
99 __printflike(4, 5);
92
100
93void intr_irq_set_name(struct intr_irqsrc *isrc, const char *fmt, ...)
94 __printflike(2, 3);
101int intr_isrc_dispatch(struct intr_irqsrc *, struct trapframe *);
102u_int intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask);
95
103
96void intr_irq_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf);
104int intr_pic_register(device_t, intptr_t);
105int intr_pic_deregister(device_t, intptr_t);
106int intr_pic_claim_root(device_t, intptr_t, intr_irq_filter_t *, void *, u_int);
97
107
98#define INTR_IRQ_NSPC_NONE 0
99#define INTR_IRQ_NSPC_PLAIN 1
100#define INTR_IRQ_NSPC_IRQ 2
101#define INTR_IRQ_NSPC_IPI 3
108extern device_t intr_irq_root_dev;
102
109
103u_int intr_namespace_map_irq(device_t dev, uint16_t type, uint16_t num);
104#ifdef FDT
105u_int intr_fdt_map_irq(phandle_t, pcell_t *, u_int);
106#endif
110/* Intr interface for BUS. */
111int intr_map_irq(device_t, intptr_t, struct intr_map_data *, u_int *);
107
112
108extern device_t intr_irq_root_dev;
113int intr_alloc_irq(device_t, struct resource *);
114int intr_release_irq(device_t, struct resource *);
109
115
110int intr_pic_register(device_t dev, intptr_t xref);
111int intr_pic_unregister(device_t dev, intptr_t xref);
112int intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
113 void *arg, u_int ipicount);
116int intr_setup_irq(device_t, struct resource *, driver_filter_t, driver_intr_t,
117 void *, int, void **);
118int intr_teardown_irq(device_t, struct resource *, void *);
114
119
115int intr_irq_add_handler(device_t dev, driver_filter_t, driver_intr_t, void *,
116 u_int, int, void **);
117int intr_irq_remove_handler(device_t dev, u_int, void *);
118int intr_irq_config(u_int, enum intr_trigger, enum intr_polarity);
119int intr_irq_describe(u_int, void *, const char *);
120int intr_describe_irq(device_t, struct resource *, void *, const char *);
120
121
121u_int intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask);
122#ifdef DEV_ACPI
123u_int intr_acpi_map_irq(device_t, u_int, enum intr_polarity,
124 enum intr_trigger);
125#endif
126#ifdef FDT
127u_int intr_fdt_map_irq(phandle_t, pcell_t *, u_int);
128#endif
122
123#ifdef SMP
129
130#ifdef SMP
124int intr_irq_bind(u_int, int);
131int intr_bind_irq(device_t, struct resource *, int);
125
126void intr_pic_init_secondary(void);
127
128/* Virtualization for interrupt source IPI counter increment. */
129static inline void
130intr_ipi_increment_count(u_long *counter, u_int cpu)
131{
132
133 KASSERT(cpu < MAXCPU, ("%s: too big cpu %u", __func__, cpu));
134 counter[cpu]++;
135}
136
137/* Virtualization for interrupt source IPI counters setup. */
138u_long * intr_ipi_setup_counters(const char *name);
139
140#endif
141#endif /* _SYS_INTR_H */
132
133void intr_pic_init_secondary(void);
134
135/* Virtualization for interrupt source IPI counter increment. */
136static inline void
137intr_ipi_increment_count(u_long *counter, u_int cpu)
138{
139
140 KASSERT(cpu < MAXCPU, ("%s: too big cpu %u", __func__, cpu));
141 counter[cpu]++;
142}
143
144/* Virtualization for interrupt source IPI counters setup. */
145u_long * intr_ipi_setup_counters(const char *name);
146
147#endif
148#endif /* _SYS_INTR_H */