psycho.c (107476) | psycho.c (107477) |
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1/* 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * All rights reserved. 4 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 14 unchanged lines hidden (view full) --- 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 30 * | 1/* 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * All rights reserved. 4 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 14 unchanged lines hidden (view full) --- 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 30 * |
31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 107476 2002-12-01 23:21:15Z tmm $ | 31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 107477 2002-12-01 23:30:26Z tmm $ |
32 */ 33 34/* 35 * Support for `psycho' and `psycho+' UPA to PCI bridge and 36 * UltraSPARC IIi and IIe `sabre' PCI controllers. 37 */ 38 39#include "opt_psycho.h" 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/bus.h> 44#include <sys/kernel.h> 45#include <sys/malloc.h> | 32 */ 33 34/* 35 * Support for `psycho' and `psycho+' UPA to PCI bridge and 36 * UltraSPARC IIi and IIe `sabre' PCI controllers. 37 */ 38 39#include "opt_psycho.h" 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/bus.h> 44#include <sys/kernel.h> 45#include <sys/malloc.h> |
46#include <sys/pcpu.h> |
|
46 47#include <ofw/openfirm.h> 48#include <ofw/ofw_pci.h> 49 50#include <machine/bus.h> 51#include <machine/iommureg.h> 52#include <machine/bus_common.h> 53#include <machine/frame.h> --- 517 unchanged lines hidden (view full) --- 571 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) { 572 mr = PSYCHO_READ8(sc, map); 573#ifdef PSYCHO_DEBUG 574 device_printf(dev, "intr map (pci) %d: %#lx\n", n, (u_long)mr); 575#endif 576 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 577 for (i = 0; i < 4; i++) 578 PCICTL_WRITE8(sc, clr + i * 8, 0); | 47 48#include <ofw/openfirm.h> 49#include <ofw/ofw_pci.h> 50 51#include <machine/bus.h> 52#include <machine/iommureg.h> 53#include <machine/bus_common.h> 54#include <machine/frame.h> --- 517 unchanged lines hidden (view full) --- 572 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) { 573 mr = PSYCHO_READ8(sc, map); 574#ifdef PSYCHO_DEBUG 575 device_printf(dev, "intr map (pci) %d: %#lx\n", n, (u_long)mr); 576#endif 577 PSYCHO_WRITE8(sc, map, mr & ~INTMAP_V); 578 for (i = 0; i < 4; i++) 579 PCICTL_WRITE8(sc, clr + i * 8, 0); |
579 PSYCHO_WRITE8(sc, map, mr | INTMAP_V); | 580 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); |
580 } 581 for (map = PSR_SCSI_INT_MAP, clr = PSR_SCSI_INT_CLR, n = 0; 582 map < PSR_FFB0_INT_MAP; map += 8, clr += 8, n++) { 583 mr = PSYCHO_READ8(sc, map); 584#ifdef PSYCHO_DEBUG 585 device_printf(dev, "intr map (obio) %d: %#lx, clr: %#lx\n", n, 586 (u_long)mr, (u_long)clr); 587#endif --- 9 unchanged lines hidden (view full) --- 597 INTVEC(mr) != 0) { 598 sclr = malloc(sizeof(*sclr), M_DEVBUF, M_WAITOK); 599 sclr->psc_sc = sc; 600 sclr->psc_clr = clr; 601 intr_setup(PIL_LOW, intr_fast, INTVEC(mr), 602 psycho_intr_stray, sclr); 603 } 604#endif | 581 } 582 for (map = PSR_SCSI_INT_MAP, clr = PSR_SCSI_INT_CLR, n = 0; 583 map < PSR_FFB0_INT_MAP; map += 8, clr += 8, n++) { 584 mr = PSYCHO_READ8(sc, map); 585#ifdef PSYCHO_DEBUG 586 device_printf(dev, "intr map (obio) %d: %#lx, clr: %#lx\n", n, 587 (u_long)mr, (u_long)clr); 588#endif --- 9 unchanged lines hidden (view full) --- 598 INTVEC(mr) != 0) { 599 sclr = malloc(sizeof(*sclr), M_DEVBUF, M_WAITOK); 600 sclr->psc_sc = sc; 601 sclr->psc_clr = clr; 602 intr_setup(PIL_LOW, intr_fast, INTVEC(mr), 603 psycho_intr_stray, sclr); 604 } 605#endif |
605 PSYCHO_WRITE8(sc, map, mr | INTMAP_V); | 606 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); |
606 } 607#endif 608 609 /* 610 * Get the bus range from the firmware; it is used solely for obtaining 611 * the inital bus number, and cannot be trusted on all machines. 612 */ 613 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br)); --- 38 unchanged lines hidden (view full) --- 652 mr = PSYCHO_READ8(sc, map); 653 vec = INTVEC(mr); 654 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 655 vec, vec, 1, RF_ACTIVE); 656 if (sc->sc_irq_res[index] == NULL) 657 panic("psycho_set_intr: failed to get interrupt"); 658 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags, 659 handler, sc, &sc->sc_ihand[index]); | 607 } 608#endif 609 610 /* 611 * Get the bus range from the firmware; it is used solely for obtaining 612 * the inital bus number, and cannot be trusted on all machines. 613 */ 614 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br)); --- 38 unchanged lines hidden (view full) --- 653 mr = PSYCHO_READ8(sc, map); 654 vec = INTVEC(mr); 655 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 656 vec, vec, 1, RF_ACTIVE); 657 if (sc->sc_irq_res[index] == NULL) 658 panic("psycho_set_intr: failed to get interrupt"); 659 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags, 660 handler, sc, &sc->sc_ihand[index]); |
660 PSYCHO_WRITE8(sc, map, mr | INTMAP_V); | 661 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); |
661} 662 663static int 664psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr, 665 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 666{ 667 bus_addr_t intrmap, intrclr; 668 u_int64_t im; --- 452 unchanged lines hidden (view full) --- 1121 *cookiep = pc; 1122 1123 /* 1124 * Clear the interrupt, it might have been triggered before it was 1125 * set up. 1126 */ 1127 PSYCHO_WRITE8(sc, intrclrptr, 0); 1128 /* | 662} 663 664static int 665psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr, 666 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 667{ 668 bus_addr_t intrmap, intrclr; 669 u_int64_t im; --- 452 unchanged lines hidden (view full) --- 1122 *cookiep = pc; 1123 1124 /* 1125 * Clear the interrupt, it might have been triggered before it was 1126 * set up. 1127 */ 1128 PSYCHO_WRITE8(sc, intrclrptr, 0); 1129 /* |
1129 * Enable the interrupt now we have the handler installed. 1130 * Read the current value as we can't change it besides the 1131 * valid bit so so make sure only this bit is changed. | 1130 * Enable the interrupt and program the target module now we have the 1131 * handler installed. |
1132 */ | 1132 */ |
1133 PSYCHO_WRITE8(sc, intrmapptr, mr | INTMAP_V); | 1133 PSYCHO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(mr, PCPU_GET(mid))); |
1134 return (error); 1135} 1136 1137static int 1138psycho_teardown_intr(device_t dev, device_t child, 1139 struct resource *vec, void *cookie) 1140{ 1141 struct psycho_clr *pc; --- 257 unchanged lines hidden --- | 1134 return (error); 1135} 1136 1137static int 1138psycho_teardown_intr(device_t dev, device_t child, 1139 struct resource *vec, void *cookie) 1140{ 1141 struct psycho_clr *pc; --- 257 unchanged lines hidden --- |