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intr_machdep.c (217072) intr_machdep.c (218075)
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without

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52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
55 * SUCH DAMAGE.
56 *
57 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
58 * form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20
59 *
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without

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52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
55 * SUCH DAMAGE.
56 *
57 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
58 * form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20
59 *
60 * $FreeBSD: head/sys/powerpc/powerpc/intr_machdep.c 217072 2011-01-06 21:08:06Z jhb $
60 * $FreeBSD: head/sys/powerpc/powerpc/intr_machdep.c 218075 2011-01-29 20:58:38Z marcel $
61 */
62
61 */
62
63#include "opt_isa.h"
64
63#include <sys/param.h>
64#include <sys/systm.h>
65#include <sys/kernel.h>
66#include <sys/queue.h>
67#include <sys/bus.h>
68#include <sys/interrupt.h>
69#include <sys/ktr.h>
70#include <sys/lock.h>

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97 u_int vector;
98 u_int cntindex;
99 cpumask_t cpu;
100 enum intr_trigger trig;
101 enum intr_polarity pol;
102};
103
104struct pic {
65#include <sys/param.h>
66#include <sys/systm.h>
67#include <sys/kernel.h>
68#include <sys/queue.h>
69#include <sys/bus.h>
70#include <sys/interrupt.h>
71#include <sys/ktr.h>
72#include <sys/lock.h>

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99 u_int vector;
100 u_int cntindex;
101 cpumask_t cpu;
102 enum intr_trigger trig;
103 enum intr_polarity pol;
104};
105
106struct pic {
105 device_t pic;
106 uint32_t pic_id;
107 int ipi_irq;
107 device_t dev;
108 uint32_t node;
109 u_int irqs;
110 u_int ipis;
111 int base;
108};
109
110static u_int intrcnt_index = 0;
111static struct mtx intr_table_lock;
112static struct powerpc_intr *powerpc_intrs[INTR_VECTORS];
113static struct pic piclist[MAX_PICS];
114static u_int nvectors; /* Allocated vectors */
115static u_int npics; /* PICs registered */
112};
113
114static u_int intrcnt_index = 0;
115static struct mtx intr_table_lock;
116static struct powerpc_intr *powerpc_intrs[INTR_VECTORS];
117static struct pic piclist[MAX_PICS];
118static u_int nvectors; /* Allocated vectors */
119static u_int npics; /* PICs registered */
120#ifdef DEV_ISA
121static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */
122#else
123static u_int nirqs = 0; /* Allocated IRQs. */
124#endif
116static u_int stray_count;
117
118device_t root_pic;
119
120#ifdef SMP
121static void *ipi_cookie;
122#endif
123

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137 int vector;
138
139 for (vector = 0; vector < nvectors; vector++) {
140 i = powerpc_intrs[vector];
141 if (i != NULL && i->pic == root_pic)
142 PIC_BIND(i->pic, i->intline, i->cpu);
143 }
144}
125static u_int stray_count;
126
127device_t root_pic;
128
129#ifdef SMP
130static void *ipi_cookie;
131#endif
132

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146 int vector;
147
148 for (vector = 0; vector < nvectors; vector++) {
149 i = powerpc_intrs[vector];
150 if (i != NULL && i->pic == root_pic)
151 PIC_BIND(i->pic, i->intline, i->cpu);
152 }
153}
145
146SYSINIT(smp_intr_init, SI_SUB_SMP, SI_ORDER_ANY, smp_intr_init, NULL);
147#endif
148
149static void
150intrcnt_setname(const char *name, int index)
151{
152
153 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",

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226 }
227
228 return (i);
229}
230
231static int
232powerpc_map_irq(struct powerpc_intr *i)
233{
154SYSINIT(smp_intr_init, SI_SUB_SMP, SI_ORDER_ANY, smp_intr_init, NULL);
155#endif
156
157static void
158intrcnt_setname(const char *name, int index)
159{
160
161 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",

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234 }
235
236 return (i);
237}
238
239static int
240powerpc_map_irq(struct powerpc_intr *i)
241{
242 struct pic *p;
243 u_int cnt;
244 int idx;
234
245
235 i->intline = INTR_INTLINE(i->irq);
236 i->pic = piclist[INTR_IGN(i->irq)].pic;
246 for (idx = 0; idx < npics; idx++) {
247 p = &piclist[idx];
248 cnt = p->irqs + p->ipis;
249 if (i->irq >= p->base && i->irq < p->base + cnt)
250 break;
251 }
252 if (idx == npics)
253 return (EINVAL);
237
254
255 i->intline = i->irq - p->base;
256 i->pic = p->dev;
257
238 /* Try a best guess if that failed */
239 if (i->pic == NULL)
240 i->pic = root_pic;
241
242 return (0);
243}
244
245static void

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283
284 return (0);
285#else
286 return (EOPNOTSUPP);
287#endif
288}
289
290void
258 /* Try a best guess if that failed */
259 if (i->pic == NULL)
260 i->pic = root_pic;
261
262 return (0);
263}
264
265static void

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303
304 return (0);
305#else
306 return (EOPNOTSUPP);
307#endif
308}
309
310void
291powerpc_register_pic(device_t dev, u_int ipi)
311powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis,
312 u_int atpic)
292{
313{
293 int i;
314 struct pic *p;
315 u_int irq;
316 int idx;
294
295 mtx_lock(&intr_table_lock);
296
317
318 mtx_lock(&intr_table_lock);
319
297 for (i = 0; i < npics; i++) {
298 if (piclist[i].pic_id == PIC_ID(dev))
320 /* XXX see powerpc_get_irq(). */
321 for (idx = 0; idx < npics; idx++) {
322 p = &piclist[idx];
323 if (p->node != node)
324 continue;
325 if (node != 0 || p->dev == dev)
299 break;
300 }
326 break;
327 }
301 piclist[i].pic = dev;
302 piclist[i].pic_id = PIC_ID(dev);
303 piclist[i].ipi_irq = ipi;
304 if (i == npics)
328 p = &piclist[idx];
329
330 p->dev = dev;
331 p->node = node;
332 p->irqs = irqs;
333 p->ipis = ipis;
334 if (idx == npics) {
335#ifdef DEV_ISA
336 p->base = (atpic) ? 0 : nirqs;
337#else
338 p->base = nirqs;
339#endif
340 irq = p->base + irqs + ipis;
341 nirqs = MAX(nirqs, irq);
305 npics++;
342 npics++;
343 }
306
307 mtx_unlock(&intr_table_lock);
308}
309
344
345 mtx_unlock(&intr_table_lock);
346}
347
310int
311powerpc_ign_lookup(uint32_t pic_id)
348u_int
349powerpc_get_irq(uint32_t node, u_int pin)
312{
350{
313 int i;
351 int idx;
314
352
315 mtx_lock(&intr_table_lock);
353 if (node == 0)
354 return (pin);
316
355
317 for (i = 0; i < npics; i++) {
318 if (piclist[i].pic_id == pic_id) {
356 mtx_lock(&intr_table_lock);
357 for (idx = 0; idx < npics; idx++) {
358 if (piclist[idx].node == node) {
319 mtx_unlock(&intr_table_lock);
359 mtx_unlock(&intr_table_lock);
320 return (i);
360 return (piclist[idx].base + pin);
321 }
322 }
361 }
362 }
323 piclist[i].pic = NULL;
324 piclist[i].pic_id = pic_id;
325 piclist[i].ipi_irq = 0;
363
364 /*
365 * XXX we should never encounter an unregistered PIC, but that
366 * can only be done when we properly support bus enumeration
367 * using multiple passes. Until then, fake an entry and give it
368 * some adhoc maximum number of IRQs and IPIs.
369 */
370 piclist[idx].dev = NULL;
371 piclist[idx].node = node;
372 piclist[idx].irqs = 124;
373 piclist[idx].ipis = 4;
374 piclist[idx].base = nirqs;
375 nirqs += 128;
326 npics++;
327
328 mtx_unlock(&intr_table_lock);
329
376 npics++;
377
378 mtx_unlock(&intr_table_lock);
379
330 return (i);
380 return (piclist[idx].base + pin);
331}
332
333int
334powerpc_enable_intr(void)
335{
336 struct powerpc_intr *i;
337 int error, vector;
338#ifdef SMP
339 int n;
340#endif
341
342 if (npics == 0)
343 panic("no PIC detected\n");
344
381}
382
383int
384powerpc_enable_intr(void)
385{
386 struct powerpc_intr *i;
387 int error, vector;
388#ifdef SMP
389 int n;
390#endif
391
392 if (npics == 0)
393 panic("no PIC detected\n");
394
395 if (root_pic == NULL)
396 root_pic = piclist[0].dev;
397
345#ifdef SMP
346 /* Install an IPI handler. */
398#ifdef SMP
399 /* Install an IPI handler. */
347
348 for (n = 0; n < npics; n++) {
400 for (n = 0; n < npics; n++) {
349 if (piclist[n].pic != root_pic)
401 if (piclist[n].dev != root_pic)
350 continue;
351
402 continue;
403
404 KASSERT(piclist[n].ipis != 0, ("%s", __func__));
352 error = powerpc_setup_intr("IPI",
405 error = powerpc_setup_intr("IPI",
353 INTR_VEC(piclist[n].pic_id, piclist[n].ipi_irq),
406 INTR_VEC(piclist[n].node, piclist[n].irqs),
354 powerpc_ipi_handler, NULL, NULL,
355 INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie);
356 if (error) {
357 printf("unable to setup IPI handler\n");
358 return (error);
359 }
360 }
361#endif

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368 error = powerpc_map_irq(i);
369 if (error)
370 continue;
371
372 if (i->trig != INTR_TRIGGER_CONFORM ||
373 i->pol != INTR_POLARITY_CONFORM)
374 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
375
407 powerpc_ipi_handler, NULL, NULL,
408 INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie);
409 if (error) {
410 printf("unable to setup IPI handler\n");
411 return (error);
412 }
413 }
414#endif

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421 error = powerpc_map_irq(i);
422 if (error)
423 continue;
424
425 if (i->trig != INTR_TRIGGER_CONFORM ||
426 i->pol != INTR_POLARITY_CONFORM)
427 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
428
429 if (i != NULL && i->pic == root_pic)
430 PIC_BIND(i->pic, i->intline, i->cpu);
431
376 if (i->event != NULL)
377 PIC_ENABLE(i->pic, i->intline, vector);
378 }
379
380 return (0);
381}
382
383int

--- 114 unchanged lines hidden --- 		432 if (i->event != NULL)
433 PIC_ENABLE(i->pic, i->intline, vector);
434 }
435
436 return (0);
437}
438
439int

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