Deleted Added
sdiff udiff text old ( 236141 ) new ( 247454 )
full compact
cpu.c (236141) cpu.c (247454)
1/*-
2 * Copyright (c) 2001 Matt Thomas.
3 * Copyright (c) 2001 Tsubai Masanari.
4 * Copyright (c) 1998, 1999, 2001 Internet Research Institute, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 41 unchanged lines hidden (view full) ---

50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
51 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
52 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
53 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
54 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
55 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 *
57 * from $NetBSD: cpu_subr.c,v 1.1 2003/02/03 17:10:09 matt Exp $
1/*-
2 * Copyright (c) 2001 Matt Thomas.
3 * Copyright (c) 2001 Tsubai Masanari.
4 * Copyright (c) 1998, 1999, 2001 Internet Research Institute, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

--- 41 unchanged lines hidden (view full) ---

50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
51 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
52 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
53 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
54 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
55 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 *
57 * from $NetBSD: cpu_subr.c,v 1.1 2003/02/03 17:10:09 matt Exp $
58 * $FreeBSD: head/sys/powerpc/powerpc/cpu.c 236141 2012-05-27 10:25:20Z raj $
58 * $FreeBSD: head/sys/powerpc/powerpc/cpu.c 247454 2013-02-28 10:46:54Z davide $
59 */
60
61#include <sys/param.h>
62#include <sys/systm.h>
63#include <sys/bus.h>
64#include <sys/conf.h>
65#include <sys/cpu.h>
66#include <sys/kernel.h>

--- 7 unchanged lines hidden (view full) ---

74#include <machine/smp.h>
75#include <machine/spr.h>
76
77static void cpu_6xx_setup(int cpuid, uint16_t vers);
78static void cpu_970_setup(int cpuid, uint16_t vers);
79static void cpu_booke_setup(int cpuid, uint16_t vers);
80
81int powerpc_pow_enabled;
59 */
60
61#include <sys/param.h>
62#include <sys/systm.h>
63#include <sys/bus.h>
64#include <sys/conf.h>
65#include <sys/cpu.h>
66#include <sys/kernel.h>

--- 7 unchanged lines hidden (view full) ---

74#include <machine/smp.h>
75#include <machine/spr.h>
76
77static void cpu_6xx_setup(int cpuid, uint16_t vers);
78static void cpu_970_setup(int cpuid, uint16_t vers);
79static void cpu_booke_setup(int cpuid, uint16_t vers);
80
81int powerpc_pow_enabled;
82void (*cpu_idle_hook)(void) = NULL;
83static void cpu_idle_60x(void);
84static void cpu_idle_booke(void);
82void (*cpu_idle_hook)(sbintime_t) = NULL;
83static void cpu_idle_60x(sbintime_t);
84static void cpu_idle_booke(sbintime_t);
85
86struct cputab {
87 const char *name;
88 uint16_t version;
89 uint16_t revfmt;
90 int features; /* Do not include PPC_FEATURE_32 or
91 * PPC_FEATURE_HAS_MMU */
92 void (*cpu_setup)(int cpuid, uint16_t vers);

--- 418 unchanged lines hidden (view full) ---

511 result = (cpu_features & arg2) ? 1 : 0;
512
513 return (sysctl_handle_int(oidp, &result, 0, req));
514}
515
516void
517cpu_idle(int busy)
518{
85
86struct cputab {
87 const char *name;
88 uint16_t version;
89 uint16_t revfmt;
90 int features; /* Do not include PPC_FEATURE_32 or
91 * PPC_FEATURE_HAS_MMU */
92 void (*cpu_setup)(int cpuid, uint16_t vers);

--- 418 unchanged lines hidden (view full) ---

511 result = (cpu_features & arg2) ? 1 : 0;
512
513 return (sysctl_handle_int(oidp, &result, 0, req));
514}
515
516void
517cpu_idle(int busy)
518{
519 sbintime_t sbt = -1;
519
520#ifdef INVARIANTS
521 if ((mfmsr() & PSL_EE) != PSL_EE) {
522 struct thread *td = curthread;
523 printf("td msr %#lx\n", (u_long)td->td_md.md_saved_msr);
524 panic("ints disabled in idleproc!");
525 }
526#endif
527
528 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
529 busy, curcpu);
530
531 if (cpu_idle_hook != NULL) {
532 if (!busy) {
533 critical_enter();
520
521#ifdef INVARIANTS
522 if ((mfmsr() & PSL_EE) != PSL_EE) {
523 struct thread *td = curthread;
524 printf("td msr %#lx\n", (u_long)td->td_md.md_saved_msr);
525 panic("ints disabled in idleproc!");
526 }
527#endif
528
529 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
530 busy, curcpu);
531
532 if (cpu_idle_hook != NULL) {
533 if (!busy) {
534 critical_enter();
534 cpu_idleclock();
535 sbt = cpu_idleclock();
535 }
536 }
536 cpu_idle_hook();
537 cpu_idle_hook(sbt);
537 if (!busy) {
538 cpu_activeclock();
539 critical_exit();
540 }
541 }
542
543 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
544 busy, curcpu);
545}
546
547int
548cpu_idle_wakeup(int cpu)
549{
550 return (0);
551}
552
553static void
538 if (!busy) {
539 cpu_activeclock();
540 critical_exit();
541 }
542 }
543
544 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
545 busy, curcpu);
546}
547
548int
549cpu_idle_wakeup(int cpu)
550{
551 return (0);
552}
553
554static void
554cpu_idle_60x(void)
555cpu_idle_60x(sbintime_t sbt)
555{
556 register_t msr;
557 uint16_t vers;
558
559 if (!powerpc_pow_enabled)
560 return;
561
562 msr = mfmsr();

--- 18 unchanged lines hidden (view full) ---

581 mtmsr(msr | PSL_POW);
582 isync();
583 break;
584 }
585#endif
586}
587
588static void
556{
557 register_t msr;
558 uint16_t vers;
559
560 if (!powerpc_pow_enabled)
561 return;
562
563 msr = mfmsr();

--- 18 unchanged lines hidden (view full) ---

582 mtmsr(msr | PSL_POW);
583 isync();
584 break;
585 }
586#endif
587}
588
589static void
589cpu_idle_booke(void)
590cpu_idle_booke(sbintime_t sbt)
590{
591 register_t msr;
592
593 msr = mfmsr();
594
595#ifdef E500
596 /* Freescale E500 core RM section 6.4.1. */
597 __asm __volatile("msync; mtmsr %0; isync" ::
598 "r" (msr | PSL_WE));
599#endif
600}
601
591{
592 register_t msr;
593
594 msr = mfmsr();
595
596#ifdef E500
597 /* Freescale E500 core RM section 6.4.1. */
598 __asm __volatile("msync; mtmsr %0; isync" ::
599 "r" (msr | PSL_WE));
600#endif
601}
602