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pci_mpc85xx.c (209908) pci_mpc85xx.c (218075)
1/*-
2 * Copyright 2006-2007 by Juniper Networks.
3 * Copyright 2008 Semihalf.
4 * Copyright 2010 The FreeBSD Foundation
5 * All rights reserved.
6 *
7 * Portions of this software were developed by Semihalf
8 * under sponsorship from the FreeBSD Foundation.

--- 20 unchanged lines hidden (view full) ---

29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * From: FreeBSD: src/sys/powerpc/mpc85xx/pci_ocp.c,v 1.9 2010/03/23 23:46:28 marcel
34 */
35
36#include <sys/cdefs.h>
1/*-
2 * Copyright 2006-2007 by Juniper Networks.
3 * Copyright 2008 Semihalf.
4 * Copyright 2010 The FreeBSD Foundation
5 * All rights reserved.
6 *
7 * Portions of this software were developed by Semihalf
8 * under sponsorship from the FreeBSD Foundation.

--- 20 unchanged lines hidden (view full) ---

29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * From: FreeBSD: src/sys/powerpc/mpc85xx/pci_ocp.c,v 1.9 2010/03/23 23:46:28 marcel
34 */
35
36#include <sys/cdefs.h>
37__FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/pci_fdt.c 209908 2010-07-11 21:08:29Z raj $");
37__FBSDID("$FreeBSD: head/sys/powerpc/mpc85xx/pci_fdt.c 218075 2011-01-29 20:58:38Z marcel $");
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/ktr.h>
42#include <sys/sockio.h>
43#include <sys/mbuf.h>
44#include <sys/malloc.h>
45#include <sys/kernel.h>

--- 85 unchanged lines hidden (view full) ---

131static uint32_t fsl_pcib_cfgread(struct fsl_pcib_softc *, u_int, u_int, u_int,
132 u_int, int);
133static void fsl_pcib_cfgwrite(struct fsl_pcib_softc *, u_int, u_int, u_int,
134 u_int, uint32_t, int);
135static int fsl_pcib_decode_win(phandle_t, struct fsl_pcib_softc *);
136static void fsl_pcib_err_init(device_t);
137static void fsl_pcib_inbound(struct fsl_pcib_softc *, int, int, u_long,
138 u_long, u_long);
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/ktr.h>
42#include <sys/sockio.h>
43#include <sys/mbuf.h>
44#include <sys/malloc.h>
45#include <sys/kernel.h>

--- 85 unchanged lines hidden (view full) ---

131static uint32_t fsl_pcib_cfgread(struct fsl_pcib_softc *, u_int, u_int, u_int,
132 u_int, int);
133static void fsl_pcib_cfgwrite(struct fsl_pcib_softc *, u_int, u_int, u_int,
134 u_int, uint32_t, int);
135static int fsl_pcib_decode_win(phandle_t, struct fsl_pcib_softc *);
136static void fsl_pcib_err_init(device_t);
137static void fsl_pcib_inbound(struct fsl_pcib_softc *, int, int, u_long,
138 u_long, u_long);
139static int fsl_pcib_init(struct fsl_pcib_softc *, int, int, int);
139static int fsl_pcib_init(struct fsl_pcib_softc *, int, int);
140static int fsl_pcib_intr_info(phandle_t, struct fsl_pcib_softc *);
141static int fsl_pcib_set_range(struct fsl_pcib_softc *, int, int, u_long,
142 u_long);
143static void fsl_pcib_outbound(struct fsl_pcib_softc *, int, int, u_long,
144 u_long, u_long);
145
146/* Forward declerations. */
147static int fsl_pcib_attach(device_t);

--- 7 unchanged lines hidden (view full) ---

155 struct resource *);
156static int fsl_pcib_write_ivar(device_t, device_t, int, uintptr_t);
157
158static int fsl_pcib_maxslots(device_t);
159static uint32_t fsl_pcib_read_config(device_t, u_int, u_int, u_int, u_int, int);
160static void fsl_pcib_write_config(device_t, u_int, u_int, u_int, u_int,
161 uint32_t, int);
162
140static int fsl_pcib_intr_info(phandle_t, struct fsl_pcib_softc *);
141static int fsl_pcib_set_range(struct fsl_pcib_softc *, int, int, u_long,
142 u_long);
143static void fsl_pcib_outbound(struct fsl_pcib_softc *, int, int, u_long,
144 u_long, u_long);
145
146/* Forward declerations. */
147static int fsl_pcib_attach(device_t);

--- 7 unchanged lines hidden (view full) ---

155 struct resource *);
156static int fsl_pcib_write_ivar(device_t, device_t, int, uintptr_t);
157
158static int fsl_pcib_maxslots(device_t);
159static uint32_t fsl_pcib_read_config(device_t, u_int, u_int, u_int, u_int, int);
160static void fsl_pcib_write_config(device_t, u_int, u_int, u_int, u_int,
161 uint32_t, int);
162
163static int next_busnr = 0;
164
165/* Configuration r/w mutex. */
166struct mtx pcicfg_mtx;
167static int mtx_initialized = 0;
168
169/*
170 * Bus interface definitions.
171 */
172static device_method_t fsl_pcib_methods[] = {

--- 37 unchanged lines hidden (view full) ---

210
211devclass_t pcib_devclass;
212
213DRIVER_MODULE(pcib, fdtbus, fsl_pcib_driver, pcib_devclass, 0, 0);
214
215static int
216fsl_pcib_probe(device_t dev)
217{
163/* Configuration r/w mutex. */
164struct mtx pcicfg_mtx;
165static int mtx_initialized = 0;
166
167/*
168 * Bus interface definitions.
169 */
170static device_method_t fsl_pcib_methods[] = {

--- 37 unchanged lines hidden (view full) ---

208
209devclass_t pcib_devclass;
210
211DRIVER_MODULE(pcib, fdtbus, fsl_pcib_driver, pcib_devclass, 0, 0);
212
213static int
214fsl_pcib_probe(device_t dev)
215{
218 phandle_t parnode;
216 phandle_t node;
219
217
220 /*
221 * The PCI subnode does not have the 'compatible' property, so we need
222 * to check in the parent PCI node. However the parent is not
223 * represented by a separate ofw_bus child, and therefore
224 * ofw_bus_is_compatible() cannot be used, but direct fdt equivalent.
225 */
226 parnode = OF_parent(ofw_bus_get_node(dev));
227 if (parnode == 0)
218 node = ofw_bus_get_node(dev);
219 if (!fdt_is_type(node, "pci"))
228 return (ENXIO);
220 return (ENXIO);
229 if (!(fdt_is_compatible(parnode, "fsl,mpc8548-pcie") ||
230 fdt_is_compatible(parnode, "fsl,mpc8548-pcie")))
221
222 if (!(fdt_is_compatible(node, "fsl,mpc8540-pci") ||
223 fdt_is_compatible(node, "fsl,mpc8548-pcie")))
231 return (ENXIO);
232
233 device_set_desc(dev, "Freescale Integrated PCI/PCI-E Controller");
224 return (ENXIO);
225
226 device_set_desc(dev, "Freescale Integrated PCI/PCI-E Controller");
234
235 return (BUS_PROBE_DEFAULT);
236}
237
238static int
239fsl_pcib_attach(device_t dev)
240{
241 struct fsl_pcib_softc *sc;
242 phandle_t node;
243 uint32_t cfgreg;
227 return (BUS_PROBE_DEFAULT);
228}
229
230static int
231fsl_pcib_attach(device_t dev)
232{
233 struct fsl_pcib_softc *sc;
234 phandle_t node;
235 uint32_t cfgreg;
244 int maxslot, subbus;
236 int maxslot;
245 uint8_t ltssm, capptr;
246
247 sc = device_get_softc(dev);
248 sc->sc_dev = dev;
249
250 sc->sc_rid = 0;
251 sc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid,
252 RF_ACTIVE);

--- 46 unchanged lines hidden (view full) ---

299 cfgreg = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_COMMAND, 2);
300 cfgreg |= PCIM_CMD_SERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN |
301 PCIM_CMD_PORTEN;
302 fsl_pcib_cfgwrite(sc, 0, 0, 0, PCIR_COMMAND, cfgreg, 2);
303
304 sc->sc_devfn_tundra = -1;
305 sc->sc_devfn_via_ide = -1;
306
237 uint8_t ltssm, capptr;
238
239 sc = device_get_softc(dev);
240 sc->sc_dev = dev;
241
242 sc->sc_rid = 0;
243 sc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid,
244 RF_ACTIVE);

--- 46 unchanged lines hidden (view full) ---

291 cfgreg = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_COMMAND, 2);
292 cfgreg |= PCIM_CMD_SERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN |
293 PCIM_CMD_PORTEN;
294 fsl_pcib_cfgwrite(sc, 0, 0, 0, PCIR_COMMAND, cfgreg, 2);
295
296 sc->sc_devfn_tundra = -1;
297 sc->sc_devfn_via_ide = -1;
298
307 maxslot = (sc->sc_pcie) ? 1 : 31;
308
309 /*
299
300 /*
310 * Scan bus using firmware configured, 0 based bus numbering,
311 * let fsl_pcib_init() shift bus number by next_busnr offset.
301 * Scan bus using firmware configured, 0 based bus numbering.
312 */
302 */
313 sc->sc_busnr = 1;
314 subbus = fsl_pcib_init(sc, 0, next_busnr, maxslot);
303 sc->sc_busnr = 0;
304 maxslot = (sc->sc_pcie) ? 0 : PCI_SLOTMAX;
305 fsl_pcib_init(sc, sc->sc_busnr, maxslot);
315
306
316 if (bootverbose)
317 printf("PCI: domain %d, busnr = %d, next_busnr = %d\n",
318 device_get_unit(dev), next_busnr + 1,
319 next_busnr + subbus + 1);
320
321 /* Set final busnr */
322 sc->sc_busnr = next_busnr + 1;
323 next_busnr += subbus + 1;
324
325 if (sc->sc_pcie) {
326 ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1);
327 if (ltssm < LTSSM_STAT_L0) {
328 if (bootverbose)
329 printf("PCI %d: no PCIE link, skipping\n",
330 device_get_unit(dev));
331 return (0);
332 }

--- 117 unchanged lines hidden (view full) ---

450}
451#endif
452
453static int
454fsl_pcib_maxslots(device_t dev)
455{
456 struct fsl_pcib_softc *sc = device_get_softc(dev);
457
307 if (sc->sc_pcie) {
308 ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1);
309 if (ltssm < LTSSM_STAT_L0) {
310 if (bootverbose)
311 printf("PCI %d: no PCIE link, skipping\n",
312 device_get_unit(dev));
313 return (0);
314 }

--- 117 unchanged lines hidden (view full) ---

432}
433#endif
434
435static int
436fsl_pcib_maxslots(device_t dev)
437{
438 struct fsl_pcib_softc *sc = device_get_softc(dev);
439
458 return ((sc->sc_pcie) ? 1 : 31);
440 return ((sc->sc_pcie) ? 0 : PCI_SLOTMAX);
459}
460
461static uint32_t
462fsl_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
463 u_int reg, int bytes)
464{
465 struct fsl_pcib_softc *sc = device_get_softc(dev);
466 u_int devfn;

--- 100 unchanged lines hidden (view full) ---

567{
568 int err, unit;
569 u_int devfn, intline;
570
571 unit = device_get_unit(sc->sc_dev);
572
573 devfn = DEVFN(bus, slot, func);
574 if (devfn == sc->sc_devfn_via_ide)
441}
442
443static uint32_t
444fsl_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
445 u_int reg, int bytes)
446{
447 struct fsl_pcib_softc *sc = device_get_softc(dev);
448 u_int devfn;

--- 100 unchanged lines hidden (view full) ---

549{
550 int err, unit;
551 u_int devfn, intline;
552
553 unit = device_get_unit(sc->sc_dev);
554
555 devfn = DEVFN(bus, slot, func);
556 if (devfn == sc->sc_devfn_via_ide)
575#if 0
576 intline = INTR_VEC(ATPIC_ID, 14);
557 intline = INTR_VEC(0, 14);
577 else if (devfn == sc->sc_devfn_via_ide + 1)
558 else if (devfn == sc->sc_devfn_via_ide + 1)
578 intline = INTR_VEC(ATPIC_ID, 10);
559 intline = INTR_VEC(0, 10);
579 else if (devfn == sc->sc_devfn_via_ide + 2)
560 else if (devfn == sc->sc_devfn_via_ide + 2)
580 intline = INTR_VEC(ATPIC_ID, 10);
581#endif
582 ;
561 intline = INTR_VEC(0, 10);
583 else {
584 if (intpin != 0)
585 err = fdt_pci_route_intr(bus, slot, func, intpin,
586 &sc->sc_intr_info, &intline);
587 else
588 intline = 0xff;
589 }
590
591 if (bootverbose)
592 printf("PCI %u:%u:%u:%u: intpin %u: intline=%u\n",
593 unit, bus, slot, func, intpin, intline);
594
595 return (intline);
596}
597
598static int
562 else {
563 if (intpin != 0)
564 err = fdt_pci_route_intr(bus, slot, func, intpin,
565 &sc->sc_intr_info, &intline);
566 else
567 intline = 0xff;
568 }
569
570 if (bootverbose)
571 printf("PCI %u:%u:%u:%u: intpin %u: intline=%u\n",
572 unit, bus, slot, func, intpin, intline);
573
574 return (intline);
575}
576
577static int
599fsl_pcib_init(struct fsl_pcib_softc *sc, int bus, int busnr_offset,
600 int maxslot)
578fsl_pcib_init(struct fsl_pcib_softc *sc, int bus, int maxslot)
601{
579{
602 int secbus, subbus;
580 int secbus;
603 int old_pribus, old_secbus, old_subbus;
604 int new_pribus, new_secbus, new_subbus;
605 int slot, func, maxfunc;
606 int bar, maxbar;
607 uint16_t vendor, device;
608 uint8_t command, hdrtype, class, subclass;
609 uint8_t intline, intpin;
610
581 int old_pribus, old_secbus, old_subbus;
582 int new_pribus, new_secbus, new_subbus;
583 int slot, func, maxfunc;
584 int bar, maxbar;
585 uint16_t vendor, device;
586 uint8_t command, hdrtype, class, subclass;
587 uint8_t intline, intpin;
588
611 subbus = bus;
589 secbus = bus;
612 for (slot = 0; slot <= maxslot; slot++) {
613 maxfunc = 0;
614 for (func = 0; func <= maxfunc; func++) {
590 for (slot = 0; slot <= maxslot; slot++) {
591 maxfunc = 0;
592 for (func = 0; func <= maxfunc; func++) {
615
616 hdrtype = fsl_pcib_read_config(sc->sc_dev, bus, slot,
617 func, PCIR_HDRTYPE, 1);
618
619 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
620 continue;
621
622 if (func == 0 && (hdrtype & PCIM_MFDEV))
623 maxfunc = PCI_FUNCMAX;

--- 38 unchanged lines hidden (view full) ---

662
663 /*
664 * Handle PCI-PCI bridges
665 */
666 class = fsl_pcib_read_config(sc->sc_dev, bus, slot,
667 func, PCIR_CLASS, 1);
668 subclass = fsl_pcib_read_config(sc->sc_dev, bus, slot,
669 func, PCIR_SUBCLASS, 1);
593 hdrtype = fsl_pcib_read_config(sc->sc_dev, bus, slot,
594 func, PCIR_HDRTYPE, 1);
595
596 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
597 continue;
598
599 if (func == 0 && (hdrtype & PCIM_MFDEV))
600 maxfunc = PCI_FUNCMAX;

--- 38 unchanged lines hidden (view full) ---

639
640 /*
641 * Handle PCI-PCI bridges
642 */
643 class = fsl_pcib_read_config(sc->sc_dev, bus, slot,
644 func, PCIR_CLASS, 1);
645 subclass = fsl_pcib_read_config(sc->sc_dev, bus, slot,
646 func, PCIR_SUBCLASS, 1);
670#if 0
647
671 /* Allow only proper PCI-PCI briges */
672 if (class != PCIC_BRIDGE)
673 continue;
674 if (subclass != PCIS_BRIDGE_PCI)
675 continue;
648 /* Allow only proper PCI-PCI briges */
649 if (class != PCIC_BRIDGE)
650 continue;
651 if (subclass != PCIS_BRIDGE_PCI)
652 continue;
676#endif
677 /* Allow all DEVTYPE 1 devices */
678 if (hdrtype != PCIM_HDRTYPE_BRIDGE)
679 continue;
680
653
681 subbus++;
682 secbus = subbus;
654 secbus++;
683
684 /* Program I/O decoder. */
685 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
686 PCIR_IOBASEL_1, sc->sc_ioport.rm_start >> 8, 1);
687 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
688 PCIR_IOLIMITL_1, sc->sc_ioport.rm_end >> 8, 1);
689 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
690 PCIR_IOBASEH_1, sc->sc_ioport.rm_start >> 16, 2);

--- 22 unchanged lines hidden (view full) ---

713 old_secbus = fsl_pcib_read_config(sc->sc_dev, bus,
714 slot, func, PCIR_SECBUS_1, 1);
715 old_subbus = fsl_pcib_read_config(sc->sc_dev, bus,
716 slot, func, PCIR_SUBBUS_1, 1);
717
718 if (bootverbose)
719 printf("PCI: reading firmware bus numbers for "
720 "secbus = %d (bus/sec/sub) = (%d/%d/%d)\n",
655
656 /* Program I/O decoder. */
657 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
658 PCIR_IOBASEL_1, sc->sc_ioport.rm_start >> 8, 1);
659 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
660 PCIR_IOLIMITL_1, sc->sc_ioport.rm_end >> 8, 1);
661 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
662 PCIR_IOBASEH_1, sc->sc_ioport.rm_start >> 16, 2);

--- 22 unchanged lines hidden (view full) ---

685 old_secbus = fsl_pcib_read_config(sc->sc_dev, bus,
686 slot, func, PCIR_SECBUS_1, 1);
687 old_subbus = fsl_pcib_read_config(sc->sc_dev, bus,
688 slot, func, PCIR_SUBBUS_1, 1);
689
690 if (bootverbose)
691 printf("PCI: reading firmware bus numbers for "
692 "secbus = %d (bus/sec/sub) = (%d/%d/%d)\n",
721 secbus + busnr_offset, old_pribus,
722 old_secbus, old_subbus);
693 secbus, old_pribus, old_secbus, old_subbus);
723
694
724 /* Skip unconfigured devices */
725 if ((old_pribus == 0) &&
726 (old_secbus == 0) && (old_subbus == 0))
727 continue;
695 new_pribus = bus;
696 new_secbus = secbus;
728
697
729 subbus += fsl_pcib_init(sc, secbus, busnr_offset,
730 (subclass == PCIS_BRIDGE_PCI) ? 31 : 1);
698 secbus = fsl_pcib_init(sc, secbus,
699 (subclass == PCIS_BRIDGE_PCI) ? PCI_SLOTMAX : 0);
731
700
732 new_pribus = bus + busnr_offset;
733 new_secbus = secbus + busnr_offset;
734 new_subbus = subbus + busnr_offset;
701 new_subbus = secbus;
735
702
736 /* Fixup pribus for MPC8572 PCIE controller */
737 if ((vendor == 0x1957) && ((device = 0x0040) ||
738 (device == 0x0041)))
739 new_pribus = 0;
740
741 if (bootverbose)
703 if (bootverbose)
742 printf("PCI: translate firmware bus numbers for "
743 "secbus %d (%d/%d/%d) -> (%d/%d/%d)\n",
744 secbus + busnr_offset,
745 old_pribus, old_secbus, old_subbus,
704 printf("PCI: translate firmware bus numbers "
705 "for secbus %d (%d/%d/%d) -> (%d/%d/%d)\n",
706 secbus, old_pribus, old_secbus, old_subbus,
746 new_pribus, new_secbus, new_subbus);
747
748 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
749 PCIR_PRIBUS_1, new_pribus, 1);
750 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
751 PCIR_SECBUS_1, new_secbus, 1);
752 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
753 PCIR_SUBBUS_1, new_subbus, 1);
754 }
755 }
756
707 new_pribus, new_secbus, new_subbus);
708
709 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
710 PCIR_PRIBUS_1, new_pribus, 1);
711 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
712 PCIR_SECBUS_1, new_secbus, 1);
713 fsl_pcib_write_config(sc->sc_dev, bus, slot, func,
714 PCIR_SUBBUS_1, new_subbus, 1);
715 }
716 }
717
757 if (bootverbose)
758 printf("PCI: bus %d, #subbus = %d\n",
759 bus + busnr_offset, subbus - bus);
760
761 return (subbus - bus);
718 return (secbus);
762}
763
764static void
765fsl_pcib_inbound(struct fsl_pcib_softc *sc, int wnd, int tgt, u_long start,
766 u_long size, u_long pci_start)
767{
768 uint32_t attr, bar, tar;
769

--- 163 unchanged lines hidden (view full) ---

933 rm = &sc->sc_ioport;
934 va = sc->sc_ioport_va;
935 break;
936 case SYS_RES_MEMORY:
937 rm = &sc->sc_iomem;
938 va = sc->sc_iomem_va;
939 break;
940 case SYS_RES_IRQ:
719}
720
721static void
722fsl_pcib_inbound(struct fsl_pcib_softc *sc, int wnd, int tgt, u_long start,
723 u_long size, u_long pci_start)
724{
725 uint32_t attr, bar, tar;
726

--- 163 unchanged lines hidden (view full) ---

890 rm = &sc->sc_ioport;
891 va = sc->sc_ioport_va;
892 break;
893 case SYS_RES_MEMORY:
894 rm = &sc->sc_iomem;
895 va = sc->sc_iomem_va;
896 break;
897 case SYS_RES_IRQ:
941#if 0
942 if (INTR_IGN(start) == powerpc_ign_lookup(ATPIC_ID)) {
898 if (start < 16) {
943 device_printf(dev, "%s requested ISA interrupt %lu\n",
944 device_get_nameunit(child), start);
945 }
899 device_printf(dev, "%s requested ISA interrupt %lu\n",
900 device_get_nameunit(child), start);
901 }
946#endif
947 flags |= RF_SHAREABLE;
948 return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
949 type, rid, start, end, count, flags));
950 default:
951 return (NULL);
952 }
953
954 res = rman_reserve_resource(rm, start, end, count, flags, child);

--- 113 unchanged lines hidden --- 		902 flags |= RF_SHAREABLE;
903 return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
904 type, rid, start, end, count, flags));
905 default:
906 return (NULL);
907 }
908
909 res = rman_reserve_resource(rm, start, end, count, flags, child);

--- 113 unchanged lines hidden ---