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cm_msgs.h (219820) cm_msgs.h (278886)
1/*
1/*
2 * Copyright (c) 2004 Intel Corporation. All rights reserved.
2 * Copyright (c) 2004, 2011 Intel Corporation. All rights reserved.
3 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
4 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING the madirectory of this source tree, or the
10 * OpenIB.org BSD license below:

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39
40/*
41 * Parameters to routines below should be in network-byte order, and values
42 * are returned in network-byte order.
43 */
44
45#define IB_CM_CLASS_VERSION 2 /* IB specification 1.2 */
46
3 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
4 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING the madirectory of this source tree, or the
10 * OpenIB.org BSD license below:

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39
40/*
41 * Parameters to routines below should be in network-byte order, and values
42 * are returned in network-byte order.
43 */
44
45#define IB_CM_CLASS_VERSION 2 /* IB specification 1.2 */
46
47#define CM_REQ_ATTR_ID cpu_to_be16(0x0010)
48#define CM_MRA_ATTR_ID cpu_to_be16(0x0011)
49#define CM_REJ_ATTR_ID cpu_to_be16(0x0012)
50#define CM_REP_ATTR_ID cpu_to_be16(0x0013)
51#define CM_RTU_ATTR_ID cpu_to_be16(0x0014)
52#define CM_DREQ_ATTR_ID cpu_to_be16(0x0015)
53#define CM_DREP_ATTR_ID cpu_to_be16(0x0016)
54#define CM_SIDR_REQ_ATTR_ID cpu_to_be16(0x0017)
55#define CM_SIDR_REP_ATTR_ID cpu_to_be16(0x0018)
56#define CM_LAP_ATTR_ID cpu_to_be16(0x0019)
57#define CM_APR_ATTR_ID cpu_to_be16(0x001A)
58
59enum cm_msg_sequence {
60 CM_MSG_SEQUENCE_REQ,
61 CM_MSG_SEQUENCE_LAP,
62 CM_MSG_SEQUENCE_DREQ,
63 CM_MSG_SEQUENCE_SIDR
64};
65
66struct cm_req_msg {

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81 * transport service type:2, end-to-end flow control:1
82 */
83 __be32 offset40;
84 /* starting PSN:24, local CM response timeout:5, retry count:3 */
85 __be32 offset44;
86 __be16 pkey;
87 /* path MTU:4, RDC exists:1, RNR retry count:3. */
88 u8 offset50;
47enum cm_msg_sequence {
48 CM_MSG_SEQUENCE_REQ,
49 CM_MSG_SEQUENCE_LAP,
50 CM_MSG_SEQUENCE_DREQ,
51 CM_MSG_SEQUENCE_SIDR
52};
53
54struct cm_req_msg {

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69 * transport service type:2, end-to-end flow control:1
70 */
71 __be32 offset40;
72 /* starting PSN:24, local CM response timeout:5, retry count:3 */
73 __be32 offset44;
74 __be16 pkey;
75 /* path MTU:4, RDC exists:1, RNR retry count:3. */
76 u8 offset50;
89 /* max CM Retries:4, SRQ:1, rsvd:3 */
77 /* max CM Retries:4, SRQ:1, extended transport type:3 */
90 u8 offset51;
91
92 __be16 primary_local_lid;
93 __be16 primary_remote_lid;
94 union ib_gid primary_local_gid;
95 union ib_gid primary_remote_gid;
96 /* flow label:20, rsvd:6, packet rate:6 */
97 __be32 primary_offset88;

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170}
171
172static inline enum ib_qp_type cm_req_get_qp_type(struct cm_req_msg *req_msg)
173{
174 u8 transport_type = (u8) (be32_to_cpu(req_msg->offset40) & 0x06) >> 1;
175 switch(transport_type) {
176 case 0: return IB_QPT_RC;
177 case 1: return IB_QPT_UC;
78 u8 offset51;
79
80 __be16 primary_local_lid;
81 __be16 primary_remote_lid;
82 union ib_gid primary_local_gid;
83 union ib_gid primary_remote_gid;
84 /* flow label:20, rsvd:6, packet rate:6 */
85 __be32 primary_offset88;

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158}
159
160static inline enum ib_qp_type cm_req_get_qp_type(struct cm_req_msg *req_msg)
161{
162 u8 transport_type = (u8) (be32_to_cpu(req_msg->offset40) & 0x06) >> 1;
163 switch(transport_type) {
164 case 0: return IB_QPT_RC;
165 case 1: return IB_QPT_UC;
166 case 3:
167 switch (req_msg->offset51 & 0x7) {
168 case 1: return IB_QPT_XRC_TGT;
169 default: return 0;
170 }
178 default: return 0;
179 }
180}
181
182static inline void cm_req_set_qp_type(struct cm_req_msg *req_msg,
183 enum ib_qp_type qp_type)
184{
185 switch(qp_type) {
186 case IB_QPT_UC:
187 req_msg->offset40 = cpu_to_be32((be32_to_cpu(
188 req_msg->offset40) &
189 0xFFFFFFF9) | 0x2);
190 break;
171 default: return 0;
172 }
173}
174
175static inline void cm_req_set_qp_type(struct cm_req_msg *req_msg,
176 enum ib_qp_type qp_type)
177{
178 switch(qp_type) {
179 case IB_QPT_UC:
180 req_msg->offset40 = cpu_to_be32((be32_to_cpu(
181 req_msg->offset40) &
182 0xFFFFFFF9) | 0x2);
183 break;
184 case IB_QPT_XRC_INI:
185 req_msg->offset40 = cpu_to_be32((be32_to_cpu(
186 req_msg->offset40) &
187 0xFFFFFFF9) | 0x6);
188 req_msg->offset51 = (req_msg->offset51 & 0xF8) | 1;
189 break;
191 default:
192 req_msg->offset40 = cpu_to_be32(be32_to_cpu(
193 req_msg->offset40) &
194 0xFFFFFFF9);
195 }
196}
197
198static inline u8 cm_req_get_flow_ctrl(struct cm_req_msg *req_msg)

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522}
523
524static inline void cm_rep_set_local_qpn(struct cm_rep_msg *rep_msg, __be32 qpn)
525{
526 rep_msg->offset12 = cpu_to_be32((be32_to_cpu(qpn) << 8) |
527 (be32_to_cpu(rep_msg->offset12) & 0x000000FF));
528}
529
190 default:
191 req_msg->offset40 = cpu_to_be32(be32_to_cpu(
192 req_msg->offset40) &
193 0xFFFFFFF9);
194 }
195}
196
197static inline u8 cm_req_get_flow_ctrl(struct cm_req_msg *req_msg)

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521}
522
523static inline void cm_rep_set_local_qpn(struct cm_rep_msg *rep_msg, __be32 qpn)
524{
525 rep_msg->offset12 = cpu_to_be32((be32_to_cpu(qpn) << 8) |
526 (be32_to_cpu(rep_msg->offset12) & 0x000000FF));
527}
528
529static inline __be32 cm_rep_get_local_eecn(struct cm_rep_msg *rep_msg)
530{
531 return cpu_to_be32(be32_to_cpu(rep_msg->offset16) >> 8);
532}
533
534static inline void cm_rep_set_local_eecn(struct cm_rep_msg *rep_msg, __be32 eecn)
535{
536 rep_msg->offset16 = cpu_to_be32((be32_to_cpu(eecn) << 8) |
537 (be32_to_cpu(rep_msg->offset16) & 0x000000FF));
538}
539
540static inline __be32 cm_rep_get_qpn(struct cm_rep_msg *rep_msg, enum ib_qp_type qp_type)
541{
542 return (qp_type == IB_QPT_XRC_INI) ?
543 cm_rep_get_local_eecn(rep_msg) : cm_rep_get_local_qpn(rep_msg);
544}
545
530static inline __be32 cm_rep_get_starting_psn(struct cm_rep_msg *rep_msg)
531{
532 return cpu_to_be32(be32_to_cpu(rep_msg->offset20) >> 8);
533}
534
535static inline void cm_rep_set_starting_psn(struct cm_rep_msg *rep_msg,
536 __be32 starting_psn)
537{

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766struct cm_apr_msg {
767 struct ib_mad_hdr hdr;
768
769 __be32 local_comm_id;
770 __be32 remote_comm_id;
771
772 u8 info_length;
773 u8 ap_status;
546static inline __be32 cm_rep_get_starting_psn(struct cm_rep_msg *rep_msg)
547{
548 return cpu_to_be32(be32_to_cpu(rep_msg->offset20) >> 8);
549}
550
551static inline void cm_rep_set_starting_psn(struct cm_rep_msg *rep_msg,
552 __be32 starting_psn)
553{

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782struct cm_apr_msg {
783 struct ib_mad_hdr hdr;
784
785 __be32 local_comm_id;
786 __be32 remote_comm_id;
787
788 u8 info_length;
789 u8 ap_status;
790 __be16 rsvd;
774 u8 info[IB_CM_APR_INFO_LENGTH];
775
776 u8 private_data[IB_CM_APR_PRIVATE_DATA_SIZE];
777} __attribute__ ((packed));
778
779struct cm_sidr_req_msg {
780 struct ib_mad_hdr hdr;
781

--- 38 unchanged lines hidden --- 		791 u8 info[IB_CM_APR_INFO_LENGTH];
792
793 u8 private_data[IB_CM_APR_PRIVATE_DATA_SIZE];
794} __attribute__ ((packed));
795
796struct cm_sidr_req_msg {
797 struct ib_mad_hdr hdr;
798

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