| atomic.h (48797) | atomic.h (49043) |
|---|---|
| 1/*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $Id: atomic.h,v 1.2 1999/07/13 03:32:17 alc Exp $ | 26 * $Id: atomic.h,v 1.3 1999/07/13 06:35:25 alc Exp $ |
| 27 */ 28#ifndef _MACHINE_ATOMIC_H_ 29#define _MACHINE_ATOMIC_H_ 30 31/* 32 * Various simple arithmetic on memory which is atomic in the presence 33 * of interrupts and multiple processors. 34 * --- 28 unchanged lines hidden (view full) --- 63#endif 64 65/* 66 * The assembly is volatilized to demark potential before-and-after side 67 * effects if an interrupt or SMP collision were to occur. 68 */ 69#define ATOMIC_ASM(NAME, TYPE, OP, V) \ 70static __inline void \ | 27 */ 28#ifndef _MACHINE_ATOMIC_H_ 29#define _MACHINE_ATOMIC_H_ 30 31/* 32 * Various simple arithmetic on memory which is atomic in the presence 33 * of interrupts and multiple processors. 34 * --- 28 unchanged lines hidden (view full) --- 63#endif 64 65/* 66 * The assembly is volatilized to demark potential before-and-after side 67 * effects if an interrupt or SMP collision were to occur. 68 */ 69#define ATOMIC_ASM(NAME, TYPE, OP, V) \ 70static __inline void \ |
| 71atomic_##NAME##_##TYPE(void *p, u_##TYPE v) \ | 71atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ |
| 72{ \ 73 __asm __volatile(MPLOCKED OP \ | 72{ \ 73 __asm __volatile(MPLOCKED OP \ |
| 74 : "=m" (*(u_##TYPE *)p) \ 75 : "0" (*(u_##TYPE *)p), "ir" (V)); \ | 74 : "=m" (*p) \ 75 : "0" (*p), "ir" (V)); \ |
| 76} 77 78ATOMIC_ASM(set, char, "orb %2,%0", v) 79ATOMIC_ASM(clear, char, "andb %2,%0", ~v) 80ATOMIC_ASM(add, char, "addb %2,%0", v) 81ATOMIC_ASM(subtract, char, "subb %2,%0", v) 82 83ATOMIC_ASM(set, short, "orw %2,%0", v) --- 15 unchanged lines hidden --- | 76} 77 78ATOMIC_ASM(set, char, "orb %2,%0", v) 79ATOMIC_ASM(clear, char, "andb %2,%0", ~v) 80ATOMIC_ASM(add, char, "addb %2,%0", v) 81ATOMIC_ASM(subtract, char, "subb %2,%0", v) 82 83ATOMIC_ASM(set, short, "orw %2,%0", v) --- 15 unchanged lines hidden --- |