| initcpu.c (103064) | initcpu.c (104094) |
|---|---|
| 1/* 2 * Copyright (c) KATO Takenori, 1997, 1998. 3 * 4 * All rights reserved. Unpublished rights reserved under the copyright 5 * laws of Japan. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 12 unchanged lines hidden (view full) --- 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * | 1/* 2 * Copyright (c) KATO Takenori, 1997, 1998. 3 * 4 * All rights reserved. Unpublished rights reserved under the copyright 5 * laws of Japan. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 12 unchanged lines hidden (view full) --- 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * |
| 29 * $FreeBSD: head/sys/i386/i386/initcpu.c 103064 2002-09-07 07:02:12Z peter $ | 29 * $FreeBSD: head/sys/i386/i386/initcpu.c 104094 2002-09-28 17:15:38Z phk $ |
| 30 */ 31 32#include "opt_cpu.h" 33 34#include <sys/param.h> 35#include <sys/kernel.h> 36#include <sys/systm.h> 37#include <sys/sysctl.h> --- 446 unchanged lines hidden (view full) --- 484 wrmsr(0x1b, apicbase); 485#endif 486} 487 488/* 489 * Initialize BBL_CR_CTL3 (Control register 3: used to configure the 490 * L2 cache). 491 */ | 30 */ 31 32#include "opt_cpu.h" 33 34#include <sys/param.h> 35#include <sys/kernel.h> 36#include <sys/systm.h> 37#include <sys/sysctl.h> --- 446 unchanged lines hidden (view full) --- 484 wrmsr(0x1b, apicbase); 485#endif 486} 487 488/* 489 * Initialize BBL_CR_CTL3 (Control register 3: used to configure the 490 * L2 cache). 491 */ |
| 492void | 492static void |
| 493init_mendocino(void) 494{ 495#ifdef CPU_PPRO2CELERON 496 u_long eflags; 497 u_int64_t bbl_cr_ctl3; 498 499 eflags = read_eflags(); 500 disable_intr(); --- 381 unchanged lines hidden --- | 493init_mendocino(void) 494{ 495#ifdef CPU_PPRO2CELERON 496 u_long eflags; 497 u_int64_t bbl_cr_ctl3; 498 499 eflags = read_eflags(); 500 disable_intr(); --- 381 unchanged lines hidden --- |