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sdiff udiff text old ( 64837 ) new ( 67087 )
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if_wb.c (64837) if_wb.c (67087)
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/pci/if_wb.c 64837 2000-08-19 08:32:59Z dwmalone $
32 * $FreeBSD: head/sys/pci/if_wb.c 67087 2000-10-13 17:54:19Z wpaul $
33 */
34
35/*
36 * Winbond fast ethernet PCI NIC driver
37 *
38 * Supports various cheap network adapters based on the Winbond W89C840F
39 * fast ethernet controller chip. This includes adapters manufactured by
40 * Winbond itself and some made by Linksys.

--- 83 unchanged lines hidden (view full) ---

124#define WB_USEIOSPACE
125
126#include <pci/if_wbreg.h>
127
128MODULE_DEPEND(wb, miibus, 1, 1, 1);
129
130#ifndef lint
131static const char rcsid[] =
33 */
34
35/*
36 * Winbond fast ethernet PCI NIC driver
37 *
38 * Supports various cheap network adapters based on the Winbond W89C840F
39 * fast ethernet controller chip. This includes adapters manufactured by
40 * Winbond itself and some made by Linksys.

--- 83 unchanged lines hidden (view full) ---

124#define WB_USEIOSPACE
125
126#include <pci/if_wbreg.h>
127
128MODULE_DEPEND(wb, miibus, 1, 1, 1);
129
130#ifndef lint
131static const char rcsid[] =
132 "$FreeBSD: head/sys/pci/if_wb.c 64837 2000-08-19 08:32:59Z dwmalone $";
132 "$FreeBSD: head/sys/pci/if_wb.c 67087 2000-10-13 17:54:19Z wpaul $";
133#endif
134
135/*
136 * Various supported device vendors/types and their names.
137 */
138static struct wb_type wb_devs[] = {
139 { WB_VENDORID, WB_DEVICEID_840F,
140 "Winbond W89C840F 10/100BaseTX" },

--- 246 unchanged lines hidden (view full) ---

387/*
388 * Read an PHY register through the MII.
389 */
390static int wb_mii_readreg(sc, frame)
391 struct wb_softc *sc;
392 struct wb_mii_frame *frame;
393
394{
133#endif
134
135/*
136 * Various supported device vendors/types and their names.
137 */
138static struct wb_type wb_devs[] = {
139 { WB_VENDORID, WB_DEVICEID_840F,
140 "Winbond W89C840F 10/100BaseTX" },

--- 246 unchanged lines hidden (view full) ---

387/*
388 * Read an PHY register through the MII.
389 */
390static int wb_mii_readreg(sc, frame)
391 struct wb_softc *sc;
392 struct wb_mii_frame *frame;
393
394{
395 int i, ack, s;
395 int i, ack;
396
396
397 s = splimp();
397 WB_LOCK(sc);
398
399 /*
400 * Set up frame for RX.
401 */
402 frame->mii_stdelim = WB_MII_STARTDELIM;
403 frame->mii_opcode = WB_MII_READOP;
404 frame->mii_turnaround = 0;
405 frame->mii_data = 0;

--- 62 unchanged lines hidden (view full) ---

468
469fail:
470
471 SIO_CLR(WB_SIO_MII_CLK);
472 DELAY(1);
473 SIO_SET(WB_SIO_MII_CLK);
474 DELAY(1);
475
398
399 /*
400 * Set up frame for RX.
401 */
402 frame->mii_stdelim = WB_MII_STARTDELIM;
403 frame->mii_opcode = WB_MII_READOP;
404 frame->mii_turnaround = 0;
405 frame->mii_data = 0;

--- 62 unchanged lines hidden (view full) ---

468
469fail:
470
471 SIO_CLR(WB_SIO_MII_CLK);
472 DELAY(1);
473 SIO_SET(WB_SIO_MII_CLK);
474 DELAY(1);
475
476 splx(s);
476 WB_UNLOCK(sc);
477
478 if (ack)
479 return(1);
480 return(0);
481}
482
483/*
484 * Write to a PHY register through the MII.
485 */
486static int wb_mii_writereg(sc, frame)
487 struct wb_softc *sc;
488 struct wb_mii_frame *frame;
489
490{
477
478 if (ack)
479 return(1);
480 return(0);
481}
482
483/*
484 * Write to a PHY register through the MII.
485 */
486static int wb_mii_writereg(sc, frame)
487 struct wb_softc *sc;
488 struct wb_mii_frame *frame;
489
490{
491 int s;
491 WB_LOCK(sc);
492
492
493 s = splimp();
494 /*
495 * Set up frame for TX.
496 */
497
498 frame->mii_stdelim = WB_MII_STARTDELIM;
499 frame->mii_opcode = WB_MII_WRITEOP;
500 frame->mii_turnaround = WB_MII_TURNAROUND;
501

--- 17 unchanged lines hidden (view full) ---

519 SIO_CLR(WB_SIO_MII_CLK);
520 DELAY(1);
521
522 /*
523 * Turn off xmit.
524 */
525 SIO_CLR(WB_SIO_MII_DIR);
526
493 /*
494 * Set up frame for TX.
495 */
496
497 frame->mii_stdelim = WB_MII_STARTDELIM;
498 frame->mii_opcode = WB_MII_WRITEOP;
499 frame->mii_turnaround = WB_MII_TURNAROUND;
500

--- 17 unchanged lines hidden (view full) ---

518 SIO_CLR(WB_SIO_MII_CLK);
519 DELAY(1);
520
521 /*
522 * Turn off xmit.
523 */
524 SIO_CLR(WB_SIO_MII_DIR);
525
527 splx(s);
526 WB_UNLOCK(sc);
528
529 return(0);
530}
531
532static int wb_miibus_readreg(dev, phy, reg)
533 device_t dev;
534 int phy, reg;
535{

--- 33 unchanged lines hidden (view full) ---

569
570static void wb_miibus_statchg(dev)
571 device_t dev;
572{
573 struct wb_softc *sc;
574 struct mii_data *mii;
575
576 sc = device_get_softc(dev);
527
528 return(0);
529}
530
531static int wb_miibus_readreg(dev, phy, reg)
532 device_t dev;
533 int phy, reg;
534{

--- 33 unchanged lines hidden (view full) ---

568
569static void wb_miibus_statchg(dev)
570 device_t dev;
571{
572 struct wb_softc *sc;
573 struct mii_data *mii;
574
575 sc = device_get_softc(dev);
576 WB_LOCK(sc);
577 mii = device_get_softc(sc->wb_miibus);
578 wb_setcfg(sc, mii->mii_media_active);
577 mii = device_get_softc(sc->wb_miibus);
578 wb_setcfg(sc, mii->mii_media_active);
579 WB_UNLOCK(sc);
579
580 return;
581}
582
583static u_int8_t wb_calchash(addr)
584 caddr_t addr;
585{
586 u_int32_t crc, carry;

--- 216 unchanged lines hidden (view full) ---

803
804/*
805 * Attach the interface. Allocate softc structures, do ifmedia
806 * setup and ethernet/BPF attach.
807 */
808static int wb_attach(dev)
809 device_t dev;
810{
580
581 return;
582}
583
584static u_int8_t wb_calchash(addr)
585 caddr_t addr;
586{
587 u_int32_t crc, carry;

--- 216 unchanged lines hidden (view full) ---

804
805/*
806 * Attach the interface. Allocate softc structures, do ifmedia
807 * setup and ethernet/BPF attach.
808 */
809static int wb_attach(dev)
810 device_t dev;
811{
811 int s;
812 u_char eaddr[ETHER_ADDR_LEN];
813 u_int32_t command;
814 struct wb_softc *sc;
815 struct ifnet *ifp;
816 int unit, error = 0, rid;
817
812 u_char eaddr[ETHER_ADDR_LEN];
813 u_int32_t command;
814 struct wb_softc *sc;
815 struct ifnet *ifp;
816 int unit, error = 0, rid;
817
818 s = splimp();
819
820 sc = device_get_softc(dev);
821 unit = device_get_unit(dev);
822
823 /*
824 * Handle power management nonsense.
825 */
826
827 command = pci_read_config(dev, WB_PCI_CAPID, 4) & 0x000000FF;

--- 76 unchanged lines hidden (view full) ---

904 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
905 printf("wb%d: couldn't set up irq\n", unit);
906 goto fail;
907 }
908
909 /* Save the cache line size. */
910 sc->wb_cachesize = pci_read_config(dev, WB_PCI_CACHELEN, 4) & 0xFF;
911
818 sc = device_get_softc(dev);
819 unit = device_get_unit(dev);
820
821 /*
822 * Handle power management nonsense.
823 */
824
825 command = pci_read_config(dev, WB_PCI_CAPID, 4) & 0x000000FF;

--- 76 unchanged lines hidden (view full) ---

902 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
903 printf("wb%d: couldn't set up irq\n", unit);
904 goto fail;
905 }
906
907 /* Save the cache line size. */
908 sc->wb_cachesize = pci_read_config(dev, WB_PCI_CACHELEN, 4) & 0xFF;
909
910 mtx_init(&sc->wb_mtx, "wb", MTX_DEF);
911 WB_LOCK(sc);
912
912 /* Reset the adapter. */
913 wb_reset(sc);
914
915 /*
916 * Get station address from the EEPROM.
917 */
918 wb_read_eeprom(sc, (caddr_t)&eaddr, 0, 3, 0);
919

--- 45 unchanged lines hidden (view full) ---

965 error = ENXIO;
966 goto fail;
967 }
968
969 /*
970 * Call MI attach routine.
971 */
972 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
913 /* Reset the adapter. */
914 wb_reset(sc);
915
916 /*
917 * Get station address from the EEPROM.
918 */
919 wb_read_eeprom(sc, (caddr_t)&eaddr, 0, 3, 0);
920

--- 45 unchanged lines hidden (view full) ---

966 error = ENXIO;
967 goto fail;
968 }
969
970 /*
971 * Call MI attach routine.
972 */
973 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
974 WB_UNLOCK(sc);
975 return(0);
973
974fail:
975 if (error)
976 device_delete_child(dev, sc->wb_miibus);
976
977fail:
978 if (error)
979 device_delete_child(dev, sc->wb_miibus);
977 splx(s);
980 WB_UNLOCK(sc);
981 mtx_destroy(&sc->wb_mtx);
978
979 return(error);
980}
981
982static int wb_detach(dev)
983 device_t dev;
984{
985 struct wb_softc *sc;
986 struct ifnet *ifp;
982
983 return(error);
984}
985
986static int wb_detach(dev)
987 device_t dev;
988{
989 struct wb_softc *sc;
990 struct ifnet *ifp;
987 int s;
988
991
989 s = splimp();
990
991 sc = device_get_softc(dev);
992 sc = device_get_softc(dev);
993 WB_LOCK(sc);
992 ifp = &sc->arpcom.ac_if;
993
994 wb_stop(sc);
995 ether_ifdetach(ifp, ETHER_BPF_SUPPORTED);
996
997 /* Delete any miibus and phy devices attached to this interface */
998 bus_generic_detach(dev);
999 device_delete_child(dev, sc->wb_miibus);
1000
1001 bus_teardown_intr(dev, sc->wb_irq, sc->wb_intrhand);
1002 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
1003 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
1004
1005 free(sc->wb_ldata_ptr, M_DEVBUF);
1006
994 ifp = &sc->arpcom.ac_if;
995
996 wb_stop(sc);
997 ether_ifdetach(ifp, ETHER_BPF_SUPPORTED);
998
999 /* Delete any miibus and phy devices attached to this interface */
1000 bus_generic_detach(dev);
1001 device_delete_child(dev, sc->wb_miibus);
1002
1003 bus_teardown_intr(dev, sc->wb_irq, sc->wb_intrhand);
1004 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
1005 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
1006
1007 free(sc->wb_ldata_ptr, M_DEVBUF);
1008
1007 splx(s);
1009 WB_UNLOCK(sc);
1010 mtx_destroy(&sc->wb_mtx);
1008
1009 return(0);
1010}
1011
1012/*
1013 * Initialize the transmit descriptors.
1014 */
1015static int wb_list_tx_init(sc)

--- 282 unchanged lines hidden (view full) ---

1298static void wb_intr(arg)
1299 void *arg;
1300{
1301 struct wb_softc *sc;
1302 struct ifnet *ifp;
1303 u_int32_t status;
1304
1305 sc = arg;
1011
1012 return(0);
1013}
1014
1015/*
1016 * Initialize the transmit descriptors.
1017 */
1018static int wb_list_tx_init(sc)

--- 282 unchanged lines hidden (view full) ---

1301static void wb_intr(arg)
1302 void *arg;
1303{
1304 struct wb_softc *sc;
1305 struct ifnet *ifp;
1306 u_int32_t status;
1307
1308 sc = arg;
1309 WB_LOCK(sc);
1306 ifp = &sc->arpcom.ac_if;
1307
1310 ifp = &sc->arpcom.ac_if;
1311
1308 if (!(ifp->if_flags & IFF_UP))
1312 if (!(ifp->if_flags & IFF_UP)) {
1313 WB_UNLOCK(sc);
1309 return;
1314 return;
1315 }
1310
1311 /* Disable interrupts. */
1312 CSR_WRITE_4(sc, WB_IMR, 0x00000000);
1313
1314 for (;;) {
1315
1316 status = CSR_READ_4(sc, WB_ISR);
1317 if (status)

--- 51 unchanged lines hidden (view full) ---

1369
1370 /* Re-enable interrupts. */
1371 CSR_WRITE_4(sc, WB_IMR, WB_INTRS);
1372
1373 if (ifp->if_snd.ifq_head != NULL) {
1374 wb_start(ifp);
1375 }
1376
1316
1317 /* Disable interrupts. */
1318 CSR_WRITE_4(sc, WB_IMR, 0x00000000);
1319
1320 for (;;) {
1321
1322 status = CSR_READ_4(sc, WB_ISR);
1323 if (status)

--- 51 unchanged lines hidden (view full) ---

1375
1376 /* Re-enable interrupts. */
1377 CSR_WRITE_4(sc, WB_IMR, WB_INTRS);
1378
1379 if (ifp->if_snd.ifq_head != NULL) {
1380 wb_start(ifp);
1381 }
1382
1383 WB_UNLOCK(sc);
1384
1377 return;
1378}
1379
1380static void wb_tick(xsc)
1381 void *xsc;
1382{
1383 struct wb_softc *sc;
1384 struct mii_data *mii;
1385 return;
1386}
1387
1388static void wb_tick(xsc)
1389 void *xsc;
1390{
1391 struct wb_softc *sc;
1392 struct mii_data *mii;
1385 int s;
1386
1393
1387 s = splimp();
1388
1389 sc = xsc;
1394 sc = xsc;
1395 WB_LOCK(sc);
1390 mii = device_get_softc(sc->wb_miibus);
1391
1392 mii_tick(mii);
1393
1394 sc->wb_stat_ch = timeout(wb_tick, sc, hz);
1395
1396 mii = device_get_softc(sc->wb_miibus);
1397
1398 mii_tick(mii);
1399
1400 sc->wb_stat_ch = timeout(wb_tick, sc, hz);
1401
1396 splx(s);
1402 WB_UNLOCK(sc);
1397
1398 return;
1399}
1400
1401/*
1402 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1403 * pointers to the fragment pointers.
1404 */

--- 98 unchanged lines hidden (view full) ---

1503static void wb_start(ifp)
1504 struct ifnet *ifp;
1505{
1506 struct wb_softc *sc;
1507 struct mbuf *m_head = NULL;
1508 struct wb_chain *cur_tx = NULL, *start_tx;
1509
1510 sc = ifp->if_softc;
1403
1404 return;
1405}
1406
1407/*
1408 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1409 * pointers to the fragment pointers.
1410 */

--- 98 unchanged lines hidden (view full) ---

1509static void wb_start(ifp)
1510 struct ifnet *ifp;
1511{
1512 struct wb_softc *sc;
1513 struct mbuf *m_head = NULL;
1514 struct wb_chain *cur_tx = NULL, *start_tx;
1515
1516 sc = ifp->if_softc;
1517 WB_LOCK(sc);
1511
1512 /*
1513 * Check for an available queue slot. If there are none,
1514 * punt.
1515 */
1516 if (sc->wb_cdata.wb_tx_free->wb_mbuf != NULL) {
1517 ifp->if_flags |= IFF_OACTIVE;
1518
1519 /*
1520 * Check for an available queue slot. If there are none,
1521 * punt.
1522 */
1523 if (sc->wb_cdata.wb_tx_free->wb_mbuf != NULL) {
1524 ifp->if_flags |= IFF_OACTIVE;
1525 WB_UNLOCK(sc);
1518 return;
1519 }
1520
1521 start_tx = sc->wb_cdata.wb_tx_free;
1522
1523 while(sc->wb_cdata.wb_tx_free->wb_mbuf == NULL) {
1524 IF_DEQUEUE(&ifp->if_snd, m_head);
1525 if (m_head == NULL)

--- 15 unchanged lines hidden (view full) ---

1541 */
1542 if (ifp->if_bpf)
1543 bpf_mtap(ifp, cur_tx->wb_mbuf);
1544 }
1545
1546 /*
1547 * If there are no packets queued, bail.
1548 */
1526 return;
1527 }
1528
1529 start_tx = sc->wb_cdata.wb_tx_free;
1530
1531 while(sc->wb_cdata.wb_tx_free->wb_mbuf == NULL) {
1532 IF_DEQUEUE(&ifp->if_snd, m_head);
1533 if (m_head == NULL)

--- 15 unchanged lines hidden (view full) ---

1549 */
1550 if (ifp->if_bpf)
1551 bpf_mtap(ifp, cur_tx->wb_mbuf);
1552 }
1553
1554 /*
1555 * If there are no packets queued, bail.
1556 */
1549 if (cur_tx == NULL)
1557 if (cur_tx == NULL) {
1558 WB_UNLOCK(sc);
1550 return;
1559 return;
1560 }
1551
1552 /*
1553 * Place the request for the upload interrupt
1554 * in the last descriptor in the chain. This way, if
1555 * we're chaining several packets at once, we'll only
1556 * get an interupt once for the whole chain rather than
1557 * once for each packet.
1558 */

--- 20 unchanged lines hidden (view full) ---

1579 */
1580 WB_TXOWN(start_tx) = WB_UNSENT;
1581 }
1582
1583 /*
1584 * Set a timeout in case the chip goes out to lunch.
1585 */
1586 ifp->if_timer = 5;
1561
1562 /*
1563 * Place the request for the upload interrupt
1564 * in the last descriptor in the chain. This way, if
1565 * we're chaining several packets at once, we'll only
1566 * get an interupt once for the whole chain rather than
1567 * once for each packet.
1568 */

--- 20 unchanged lines hidden (view full) ---

1589 */
1590 WB_TXOWN(start_tx) = WB_UNSENT;
1591 }
1592
1593 /*
1594 * Set a timeout in case the chip goes out to lunch.
1595 */
1596 ifp->if_timer = 5;
1597 WB_UNLOCK(sc);
1587
1588 return;
1589}
1590
1591static void wb_init(xsc)
1592 void *xsc;
1593{
1594 struct wb_softc *sc = xsc;
1595 struct ifnet *ifp = &sc->arpcom.ac_if;
1598
1599 return;
1600}
1601
1602static void wb_init(xsc)
1603 void *xsc;
1604{
1605 struct wb_softc *sc = xsc;
1606 struct ifnet *ifp = &sc->arpcom.ac_if;
1596 int s, i;
1607 int i;
1597 struct mii_data *mii;
1598
1608 struct mii_data *mii;
1609
1599 s = splimp();
1600
1610 WB_LOCK(sc);
1601 mii = device_get_softc(sc->wb_miibus);
1602
1603 /*
1604 * Cancel pending I/O and free all RX/TX buffers.
1605 */
1606 wb_stop(sc);
1607 wb_reset(sc);
1608

--- 34 unchanged lines hidden (view full) ---

1643 CSR_WRITE_1(sc, WB_NODE0 + i, sc->arpcom.ac_enaddr[i]);
1644 }
1645
1646 /* Init circular RX list. */
1647 if (wb_list_rx_init(sc) == ENOBUFS) {
1648 printf("wb%d: initialization failed: no "
1649 "memory for rx buffers\n", sc->wb_unit);
1650 wb_stop(sc);
1611 mii = device_get_softc(sc->wb_miibus);
1612
1613 /*
1614 * Cancel pending I/O and free all RX/TX buffers.
1615 */
1616 wb_stop(sc);
1617 wb_reset(sc);
1618

--- 34 unchanged lines hidden (view full) ---

1653 CSR_WRITE_1(sc, WB_NODE0 + i, sc->arpcom.ac_enaddr[i]);
1654 }
1655
1656 /* Init circular RX list. */
1657 if (wb_list_rx_init(sc) == ENOBUFS) {
1658 printf("wb%d: initialization failed: no "
1659 "memory for rx buffers\n", sc->wb_unit);
1660 wb_stop(sc);
1651 (void)splx(s);
1661 WB_UNLOCK(sc);
1652 return;
1653 }
1654
1655 /* Init TX descriptors. */
1656 wb_list_tx_init(sc);
1657
1658 /* If we want promiscuous mode, set the allframes bit. */
1659 if (ifp->if_flags & IFF_PROMISC) {

--- 36 unchanged lines hidden (view full) ---

1696 CSR_WRITE_4(sc, WB_TXADDR, vtophys(&sc->wb_ldata->wb_tx_list[0]));
1697 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
1698
1699 mii_mediachg(mii);
1700
1701 ifp->if_flags |= IFF_RUNNING;
1702 ifp->if_flags &= ~IFF_OACTIVE;
1703
1662 return;
1663 }
1664
1665 /* Init TX descriptors. */
1666 wb_list_tx_init(sc);
1667
1668 /* If we want promiscuous mode, set the allframes bit. */
1669 if (ifp->if_flags & IFF_PROMISC) {

--- 36 unchanged lines hidden (view full) ---

1706 CSR_WRITE_4(sc, WB_TXADDR, vtophys(&sc->wb_ldata->wb_tx_list[0]));
1707 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
1708
1709 mii_mediachg(mii);
1710
1711 ifp->if_flags |= IFF_RUNNING;
1712 ifp->if_flags &= ~IFF_OACTIVE;
1713
1704 (void)splx(s);
1705
1706 sc->wb_stat_ch = timeout(wb_tick, sc, hz);
1714 sc->wb_stat_ch = timeout(wb_tick, sc, hz);
1715 WB_UNLOCK(sc);
1707
1708 return;
1709}
1710
1711/*
1712 * Set media options.
1713 */
1714static int wb_ifmedia_upd(ifp)

--- 33 unchanged lines hidden (view full) ---

1748static int wb_ioctl(ifp, command, data)
1749 struct ifnet *ifp;
1750 u_long command;
1751 caddr_t data;
1752{
1753 struct wb_softc *sc = ifp->if_softc;
1754 struct mii_data *mii;
1755 struct ifreq *ifr = (struct ifreq *) data;
1716
1717 return;
1718}
1719
1720/*
1721 * Set media options.
1722 */
1723static int wb_ifmedia_upd(ifp)

--- 33 unchanged lines hidden (view full) ---

1757static int wb_ioctl(ifp, command, data)
1758 struct ifnet *ifp;
1759 u_long command;
1760 caddr_t data;
1761{
1762 struct wb_softc *sc = ifp->if_softc;
1763 struct mii_data *mii;
1764 struct ifreq *ifr = (struct ifreq *) data;
1756 int s, error = 0;
1765 int error = 0;
1757
1766
1758 s = splimp();
1767 WB_LOCK(sc);
1759
1760 switch(command) {
1761 case SIOCSIFADDR:
1762 case SIOCGIFADDR:
1763 case SIOCSIFMTU:
1764 error = ether_ioctl(ifp, command, data);
1765 break;
1766 case SIOCSIFFLAGS:

--- 15 unchanged lines hidden (view full) ---

1782 mii = device_get_softc(sc->wb_miibus);
1783 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1784 break;
1785 default:
1786 error = EINVAL;
1787 break;
1788 }
1789
1768
1769 switch(command) {
1770 case SIOCSIFADDR:
1771 case SIOCGIFADDR:
1772 case SIOCSIFMTU:
1773 error = ether_ioctl(ifp, command, data);
1774 break;
1775 case SIOCSIFFLAGS:

--- 15 unchanged lines hidden (view full) ---

1791 mii = device_get_softc(sc->wb_miibus);
1792 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1793 break;
1794 default:
1795 error = EINVAL;
1796 break;
1797 }
1798
1790 (void)splx(s);
1799 WB_UNLOCK(sc);
1791
1792 return(error);
1793}
1794
1795static void wb_watchdog(ifp)
1796 struct ifnet *ifp;
1797{
1798 struct wb_softc *sc;
1799
1800 sc = ifp->if_softc;
1801
1800
1801 return(error);
1802}
1803
1804static void wb_watchdog(ifp)
1805 struct ifnet *ifp;
1806{
1807 struct wb_softc *sc;
1808
1809 sc = ifp->if_softc;
1810
1811 WB_LOCK(sc);
1802 ifp->if_oerrors++;
1803 printf("wb%d: watchdog timeout\n", sc->wb_unit);
1804#ifdef foo
1805 if (!(wb_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
1806 printf("wb%d: no carrier - transceiver cable problem?\n",
1807 sc->wb_unit);
1808#endif
1809 wb_stop(sc);
1810 wb_reset(sc);
1811 wb_init(sc);
1812
1813 if (ifp->if_snd.ifq_head != NULL)
1814 wb_start(ifp);
1812 ifp->if_oerrors++;
1813 printf("wb%d: watchdog timeout\n", sc->wb_unit);
1814#ifdef foo
1815 if (!(wb_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
1816 printf("wb%d: no carrier - transceiver cable problem?\n",
1817 sc->wb_unit);
1818#endif
1819 wb_stop(sc);
1820 wb_reset(sc);
1821 wb_init(sc);
1822
1823 if (ifp->if_snd.ifq_head != NULL)
1824 wb_start(ifp);
1825 WB_UNLOCK(sc);
1815
1816 return;
1817}
1818
1819/*
1820 * Stop the adapter and free any mbufs allocated to the
1821 * RX and TX lists.
1822 */
1823static void wb_stop(sc)
1824 struct wb_softc *sc;
1825{
1826 register int i;
1827 struct ifnet *ifp;
1828
1826
1827 return;
1828}
1829
1830/*
1831 * Stop the adapter and free any mbufs allocated to the
1832 * RX and TX lists.
1833 */
1834static void wb_stop(sc)
1835 struct wb_softc *sc;
1836{
1837 register int i;
1838 struct ifnet *ifp;
1839
1840 WB_LOCK(sc);
1829 ifp = &sc->arpcom.ac_if;
1830 ifp->if_timer = 0;
1831
1832 untimeout(wb_tick, sc, sc->wb_stat_ch);
1833
1834 WB_CLRBIT(sc, WB_NETCFG, (WB_NETCFG_RX_ON|WB_NETCFG_TX_ON));
1835 CSR_WRITE_4(sc, WB_IMR, 0x00000000);
1836 CSR_WRITE_4(sc, WB_TXADDR, 0x00000000);

--- 20 unchanged lines hidden (view full) ---

1857 sc->wb_cdata.wb_tx_chain[i].wb_mbuf = NULL;
1858 }
1859 }
1860
1861 bzero((char *)&sc->wb_ldata->wb_tx_list,
1862 sizeof(sc->wb_ldata->wb_tx_list));
1863
1864 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1841 ifp = &sc->arpcom.ac_if;
1842 ifp->if_timer = 0;
1843
1844 untimeout(wb_tick, sc, sc->wb_stat_ch);
1845
1846 WB_CLRBIT(sc, WB_NETCFG, (WB_NETCFG_RX_ON|WB_NETCFG_TX_ON));
1847 CSR_WRITE_4(sc, WB_IMR, 0x00000000);
1848 CSR_WRITE_4(sc, WB_TXADDR, 0x00000000);

--- 20 unchanged lines hidden (view full) ---

1869 sc->wb_cdata.wb_tx_chain[i].wb_mbuf = NULL;
1870 }
1871 }
1872
1873 bzero((char *)&sc->wb_ldata->wb_tx_list,
1874 sizeof(sc->wb_ldata->wb_tx_list));
1875
1876 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1877 WB_UNLOCK(sc);
1865
1866 return;
1867}
1868
1869/*
1870 * Stop all chip I/O so that the kernel's probe routines don't
1871 * get confused by errant DMAs when rebooting.
1872 */
1873static void wb_shutdown(dev)
1874 device_t dev;
1875{
1876 struct wb_softc *sc;
1877
1878 sc = device_get_softc(dev);
1879 wb_stop(sc);
1880
1881 return;
1882}
1878
1879 return;
1880}
1881
1882/*
1883 * Stop all chip I/O so that the kernel's probe routines don't
1884 * get confused by errant DMAs when rebooting.
1885 */
1886static void wb_shutdown(dev)
1887 device_t dev;
1888{
1889 struct wb_softc *sc;
1890
1891 sc = device_get_softc(dev);
1892 wb_stop(sc);
1893
1894 return;
1895}