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if_wb.c (221407) if_wb.c (226995)
1/*-
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 17 unchanged lines hidden (view full) ---

26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 17 unchanged lines hidden (view full) ---

26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/wb/if_wb.c 221407 2011-05-03 19:51:29Z marius $");
34__FBSDID("$FreeBSD: head/sys/dev/wb/if_wb.c 226995 2011-11-01 16:13:59Z marius $");
35
36/*
37 * Winbond fast ethernet PCI NIC driver
38 *
39 * Supports various cheap network adapters based on the Winbond W89C840F
40 * fast ethernet controller chip. This includes adapters manufactured by
41 * Winbond itself and some made by Linksys.
42 *

--- 65 unchanged lines hidden (view full) ---

108#include <machine/resource.h>
109#include <sys/bus.h>
110#include <sys/rman.h>
111
112#include <dev/pci/pcireg.h>
113#include <dev/pci/pcivar.h>
114
115#include <dev/mii/mii.h>
35
36/*
37 * Winbond fast ethernet PCI NIC driver
38 *
39 * Supports various cheap network adapters based on the Winbond W89C840F
40 * fast ethernet controller chip. This includes adapters manufactured by
41 * Winbond itself and some made by Linksys.
42 *

--- 65 unchanged lines hidden (view full) ---

108#include <machine/resource.h>
109#include <sys/bus.h>
110#include <sys/rman.h>
111
112#include <dev/pci/pcireg.h>
113#include <dev/pci/pcivar.h>
114
115#include <dev/mii/mii.h>
116#include <dev/mii/mii_bitbang.h>
116#include <dev/mii/miivar.h>
117
118/* "device miibus" required. See GENERIC if you get errors here. */
119#include "miibus_if.h"
120
121#define WB_USEIOSPACE
122
123#include <dev/wb/if_wbreg.h>
124
125MODULE_DEPEND(wb, pci, 1, 1, 1);
126MODULE_DEPEND(wb, ether, 1, 1, 1);
127MODULE_DEPEND(wb, miibus, 1, 1, 1);
128
129/*
130 * Various supported device vendors/types and their names.
131 */
117#include <dev/mii/miivar.h>
118
119/* "device miibus" required. See GENERIC if you get errors here. */
120#include "miibus_if.h"
121
122#define WB_USEIOSPACE
123
124#include <dev/wb/if_wbreg.h>
125
126MODULE_DEPEND(wb, pci, 1, 1, 1);
127MODULE_DEPEND(wb, ether, 1, 1, 1);
128MODULE_DEPEND(wb, miibus, 1, 1, 1);
129
130/*
131 * Various supported device vendors/types and their names.
132 */
132static struct wb_type wb_devs[] = {
133static const struct wb_type const wb_devs[] = {
133 { WB_VENDORID, WB_DEVICEID_840F,
134 "Winbond W89C840F 10/100BaseTX" },
135 { CP_VENDORID, CP_DEVICEID_RL100,
136 "Compex RL100-ATX 10/100baseTX" },
137 { 0, 0, NULL }
138};
139
140static int wb_probe(device_t);

--- 20 unchanged lines hidden (view full) ---

161static void wb_watchdog(struct wb_softc *);
162static int wb_shutdown(device_t);
163static int wb_ifmedia_upd(struct ifnet *);
164static void wb_ifmedia_sts(struct ifnet *, struct ifmediareq *);
165
166static void wb_eeprom_putbyte(struct wb_softc *, int);
167static void wb_eeprom_getword(struct wb_softc *, int, u_int16_t *);
168static void wb_read_eeprom(struct wb_softc *, caddr_t, int, int, int);
134 { WB_VENDORID, WB_DEVICEID_840F,
135 "Winbond W89C840F 10/100BaseTX" },
136 { CP_VENDORID, CP_DEVICEID_RL100,
137 "Compex RL100-ATX 10/100baseTX" },
138 { 0, 0, NULL }
139};
140
141static int wb_probe(device_t);

--- 20 unchanged lines hidden (view full) ---

162static void wb_watchdog(struct wb_softc *);
163static int wb_shutdown(device_t);
164static int wb_ifmedia_upd(struct ifnet *);
165static void wb_ifmedia_sts(struct ifnet *, struct ifmediareq *);
166
167static void wb_eeprom_putbyte(struct wb_softc *, int);
168static void wb_eeprom_getword(struct wb_softc *, int, u_int16_t *);
169static void wb_read_eeprom(struct wb_softc *, caddr_t, int, int, int);
169static void wb_mii_sync(struct wb_softc *);
170static void wb_mii_send(struct wb_softc *, u_int32_t, int);
171static int wb_mii_readreg(struct wb_softc *, struct wb_mii_frame *);
172static int wb_mii_writereg(struct wb_softc *, struct wb_mii_frame *);
173
174static void wb_setcfg(struct wb_softc *, u_int32_t);
175static void wb_setmulti(struct wb_softc *);
176static void wb_reset(struct wb_softc *);
177static void wb_fixmedia(struct wb_softc *);
178static int wb_list_rx_init(struct wb_softc *);
179static int wb_list_tx_init(struct wb_softc *);
180
181static int wb_miibus_readreg(device_t, int, int);
182static int wb_miibus_writereg(device_t, int, int, int);
183static void wb_miibus_statchg(device_t);
184
170
171static void wb_setcfg(struct wb_softc *, u_int32_t);
172static void wb_setmulti(struct wb_softc *);
173static void wb_reset(struct wb_softc *);
174static void wb_fixmedia(struct wb_softc *);
175static int wb_list_rx_init(struct wb_softc *);
176static int wb_list_tx_init(struct wb_softc *);
177
178static int wb_miibus_readreg(device_t, int, int);
179static int wb_miibus_writereg(device_t, int, int, int);
180static void wb_miibus_statchg(device_t);
181
182/*
183 * MII bit-bang glue
184 */
185static uint32_t wb_mii_bitbang_read(device_t);
186static void wb_mii_bitbang_write(device_t, uint32_t);
187
188static const struct mii_bitbang_ops wb_mii_bitbang_ops = {
189 wb_mii_bitbang_read,
190 wb_mii_bitbang_write,
191 {
192 WB_SIO_MII_DATAOUT, /* MII_BIT_MDO */
193 WB_SIO_MII_DATAIN, /* MII_BIT_MDI */
194 WB_SIO_MII_CLK, /* MII_BIT_MDC */
195 WB_SIO_MII_DIR, /* MII_BIT_DIR_HOST_PHY */
196 0, /* MII_BIT_DIR_PHY_HOST */
197 }
198};
199
185#ifdef WB_USEIOSPACE
186#define WB_RES SYS_RES_IOPORT
187#define WB_RID WB_PCI_LOIO
188#else
189#define WB_RES SYS_RES_MEMORY
190#define WB_RID WB_PCI_LOMEM
191#endif
192

--- 64 unchanged lines hidden (view full) ---

257 SIO_CLR(WB_SIO_EE_DATAIN);
258 }
259 DELAY(100);
260 SIO_SET(WB_SIO_EE_CLK);
261 DELAY(150);
262 SIO_CLR(WB_SIO_EE_CLK);
263 DELAY(100);
264 }
200#ifdef WB_USEIOSPACE
201#define WB_RES SYS_RES_IOPORT
202#define WB_RID WB_PCI_LOIO
203#else
204#define WB_RES SYS_RES_MEMORY
205#define WB_RID WB_PCI_LOMEM
206#endif
207

--- 64 unchanged lines hidden (view full) ---

272 SIO_CLR(WB_SIO_EE_DATAIN);
273 }
274 DELAY(100);
275 SIO_SET(WB_SIO_EE_CLK);
276 DELAY(150);
277 SIO_CLR(WB_SIO_EE_CLK);
278 DELAY(100);
279 }
265
266 return;
267}
268
269/*
270 * Read a word of data stored in the EEPROM at address 'addr.'
271 */
272static void
273wb_eeprom_getword(sc, addr, dest)
274 struct wb_softc *sc;

--- 24 unchanged lines hidden (view full) ---

299 SIO_CLR(WB_SIO_EE_CLK);
300 DELAY(100);
301 }
302
303 /* Turn off EEPROM access mode. */
304 CSR_WRITE_4(sc, WB_SIO, 0);
305
306 *dest = word;
280}
281
282/*
283 * Read a word of data stored in the EEPROM at address 'addr.'
284 */
285static void
286wb_eeprom_getword(sc, addr, dest)
287 struct wb_softc *sc;

--- 24 unchanged lines hidden (view full) ---

312 SIO_CLR(WB_SIO_EE_CLK);
313 DELAY(100);
314 }
315
316 /* Turn off EEPROM access mode. */
317 CSR_WRITE_4(sc, WB_SIO, 0);
318
319 *dest = word;
307
308 return;
309}
310
311/*
312 * Read a sequence of words from the EEPROM.
313 */
314static void
315wb_read_eeprom(sc, dest, off, cnt, swap)
316 struct wb_softc *sc;

--- 8 unchanged lines hidden (view full) ---

325 for (i = 0; i < cnt; i++) {
326 wb_eeprom_getword(sc, off + i, &word);
327 ptr = (u_int16_t *)(dest + (i * 2));
328 if (swap)
329 *ptr = ntohs(word);
330 else
331 *ptr = word;
332 }
320}
321
322/*
323 * Read a sequence of words from the EEPROM.
324 */
325static void
326wb_read_eeprom(sc, dest, off, cnt, swap)
327 struct wb_softc *sc;

--- 8 unchanged lines hidden (view full) ---

336 for (i = 0; i < cnt; i++) {
337 wb_eeprom_getword(sc, off + i, &word);
338 ptr = (u_int16_t *)(dest + (i * 2));
339 if (swap)
340 *ptr = ntohs(word);
341 else
342 *ptr = word;
343 }
333
334 return;
335}
336
337/*
344}
345
346/*
338 * Sync the PHYs by setting data bit and strobing the clock 32 times.
347 * Read the MII serial port for the MII bit-bang module.
339 */
348 */
340static void
341wb_mii_sync(sc)
342 struct wb_softc *sc;
349static uint32_t
350wb_mii_bitbang_read(device_t dev)
343{
351{
344 register int i;
352 struct wb_softc *sc;
353 uint32_t val;
345
354
346 SIO_SET(WB_SIO_MII_DIR|WB_SIO_MII_DATAIN);
355 sc = device_get_softc(dev);
347
356
348 for (i = 0; i < 32; i++) {
349 SIO_SET(WB_SIO_MII_CLK);
350 DELAY(1);
351 SIO_CLR(WB_SIO_MII_CLK);
352 DELAY(1);
353 }
357 val = CSR_READ_4(sc, WB_SIO);
358 CSR_BARRIER(sc, WB_SIO, 4,
359 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
354
360
355 return;
361 return (val);
356}
357
358/*
362}
363
364/*
359 * Clock a series of bits through the MII.
365 * Write the MII serial port for the MII bit-bang module.
360 */
361static void
366 */
367static void
362wb_mii_send(sc, bits, cnt)
363 struct wb_softc *sc;
364 u_int32_t bits;
365 int cnt;
368wb_mii_bitbang_write(device_t dev, uint32_t val)
366{
369{
367 int i;
370 struct wb_softc *sc;
368
371
369 SIO_CLR(WB_SIO_MII_CLK);
372 sc = device_get_softc(dev);
370
373
371 for (i = (0x1 << (cnt - 1)); i; i >>= 1) {
372 if (bits & i) {
373 SIO_SET(WB_SIO_MII_DATAIN);
374 } else {
375 SIO_CLR(WB_SIO_MII_DATAIN);
376 }
377 DELAY(1);
378 SIO_CLR(WB_SIO_MII_CLK);
379 DELAY(1);
380 SIO_SET(WB_SIO_MII_CLK);
381 }
374 CSR_WRITE_4(sc, WB_SIO, val);
375 CSR_BARRIER(sc, WB_SIO, 4,
376 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
382}
383
377}
378
384/*
385 * Read an PHY register through the MII.
386 */
387static int
379static int
388wb_mii_readreg(sc, frame)
389 struct wb_softc *sc;
390 struct wb_mii_frame *frame;
391
392{
393 int i, ack;
394
395 /*
396 * Set up frame for RX.
397 */
398 frame->mii_stdelim = WB_MII_STARTDELIM;
399 frame->mii_opcode = WB_MII_READOP;
400 frame->mii_turnaround = 0;
401 frame->mii_data = 0;
402
403 CSR_WRITE_4(sc, WB_SIO, 0);
404
405 /*
406 * Turn on data xmit.
407 */
408 SIO_SET(WB_SIO_MII_DIR);
409
410 wb_mii_sync(sc);
411
412 /*
413 * Send command/address info.
414 */
415 wb_mii_send(sc, frame->mii_stdelim, 2);
416 wb_mii_send(sc, frame->mii_opcode, 2);
417 wb_mii_send(sc, frame->mii_phyaddr, 5);
418 wb_mii_send(sc, frame->mii_regaddr, 5);
419
420 /* Idle bit */
421 SIO_CLR((WB_SIO_MII_CLK|WB_SIO_MII_DATAIN));
422 DELAY(1);
423 SIO_SET(WB_SIO_MII_CLK);
424 DELAY(1);
425
426 /* Turn off xmit. */
427 SIO_CLR(WB_SIO_MII_DIR);
428 /* Check for ack */
429 SIO_CLR(WB_SIO_MII_CLK);
430 DELAY(1);
431 ack = CSR_READ_4(sc, WB_SIO) & WB_SIO_MII_DATAOUT;
432 SIO_SET(WB_SIO_MII_CLK);
433 DELAY(1);
434 SIO_CLR(WB_SIO_MII_CLK);
435 DELAY(1);
436 SIO_SET(WB_SIO_MII_CLK);
437 DELAY(1);
438
439 /*
440 * Now try reading data bits. If the ack failed, we still
441 * need to clock through 16 cycles to keep the PHY(s) in sync.
442 */
443 if (ack) {
444 for(i = 0; i < 16; i++) {
445 SIO_CLR(WB_SIO_MII_CLK);
446 DELAY(1);
447 SIO_SET(WB_SIO_MII_CLK);
448 DELAY(1);
449 }
450 goto fail;
451 }
452
453 for (i = 0x8000; i; i >>= 1) {
454 SIO_CLR(WB_SIO_MII_CLK);
455 DELAY(1);
456 if (!ack) {
457 if (CSR_READ_4(sc, WB_SIO) & WB_SIO_MII_DATAOUT)
458 frame->mii_data |= i;
459 DELAY(1);
460 }
461 SIO_SET(WB_SIO_MII_CLK);
462 DELAY(1);
463 }
464
465fail:
466
467 SIO_CLR(WB_SIO_MII_CLK);
468 DELAY(1);
469 SIO_SET(WB_SIO_MII_CLK);
470 DELAY(1);
471
472 if (ack)
473 return(1);
474 return(0);
475}
476
477/*
478 * Write to a PHY register through the MII.
479 */
480static int
481wb_mii_writereg(sc, frame)
482 struct wb_softc *sc;
483 struct wb_mii_frame *frame;
484
485{
486
487 /*
488 * Set up frame for TX.
489 */
490
491 frame->mii_stdelim = WB_MII_STARTDELIM;
492 frame->mii_opcode = WB_MII_WRITEOP;
493 frame->mii_turnaround = WB_MII_TURNAROUND;
494
495 /*
496 * Turn on data output.
497 */
498 SIO_SET(WB_SIO_MII_DIR);
499
500 wb_mii_sync(sc);
501
502 wb_mii_send(sc, frame->mii_stdelim, 2);
503 wb_mii_send(sc, frame->mii_opcode, 2);
504 wb_mii_send(sc, frame->mii_phyaddr, 5);
505 wb_mii_send(sc, frame->mii_regaddr, 5);
506 wb_mii_send(sc, frame->mii_turnaround, 2);
507 wb_mii_send(sc, frame->mii_data, 16);
508
509 /* Idle bit. */
510 SIO_SET(WB_SIO_MII_CLK);
511 DELAY(1);
512 SIO_CLR(WB_SIO_MII_CLK);
513 DELAY(1);
514
515 /*
516 * Turn off xmit.
517 */
518 SIO_CLR(WB_SIO_MII_DIR);
519
520 return(0);
521}
522
523static int
524wb_miibus_readreg(dev, phy, reg)
525 device_t dev;
526 int phy, reg;
527{
380wb_miibus_readreg(dev, phy, reg)
381 device_t dev;
382 int phy, reg;
383{
528 struct wb_softc *sc;
529 struct wb_mii_frame frame;
530
384
531 sc = device_get_softc(dev);
532
533 bzero((char *)&frame, sizeof(frame));
534
535 frame.mii_phyaddr = phy;
536 frame.mii_regaddr = reg;
537 wb_mii_readreg(sc, &frame);
538
539 return(frame.mii_data);
385 return (mii_bitbang_readreg(dev, &wb_mii_bitbang_ops, phy, reg));
540}
541
542static int
543wb_miibus_writereg(dev, phy, reg, data)
544 device_t dev;
545 int phy, reg, data;
546{
386}
387
388static int
389wb_miibus_writereg(dev, phy, reg, data)
390 device_t dev;
391 int phy, reg, data;
392{
547 struct wb_softc *sc;
548 struct wb_mii_frame frame;
549
393
550 sc = device_get_softc(dev);
394 mii_bitbang_writereg(dev, &wb_mii_bitbang_ops, phy, reg, data);
551
395
552 bzero((char *)&frame, sizeof(frame));
553
554 frame.mii_phyaddr = phy;
555 frame.mii_regaddr = reg;
556 frame.mii_data = data;
557
558 wb_mii_writereg(sc, &frame);
559
560 return(0);
561}
562
563static void
564wb_miibus_statchg(dev)
565 device_t dev;
566{
567 struct wb_softc *sc;
568 struct mii_data *mii;
569
570 sc = device_get_softc(dev);
571 mii = device_get_softc(sc->wb_miibus);
572 wb_setcfg(sc, mii->mii_media_active);
396 return(0);
397}
398
399static void
400wb_miibus_statchg(dev)
401 device_t dev;
402{
403 struct wb_softc *sc;
404 struct mii_data *mii;
405
406 sc = device_get_softc(dev);
407 mii = device_get_softc(sc->wb_miibus);
408 wb_setcfg(sc, mii->mii_media_active);
573
574 return;
575}
576
577/*
578 * Program the 64-bit multicast hash filter.
579 */
580static void
581wb_setmulti(sc)
582 struct wb_softc *sc;

--- 39 unchanged lines hidden (view full) ---

622 if (mcnt)
623 rxfilt |= WB_NETCFG_RX_MULTI;
624 else
625 rxfilt &= ~WB_NETCFG_RX_MULTI;
626
627 CSR_WRITE_4(sc, WB_MAR0, hashes[0]);
628 CSR_WRITE_4(sc, WB_MAR1, hashes[1]);
629 CSR_WRITE_4(sc, WB_NETCFG, rxfilt);
409}
410
411/*
412 * Program the 64-bit multicast hash filter.
413 */
414static void
415wb_setmulti(sc)
416 struct wb_softc *sc;

--- 39 unchanged lines hidden (view full) ---

456 if (mcnt)
457 rxfilt |= WB_NETCFG_RX_MULTI;
458 else
459 rxfilt &= ~WB_NETCFG_RX_MULTI;
460
461 CSR_WRITE_4(sc, WB_MAR0, hashes[0]);
462 CSR_WRITE_4(sc, WB_MAR1, hashes[1]);
463 CSR_WRITE_4(sc, WB_NETCFG, rxfilt);
630
631 return;
632}
633
634/*
635 * The Winbond manual states that in order to fiddle with the
636 * 'full-duplex' and '100Mbps' bits in the netconfig register, we
637 * first have to put the transmit and/or receive logic in the idle state.
638 */
639static void

--- 26 unchanged lines hidden (view full) ---

666
667 if ((media & IFM_GMASK) == IFM_FDX)
668 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
669 else
670 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
671
672 if (restart)
673 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON|WB_NETCFG_RX_ON);
464}
465
466/*
467 * The Winbond manual states that in order to fiddle with the
468 * 'full-duplex' and '100Mbps' bits in the netconfig register, we
469 * first have to put the transmit and/or receive logic in the idle state.
470 */
471static void

--- 26 unchanged lines hidden (view full) ---

498
499 if ((media & IFM_GMASK) == IFM_FDX)
500 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
501 else
502 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
503
504 if (restart)
505 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON|WB_NETCFG_RX_ON);
674
675 return;
676}
677
678static void
679wb_reset(sc)
680 struct wb_softc *sc;
681{
682 register int i;
683 struct mii_data *mii;

--- 53 unchanged lines hidden (view full) ---

737/*
738 * Probe for a Winbond chip. Check the PCI vendor and device
739 * IDs against our list and return a device name if we find a match.
740 */
741static int
742wb_probe(dev)
743 device_t dev;
744{
506}
507
508static void
509wb_reset(sc)
510 struct wb_softc *sc;
511{
512 register int i;
513 struct mii_data *mii;

--- 53 unchanged lines hidden (view full) ---

567/*
568 * Probe for a Winbond chip. Check the PCI vendor and device
569 * IDs against our list and return a device name if we find a match.
570 */
571static int
572wb_probe(dev)
573 device_t dev;
574{
745 struct wb_type *t;
575 const struct wb_type *t;
746
747 t = wb_devs;
748
749 while(t->wb_name != NULL) {
750 if ((pci_get_vendor(dev) == t->wb_vid) &&
751 (pci_get_device(dev) == t->wb_did)) {
752 device_set_desc(dev, t->wb_name);
753 return (BUS_PROBE_DEFAULT);

--- 242 unchanged lines hidden (view full) ---

996 return(0);
997}
998
999static void
1000wb_bfree(buf, args)
1001 void *buf;
1002 void *args;
1003{
576
577 t = wb_devs;
578
579 while(t->wb_name != NULL) {
580 if ((pci_get_vendor(dev) == t->wb_vid) &&
581 (pci_get_device(dev) == t->wb_did)) {
582 device_set_desc(dev, t->wb_name);
583 return (BUS_PROBE_DEFAULT);

--- 242 unchanged lines hidden (view full) ---

826 return(0);
827}
828
829static void
830wb_bfree(buf, args)
831 void *buf;
832 void *args;
833{
1004 return;
834
1005}
1006
1007/*
1008 * Initialize an RX descriptor and attach an MBUF cluster.
1009 */
1010static int
1011wb_newbuf(sc, c, m)
1012 struct wb_softc *sc;

--- 109 unchanged lines hidden (view full) ---

1122{
1123 wb_rxeof(sc);
1124
1125 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
1126 CSR_WRITE_4(sc, WB_RXADDR, vtophys(&sc->wb_ldata->wb_rx_list[0]));
1127 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
1128 if (CSR_READ_4(sc, WB_ISR) & WB_RXSTATE_SUSPEND)
1129 CSR_WRITE_4(sc, WB_RXSTART, 0xFFFFFFFF);
835}
836
837/*
838 * Initialize an RX descriptor and attach an MBUF cluster.
839 */
840static int
841wb_newbuf(sc, c, m)
842 struct wb_softc *sc;

--- 109 unchanged lines hidden (view full) ---

952{
953 wb_rxeof(sc);
954
955 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
956 CSR_WRITE_4(sc, WB_RXADDR, vtophys(&sc->wb_ldata->wb_rx_list[0]));
957 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
958 if (CSR_READ_4(sc, WB_ISR) & WB_RXSTATE_SUSPEND)
959 CSR_WRITE_4(sc, WB_RXSTART, 0xFFFFFFFF);
1130
1131 return;
1132}
1133
1134/*
1135 * A frame was downloaded to the chip. It's safe for us to clean up
1136 * the list buffers.
1137 */
1138static void
1139wb_txeof(sc)

--- 40 unchanged lines hidden (view full) ---

1180 if (sc->wb_cdata.wb_tx_head == sc->wb_cdata.wb_tx_tail) {
1181 sc->wb_cdata.wb_tx_head = NULL;
1182 sc->wb_cdata.wb_tx_tail = NULL;
1183 break;
1184 }
1185
1186 sc->wb_cdata.wb_tx_head = cur_tx->wb_nextdesc;
1187 }
960}
961
962/*
963 * A frame was downloaded to the chip. It's safe for us to clean up
964 * the list buffers.
965 */
966static void
967wb_txeof(sc)

--- 40 unchanged lines hidden (view full) ---

1008 if (sc->wb_cdata.wb_tx_head == sc->wb_cdata.wb_tx_tail) {
1009 sc->wb_cdata.wb_tx_head = NULL;
1010 sc->wb_cdata.wb_tx_tail = NULL;
1011 break;
1012 }
1013
1014 sc->wb_cdata.wb_tx_head = cur_tx->wb_nextdesc;
1015 }
1188
1189 return;
1190}
1191
1192/*
1193 * TX 'end of channel' interrupt handler.
1194 */
1195static void
1196wb_txeoc(sc)
1197 struct wb_softc *sc;

--- 9 unchanged lines hidden (view full) ---

1207 sc->wb_cdata.wb_tx_tail = NULL;
1208 } else {
1209 if (WB_TXOWN(sc->wb_cdata.wb_tx_head) == WB_UNSENT) {
1210 WB_TXOWN(sc->wb_cdata.wb_tx_head) = WB_TXSTAT_OWN;
1211 sc->wb_timer = 5;
1212 CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
1213 }
1214 }
1016}
1017
1018/*
1019 * TX 'end of channel' interrupt handler.
1020 */
1021static void
1022wb_txeoc(sc)
1023 struct wb_softc *sc;

--- 9 unchanged lines hidden (view full) ---

1033 sc->wb_cdata.wb_tx_tail = NULL;
1034 } else {
1035 if (WB_TXOWN(sc->wb_cdata.wb_tx_head) == WB_UNSENT) {
1036 WB_TXOWN(sc->wb_cdata.wb_tx_head) = WB_TXSTAT_OWN;
1037 sc->wb_timer = 5;
1038 CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
1039 }
1040 }
1215
1216 return;
1217}
1218
1219static void
1220wb_intr(arg)
1221 void *arg;
1222{
1223 struct wb_softc *sc;
1224 struct ifnet *ifp;

--- 70 unchanged lines hidden (view full) ---

1295 /* Re-enable interrupts. */
1296 CSR_WRITE_4(sc, WB_IMR, WB_INTRS);
1297
1298 if (ifp->if_snd.ifq_head != NULL) {
1299 wb_start_locked(ifp);
1300 }
1301
1302 WB_UNLOCK(sc);
1041}
1042
1043static void
1044wb_intr(arg)
1045 void *arg;
1046{
1047 struct wb_softc *sc;
1048 struct ifnet *ifp;

--- 70 unchanged lines hidden (view full) ---

1119 /* Re-enable interrupts. */
1120 CSR_WRITE_4(sc, WB_IMR, WB_INTRS);
1121
1122 if (ifp->if_snd.ifq_head != NULL) {
1123 wb_start_locked(ifp);
1124 }
1125
1126 WB_UNLOCK(sc);
1303
1304 return;
1305}
1306
1307static void
1308wb_tick(xsc)
1309 void *xsc;
1310{
1311 struct wb_softc *sc;
1312 struct mii_data *mii;
1313
1314 sc = xsc;
1315 WB_LOCK_ASSERT(sc);
1316 mii = device_get_softc(sc->wb_miibus);
1317
1318 mii_tick(mii);
1319
1320 if (sc->wb_timer > 0 && --sc->wb_timer == 0)
1321 wb_watchdog(sc);
1322 callout_reset(&sc->wb_stat_callout, hz, wb_tick, sc);
1127}
1128
1129static void
1130wb_tick(xsc)
1131 void *xsc;
1132{
1133 struct wb_softc *sc;
1134 struct mii_data *mii;
1135
1136 sc = xsc;
1137 WB_LOCK_ASSERT(sc);
1138 mii = device_get_softc(sc->wb_miibus);
1139
1140 mii_tick(mii);
1141
1142 if (sc->wb_timer > 0 && --sc->wb_timer == 0)
1143 wb_watchdog(sc);
1144 callout_reset(&sc->wb_stat_callout, hz, wb_tick, sc);
1323
1324 return;
1325}
1326
1327/*
1328 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1329 * pointers to the fragment pointers.
1330 */
1331static int
1332wb_encap(sc, c, m_head)

--- 182 unchanged lines hidden (view full) ---

1515 */
1516 WB_TXOWN(start_tx) = WB_UNSENT;
1517 }
1518
1519 /*
1520 * Set a timeout in case the chip goes out to lunch.
1521 */
1522 sc->wb_timer = 5;
1145}
1146
1147/*
1148 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1149 * pointers to the fragment pointers.
1150 */
1151static int
1152wb_encap(sc, c, m_head)

--- 182 unchanged lines hidden (view full) ---

1335 */
1336 WB_TXOWN(start_tx) = WB_UNSENT;
1337 }
1338
1339 /*
1340 * Set a timeout in case the chip goes out to lunch.
1341 */
1342 sc->wb_timer = 5;
1523
1524 return;
1525}
1526
1527static void
1528wb_init(xsc)
1529 void *xsc;
1530{
1531 struct wb_softc *sc = xsc;
1532

--- 109 unchanged lines hidden (view full) ---

1642 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
1643
1644 mii_mediachg(mii);
1645
1646 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1647 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1648
1649 callout_reset(&sc->wb_stat_callout, hz, wb_tick, sc);
1343}
1344
1345static void
1346wb_init(xsc)
1347 void *xsc;
1348{
1349 struct wb_softc *sc = xsc;
1350

--- 109 unchanged lines hidden (view full) ---

1460 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
1461
1462 mii_mediachg(mii);
1463
1464 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1465 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1466
1467 callout_reset(&sc->wb_stat_callout, hz, wb_tick, sc);
1650
1651 return;
1652}
1653
1654/*
1655 * Set media options.
1656 */
1657static int
1658wb_ifmedia_upd(ifp)
1659 struct ifnet *ifp;

--- 25 unchanged lines hidden (view full) ---

1685
1686 WB_LOCK(sc);
1687 mii = device_get_softc(sc->wb_miibus);
1688
1689 mii_pollstat(mii);
1690 ifmr->ifm_active = mii->mii_media_active;
1691 ifmr->ifm_status = mii->mii_media_status;
1692 WB_UNLOCK(sc);
1468}
1469
1470/*
1471 * Set media options.
1472 */
1473static int
1474wb_ifmedia_upd(ifp)
1475 struct ifnet *ifp;

--- 25 unchanged lines hidden (view full) ---

1501
1502 WB_LOCK(sc);
1503 mii = device_get_softc(sc->wb_miibus);
1504
1505 mii_pollstat(mii);
1506 ifmr->ifm_active = mii->mii_media_active;
1507 ifmr->ifm_status = mii->mii_media_status;
1508 WB_UNLOCK(sc);
1693
1694 return;
1695}
1696
1697static int
1698wb_ioctl(ifp, command, data)
1699 struct ifnet *ifp;
1700 u_long command;
1701 caddr_t data;
1702{

--- 49 unchanged lines hidden (view full) ---

1752 if_printf(ifp, "no carrier - transceiver cable problem?\n");
1753#endif
1754 wb_stop(sc);
1755 wb_reset(sc);
1756 wb_init_locked(sc);
1757
1758 if (ifp->if_snd.ifq_head != NULL)
1759 wb_start_locked(ifp);
1509}
1510
1511static int
1512wb_ioctl(ifp, command, data)
1513 struct ifnet *ifp;
1514 u_long command;
1515 caddr_t data;
1516{

--- 49 unchanged lines hidden (view full) ---

1566 if_printf(ifp, "no carrier - transceiver cable problem?\n");
1567#endif
1568 wb_stop(sc);
1569 wb_reset(sc);
1570 wb_init_locked(sc);
1571
1572 if (ifp->if_snd.ifq_head != NULL)
1573 wb_start_locked(ifp);
1760
1761 return;
1762}
1763
1764/*
1765 * Stop the adapter and free any mbufs allocated to the
1766 * RX and TX lists.
1767 */
1768static void
1769wb_stop(sc)

--- 34 unchanged lines hidden (view full) ---

1804 sc->wb_cdata.wb_tx_chain[i].wb_mbuf = NULL;
1805 }
1806 }
1807
1808 bzero((char *)&sc->wb_ldata->wb_tx_list,
1809 sizeof(sc->wb_ldata->wb_tx_list));
1810
1811 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1574}
1575
1576/*
1577 * Stop the adapter and free any mbufs allocated to the
1578 * RX and TX lists.
1579 */
1580static void
1581wb_stop(sc)

--- 34 unchanged lines hidden (view full) ---

1616 sc->wb_cdata.wb_tx_chain[i].wb_mbuf = NULL;
1617 }
1618 }
1619
1620 bzero((char *)&sc->wb_ldata->wb_tx_list,
1621 sizeof(sc->wb_ldata->wb_tx_list));
1622
1623 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1812
1813 return;
1814}
1815
1816/*
1817 * Stop all chip I/O so that the kernel's probe routines don't
1818 * get confused by errant DMAs when rebooting.
1819 */
1820static int
1821wb_shutdown(dev)

--- 12 unchanged lines hidden --- 		1624}
1625
1626/*
1627 * Stop all chip I/O so that the kernel's probe routines don't
1628 * get confused by errant DMAs when rebooting.
1629 */
1630static int
1631wb_shutdown(dev)

--- 12 unchanged lines hidden ---