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if_runreg.h (257411) if_runreg.h (257955)
1/* $OpenBSD: rt2860reg.h,v 1.19 2009/05/18 19:25:07 damien Exp $ */
2
3/*-
4 * Copyright (c) 2007
5 * Damien Bergamini <damien.bergamini@free.fr>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
1/* $OpenBSD: rt2860reg.h,v 1.19 2009/05/18 19:25:07 damien Exp $ */
2
3/*-
4 * Copyright (c) 2007
5 * Damien Bergamini <damien.bergamini@free.fr>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 *
19 * $FreeBSD: head/sys/dev/usb/wlan/if_runreg.h 257411 2013-10-31 02:03:30Z kevlo $
19 * $FreeBSD: head/sys/dev/usb/wlan/if_runreg.h 257955 2013-11-11 09:47:33Z kevlo $
20 */
21
22#ifndef _IF_RUNREG_H_
23#define _IF_RUNREG_H_
24
25/* PCI registers */
26#define RT2860_PCI_CFG 0x0000
27#define RT2860_PCI_EECTRL 0x0004

--- 176 unchanged lines hidden (view full) ---

204#define RT2860_SKEY_MODE_8_15 0x7004
205#define RT2860_SKEY_MODE_16_23 0x7008
206#define RT2860_SKEY_MODE_24_31 0x700c
207
208/* Shared Memory between MCU and host */
209#define RT2860_H2M_MAILBOX 0x7010
210#define RT2860_H2M_MAILBOX_CID 0x7014
211#define RT2860_H2M_MAILBOX_STATUS 0x701c
20 */
21
22#ifndef _IF_RUNREG_H_
23#define _IF_RUNREG_H_
24
25/* PCI registers */
26#define RT2860_PCI_CFG 0x0000
27#define RT2860_PCI_EECTRL 0x0004

--- 176 unchanged lines hidden (view full) ---

204#define RT2860_SKEY_MODE_8_15 0x7004
205#define RT2860_SKEY_MODE_16_23 0x7008
206#define RT2860_SKEY_MODE_24_31 0x700c
207
208/* Shared Memory between MCU and host */
209#define RT2860_H2M_MAILBOX 0x7010
210#define RT2860_H2M_MAILBOX_CID 0x7014
211#define RT2860_H2M_MAILBOX_STATUS 0x701c
212#define RT2860_H2M_INTSRC 0x7024
212#define RT2860_H2M_BBPAGENT 0x7028
213#define RT2860_BCN_BASE(vap) (0x7800 + (vap) * 512)
214
215
216/* possible flags for register RT2860_PCI_EECTRL */
217#define RT2860_C (1 << 0)
218#define RT2860_S (1 << 1)
219#define RT2860_D (1 << 2)

--- 463 unchanged lines hidden (view full) ---

683/* possible flags for MCU command RT2860_MCU_CMD_LEDS */
684#define RT2860_LED_RADIO (1 << 13)
685#define RT2860_LED_LINK_2GHZ (1 << 14)
686#define RT2860_LED_LINK_5GHZ (1 << 15)
687
688
689/* possible flags for RT3020 RF register 1 */
690#define RT3070_RF_BLOCK (1 << 0)
213#define RT2860_H2M_BBPAGENT 0x7028
214#define RT2860_BCN_BASE(vap) (0x7800 + (vap) * 512)
215
216
217/* possible flags for register RT2860_PCI_EECTRL */
218#define RT2860_C (1 << 0)
219#define RT2860_S (1 << 1)
220#define RT2860_D (1 << 2)

--- 463 unchanged lines hidden (view full) ---

684/* possible flags for MCU command RT2860_MCU_CMD_LEDS */
685#define RT2860_LED_RADIO (1 << 13)
686#define RT2860_LED_LINK_2GHZ (1 << 14)
687#define RT2860_LED_LINK_5GHZ (1 << 15)
688
689
690/* possible flags for RT3020 RF register 1 */
691#define RT3070_RF_BLOCK (1 << 0)
692#define RT3070_PLL_PD (1 << 1)
691#define RT3070_RX0_PD (1 << 2)
692#define RT3070_TX0_PD (1 << 3)
693#define RT3070_RX1_PD (1 << 4)
694#define RT3070_TX1_PD (1 << 5)
695
696/* possible flags for RT3020 RF register 15 */
697#define RT3070_TX_LO2 (1 << 3)
698
699/* possible flags for RT3020 RF register 17 */
700#define RT3070_TX_LO1 (1 << 3)
701
702/* possible flags for RT3020 RF register 20 */
703#define RT3070_RX_LO1 (1 << 3)
704
705/* possible flags for RT3020 RF register 21 */
706#define RT3070_RX_LO2 (1 << 3)
707
693#define RT3070_RX0_PD (1 << 2)
694#define RT3070_TX0_PD (1 << 3)
695#define RT3070_RX1_PD (1 << 4)
696#define RT3070_TX1_PD (1 << 5)
697
698/* possible flags for RT3020 RF register 15 */
699#define RT3070_TX_LO2 (1 << 3)
700
701/* possible flags for RT3020 RF register 17 */
702#define RT3070_TX_LO1 (1 << 3)
703
704/* possible flags for RT3020 RF register 20 */
705#define RT3070_RX_LO1 (1 << 3)
706
707/* possible flags for RT3020 RF register 21 */
708#define RT3070_RX_LO2 (1 << 3)
709
710/* Possible flags for RT5390 RF register 3. */
711#define RT5390_VCOCAL (1 << 7)
708
712
713/* Possible flags for RT5390 RF register 38. */
714#define RT5390_RX_LO1 (1 << 5)
715
716/* Possible flags for RT5390 RF register 39. */
717#define RT5390_RX_LO2 (1 << 7)
718
709/* RT2860 TX descriptor */
710struct rt2860_txd {
711 uint32_t sdp0; /* Segment Data Pointer 0 */
712 uint16_t sdl1; /* Segment Data Length 1 */
713#define RT2860_TX_BURST (1 << 15)
714#define RT2860_TX_LS1 (1 << 14) /* SDP1 is the last segment */
715
716 uint16_t sdl0; /* Segment Data Length 0 */

--- 117 unchanged lines hidden (view full) ---

834 sizeof (struct ieee80211_htframe) + \
835 sizeof (uint16_t))
836
837#define RT2860_RF1 0
838#define RT2860_RF2 2
839#define RT2860_RF3 1
840#define RT2860_RF4 3
841
719/* RT2860 TX descriptor */
720struct rt2860_txd {
721 uint32_t sdp0; /* Segment Data Pointer 0 */
722 uint16_t sdl1; /* Segment Data Length 1 */
723#define RT2860_TX_BURST (1 << 15)
724#define RT2860_TX_LS1 (1 << 14) /* SDP1 is the last segment */
725
726 uint16_t sdl0; /* Segment Data Length 0 */

--- 117 unchanged lines hidden (view full) ---

844 sizeof (struct ieee80211_htframe) + \
845 sizeof (uint16_t))
846
847#define RT2860_RF1 0
848#define RT2860_RF2 2
849#define RT2860_RF3 1
850#define RT2860_RF4 3
851
842#define RT2860_RF_2820 1 /* 2T3R */
843#define RT2860_RF_2850 2 /* dual-band 2T3R */
844#define RT2860_RF_2720 3 /* 1T2R */
845#define RT2860_RF_2750 4 /* dual-band 1T2R */
846#define RT3070_RF_3020 5 /* 1T1R */
847#define RT3070_RF_2020 6 /* b/g */
848#define RT3070_RF_3021 7 /* 1T2R */
849#define RT3070_RF_3022 8 /* 2T2R */
850#define RT3070_RF_3052 9 /* dual-band 2T2R */
852#define RT2860_RF_2820 0x0001 /* 2T3R */
853#define RT2860_RF_2850 0x0002 /* dual-band 2T3R */
854#define RT2860_RF_2720 0x0003 /* 1T2R */
855#define RT2860_RF_2750 0x0004 /* dual-band 1T2R */
856#define RT3070_RF_3020 0x0005 /* 1T1R */
857#define RT3070_RF_2020 0x0006 /* b/g */
858#define RT3070_RF_3021 0x0007 /* 1T2R */
859#define RT3070_RF_3022 0x0008 /* 2T2R */
860#define RT3070_RF_3052 0x0009 /* dual-band 2T2R */
861#define RT5390_RF_5370 0x5370 /* 1T1R */
862#define RT5390_RF_5372 0x5372 /* 2T2R */
851
852/* USB commands for RT2870 only */
853#define RT2870_RESET 1
854#define RT2870_WRITE_2 2
855#define RT2870_WRITE_REGION_1 6
856#define RT2870_READ_REGION_1 7
857#define RT2870_EEPROM_READ 9
858

--- 149 unchanged lines hidden (view full) ---

1008 { 84, 0x99 }, \
1009 { 86, 0x00 }, \
1010 { 91, 0x04 }, \
1011 { 92, 0x00 }, \
1012 { 103, 0x00 }, \
1013 { 105, 0x05 }, \
1014 { 106, 0x35 }
1015
863
864/* USB commands for RT2870 only */
865#define RT2870_RESET 1
866#define RT2870_WRITE_2 2
867#define RT2870_WRITE_REGION_1 6
868#define RT2870_READ_REGION_1 7
869#define RT2870_EEPROM_READ 9
870

--- 149 unchanged lines hidden (view full) ---

1020 { 84, 0x99 }, \
1021 { 86, 0x00 }, \
1022 { 91, 0x04 }, \
1023 { 92, 0x00 }, \
1024 { 103, 0x00 }, \
1025 { 105, 0x05 }, \
1026 { 106, 0x35 }
1027
1028#define RT5390_DEF_BBP \
1029 { 31, 0x08 }, \
1030 { 65, 0x2c }, \
1031 { 66, 0x38 }, \
1032 { 68, 0x0b }, \
1033 { 69, 0x0d }, \
1034 { 70, 0x06 }, \
1035 { 73, 0x13 }, \
1036 { 75, 0x46 }, \
1037 { 76, 0x28 }, \
1038 { 77, 0x59 }, \
1039 { 81, 0x37 }, \
1040 { 82, 0x62 }, \
1041 { 83, 0x7a }, \
1042 { 84, 0x9a }, \
1043 { 86, 0x38 }, \
1044 { 91, 0x04 }, \
1045 { 92, 0x02 }, \
1046 { 103, 0xc0 }, \
1047 { 104, 0x92 }, \
1048 { 105, 0x3c }, \
1049 { 106, 0x03 }, \
1050 { 128, 0x12 }
1051
1016/*
1017 * Default settings for RF registers; values derived from the reference driver.
1018 */
1052/*
1053 * Default settings for RF registers; values derived from the reference driver.
1054 */
1019#define RT2860_RF2850 \
1020 { 1, 0x100bb3, 0x1301e1, 0x05a014, 0x001402 }, \
1021 { 2, 0x100bb3, 0x1301e1, 0x05a014, 0x001407 }, \
1022 { 3, 0x100bb3, 0x1301e2, 0x05a014, 0x001402 }, \
1023 { 4, 0x100bb3, 0x1301e2, 0x05a014, 0x001407 }, \
1024 { 5, 0x100bb3, 0x1301e3, 0x05a014, 0x001402 }, \
1025 { 6, 0x100bb3, 0x1301e3, 0x05a014, 0x001407 }, \
1026 { 7, 0x100bb3, 0x1301e4, 0x05a014, 0x001402 }, \
1027 { 8, 0x100bb3, 0x1301e4, 0x05a014, 0x001407 }, \
1028 { 9, 0x100bb3, 0x1301e5, 0x05a014, 0x001402 }, \
1029 { 10, 0x100bb3, 0x1301e5, 0x05a014, 0x001407 }, \
1030 { 11, 0x100bb3, 0x1301e6, 0x05a014, 0x001402 }, \
1031 { 12, 0x100bb3, 0x1301e6, 0x05a014, 0x001407 }, \
1032 { 13, 0x100bb3, 0x1301e7, 0x05a014, 0x001402 }, \
1033 { 14, 0x100bb3, 0x1301e8, 0x05a014, 0x001404 }, \
1034 { 36, 0x100bb3, 0x130266, 0x056014, 0x001408 }, \
1035 { 38, 0x100bb3, 0x130267, 0x056014, 0x001404 }, \
1036 { 40, 0x100bb2, 0x1301a0, 0x056014, 0x001400 }, \
1037 { 44, 0x100bb2, 0x1301a0, 0x056014, 0x001408 }, \
1038 { 46, 0x100bb2, 0x1301a1, 0x056014, 0x001402 }, \
1039 { 48, 0x100bb2, 0x1301a1, 0x056014, 0x001406 }, \
1040 { 52, 0x100bb2, 0x1301a2, 0x056014, 0x001404 }, \
1041 { 54, 0x100bb2, 0x1301a2, 0x056014, 0x001408 }, \
1042 { 56, 0x100bb2, 0x1301a3, 0x056014, 0x001402 }, \
1043 { 60, 0x100bb2, 0x1301a4, 0x056014, 0x001400 }, \
1044 { 62, 0x100bb2, 0x1301a4, 0x056014, 0x001404 }, \
1045 { 64, 0x100bb2, 0x1301a4, 0x056014, 0x001408 }, \
1046 { 100, 0x100bb2, 0x1301ac, 0x05e014, 0x001400 }, \
1047 { 102, 0x100bb2, 0x1701ac, 0x15e014, 0x001404 }, \
1048 { 104, 0x100bb2, 0x1701ac, 0x15e014, 0x001408 }, \
1049 { 108, 0x100bb3, 0x17028c, 0x15e014, 0x001404 }, \
1050 { 110, 0x100bb3, 0x13028d, 0x05e014, 0x001400 }, \
1051 { 112, 0x100bb3, 0x13028d, 0x05e014, 0x001406 }, \
1052 { 116, 0x100bb3, 0x13028e, 0x05e014, 0x001408 }, \
1053 { 118, 0x100bb3, 0x13028f, 0x05e014, 0x001404 }, \
1054 { 120, 0x100bb1, 0x1300e0, 0x05e014, 0x001400 }, \
1055 { 124, 0x100bb1, 0x1300e0, 0x05e014, 0x001404 }, \
1056 { 126, 0x100bb1, 0x1300e0, 0x05e014, 0x001406 }, \
1057 { 128, 0x100bb1, 0x1300e0, 0x05e014, 0x001408 }, \
1058 { 132, 0x100bb1, 0x1300e1, 0x05e014, 0x001402 }, \
1059 { 134, 0x100bb1, 0x1300e1, 0x05e014, 0x001404 }, \
1060 { 136, 0x100bb1, 0x1300e1, 0x05e014, 0x001406 }, \
1061 { 140, 0x100bb1, 0x1300e2, 0x05e014, 0x001400 }, \
1062 { 149, 0x100bb1, 0x1300e2, 0x05e014, 0x001409 }, \
1063 { 151, 0x100bb1, 0x1300e3, 0x05e014, 0x001401 }, \
1064 { 153, 0x100bb1, 0x1300e3, 0x05e014, 0x001403 }, \
1065 { 157, 0x100bb1, 0x1300e3, 0x05e014, 0x001407 }, \
1066 { 159, 0x100bb1, 0x1300e3, 0x05e014, 0x001409 }, \
1067 { 161, 0x100bb1, 0x1300e4, 0x05e014, 0x001401 }, \
1068 { 165, 0x100bb1, 0x1300e4, 0x05e014, 0x001405 }, \
1069 { 167, 0x100bb1, 0x1300f4, 0x05e014, 0x001407 }, \
1070 { 169, 0x100bb1, 0x1300f4, 0x05e014, 0x001409 }, \
1071 { 171, 0x100bb1, 0x1300f5, 0x05e014, 0x001401 }, \
1072 { 173, 0x100bb1, 0x1300f5, 0x05e014, 0x001403 }
1055#define RT2860_RF2850 \
1056 { 1, 0x98402ecc, 0x984c0786, 0x9816b455, 0x9800510b }, \
1057 { 2, 0x98402ecc, 0x984c0786, 0x98168a55, 0x9800519f }, \
1058 { 3, 0x98402ecc, 0x984c078a, 0x98168a55, 0x9800518b }, \
1059 { 4, 0x98402ecc, 0x984c078a, 0x98168a55, 0x9800519f }, \
1060 { 5, 0x98402ecc, 0x984c078e, 0x98168a55, 0x9800518b }, \
1061 { 6, 0x98402ecc, 0x984c078e, 0x98168a55, 0x9800519f }, \
1062 { 7, 0x98402ecc, 0x984c0792, 0x98168a55, 0x9800518b }, \
1063 { 8, 0x98402ecc, 0x984c0792, 0x98168a55, 0x9800519f }, \
1064 { 9, 0x98402ecc, 0x984c0796, 0x98168a55, 0x9800518b }, \
1065 { 10, 0x98402ecc, 0x984c0796, 0x98168a55, 0x9800519f }, \
1066 { 11, 0x98402ecc, 0x984c079a, 0x98168a55, 0x9800518b }, \
1067 { 12, 0x98402ecc, 0x984c079a, 0x98168a55, 0x9800519f }, \
1068 { 13, 0x98402ecc, 0x984c079e, 0x98168a55, 0x9800518b }, \
1069 { 14, 0x98402ecc, 0x984c07a2, 0x98168a55, 0x98005193 }, \
1070 { 36, 0x98402ecc, 0x984c099a, 0x98158a55, 0x980ed1a3 }, \
1071 { 38, 0x98402ecc, 0x984c099e, 0x98158a55, 0x980ed193 }, \
1072 { 40, 0x98402ec8, 0x984c0682, 0x98158a55, 0x980ed183 }, \
1073 { 44, 0x98402ec8, 0x984c0682, 0x98158a55, 0x980ed1a3 }, \
1074 { 46, 0x98402ec8, 0x984c0686, 0x98158a55, 0x980ed18b }, \
1075 { 48, 0x98402ec8, 0x984c0686, 0x98158a55, 0x980ed19b }, \
1076 { 52, 0x98402ec8, 0x984c068a, 0x98158a55, 0x980ed193 }, \
1077 { 54, 0x98402ec8, 0x984c068a, 0x98158a55, 0x980ed1a3 }, \
1078 { 56, 0x98402ec8, 0x984c068e, 0x98158a55, 0x980ed18b }, \
1079 { 60, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed183 }, \
1080 { 62, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed193 }, \
1081 { 64, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed1a3 }, \
1082 { 100, 0x98402ec8, 0x984c06b2, 0x98178a55, 0x980ed783 }, \
1083 { 102, 0x98402ec8, 0x985c06b2, 0x98578a55, 0x980ed793 }, \
1084 { 104, 0x98402ec8, 0x985c06b2, 0x98578a55, 0x980ed1a3 }, \
1085 { 108, 0x98402ecc, 0x985c0a32, 0x98578a55, 0x980ed193 }, \
1086 { 110, 0x98402ecc, 0x984c0a36, 0x98178a55, 0x980ed183 }, \
1087 { 112, 0x98402ecc, 0x984c0a36, 0x98178a55, 0x980ed19b }, \
1088 { 116, 0x98402ecc, 0x984c0a3a, 0x98178a55, 0x980ed1a3 }, \
1089 { 118, 0x98402ecc, 0x984c0a3e, 0x98178a55, 0x980ed193 }, \
1090 { 120, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed183 }, \
1091 { 124, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed193 }, \
1092 { 126, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed15b }, \
1093 { 128, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed1a3 }, \
1094 { 132, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed18b }, \
1095 { 134, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed193 }, \
1096 { 136, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed19b }, \
1097 { 140, 0x98402ec4, 0x984c038a, 0x98178a55, 0x980ed183 }, \
1098 { 149, 0x98402ec4, 0x984c038a, 0x98178a55, 0x980ed1a7 }, \
1099 { 151, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed187 }, \
1100 { 153, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed18f }, \
1101 { 157, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed19f }, \
1102 { 159, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed1a7 }, \
1103 { 161, 0x98402ec4, 0x984c0392, 0x98178a55, 0x980ed187 }, \
1104 { 165, 0x98402ec4, 0x984c0392, 0x98178a55, 0x980ed197 }, \
1105 { 167, 0x98402ec4, 0x984c03d2, 0x98179855, 0x9815531f }, \
1106 { 169, 0x98402ec4, 0x984c03d2, 0x98179855, 0x98155327 }, \
1107 { 171, 0x98402ec4, 0x984c03d6, 0x98179855, 0x98155307 }, \
1108 { 173, 0x98402ec4, 0x984c03d6, 0x98179855, 0x9815530f }, \
1109 { 184, 0x95002ccc, 0x9500491e, 0x9509be55, 0x950c0a0b }, \
1110 { 188, 0x95002ccc, 0x95004922, 0x9509be55, 0x950c0a13 }, \
1111 { 192, 0x95002ccc, 0x95004926, 0x9509be55, 0x950c0a1b }, \
1112 { 196, 0x95002ccc, 0x9500492a, 0x9509be55, 0x950c0a23 }, \
1113 { 208, 0x95002ccc, 0x9500493a, 0x9509be55, 0x950c0a13 }, \
1114 { 212, 0x95002ccc, 0x9500493e, 0x9509be55, 0x950c0a1b }, \
1115 { 216, 0x95002ccc, 0x95004982, 0x9509be55, 0x950c0a23 }
1073
1074#define RT3070_RF3052 \
1075 { 0xf1, 2, 2 }, \
1076 { 0xf1, 2, 7 }, \
1077 { 0xf2, 2, 2 }, \
1078 { 0xf2, 2, 7 }, \
1079 { 0xf3, 2, 2 }, \
1080 { 0xf3, 2, 7 }, \

--- 94 unchanged lines hidden (view full) ---

1175 { 25, 0x15 }, \
1176 { 26, 0x85 }, \
1177 { 27, 0x00 }, \
1178 { 28, 0x00 }, \
1179 { 29, 0x9b }, \
1180 { 30, 0x09 }, \
1181 { 31, 0x10 }
1182
1116
1117#define RT3070_RF3052 \
1118 { 0xf1, 2, 2 }, \
1119 { 0xf1, 2, 7 }, \
1120 { 0xf2, 2, 2 }, \
1121 { 0xf2, 2, 7 }, \
1122 { 0xf3, 2, 2 }, \
1123 { 0xf3, 2, 7 }, \

--- 94 unchanged lines hidden (view full) ---

1218 { 25, 0x15 }, \
1219 { 26, 0x85 }, \
1220 { 27, 0x00 }, \
1221 { 28, 0x00 }, \
1222 { 29, 0x9b }, \
1223 { 30, 0x09 }, \
1224 { 31, 0x10 }
1225
1226#define RT5390_DEF_RF \
1227 { 1, 0x0f }, \
1228 { 2, 0x80 }, \
1229 { 3, 0x88 }, \
1230 { 5, 0x10 }, \
1231 { 6, 0xa0 }, \
1232 { 7, 0x00 }, \
1233 { 10, 0x53 }, \
1234 { 11, 0x4a }, \
1235 { 12, 0x46 }, \
1236 { 13, 0x9f }, \
1237 { 14, 0x00 }, \
1238 { 15, 0x00 }, \
1239 { 16, 0x00 }, \
1240 { 18, 0x03 }, \
1241 { 19, 0x00 }, \
1242 { 20, 0x00 }, \
1243 { 21, 0x00 }, \
1244 { 22, 0x20 }, \
1245 { 23, 0x00 }, \
1246 { 24, 0x00 }, \
1247 { 25, 0xc0 }, \
1248 { 26, 0x00 }, \
1249 { 27, 0x09 }, \
1250 { 28, 0x00 }, \
1251 { 29, 0x10 }, \
1252 { 30, 0x10 }, \
1253 { 31, 0x80 }, \
1254 { 32, 0x80 }, \
1255 { 33, 0x00 }, \
1256 { 34, 0x07 }, \
1257 { 35, 0x12 }, \
1258 { 36, 0x00 }, \
1259 { 37, 0x08 }, \
1260 { 38, 0x85 }, \
1261 { 39, 0x1b }, \
1262 { 40, 0x0b }, \
1263 { 41, 0xbb }, \
1264 { 42, 0xd2 }, \
1265 { 43, 0x9a }, \
1266 { 44, 0x0e }, \
1267 { 45, 0xa2 }, \
1268 { 46, 0x7b }, \
1269 { 47, 0x00 }, \
1270 { 48, 0x10 }, \
1271 { 49, 0x94 }, \
1272 { 52, 0x38 }, \
1273 { 53, 0x84 }, \
1274 { 54, 0x78 }, \
1275 { 55, 0x44 }, \
1276 { 56, 0x22 }, \
1277 { 57, 0x80 }, \
1278 { 58, 0x7f }, \
1279 { 59, 0x8f }, \
1280 { 60, 0x45 }, \
1281 { 61, 0xdd }, \
1282 { 62, 0x00 }, \
1283 { 63, 0x00 }
1183
1284
1285#define RT5392_DEF_RF \
1286 { 1, 0x17 }, \
1287 { 3, 0x88 }, \
1288 { 5, 0x10 }, \
1289 { 6, 0xe0 }, \
1290 { 7, 0x00 }, \
1291 { 10, 0x53 }, \
1292 { 11, 0x4a }, \
1293 { 12, 0x46 }, \
1294 { 13, 0x9f }, \
1295 { 14, 0x00 }, \
1296 { 15, 0x00 }, \
1297 { 16, 0x00 }, \
1298 { 18, 0x03 }, \
1299 { 19, 0x4d }, \
1300 { 20, 0x00 }, \
1301 { 21, 0x8d }, \
1302 { 22, 0x20 }, \
1303 { 23, 0x0b }, \
1304 { 24, 0x44 }, \
1305 { 25, 0x80 }, \
1306 { 26, 0x82 }, \
1307 { 27, 0x09 }, \
1308 { 28, 0x00 }, \
1309 { 29, 0x10 }, \
1310 { 30, 0x10 }, \
1311 { 31, 0x80 }, \
1312 { 32, 0x20 }, \
1313 { 33, 0xc0 }, \
1314 { 34, 0x07 }, \
1315 { 35, 0x12 }, \
1316 { 36, 0x00 }, \
1317 { 37, 0x08 }, \
1318 { 38, 0x89 }, \
1319 { 39, 0x1b }, \
1320 { 40, 0x0f }, \
1321 { 41, 0xbb }, \
1322 { 42, 0xd5 }, \
1323 { 43, 0x9b }, \
1324 { 44, 0x0e }, \
1325 { 45, 0xa2 }, \
1326 { 46, 0x73 }, \
1327 { 47, 0x0c }, \
1328 { 48, 0x10 }, \
1329 { 49, 0x94 }, \
1330 { 50, 0x94 }, \
1331 { 51, 0x3a }, \
1332 { 52, 0x48 }, \
1333 { 53, 0x44 }, \
1334 { 54, 0x38 }, \
1335 { 55, 0x43 }, \
1336 { 56, 0xa1 }, \
1337 { 57, 0x00 }, \
1338 { 58, 0x39 }, \
1339 { 59, 0x07 }, \
1340 { 60, 0x45 }, \
1341 { 61, 0x91 }, \
1342 { 62, 0x39 }, \
1343 { 63, 0x07 }
1344
1184union run_stats {
1185 uint32_t raw;
1186 struct {
1187 uint16_t fail;
1188 uint16_t pad;
1189 } error;
1190 struct {
1191 uint16_t success;
1192 uint16_t retry;
1193 } tx;
1194} __aligned(4);
1195
1196#endif /* _IF_RUNREG_H_ */
1345union run_stats {
1346 uint32_t raw;
1347 struct {
1348 uint16_t fail;
1349 uint16_t pad;
1350 } error;
1351 struct {
1352 uint16_t success;
1353 uint16_t retry;
1354 } tx;
1355} __aligned(4);
1356
1357#endif /* _IF_RUNREG_H_ */