1/*- 2 * Copyright (c) 1998 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Lennart Augustsson (augustss@carlstedt.se) at 7 * Carlstedt Research & Technology. 8 * --- 15 unchanged lines hidden (view full) --- 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> |
32__FBSDID("$FreeBSD: head/sys/dev/usb/controller/ohci_pci.c 228483 2011-12-14 00:28:54Z hselasky $"); |
33 34/* 35 * USB Open Host Controller driver. 36 * 37 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf 38 */ 39 40/* The low level controller code for OHCI has been split into --- 28 unchanged lines hidden (view full) --- 69#include <dev/usb/usb_process.h> 70#include <dev/usb/usb_util.h> 71 72#include <dev/usb/usb_controller.h> 73#include <dev/usb/usb_bus.h> 74#include <dev/usb/usb_pci.h> 75#include <dev/usb/controller/ohci.h> 76#include <dev/usb/controller/ohcireg.h> |
77#include "usb_if.h" |
78 79#define PCI_OHCI_VENDORID_ACERLABS 0x10b9 80#define PCI_OHCI_VENDORID_AMD 0x1022 81#define PCI_OHCI_VENDORID_APPLE 0x106b 82#define PCI_OHCI_VENDORID_ATI 0x1002 83#define PCI_OHCI_VENDORID_CMDTECH 0x1095 84#define PCI_OHCI_VENDORID_NEC 0x1033 85#define PCI_OHCI_VENDORID_NVIDIA 0x12D2 86#define PCI_OHCI_VENDORID_NVIDIA2 0x10DE 87#define PCI_OHCI_VENDORID_OPTI 0x1045 88#define PCI_OHCI_VENDORID_SIS 0x1039 89#define PCI_OHCI_VENDORID_SUN 0x108e 90 91#define PCI_OHCI_BASE_REG 0x10 92 93static device_probe_t ohci_pci_probe; 94static device_attach_t ohci_pci_attach; 95static device_detach_t ohci_pci_detach; |
96static usb_take_controller_t ohci_pci_take_controller; |
97 98static int |
99ohci_pci_take_controller(device_t self) |
100{ |
101 uint32_t reg; 102 uint32_t int_line; |
103 |
104 if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) { 105 device_printf(self, "chip is in D%d mode " 106 "-- setting to D0\n", pci_get_powerstate(self)); 107 reg = pci_read_config(self, PCI_CBMEM, 4); 108 int_line = pci_read_config(self, PCIR_INTLINE, 4); 109 pci_set_powerstate(self, PCI_POWERSTATE_D0); 110 pci_write_config(self, PCI_CBMEM, reg, 4); 111 pci_write_config(self, PCIR_INTLINE, int_line, 4); 112 } |
113 return (0); 114} 115 116static const char * 117ohci_pci_match(device_t self) 118{ 119 uint32_t device_id = pci_get_devid(self); 120 --- 238 unchanged lines hidden (view full) --- 359 sc->sc_io_res); 360 sc->sc_io_res = NULL; 361 } 362 usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc); 363 364 return (0); 365} 366 |
367static device_method_t ohci_pci_methods[] = { 368 /* Device interface */ 369 DEVMETHOD(device_probe, ohci_pci_probe), 370 DEVMETHOD(device_attach, ohci_pci_attach), 371 DEVMETHOD(device_detach, ohci_pci_detach), 372 DEVMETHOD(device_suspend, bus_generic_suspend), 373 DEVMETHOD(device_resume, bus_generic_resume), 374 DEVMETHOD(device_shutdown, bus_generic_shutdown), 375 DEVMETHOD(usb_take_controller, ohci_pci_take_controller), |
376 |
377 DEVMETHOD_END 378}; 379 380static driver_t ohci_driver = { 381 .name = "ohci", 382 .methods = ohci_pci_methods, |
383 .size = sizeof(struct ohci_softc), 384}; 385 386static devclass_t ohci_devclass; 387 388DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, 0, 0); 389MODULE_DEPEND(ohci, usb, 1, 1, 1); |