1c1
< /* $FreeBSD: head/sys/dev/usb/controller/dwc_otg.c 266012 2014-05-14 11:32:15Z hselasky $ */
---
> /* $FreeBSD: head/sys/dev/usb/controller/dwc_otg.c 266394 2014-05-18 09:13:29Z hselasky $ */
92,94d91
< #define DWC_OTG_PC2SC(pc) \
< DWC_OTG_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
<
106a104,108
> #define DWC_OTG_MSK_GINT_THREAD_IRQ \
> (GINTSTS_USBRST | GINTSTS_ENUMDONE | GINTSTS_PRTINT | \
> GINTSTS_WKUPINT | GINTSTS_USBSUSP | GINTMSK_OTGINTMSK | \
> GINTSTS_SESSREQINT)
>
593c595
< dwc_otg_host_channel_alloc(struct dwc_otg_td *td, uint8_t which, uint8_t is_out)
---
> dwc_otg_host_channel_alloc(struct dwc_otg_softc *sc, struct dwc_otg_td *td, uint8_t which, uint8_t is_out)
595d596
< struct dwc_otg_softc *sc;
607,609d607
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
<
673c671
< dwc_otg_host_channel_free(struct dwc_otg_td *td, uint8_t which)
---
> dwc_otg_host_channel_free(struct dwc_otg_softc *sc, struct dwc_otg_td *td, uint8_t which)
675d672
< struct dwc_otg_softc *sc;
687,689d683
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
<
717c711
< dwc_otg_host_setup_tx(struct dwc_otg_td *td)
---
> dwc_otg_host_setup_tx(struct dwc_otg_softc *sc, struct dwc_otg_td *td)
720d713
< struct dwc_otg_softc *sc;
725,727d717
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
<
817c807
< dwc_otg_host_channel_free(td, 0);
---
> dwc_otg_host_channel_free(sc, td, 0);
840c830
< if (dwc_otg_host_channel_alloc(td, 0, 1)) {
---
> if (dwc_otg_host_channel_alloc(sc, td, 0, 1)) {
878c868
< dwc_otg_host_channel_free(td, 0);
---
> dwc_otg_host_channel_free(sc, td, 0);
893c883
< if (dwc_otg_host_channel_alloc(td, 0, 0)) {
---
> if (dwc_otg_host_channel_alloc(sc, td, 0, 0)) {
920c910
< dwc_otg_host_channel_free(td, 0);
---
> dwc_otg_host_channel_free(sc, td, 0);
925c915
< dwc_otg_setup_rx(struct dwc_otg_td *td)
---
> dwc_otg_setup_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td)
927d916
< struct dwc_otg_softc *sc;
932,934d920
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
<
1075c1061
< dwc_otg_host_rate_check(struct dwc_otg_td *td)
---
> dwc_otg_host_rate_check(struct dwc_otg_softc *sc, struct dwc_otg_td *td)
1077,1081d1062
< struct dwc_otg_softc *sc;
<
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
<
1107c1088
< dwc_otg_host_data_rx(struct dwc_otg_td *td)
---
> dwc_otg_host_data_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td)
1109d1089
< struct dwc_otg_softc *sc;
1116,1117d1095
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
1331c1309
< dwc_otg_host_channel_free(td, td->tt_channel_tog);
---
> dwc_otg_host_channel_free(sc, td, td->tt_channel_tog);
1349c1327
< dwc_otg_host_rate_check(td)) {
---
> dwc_otg_host_rate_check(sc, td)) {
1355c1333
< if (dwc_otg_host_channel_alloc(td, td->tt_channel_tog, 0)) {
---
> if (dwc_otg_host_channel_alloc(sc, td, td->tt_channel_tog, 0)) {
1420,1421c1398,1399
< dwc_otg_host_channel_free(td, 0);
< dwc_otg_host_channel_free(td, 1);
---
> dwc_otg_host_channel_free(sc, td, 0);
> dwc_otg_host_channel_free(sc, td, 1);
1437c1415
< if (dwc_otg_host_channel_alloc(td, 0, 0)) {
---
> if (dwc_otg_host_channel_alloc(sc, td, 0, 0)) {
1471,1472c1449,1450
< dwc_otg_host_channel_free(td, 0);
< dwc_otg_host_channel_free(td, 1);
---
> dwc_otg_host_channel_free(sc, td, 0);
> dwc_otg_host_channel_free(sc, td, 1);
1477c1455
< dwc_otg_data_rx(struct dwc_otg_td *td)
---
> dwc_otg_data_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td)
1479d1456
< struct dwc_otg_softc *sc;
1486,1488d1462
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
<
1590c1564
< dwc_otg_host_data_tx(struct dwc_otg_td *td)
---
> dwc_otg_host_data_tx(struct dwc_otg_softc *sc, struct dwc_otg_td *td)
1592d1565
< struct dwc_otg_softc *sc;
1599,1600d1571
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
1726c1697
< dwc_otg_host_channel_free(td, td->tt_channel_tog);
---
> dwc_otg_host_channel_free(sc, td, td->tt_channel_tog);
1733c1704
< if (dwc_otg_host_channel_alloc(td, 0, 1))
---
> if (dwc_otg_host_channel_alloc(sc, td, 0, 1))
1744,1745c1715,1716
< dwc_otg_host_channel_free(td, 0);
< dwc_otg_host_channel_free(td, 1);
---
> dwc_otg_host_channel_free(sc, td, 0);
> dwc_otg_host_channel_free(sc, td, 1);
1760c1731
< } else if (dwc_otg_host_rate_check(td)) {
---
> } else if (dwc_otg_host_rate_check(sc, td)) {
1766c1737
< if (dwc_otg_host_channel_alloc(td, 0, 1)) {
---
> if (dwc_otg_host_channel_alloc(sc, td, 0, 1)) {
1915c1886
< dwc_otg_host_channel_free(td, td->tt_channel_tog);
---
> dwc_otg_host_channel_free(sc, td, td->tt_channel_tog);
1931c1902
< if (dwc_otg_host_channel_alloc(td, td->tt_channel_tog, 0)) {
---
> if (dwc_otg_host_channel_alloc(sc, td, td->tt_channel_tog, 0)) {
1989,1990c1960,1961
< dwc_otg_host_channel_free(td, 0);
< dwc_otg_host_channel_free(td, 1);
---
> dwc_otg_host_channel_free(sc, td, 0);
> dwc_otg_host_channel_free(sc, td, 1);
1995c1966
< dwc_otg_data_tx(struct dwc_otg_td *td)
---
> dwc_otg_data_tx(struct dwc_otg_softc *sc, struct dwc_otg_td *td)
1997d1967
< struct dwc_otg_softc *sc;
2007,2009d1976
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
<
2187c2154
< dwc_otg_data_tx_sync(struct dwc_otg_td *td)
---
> dwc_otg_data_tx_sync(struct dwc_otg_softc *sc, struct dwc_otg_td *td)
2189d2155
< struct dwc_otg_softc *sc;
2192,2194d2157
< /* get pointer to softc */
< sc = DWC_OTG_PC2SC(td->pc);
<
2231,2232c2194,2195
< static uint8_t
< dwc_otg_xfer_do_fifo(struct usb_xfer *xfer)
---
> static void
> dwc_otg_xfer_do_fifo(struct dwc_otg_softc *sc, struct usb_xfer *xfer)
2241a2205,2206
> if (td == NULL)
> return;
2244c2209
< if ((td->func) (td)) {
---
> if ((td->func) (sc, td)) {
2275c2240
< return (1); /* not complete */
---
> return;
2278c2243,2245
< /* compute all actual lengths */
---
> xfer->td_transfer_cache = NULL;
> sc->sc_xfer_complete = 1;
> }
2280,2281c2247,2260
< dwc_otg_standard_done(xfer);
< return (0); /* complete */
---
> static uint8_t
> dwc_otg_xfer_do_complete(struct dwc_otg_softc *sc, struct usb_xfer *xfer)
> {
> struct dwc_otg_td *td;
>
> DPRINTFN(9, "\n");
>
> td = xfer->td_transfer_cache;
> if (td == NULL) {
> /* compute all actual lengths */
> dwc_otg_standard_done(xfer);
> return (1);
> }
> return (0);
2294a2274,2275
> USB_BUS_SPIN_LOCK(&sc->sc_bus);
>
2308a2290,2291
> USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
>
2624,2630c2607,2609
< /* scan for completion events first */
< TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
< if (!dwc_otg_xfer_do_fifo(xfer)) {
< /* queue has been modified */
< goto repeat;
< }
< }
---
> /* execute FIFOs */
> TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry)
> dwc_otg_xfer_do_fifo(sc, xfer);
2642c2621
< if (sc->sc_flags.status_device_mode == 0) {
---
> if (sc->sc_flags.status_device_mode == 0 && sc->sc_xfer_complete == 0) {
2649a2629,2640
> dwc_otg_interrupt_complete(struct dwc_otg_softc *sc)
> {
> struct usb_xfer *xfer;
> repeat:
> /* scan for completion events */
> TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
> if (dwc_otg_xfer_do_complete(sc, xfer))
> goto repeat;
> }
> }
>
> static void
2681a2673,2716
> int
> dwc_otg_filter_interrupt(void *arg)
> {
> struct dwc_otg_softc *sc = arg;
> int retval = FILTER_HANDLED;
> uint32_t status;
>
> /* read and clear interrupt status */
> status = DWC_OTG_READ_4(sc, DOTG_GINTSTS);
>
> /* clear interrupts we are handling here */
> DWC_OTG_WRITE_4(sc, DOTG_GINTSTS, status & ~DWC_OTG_MSK_GINT_THREAD_IRQ);
>
> /* check for USB state change interrupts */
> if ((status & DWC_OTG_MSK_GINT_THREAD_IRQ) != 0)
> retval = FILTER_SCHEDULE_THREAD;
>
> /* clear all IN endpoint interrupts */
> if (status & GINTSTS_IEPINT) {
> uint32_t temp;
> uint8_t x;
>
> for (x = 0; x != sc->sc_dev_in_ep_max; x++) {
> temp = DWC_OTG_READ_4(sc, DOTG_DIEPINT(x));
> if (temp & DIEPMSK_XFERCOMPLMSK) {
> DWC_OTG_WRITE_4(sc, DOTG_DIEPINT(x),
> DIEPMSK_XFERCOMPLMSK);
> }
> }
> }
>
> USB_BUS_SPIN_LOCK(&sc->sc_bus);
>
> /* poll FIFOs, if any */
> dwc_otg_interrupt_poll(sc);
>
> if (sc->sc_xfer_complete != 0)
> retval = FILTER_SCHEDULE_THREAD;
>
> USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
>
> return (retval);
> }
>
2683c2718
< dwc_otg_interrupt(struct dwc_otg_softc *sc)
---
> dwc_otg_interrupt(void *arg)
2684a2720
> struct dwc_otg_softc *sc = arg;
2687a2724
> USB_BUS_SPIN_LOCK(&sc->sc_bus);
2691d2727
< DWC_OTG_WRITE_4(sc, DOTG_GINTSTS, status);
2692a2729,2731
> /* clear interrupts we are handling here */
> DWC_OTG_WRITE_4(sc, DOTG_GINTSTS, status & DWC_OTG_MSK_GINT_THREAD_IRQ);
>
2861,2864c2900,2901
< /* clear all IN endpoint interrupts */
< if (status & GINTSTS_IEPINT) {
< uint32_t temp;
< uint8_t x;
---
> if (sc->sc_xfer_complete != 0) {
> sc->sc_xfer_complete = 0;
2866,2871c2903,2909
< for (x = 0; x != sc->sc_dev_in_ep_max; x++) {
< temp = DWC_OTG_READ_4(sc, DOTG_DIEPINT(x));
< if (temp & DIEPMSK_XFERCOMPLMSK) {
< DWC_OTG_WRITE_4(sc, DOTG_DIEPINT(x),
< DIEPMSK_XFERCOMPLMSK);
< }
---
> /* complete FIFOs, if any */
> dwc_otg_interrupt_complete(sc);
>
> if (sc->sc_flags.status_device_mode == 0) {
> /* update host transfer schedule, so that new transfers can be issued */
> if (dwc_otg_update_host_transfer_schedule(sc))
> dwc_otg_interrupt_poll(sc);
2875,2877c2913
< /* poll FIFO(s) */
< dwc_otg_interrupt_poll(sc);
<
---
> USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
3241,3243c3277,3282
< if (sc->sc_flags.status_device_mode != 0 &&
< dwc_otg_xfer_do_fifo(xfer) == 0)
< goto done;
---
> if (sc->sc_flags.status_device_mode != 0) {
> dwc_otg_xfer_do_fifo(sc, xfer);
> if (dwc_otg_xfer_do_complete(sc, xfer))
> return;
> }
> USB_BUS_SPIN_LOCK(&sc->sc_bus);
3277c3316,3317
< done:;
---
> done:
> USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
3413a3454,3455
> struct dwc_otg_softc *sc = DWC_OTG_BUS2SC(xfer->xroot->bus);
>
3418c3460
< DPRINTFN(15, "disabled interrupts!\n");
---
> /* Interrupts are cleared by the interrupt handler */
3425,3426c3467,3468
< dwc_otg_host_channel_free(td, 0);
< dwc_otg_host_channel_free(td, 1);
---
> dwc_otg_host_channel_free(sc, td, 0);
> dwc_otg_host_channel_free(sc, td, 1);
3486a3529
> dwc_otg_interrupt_complete(sc);
3550a3594
> dwc_otg_interrupt_complete(sc);
3848a3893
> USB_BUS_SPIN_LOCK(&sc->sc_bus);
3849a3895,3901
> dwc_otg_interrupt_complete(sc);
> if (sc->sc_flags.status_device_mode == 0) {
> /* update host transfer schedule, so that new transfers can be issued */
> if (dwc_otg_update_host_transfer_schedule(sc))
> dwc_otg_interrupt_poll(sc);
> }
> USB_BUS_SPIN_UNLOCK(&sc->sc_bus);