| if_tsec.h (182189) | if_tsec.h (188711) |
|---|---|
| 1/*- 2 * Copyright (C) 2006-2007 Semihalf, Piotr Kruszynski <ppk@semihalf.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 8 unchanged lines hidden (view full) --- 17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * | 1/*- 2 * Copyright (C) 2006-2007 Semihalf, Piotr Kruszynski <ppk@semihalf.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 8 unchanged lines hidden (view full) --- 17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * |
| 25 * $FreeBSD: head/sys/dev/tsec/if_tsec.h 182189 2008-08-26 10:41:49Z raj $ | 25 * $FreeBSD: head/sys/dev/tsec/if_tsec.h 188711 2009-02-17 14:57:05Z raj $ |
| 26 */ 27 28#ifndef _IF_TSEC_H 29#define _IF_TSEC_H 30 31#define TSEC_RX_NUM_DESC 256 32#define TSEC_TX_NUM_DESC 256 33 | 26 */ 27 28#ifndef _IF_TSEC_H 29#define _IF_TSEC_H 30 31#define TSEC_RX_NUM_DESC 256 32#define TSEC_TX_NUM_DESC 256 33 |
| 34/* Interrupt Coalescing types */ 35#define TSEC_IC_RX 0 36#define TSEC_IC_TX 1 37 38/* eTSEC ID */ 39#define TSEC_ETSEC_ID 0x0124 40 41/* Frame sizes */ 42#define TSEC_MIN_FRAME_SIZE 64 43#define TSEC_MAX_FRAME_SIZE 9600 44 |
|
| 34struct tsec_softc { 35 /* XXX MII bus requires that struct ifnet is first!!! */ 36 struct ifnet *tsec_ifp; 37 38 struct mtx transmit_lock; /* transmitter lock */ 39 struct mtx receive_lock; /* receiver lock */ 40 41 device_t dev; --- 37 unchanged lines hidden (view full) --- 79 struct resource *sc_receive_ires; 80 void *sc_receive_ihand; 81 int sc_receive_irid; 82 struct resource *sc_error_ires; 83 void *sc_error_ihand; 84 int sc_error_irid; 85 86 int tsec_if_flags; | 45struct tsec_softc { 46 /* XXX MII bus requires that struct ifnet is first!!! */ 47 struct ifnet *tsec_ifp; 48 49 struct mtx transmit_lock; /* transmitter lock */ 50 struct mtx receive_lock; /* receiver lock */ 51 52 device_t dev; --- 37 unchanged lines hidden (view full) --- 90 struct resource *sc_receive_ires; 91 void *sc_receive_ihand; 92 int sc_receive_irid; 93 struct resource *sc_error_ires; 94 void *sc_error_ihand; 95 int sc_error_irid; 96 97 int tsec_if_flags; |
| 98 int is_etsec; |
|
| 87 88 /* Watchdog and MII tick related */ 89 struct callout tsec_callout; 90 int tsec_watchdog; 91 92 /* TX maps */ 93 bus_dmamap_t tx_map_data[TSEC_TX_NUM_DESC]; 94 --- 6 unchanged lines hidden (view full) --- 101 uint32_t tx_map_used_get_cnt; 102 uint32_t tx_map_used_put_cnt; 103 bus_dmamap_t *tx_map_used_data[TSEC_TX_NUM_DESC]; 104 105 /* mbufs in TX queue */ 106 uint32_t tx_mbuf_used_get_cnt; 107 uint32_t tx_mbuf_used_put_cnt; 108 struct mbuf *tx_mbuf_used_data[TSEC_TX_NUM_DESC]; | 99 100 /* Watchdog and MII tick related */ 101 struct callout tsec_callout; 102 int tsec_watchdog; 103 104 /* TX maps */ 105 bus_dmamap_t tx_map_data[TSEC_TX_NUM_DESC]; 106 --- 6 unchanged lines hidden (view full) --- 113 uint32_t tx_map_used_get_cnt; 114 uint32_t tx_map_used_put_cnt; 115 bus_dmamap_t *tx_map_used_data[TSEC_TX_NUM_DESC]; 116 117 /* mbufs in TX queue */ 118 uint32_t tx_mbuf_used_get_cnt; 119 uint32_t tx_mbuf_used_put_cnt; 120 struct mbuf *tx_mbuf_used_data[TSEC_TX_NUM_DESC]; |
| 121 122 /* interrupt coalescing */ 123 struct mtx ic_lock; 124 uint32_t rx_ic_time; /* RW, valid values 0..65535 */ 125 uint32_t rx_ic_count; /* RW, valid values 0..255 */ 126 uint32_t tx_ic_time; 127 uint32_t tx_ic_count; 128 129 /* currently received frame */ 130 struct mbuf *frame; |
|
| 109}; 110 111/* interface to get/put generic objects */ 112#define TSEC_CNT_INIT(cnt, wrap) ((cnt) = ((wrap) - 1)) 113 114#define TSEC_INC(count, wrap) (count = ((count) + 1) & ((wrap) - 1)) 115 116#define TSEC_GET_GENERIC(hand, tab, count, wrap) \ --- 113 unchanged lines hidden (view full) --- 230 mtx_assert(&(sc)->receive_lock, MA_NOTOWNED); \ 231 mtx_lock(&(sc)->transmit_lock); \ 232} while (0) 233 234#define TSEC_TRANSMIT_UNLOCK(sc) mtx_unlock(&(sc)->transmit_lock) 235#define TSEC_TRANSMIT_LOCK_ASSERT(sc) mtx_assert(&(sc)->transmit_lock, MA_OWNED) 236 237/* Lock for receiver */ | 131}; 132 133/* interface to get/put generic objects */ 134#define TSEC_CNT_INIT(cnt, wrap) ((cnt) = ((wrap) - 1)) 135 136#define TSEC_INC(count, wrap) (count = ((count) + 1) & ((wrap) - 1)) 137 138#define TSEC_GET_GENERIC(hand, tab, count, wrap) \ --- 113 unchanged lines hidden (view full) --- 252 mtx_assert(&(sc)->receive_lock, MA_NOTOWNED); \ 253 mtx_lock(&(sc)->transmit_lock); \ 254} while (0) 255 256#define TSEC_TRANSMIT_UNLOCK(sc) mtx_unlock(&(sc)->transmit_lock) 257#define TSEC_TRANSMIT_LOCK_ASSERT(sc) mtx_assert(&(sc)->transmit_lock, MA_OWNED) 258 259/* Lock for receiver */ |
| 238#define TSEC_RECEIVE_LOCK(sc) do { \ 239 mtx_assert(&(sc)->transmit_lock, MA_NOTOWNED); \ 240 mtx_lock(&(sc)->receive_lock); \ | 260#define TSEC_RECEIVE_LOCK(sc) do { \ 261 mtx_assert(&(sc)->transmit_lock, MA_NOTOWNED); \ 262 mtx_lock(&(sc)->receive_lock); \ |
| 241} while (0) 242 243#define TSEC_RECEIVE_UNLOCK(sc) mtx_unlock(&(sc)->receive_lock) 244#define TSEC_RECEIVE_LOCK_ASSERT(sc) mtx_assert(&(sc)->receive_lock, MA_OWNED) 245 | 263} while (0) 264 265#define TSEC_RECEIVE_UNLOCK(sc) mtx_unlock(&(sc)->receive_lock) 266#define TSEC_RECEIVE_LOCK_ASSERT(sc) mtx_assert(&(sc)->receive_lock, MA_OWNED) 267 |
| 268/* Lock for interrupts coalescing */ 269#define TSEC_IC_LOCK(sc) do { \ 270 mtx_assert(&(sc)->ic_lock, MA_NOTOWNED); \ 271 mtx_lock(&(sc)->ic_lock); \ 272} while (0) 273 274#define TSEC_IC_UNLOCK(sc) mtx_unlock(&(sc)->ic_lock) 275#define TSEC_IC_LOCK_ASSERT(sc) mtx_assert(&(sc)->ic_lock, MA_OWNED) 276 |
|
| 246/* Global tsec lock (with all locks) */ 247#define TSEC_GLOBAL_LOCK(sc) do { \ 248 if ((mtx_owned(&(sc)->transmit_lock) ? 1 : 0) != \ 249 (mtx_owned(&(sc)->receive_lock) ? 1 : 0)) { \ 250 panic("tsec deadlock possibility detection!"); \ 251 } \ 252 mtx_lock(&(sc)->transmit_lock); \ 253 mtx_lock(&(sc)->receive_lock); \ --- 14 unchanged lines hidden (view full) --- 268 mtx_unlock(&(sc)->receive_lock);\ 269} while (0) 270 271#define TSEC_GLOBAL_TO_RECEIVE_LOCK(sc) do { \ 272 mtx_unlock(&(sc)->transmit_lock);\ 273} while (0) 274 275struct tsec_desc { | 277/* Global tsec lock (with all locks) */ 278#define TSEC_GLOBAL_LOCK(sc) do { \ 279 if ((mtx_owned(&(sc)->transmit_lock) ? 1 : 0) != \ 280 (mtx_owned(&(sc)->receive_lock) ? 1 : 0)) { \ 281 panic("tsec deadlock possibility detection!"); \ 282 } \ 283 mtx_lock(&(sc)->transmit_lock); \ 284 mtx_lock(&(sc)->receive_lock); \ --- 14 unchanged lines hidden (view full) --- 299 mtx_unlock(&(sc)->receive_lock);\ 300} while (0) 301 302#define TSEC_GLOBAL_TO_RECEIVE_LOCK(sc) do { \ 303 mtx_unlock(&(sc)->transmit_lock);\ 304} while (0) 305 306struct tsec_desc { |
| 276 volatile uint16_t flags; /* descriptor flags */ 277 volatile uint16_t length; /* buffer length */ 278 volatile uint32_t bufptr; /* buffer pointer */ | 307 volatile uint16_t flags; /* descriptor flags */ 308 volatile uint16_t length; /* buffer length */ 309 volatile uint32_t bufptr; /* buffer pointer */ |
| 279}; 280 281#define TSEC_READ_RETRY 10000 282#define TSEC_READ_DELAY 100 283 | 310}; 311 312#define TSEC_READ_RETRY 10000 313#define TSEC_READ_DELAY 100 314 |
| 315/* Structures and defines for TCP/IP Off-load */ 316struct tsec_tx_fcb { 317 volatile uint16_t flags; 318 volatile uint8_t l4_offset; 319 volatile uint8_t l3_offset; 320 volatile uint16_t ph_chsum; 321 volatile uint16_t vlan; 322}; 323 324struct tsec_rx_fcb { 325 volatile uint16_t flags; 326 volatile uint8_t rq_index; 327 volatile uint8_t protocol; 328 volatile uint16_t unused; 329 volatile uint16_t vlan; 330}; 331 332#define TSEC_CHECKSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 333 334#define TSEC_TX_FCB_IP4 TSEC_TX_FCB_L3_IS_IP 335#define TSEC_TX_FCB_IP6 (TSEC_TX_FCB_L3_IS_IP | TSEC_TX_FCB_L3_IS_IP6) 336 337#define TSEC_TX_FCB_TCP TSEC_TX_FCB_L4_IS_TCP_UDP 338#define TSEC_TX_FCB_UDP (TSEC_TX_FCB_L4_IS_TCP_UDP | TSEC_TX_FCB_L4_IS_UDP) 339 340#define TSEC_RX_FCB_IP_CSUM_CHECKED(flags) \ 341 ((flags & (TSEC_RX_FCB_IP_FOUND | TSEC_RX_FCB_IP6_FOUND | \ 342 TSEC_RX_FCB_IP_CSUM | TSEC_RX_FCB_PARSE_ERROR)) \ 343 == (TSEC_RX_FCB_IP_FOUND | TSEC_RX_FCB_IP_CSUM)) 344 345#define TSEC_RX_FCB_TCP_UDP_CSUM_CHECKED(flags) \ 346 ((flags & (TSEC_RX_FCB_TCP_UDP_FOUND | TSEC_RX_FCB_TCP_UDP_CSUM \ 347 | TSEC_RX_FCB_PARSE_ERROR)) \ 348 == (TSEC_RX_FCB_TCP_UDP_FOUND | TSEC_RX_FCB_TCP_UDP_CSUM)) 349 |
|
| 284/* Prototypes */ 285extern devclass_t tsec_devclass; 286 287int tsec_attach(struct tsec_softc *sc); 288int tsec_detach(struct tsec_softc *sc); 289 290void tsec_error_intr(void *arg); 291void tsec_receive_intr(void *arg); --- 12 unchanged lines hidden --- | 350/* Prototypes */ 351extern devclass_t tsec_devclass; 352 353int tsec_attach(struct tsec_softc *sc); 354int tsec_detach(struct tsec_softc *sc); 355 356void tsec_error_intr(void *arg); 357void tsec_receive_intr(void *arg); --- 12 unchanged lines hidden --- |